Use PCIR_BAR(x) instead of PCIR_MAPS.
[dragonfly/port-amd64.git] / sys / dev / disk / aic7xxx / ahc_pci.c
blob5d19169563f5afff580918d0654582f6348a6039
1 /*
2 * FreeBSD, PCI product support functions
4 * Copyright (c) 1995-2001 Justin T. Gibbs
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification, immediately at the beginning of the file.
13 * 2. The name of the author may not be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU Public License ("GPL").
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
31 * $Id: //depot/aic7xxx/freebsd/dev/aic7xxx/ahc_pci.c#13 $
33 * $FreeBSD: src/sys/dev/aic7xxx/ahc_pci.c,v 1.56 2003/09/02 17:30:34 jhb Exp $
34 * $DragonFly: src/sys/dev/disk/aic7xxx/ahc_pci.c,v 1.9 2007/07/05 05:08:32 pavalos Exp $
37 #include "aic7xxx_osm.h"
39 #ifdef AHC_PCI_CONFIG
41 #define AHC_PCI_IOADDR PCIR_BAR(0) /* I/O Address */
42 #define AHC_PCI_MEMADDR PCIR_BAR(1) /* Mem I/O Address */
44 static int ahc_pci_probe(device_t dev);
45 static int ahc_pci_attach(device_t dev);
47 static device_method_t ahc_pci_device_methods[] = {
48 /* Device interface */
49 DEVMETHOD(device_probe, ahc_pci_probe),
50 DEVMETHOD(device_attach, ahc_pci_attach),
51 DEVMETHOD(device_detach, ahc_detach),
52 { 0, 0 }
55 static driver_t ahc_pci_driver = {
56 "ahc",
57 ahc_pci_device_methods,
58 sizeof(struct ahc_softc)
61 DRIVER_MODULE(ahc_pci, pci, ahc_pci_driver, ahc_devclass, 0, 0);
62 DRIVER_MODULE(ahc_pci, cardbus, ahc_pci_driver, ahc_devclass, 0, 0);
63 MODULE_DEPEND(ahc_pci, ahc, 1, 1, 1);
64 MODULE_VERSION(ahc_pci, 1);
66 static int
67 ahc_pci_probe(device_t dev)
69 struct ahc_pci_identity *entry;
71 entry = ahc_find_pci_device(dev);
72 if (entry != NULL) {
73 device_set_desc(dev, entry->name);
74 return (0);
76 return (ENXIO);
79 static int
80 ahc_pci_attach(device_t dev)
82 struct ahc_pci_identity *entry;
83 struct ahc_softc *ahc;
84 char *name;
85 int error;
87 entry = ahc_find_pci_device(dev);
88 if (entry == NULL)
89 return (ENXIO);
92 * Allocate a softc for this card and
93 * set it up for attachment by our
94 * common detect routine.
96 name = kmalloc(strlen(device_get_nameunit(dev)) + 1, M_DEVBUF, M_WAITOK);
97 strcpy(name, device_get_nameunit(dev));
98 ahc = ahc_alloc(dev, name);
99 if (ahc == NULL)
100 return (ENOMEM);
102 ahc_set_unit(ahc, device_get_unit(dev));
105 * Should we bother disabling 39Bit addressing
106 * based on installed memory?
108 if (sizeof(bus_addr_t) > 4)
109 ahc->flags |= AHC_39BIT_ADDRESSING;
111 /* Allocate a dmatag for our SCB DMA maps */
112 /* XXX Should be a child of the PCI bus dma tag */
113 error = bus_dma_tag_create(/*parent*/NULL, /*alignment*/1,
114 /*boundary*/0,
115 (ahc->flags & AHC_39BIT_ADDRESSING)
116 ? 0x7FFFFFFFFFULL
117 : BUS_SPACE_MAXADDR_32BIT,
118 /*highaddr*/BUS_SPACE_MAXADDR,
119 /*filter*/NULL, /*filterarg*/NULL,
120 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
121 /*nsegments*/AHC_NSEG,
122 /*maxsegsz*/AHC_MAXTRANSFER_SIZE,
123 /*flags*/0,
124 &ahc->parent_dmat);
126 if (error != 0) {
127 kprintf("ahc_pci_attach: Could not allocate DMA tag "
128 "- error %d\n", error);
129 ahc_free(ahc);
130 return (ENOMEM);
132 ahc->dev_softc = dev;
133 error = ahc_pci_config(ahc, entry);
134 if (error != 0) {
135 ahc_free(ahc);
136 return (error);
139 ahc_attach(ahc);
140 return (0);
144 ahc_pci_map_registers(struct ahc_softc *ahc)
146 struct resource *regs;
147 u_int command;
148 int regs_type;
149 int regs_id;
150 int allow_memio;
152 command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, /*bytes*/1);
153 regs = NULL;
154 regs_type = 0;
155 regs_id = 0;
157 /* Retrieve the per-device 'allow_memio' hint */
158 if (resource_int_value(device_get_name(ahc->dev_softc),
159 device_get_unit(ahc->dev_softc),
160 "allow_memio", &allow_memio) != 0) {
161 if (bootverbose)
162 device_printf(ahc->dev_softc, "Defaulting to MEMIO ");
163 #ifdef AHC_ALLOW_MEMIO
164 if (bootverbose)
165 kprintf("on\n");
166 allow_memio = 1;
167 #else
168 if (bootverbose)
169 kprintf("off\n");
170 allow_memio = 0;
171 #endif
174 if ((allow_memio != 0) && (command & PCIM_CMD_MEMEN) != 0) {
176 regs_type = SYS_RES_MEMORY;
177 regs_id = AHC_PCI_MEMADDR;
178 regs = bus_alloc_resource(ahc->dev_softc, regs_type,
179 &regs_id, 0, ~0, 1, RF_ACTIVE);
180 if (regs != NULL) {
181 ahc->tag = rman_get_bustag(regs);
182 ahc->bsh = rman_get_bushandle(regs);
185 * Do a quick test to see if memory mapped
186 * I/O is functioning correctly.
188 if (ahc_pci_test_register_access(ahc) != 0) {
189 device_printf(ahc->dev_softc,
190 "PCI Device %d:%d:%d failed memory "
191 "mapped test. Using PIO.\n",
192 ahc_get_pci_bus(ahc->dev_softc),
193 ahc_get_pci_slot(ahc->dev_softc),
194 ahc_get_pci_function(ahc->dev_softc));
195 bus_release_resource(ahc->dev_softc, regs_type,
196 regs_id, regs);
197 regs = NULL;
198 } else {
199 command &= ~PCIM_CMD_PORTEN;
200 ahc_pci_write_config(ahc->dev_softc,
201 PCIR_COMMAND,
202 command, /*bytes*/1);
207 if (regs == NULL && (command & PCIM_CMD_PORTEN) != 0) {
208 regs_type = SYS_RES_IOPORT;
209 regs_id = AHC_PCI_IOADDR;
210 regs = bus_alloc_resource(ahc->dev_softc, regs_type,
211 &regs_id, 0, ~0, 1, RF_ACTIVE);
212 if (regs != NULL) {
213 ahc->tag = rman_get_bustag(regs);
214 ahc->bsh = rman_get_bushandle(regs);
215 command &= ~PCIM_CMD_MEMEN;
216 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
217 command, /*bytes*/1);
220 if (regs == NULL) {
221 device_printf(ahc->dev_softc,
222 "can't allocate register resources\n");
223 return (ENOMEM);
225 ahc->platform_data->regs_res_type = regs_type;
226 ahc->platform_data->regs_res_id = regs_id;
227 ahc->platform_data->regs = regs;
228 return (0);
232 ahc_pci_map_int(struct ahc_softc *ahc)
234 int zero;
236 zero = 0;
237 ahc->platform_data->irq =
238 bus_alloc_resource(ahc->dev_softc, SYS_RES_IRQ, &zero,
239 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
240 if (ahc->platform_data->irq == NULL) {
241 device_printf(ahc->dev_softc,
242 "bus_alloc_resource() failed to allocate IRQ\n");
243 return (ENOMEM);
245 ahc->platform_data->irq_res_type = SYS_RES_IRQ;
246 return (ahc_map_int(ahc));
249 void
250 ahc_power_state_change(struct ahc_softc *ahc, ahc_power_state new_state)
252 uint32_t cap;
253 u_int cap_offset;
256 * Traverse the capability list looking for
257 * the power management capability.
259 cap = 0;
260 cap_offset = ahc_pci_read_config(ahc->dev_softc,
261 PCIR_CAP_PTR, /*bytes*/1);
262 while (cap_offset != 0) {
264 cap = ahc_pci_read_config(ahc->dev_softc,
265 cap_offset, /*bytes*/4);
266 if ((cap & 0xFF) == 1
267 && ((cap >> 16) & 0x3) > 0) {
268 uint32_t pm_control;
270 pm_control = ahc_pci_read_config(ahc->dev_softc,
271 cap_offset + 4,
272 /*bytes*/2);
273 pm_control &= ~0x3;
274 pm_control |= new_state;
275 ahc_pci_write_config(ahc->dev_softc,
276 cap_offset + 4,
277 pm_control, /*bytes*/2);
278 break;
280 cap_offset = (cap >> 8) & 0xFF;
284 #endif