- Test m_pkthdr.fw_flags against DUMMYNET_MBUF_TAGGED before trying to locate
[dragonfly/netmp.git] / contrib / gcc-4.1 / gcc / caller-save.c
blobea85044cfec96cfd04762a5f18a16c78b1930f70
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "rtl.h"
27 #include "regs.h"
28 #include "insn-config.h"
29 #include "flags.h"
30 #include "hard-reg-set.h"
31 #include "recog.h"
32 #include "basic-block.h"
33 #include "reload.h"
34 #include "function.h"
35 #include "expr.h"
36 #include "toplev.h"
37 #include "tm_p.h"
39 #ifndef MAX_MOVE_MAX
40 #define MAX_MOVE_MAX MOVE_MAX
41 #endif
43 #ifndef MIN_UNITS_PER_WORD
44 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
45 #endif
47 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
49 /* Modes for each hard register that we can save. The smallest mode is wide
50 enough to save the entire contents of the register. When saving the
51 register because it is live we first try to save in multi-register modes.
52 If that is not possible the save is done one register at a time. */
54 static enum machine_mode
55 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
57 /* For each hard register, a place on the stack where it can be saved,
58 if needed. */
60 static rtx
61 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
63 /* We will only make a register eligible for caller-save if it can be
64 saved in its widest mode with a simple SET insn as long as the memory
65 address is valid. We record the INSN_CODE is those insns here since
66 when we emit them, the addresses might not be valid, so they might not
67 be recognized. */
69 static int
70 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
71 static int
72 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
74 /* Set of hard regs currently residing in save area (during insn scan). */
76 static HARD_REG_SET hard_regs_saved;
78 /* Number of registers currently in hard_regs_saved. */
80 static int n_regs_saved;
82 /* Computed by mark_referenced_regs, all regs referenced in a given
83 insn. */
84 static HARD_REG_SET referenced_regs;
87 static void mark_set_regs (rtx, rtx, void *);
88 static void mark_referenced_regs (rtx);
89 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
90 enum machine_mode *);
91 static int insert_restore (struct insn_chain *, int, int, int,
92 enum machine_mode *);
93 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
94 rtx);
95 static void add_stored_regs (rtx, rtx, void *);
97 /* Initialize for caller-save.
99 Look at all the hard registers that are used by a call and for which
100 regclass.c has not already excluded from being used across a call.
102 Ensure that we can find a mode to save the register and that there is a
103 simple insn to save and restore the register. This latter check avoids
104 problems that would occur if we tried to save the MQ register of some
105 machines directly into memory. */
107 void
108 init_caller_save (void)
110 rtx addr_reg;
111 int offset;
112 rtx address;
113 int i, j;
114 enum machine_mode mode;
115 rtx savepat, restpat;
116 rtx test_reg, test_mem;
117 rtx saveinsn, restinsn;
119 /* First find all the registers that we need to deal with and all
120 the modes that they can have. If we can't find a mode to use,
121 we can't have the register live over calls. */
123 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
125 if (call_used_regs[i] && ! call_fixed_regs[i])
127 for (j = 1; j <= MOVE_MAX_WORDS; j++)
129 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
130 VOIDmode);
131 if (regno_save_mode[i][j] == VOIDmode && j == 1)
133 call_fixed_regs[i] = 1;
134 SET_HARD_REG_BIT (call_fixed_reg_set, i);
138 else
139 regno_save_mode[i][1] = VOIDmode;
142 /* The following code tries to approximate the conditions under which
143 we can easily save and restore a register without scratch registers or
144 other complexities. It will usually work, except under conditions where
145 the validity of an insn operand is dependent on the address offset.
146 No such cases are currently known.
148 We first find a typical offset from some BASE_REG_CLASS register.
149 This address is chosen by finding the first register in the class
150 and by finding the smallest power of two that is a valid offset from
151 that register in every mode we will use to save registers. */
153 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
154 if (TEST_HARD_REG_BIT
155 (reg_class_contents
156 [(int) MODE_BASE_REG_CLASS (regno_save_mode [i][1])], i))
157 break;
159 gcc_assert (i < FIRST_PSEUDO_REGISTER);
161 addr_reg = gen_rtx_REG (Pmode, i);
163 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
165 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
167 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
168 if (regno_save_mode[i][1] != VOIDmode
169 && ! strict_memory_address_p (regno_save_mode[i][1], address))
170 break;
172 if (i == FIRST_PSEUDO_REGISTER)
173 break;
176 /* If we didn't find a valid address, we must use register indirect. */
177 if (offset == 0)
178 address = addr_reg;
180 /* Next we try to form an insn to save and restore the register. We
181 see if such an insn is recognized and meets its constraints.
183 To avoid lots of unnecessary RTL allocation, we construct all the RTL
184 once, then modify the memory and register operands in-place. */
186 test_reg = gen_rtx_REG (VOIDmode, 0);
187 test_mem = gen_rtx_MEM (VOIDmode, address);
188 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
189 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
191 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0, 0);
192 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0, 0);
194 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
195 for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++)
196 if (HARD_REGNO_MODE_OK (i, mode))
198 int ok;
200 /* Update the register number and modes of the register
201 and memory operand. */
202 REGNO (test_reg) = i;
203 PUT_MODE (test_reg, mode);
204 PUT_MODE (test_mem, mode);
206 /* Force re-recognition of the modified insns. */
207 INSN_CODE (saveinsn) = -1;
208 INSN_CODE (restinsn) = -1;
210 reg_save_code[i][mode] = recog_memoized (saveinsn);
211 reg_restore_code[i][mode] = recog_memoized (restinsn);
213 /* Now extract both insns and see if we can meet their
214 constraints. */
215 ok = (reg_save_code[i][mode] != -1
216 && reg_restore_code[i][mode] != -1);
217 if (ok)
219 extract_insn (saveinsn);
220 ok = constrain_operands (1);
221 extract_insn (restinsn);
222 ok &= constrain_operands (1);
225 if (! ok)
227 reg_save_code[i][mode] = -1;
228 reg_restore_code[i][mode] = -1;
231 else
233 reg_save_code[i][mode] = -1;
234 reg_restore_code[i][mode] = -1;
237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
238 for (j = 1; j <= MOVE_MAX_WORDS; j++)
239 if (reg_save_code [i][regno_save_mode[i][j]] == -1)
241 regno_save_mode[i][j] = VOIDmode;
242 if (j == 1)
244 call_fixed_regs[i] = 1;
245 SET_HARD_REG_BIT (call_fixed_reg_set, i);
250 /* Initialize save areas by showing that we haven't allocated any yet. */
252 void
253 init_save_areas (void)
255 int i, j;
257 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
258 for (j = 1; j <= MOVE_MAX_WORDS; j++)
259 regno_save_mem[i][j] = 0;
262 /* Allocate save areas for any hard registers that might need saving.
263 We take a conservative approach here and look for call-clobbered hard
264 registers that are assigned to pseudos that cross calls. This may
265 overestimate slightly (especially if some of these registers are later
266 used as spill registers), but it should not be significant.
268 Future work:
270 In the fallback case we should iterate backwards across all possible
271 modes for the save, choosing the largest available one instead of
272 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
274 We do not try to use "move multiple" instructions that exist
275 on some machines (such as the 68k moveml). It could be a win to try
276 and use them when possible. The hard part is doing it in a way that is
277 machine independent since they might be saving non-consecutive
278 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
280 void
281 setup_save_areas (void)
283 int i, j, k;
284 unsigned int r;
285 HARD_REG_SET hard_regs_used;
287 /* Allocate space in the save area for the largest multi-register
288 pseudos first, then work backwards to single register
289 pseudos. */
291 /* Find and record all call-used hard-registers in this function. */
292 CLEAR_HARD_REG_SET (hard_regs_used);
293 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
294 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
296 unsigned int regno = reg_renumber[i];
297 unsigned int endregno
298 = regno + hard_regno_nregs[regno][GET_MODE (regno_reg_rtx[i])];
300 for (r = regno; r < endregno; r++)
301 if (call_used_regs[r])
302 SET_HARD_REG_BIT (hard_regs_used, r);
305 /* Now run through all the call-used hard-registers and allocate
306 space for them in the caller-save area. Try to allocate space
307 in a manner which allows multi-register saves/restores to be done. */
309 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
310 for (j = MOVE_MAX_WORDS; j > 0; j--)
312 int do_save = 1;
314 /* If no mode exists for this size, try another. Also break out
315 if we have already saved this hard register. */
316 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
317 continue;
319 /* See if any register in this group has been saved. */
320 for (k = 0; k < j; k++)
321 if (regno_save_mem[i + k][1])
323 do_save = 0;
324 break;
326 if (! do_save)
327 continue;
329 for (k = 0; k < j; k++)
330 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
332 do_save = 0;
333 break;
335 if (! do_save)
336 continue;
338 /* We have found an acceptable mode to store in. */
339 regno_save_mem[i][j]
340 = assign_stack_local (regno_save_mode[i][j],
341 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
343 /* Setup single word save area just in case... */
344 for (k = 0; k < j; k++)
345 /* This should not depend on WORDS_BIG_ENDIAN.
346 The order of words in regs is the same as in memory. */
347 regno_save_mem[i + k][1]
348 = adjust_address_nv (regno_save_mem[i][j],
349 regno_save_mode[i + k][1],
350 k * UNITS_PER_WORD);
353 /* Now loop again and set the alias set of any save areas we made to
354 the alias set used to represent frame objects. */
355 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
356 for (j = MOVE_MAX_WORDS; j > 0; j--)
357 if (regno_save_mem[i][j] != 0)
358 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
361 /* Find the places where hard regs are live across calls and save them. */
363 void
364 save_call_clobbered_regs (void)
366 struct insn_chain *chain, *next;
367 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
369 /* Computed in mark_set_regs, holds all registers set by the current
370 instruction. */
371 HARD_REG_SET this_insn_sets;
373 CLEAR_HARD_REG_SET (hard_regs_saved);
374 n_regs_saved = 0;
376 for (chain = reload_insn_chain; chain != 0; chain = next)
378 rtx insn = chain->insn;
379 enum rtx_code code = GET_CODE (insn);
381 next = chain->next;
383 gcc_assert (!chain->is_caller_save_insn);
385 if (INSN_P (insn))
387 /* If some registers have been saved, see if INSN references
388 any of them. We must restore them before the insn if so. */
390 if (n_regs_saved)
392 int regno;
394 if (code == JUMP_INSN)
395 /* Restore all registers if this is a JUMP_INSN. */
396 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
397 else
399 CLEAR_HARD_REG_SET (referenced_regs);
400 mark_referenced_regs (PATTERN (insn));
401 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
404 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
405 if (TEST_HARD_REG_BIT (referenced_regs, regno))
406 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
409 if (code == CALL_INSN && ! find_reg_note (insn, REG_NORETURN, NULL))
411 unsigned regno;
412 HARD_REG_SET hard_regs_to_save;
413 reg_set_iterator rsi;
415 /* Use the register life information in CHAIN to compute which
416 regs are live during the call. */
417 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
418 &chain->live_throughout);
419 /* Save hard registers always in the widest mode available. */
420 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
421 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
422 save_mode [regno] = regno_save_mode [regno][1];
423 else
424 save_mode [regno] = VOIDmode;
426 /* Look through all live pseudos, mark their hard registers
427 and choose proper mode for saving. */
428 EXECUTE_IF_SET_IN_REG_SET
429 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
431 int r = reg_renumber[regno];
432 int nregs;
433 enum machine_mode mode;
435 gcc_assert (r >= 0);
436 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
437 mode = HARD_REGNO_CALLER_SAVE_MODE
438 (r, nregs, PSEUDO_REGNO_MODE (regno));
439 if (GET_MODE_BITSIZE (mode)
440 > GET_MODE_BITSIZE (save_mode[r]))
441 save_mode[r] = mode;
442 while (nregs-- > 0)
443 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
446 /* Record all registers set in this call insn. These don't need
447 to be saved. N.B. the call insn might set a subreg of a
448 multi-hard-reg pseudo; then the pseudo is considered live
449 during the call, but the subreg that is set isn't. */
450 CLEAR_HARD_REG_SET (this_insn_sets);
451 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
452 /* Sibcalls are considered to set the return value,
453 compare flow.c:propagate_one_insn. */
454 if (SIBLING_CALL_P (insn) && current_function_return_rtx)
455 mark_set_regs (current_function_return_rtx, NULL_RTX,
456 &this_insn_sets);
458 /* Compute which hard regs must be saved before this call. */
459 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
460 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
461 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
462 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
464 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
465 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
466 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
468 /* Must recompute n_regs_saved. */
469 n_regs_saved = 0;
470 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
471 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
472 n_regs_saved++;
476 if (chain->next == 0 || chain->next->block > chain->block)
478 int regno;
479 /* At the end of the basic block, we must restore any registers that
480 remain saved. If the last insn in the block is a JUMP_INSN, put
481 the restore before the insn, otherwise, put it after the insn. */
483 if (n_regs_saved)
484 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
485 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
486 regno += insert_restore (chain, JUMP_P (insn),
487 regno, MOVE_MAX_WORDS, save_mode);
492 /* Here from note_stores, or directly from save_call_clobbered_regs, when
493 an insn stores a value in a register.
494 Set the proper bit or bits in this_insn_sets. All pseudos that have
495 been assigned hard regs have had their register number changed already,
496 so we can ignore pseudos. */
497 static void
498 mark_set_regs (rtx reg, rtx setter ATTRIBUTE_UNUSED, void *data)
500 int regno, endregno, i;
501 enum machine_mode mode = GET_MODE (reg);
502 HARD_REG_SET *this_insn_sets = data;
504 if (GET_CODE (reg) == SUBREG)
506 rtx inner = SUBREG_REG (reg);
507 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
508 return;
509 regno = subreg_regno (reg);
511 else if (REG_P (reg)
512 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
513 regno = REGNO (reg);
514 else
515 return;
517 endregno = regno + hard_regno_nregs[regno][mode];
519 for (i = regno; i < endregno; i++)
520 SET_HARD_REG_BIT (*this_insn_sets, i);
523 /* Here from note_stores when an insn stores a value in a register.
524 Set the proper bit or bits in the passed regset. All pseudos that have
525 been assigned hard regs have had their register number changed already,
526 so we can ignore pseudos. */
527 static void
528 add_stored_regs (rtx reg, rtx setter, void *data)
530 int regno, endregno, i;
531 enum machine_mode mode = GET_MODE (reg);
532 int offset = 0;
534 if (GET_CODE (setter) == CLOBBER)
535 return;
537 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
539 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
540 GET_MODE (SUBREG_REG (reg)),
541 SUBREG_BYTE (reg),
542 GET_MODE (reg));
543 reg = SUBREG_REG (reg);
546 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
547 return;
549 regno = REGNO (reg) + offset;
550 endregno = regno + hard_regno_nregs[regno][mode];
552 for (i = regno; i < endregno; i++)
553 SET_REGNO_REG_SET ((regset) data, i);
556 /* Walk X and record all referenced registers in REFERENCED_REGS. */
557 static void
558 mark_referenced_regs (rtx x)
560 enum rtx_code code = GET_CODE (x);
561 const char *fmt;
562 int i, j;
564 if (code == SET)
565 mark_referenced_regs (SET_SRC (x));
566 if (code == SET || code == CLOBBER)
568 x = SET_DEST (x);
569 code = GET_CODE (x);
570 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
571 || code == PC || code == CC0
572 || (code == SUBREG && REG_P (SUBREG_REG (x))
573 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
574 /* If we're setting only part of a multi-word register,
575 we shall mark it as referenced, because the words
576 that are not being set should be restored. */
577 && ((GET_MODE_SIZE (GET_MODE (x))
578 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
579 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
580 <= UNITS_PER_WORD))))
581 return;
583 if (code == MEM || code == SUBREG)
585 x = XEXP (x, 0);
586 code = GET_CODE (x);
589 if (code == REG)
591 int regno = REGNO (x);
592 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
593 : reg_renumber[regno]);
595 if (hardregno >= 0)
597 int nregs = hard_regno_nregs[hardregno][GET_MODE (x)];
598 while (nregs-- > 0)
599 SET_HARD_REG_BIT (referenced_regs, hardregno + nregs);
601 /* If this is a pseudo that did not get a hard register, scan its
602 memory location, since it might involve the use of another
603 register, which might be saved. */
604 else if (reg_equiv_mem[regno] != 0)
605 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
606 else if (reg_equiv_address[regno] != 0)
607 mark_referenced_regs (reg_equiv_address[regno]);
608 return;
611 fmt = GET_RTX_FORMAT (code);
612 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
614 if (fmt[i] == 'e')
615 mark_referenced_regs (XEXP (x, i));
616 else if (fmt[i] == 'E')
617 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
618 mark_referenced_regs (XVECEXP (x, i, j));
622 /* Insert a sequence of insns to restore. Place these insns in front of
623 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
624 the maximum number of registers which should be restored during this call.
625 It should never be less than 1 since we only work with entire registers.
627 Note that we have verified in init_caller_save that we can do this
628 with a simple SET, so use it. Set INSN_CODE to what we save there
629 since the address might not be valid so the insn might not be recognized.
630 These insns will be reloaded and have register elimination done by
631 find_reload, so we need not worry about that here.
633 Return the extra number of registers saved. */
635 static int
636 insert_restore (struct insn_chain *chain, int before_p, int regno,
637 int maxrestore, enum machine_mode *save_mode)
639 int i, k;
640 rtx pat = NULL_RTX;
641 int code;
642 unsigned int numregs = 0;
643 struct insn_chain *new;
644 rtx mem;
646 /* A common failure mode if register status is not correct in the
647 RTL is for this routine to be called with a REGNO we didn't
648 expect to save. That will cause us to write an insn with a (nil)
649 SET_DEST or SET_SRC. Instead of doing so and causing a crash
650 later, check for this common case here instead. This will remove
651 one step in debugging such problems. */
652 gcc_assert (regno_save_mem[regno][1]);
654 /* Get the pattern to emit and update our status.
656 See if we can restore `maxrestore' registers at once. Work
657 backwards to the single register case. */
658 for (i = maxrestore; i > 0; i--)
660 int j;
661 int ok = 1;
663 if (regno_save_mem[regno][i] == 0)
664 continue;
666 for (j = 0; j < i; j++)
667 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
669 ok = 0;
670 break;
672 /* Must do this one restore at a time. */
673 if (! ok)
674 continue;
676 numregs = i;
677 break;
680 mem = regno_save_mem [regno][numregs];
681 if (save_mode [regno] != VOIDmode
682 && save_mode [regno] != GET_MODE (mem)
683 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
684 mem = adjust_address (mem, save_mode[regno], 0);
685 else
686 mem = copy_rtx (mem);
687 pat = gen_rtx_SET (VOIDmode,
688 gen_rtx_REG (GET_MODE (mem),
689 regno), mem);
690 code = reg_restore_code[regno][GET_MODE (mem)];
691 new = insert_one_insn (chain, before_p, code, pat);
693 /* Clear status for all registers we restored. */
694 for (k = 0; k < i; k++)
696 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
697 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
698 n_regs_saved--;
701 /* Tell our callers how many extra registers we saved/restored. */
702 return numregs - 1;
705 /* Like insert_restore above, but save registers instead. */
707 static int
708 insert_save (struct insn_chain *chain, int before_p, int regno,
709 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
711 int i;
712 unsigned int k;
713 rtx pat = NULL_RTX;
714 int code;
715 unsigned int numregs = 0;
716 struct insn_chain *new;
717 rtx mem;
719 /* A common failure mode if register status is not correct in the
720 RTL is for this routine to be called with a REGNO we didn't
721 expect to save. That will cause us to write an insn with a (nil)
722 SET_DEST or SET_SRC. Instead of doing so and causing a crash
723 later, check for this common case here. This will remove one
724 step in debugging such problems. */
725 gcc_assert (regno_save_mem[regno][1]);
727 /* Get the pattern to emit and update our status.
729 See if we can save several registers with a single instruction.
730 Work backwards to the single register case. */
731 for (i = MOVE_MAX_WORDS; i > 0; i--)
733 int j;
734 int ok = 1;
735 if (regno_save_mem[regno][i] == 0)
736 continue;
738 for (j = 0; j < i; j++)
739 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
741 ok = 0;
742 break;
744 /* Must do this one save at a time. */
745 if (! ok)
746 continue;
748 numregs = i;
749 break;
752 mem = regno_save_mem [regno][numregs];
753 if (save_mode [regno] != VOIDmode
754 && save_mode [regno] != GET_MODE (mem)
755 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]])
756 mem = adjust_address (mem, save_mode[regno], 0);
757 else
758 mem = copy_rtx (mem);
759 pat = gen_rtx_SET (VOIDmode, mem,
760 gen_rtx_REG (GET_MODE (mem),
761 regno));
762 code = reg_save_code[regno][GET_MODE (mem)];
763 new = insert_one_insn (chain, before_p, code, pat);
765 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
766 for (k = 0; k < numregs; k++)
768 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
769 SET_REGNO_REG_SET (&new->dead_or_set, regno + k);
770 n_regs_saved++;
773 /* Tell our callers how many extra registers we saved/restored. */
774 return numregs - 1;
777 /* Emit a new caller-save insn and set the code. */
778 static struct insn_chain *
779 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
781 rtx insn = chain->insn;
782 struct insn_chain *new;
784 #ifdef HAVE_cc0
785 /* If INSN references CC0, put our insns in front of the insn that sets
786 CC0. This is always safe, since the only way we could be passed an
787 insn that references CC0 is for a restore, and doing a restore earlier
788 isn't a problem. We do, however, assume here that CALL_INSNs don't
789 reference CC0. Guard against non-INSN's like CODE_LABEL. */
791 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
792 && before_p
793 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
794 chain = chain->prev, insn = chain->insn;
795 #endif
797 new = new_insn_chain ();
798 if (before_p)
800 rtx link;
802 new->prev = chain->prev;
803 if (new->prev != 0)
804 new->prev->next = new;
805 else
806 reload_insn_chain = new;
808 chain->prev = new;
809 new->next = chain;
810 new->insn = emit_insn_before (pat, insn);
811 /* ??? It would be nice if we could exclude the already / still saved
812 registers from the live sets. */
813 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
814 /* Registers that die in CHAIN->INSN still live in the new insn. */
815 for (link = REG_NOTES (chain->insn); link; link = XEXP (link, 1))
817 if (REG_NOTE_KIND (link) == REG_DEAD)
819 rtx reg = XEXP (link, 0);
820 int regno, i;
822 gcc_assert (REG_P (reg));
823 regno = REGNO (reg);
824 if (regno >= FIRST_PSEUDO_REGISTER)
825 regno = reg_renumber[regno];
826 if (regno < 0)
827 continue;
828 for (i = hard_regno_nregs[regno][GET_MODE (reg)] - 1;
829 i >= 0; i--)
830 SET_REGNO_REG_SET (&new->live_throughout, regno + i);
833 CLEAR_REG_SET (&new->dead_or_set);
834 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
835 BB_HEAD (BASIC_BLOCK (chain->block)) = new->insn;
837 else
839 new->next = chain->next;
840 if (new->next != 0)
841 new->next->prev = new;
842 chain->next = new;
843 new->prev = chain;
844 new->insn = emit_insn_after (pat, insn);
845 /* ??? It would be nice if we could exclude the already / still saved
846 registers from the live sets, and observe REG_UNUSED notes. */
847 COPY_REG_SET (&new->live_throughout, &chain->live_throughout);
848 /* Registers that are set in CHAIN->INSN live in the new insn.
849 (Unless there is a REG_UNUSED note for them, but we don't
850 look for them here.) */
851 note_stores (PATTERN (chain->insn), add_stored_regs,
852 &new->live_throughout);
853 CLEAR_REG_SET (&new->dead_or_set);
854 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
855 BB_END (BASIC_BLOCK (chain->block)) = new->insn;
857 new->block = chain->block;
858 new->is_caller_save_insn = 1;
860 INSN_CODE (new->insn) = code;
861 return new;