Nuke token ring support. This also means one blob less in DragonFly.
[dragonfly/netmp.git] / sys / dev / netif / fea / if_fea.c
blob89a3aae3fb19a807b9717cfe4c4d39dd8d2b274f
1 /*-
2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software withough specific prior written permission
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * $FreeBSD: src/sys/dev/pdq/if_fea.c,v 1.19 2000/01/14 07:14:03 peter Exp $
25 * $DragonFly: src/sys/dev/netif/fea/Attic/if_fea.c,v 1.13 2006/10/25 20:55:57 dillon Exp $
29 * DEC PDQ FDDI Controller
31 * This module support the DEFEA EISA FDDI Controller.
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/socket.h>
38 #include <sys/serialize.h>
40 #include <net/if.h>
41 #include <net/if_arp.h>
43 #include <sys/module.h>
44 #include <sys/bus.h>
45 #include <sys/rman.h>
47 #include <bus/eisa/eisaconf.h>
49 #include <dev/netif/pdq_layer/pdqvar.h>
50 #include <dev/netif/pdq_layer/pdqreg.h>
52 static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *);
53 static void pdq_eisa_devinit (pdq_softc_t *);
54 static const char * pdq_eisa_match (eisa_id_t);
55 static int pdq_eisa_probe (device_t);
56 static int pdq_eisa_attach (device_t);
57 void pdq_eisa_intr (void *);
58 static int pdq_eisa_shutdown (device_t);
60 #define DEFEA_IRQS 0x0000FBA9U
62 #define DEFEA_INTRENABLE 0x8 /* level interrupt */
63 #define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f)
65 #define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001
66 #define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002
67 #define EISA_DEVICE_ID_DEC_DEC3003 0x10a33003
68 #define EISA_DEVICE_ID_DEC_DEC3004 0x10a33004
70 static void
71 pdq_eisa_subprobe(pdq_bus_t bc, u_int32_t iobase, u_int32_t *maddr,
72 u_int32_t *msize, u_int32_t *irq)
74 if (irq != NULL)
75 *irq = DEFEA_DECODE_IRQ(PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_IO_CONFIG_STAT_0) & 3);
76 *maddr = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_0) << 8)
77 | (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_1) << 16);
78 *msize = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8;
80 return;
83 static void
84 pdq_eisa_devinit(pdq_softc_t *sc)
86 pdq_uint8_t data;
89 * Do the standard initialization for the DEFEA registers.
91 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_FUNCTION_CTRL, 0x23);
92 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CMP_1_1, (sc->sc_iobase >> 8) & 0xF0);
93 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CMP_0_1, (sc->sc_iobase >> 8) & 0xF0);
94 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_SLOT_CTRL, 0x01);
95 data = PDQ_OS_IORD_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF);
96 #if defined(PDQ_IOMAPPED)
97 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data & ~1);
98 #else
99 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_BURST_HOLDOFF, data | 1);
100 #endif
101 data = PDQ_OS_IORD_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0);
102 PDQ_OS_IOWR_8(sc->sc_bc, sc->sc_iobase, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE);
104 return;
107 static const char *
108 pdq_eisa_match(eisa_id_t type)
110 switch (type) {
111 case EISA_DEVICE_ID_DEC_DEC3001:
112 case EISA_DEVICE_ID_DEC_DEC3002:
113 case EISA_DEVICE_ID_DEC_DEC3003:
114 case EISA_DEVICE_ID_DEC_DEC3004:
115 return ("DEC FDDIcontroller/EISA Adapter");
116 break;
117 default:
118 break;
120 return (NULL);
123 static int
124 pdq_eisa_probe(device_t dev)
126 const char *desc;
127 u_int32_t iobase;
128 u_int32_t irq;
129 u_int32_t maddr;
130 u_int32_t msize;
132 u_int32_t eisa_id = eisa_get_id(dev);
134 desc = pdq_eisa_match(eisa_id);
135 if (!desc) {
136 return (ENXIO);
139 device_set_desc(dev, desc);
141 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE;
142 pdq_eisa_subprobe(PDQ_BUS_EISA, iobase, &maddr, &msize, &irq);
144 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE);
145 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE);
146 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL);
148 return (0);
151 void
152 pdq_eisa_intr(void *xdev)
154 device_t dev = (device_t) xdev;
155 pdq_softc_t *sc = device_get_softc(dev);
156 pdq_interrupt(sc->sc_pdq);
158 return;
161 static int
162 pdq_eisa_attach(device_t dev)
164 pdq_softc_t *sc = device_get_softc(dev);
165 struct resource *io = 0;
166 struct resource *irq = 0;
167 struct resource *mspace = 0;
168 int rid;
169 void *ih;
170 u_int32_t m_addr, m_size;
172 rid = 0;
173 io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE);
175 if (!io) {
176 device_printf(dev, "No I/O space?!\n");
177 goto bad;
180 rid = 0;
181 mspace = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
183 if (!mspace) {
184 device_printf(dev, "No memory space?!\n");
185 goto bad;
188 rid = 0;
189 irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
191 if (!irq) {
192 device_printf(dev, "No, irq?!\n");
193 goto bad;
196 m_addr = rman_get_start(mspace);
197 m_size = (rman_get_end(mspace) - rman_get_start(mspace)) + 1;
199 sc->sc_iobase = (pdq_bus_ioport_t) rman_get_start(io);
200 sc->sc_membase = (pdq_bus_memaddr_t) pmap_mapdev(m_addr, m_size);
201 if_initname(&(sc->sc_if), "fea", device_get_unit(dev));
203 pdq_eisa_devinit(sc);
204 sc->sc_pdq = pdq_initialize(PDQ_BUS_EISA, sc->sc_membase,
205 sc->sc_if.if_dname, sc->sc_if.if_dunit,
206 (void *) sc, PDQ_DEFEA);
207 if (sc->sc_pdq == NULL) {
208 device_printf(dev, "initialization failed\n");
209 goto bad;
212 pdq_ifattach(sc, NULL);
214 if (bus_setup_intr(dev, irq, INTR_NETSAFE,
215 pdq_eisa_intr, dev, &ih,
216 sc->sc_if.if_serializer)
218 goto bad;
221 bcopy((caddr_t) sc->sc_pdq->pdq_hwaddr.lanaddr_bytes, sc->sc_ac.ac_enaddr, 6);
223 return (0);
225 bad:
226 if (io)
227 bus_release_resource(dev, SYS_RES_IOPORT, 0, io);
228 if (irq)
229 bus_release_resource(dev, SYS_RES_IRQ, 0, irq);
230 if (mspace)
231 bus_release_resource(dev, SYS_RES_MEMORY, 0, mspace);
233 return (-1);
236 static int
237 pdq_eisa_shutdown(device_t dev)
239 pdq_softc_t *sc = device_get_softc(dev);
241 lwkt_serialize_enter(sc->sc_if.if_serializer);
242 pdq_hwreset(sc->sc_pdq);
243 lwkt_serialize_exit(sc->sc_if.if_serializer);
245 return (0);
248 static device_method_t pdq_eisa_methods[] = {
249 DEVMETHOD(device_probe, pdq_eisa_probe),
250 DEVMETHOD(device_attach, pdq_eisa_attach),
251 DEVMETHOD(device_shutdown, pdq_eisa_shutdown),
253 { 0, 0 }
256 static driver_t pdq_eisa_driver = {
257 "fea",
258 pdq_eisa_methods,
259 sizeof(pdq_softc_t),
262 static devclass_t pdq_devclass;
264 DECLARE_DUMMY_MODULE(if_fea);
265 DRIVER_MODULE(if_pdq, eisa, pdq_eisa_driver, pdq_devclass, 0, 0);