drm: Implement and use Linux struct device
[dragonfly.git] / sys / dev / drm / include / linux / pci.h
blob0dd62cf6684b952384f8a62fbd3d516719c3bfc9
1 /*
2 * Copyright (c) 2014-2016 François Tigeot
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
10 * disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 #ifndef LINUX_PCI_H
28 #define LINUX_PCI_H
30 #define PCI_ANY_ID (~0u)
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/pciio.h>
35 #include <sys/rman.h>
36 #include <bus/pci/pcivar.h>
37 #include <bus/pci/pcireg.h>
39 #include <linux/types.h>
40 #include <linux/list.h>
41 #include <linux/compiler.h>
42 #include <linux/errno.h>
43 #include <linux/atomic.h>
44 #include <linux/device.h>
45 #include <linux/io.h>
47 #include <linux/pci_ids.h>
49 struct pci_bus;
51 struct pci_device_id {
52 uint32_t vendor;
53 uint32_t device;
54 uint32_t subvendor;
55 uint32_t subdevice;
56 uint32_t class;
57 uint32_t class_mask;
58 unsigned long driver_data;
61 struct pci_dev {
62 struct pci_bus *bus; /* bus device is nailed to */
63 struct device dev;
65 uint16_t vendor; /* vendor ID */
66 uint16_t device; /* device ID */
67 uint16_t subsystem_vendor;
68 uint16_t subsystem_device;
70 uint8_t revision; /* revision ID */
72 unsigned int irq; /* handle with care */
75 struct pci_bus {
76 struct pci_dev *self; /* handle to pdev self */
77 struct device *dev; /* handle to dev */
79 unsigned char number; /* bus addr number */
82 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
84 #define PCI_DMA_BIDIRECTIONAL 0
86 /* extracted from radeon/si.c radeon/cik.c */
87 #define PCI_EXP_LNKCTL PCIER_LINKCTRL /* 16 */
88 #define PCI_EXP_LNKCTL2 48
89 #define PCI_EXP_LNKCTL_HAWD PCIEM_LNKCTL_HAWD /* 0x0200 */
90 #define PCI_EXP_DEVSTA PCIER_DEVSTS /* 10 */
91 #define PCI_EXP_DEVSTA_TRPND 0x0020
92 #define PCI_EXP_LNKCAP_CLKPM 0x00040000
94 static inline int
95 pci_read_config_byte(struct pci_dev *pdev, int where, u8 *val)
97 *val = (u8)pci_read_config(pdev->dev.bsddev, where, 1);
98 return 0;
101 static inline int
102 pci_read_config_word(struct pci_dev *pdev, int where, u16 *val)
104 *val = (u16)pci_read_config(pdev->dev.bsddev, where, 2);
105 return 0;
108 static inline int
109 pci_read_config_dword(struct pci_dev *pdev, int where, u32 *val)
111 *val = (u32)pci_read_config(pdev->dev.bsddev, where, 4);
112 return 0;
115 static inline int
116 pci_write_config_byte(struct pci_dev *pdev, int where, u8 val)
118 pci_write_config(pdev->dev.bsddev, where, val, 1);
119 return 0;
122 static inline int
123 pci_write_config_word(struct pci_dev *pdev, int where, u16 val)
125 pci_write_config(pdev->dev.bsddev, where, val, 2);
126 return 0;
129 static inline int
130 pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
132 pci_write_config(pdev->dev.bsddev, where, val, 4);
133 return 0;
136 /* extracted from drm/radeon/evergreen.c */
137 static inline int
138 pcie_get_readrq(struct pci_dev *pdev)
140 u16 ctl;
141 int err, cap;
143 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap);
145 cap += PCIER_DEVCTRL;
147 ctl = pci_read_config(pdev->dev.bsddev, cap, 2);
149 return 128 << ((ctl & PCIEM_DEVCTL_MAX_READRQ_MASK) >> 12);
152 /* valid rq sizes: 128, 256, 512, 1024, 2048, 4096 (^2N) */
153 static inline int
154 pcie_set_readrq(struct pci_dev *pdev, int rq)
156 u16 ctl;
157 int err, cap;
159 if (rq < 128 || rq > 4096 || !is_power_of_2(rq))
160 return -EINVAL;
162 err = pci_find_extcap(pdev->dev.bsddev, PCIY_EXPRESS, &cap);
163 if (err)
164 return (-1);
166 cap += PCIER_DEVCTRL;
168 ctl = pci_read_config(pdev->dev.bsddev, cap, 2);
169 ctl &= ~PCIEM_DEVCTL_MAX_READRQ_MASK;
170 ctl |= ((ffs(rq) - 8) << 12);
171 pci_write_config(pdev->dev.bsddev, cap, ctl, 2);
172 return 0;
175 static inline struct pci_dev *
176 pci_dev_get(struct pci_dev *dev)
178 /* Linux increments a reference count here */
179 return dev;
182 static inline struct pci_dev *
183 pci_dev_put(struct pci_dev *dev)
185 /* Linux decrements a reference count here */
186 return dev;
190 static inline int
191 pci_set_dma_mask(struct pci_dev *dev, u64 mask)
193 return -EIO;
196 static inline int
197 pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask)
199 return -EIO;
202 typedef int pci_power_t;
204 #define PCI_D0 0
205 #define PCI_D1 1
206 #define PCI_D2 2
207 #define PCI_D3hot 3
208 #define PCI_D3cold 4
210 #include <asm/pci.h>
212 static inline struct resource_list_entry*
213 _pci_get_rle(struct pci_dev *pdev, int bar)
215 struct pci_devinfo *dinfo;
216 device_t dev = pdev->dev.bsddev;
217 struct resource_list_entry *rle;
219 dinfo = device_get_ivars(dev);
221 /* Some child devices don't have registered resources, they
222 * are only present in the parent */
223 if (dinfo == NULL) {
224 kprintf("_pci_get_rle: dinfo was NULL, trying again with parent\n");
225 dev = device_get_parent(dev);
227 dinfo = device_get_ivars(dev);
228 if (dinfo == NULL)
229 return NULL;
231 rle = resource_list_find(&dinfo->resources, SYS_RES_MEMORY, PCIR_BAR(bar));
232 if (rle == NULL) {
233 rle = resource_list_find(&dinfo->resources,
234 SYS_RES_IOPORT, PCIR_BAR(bar));
237 return rle;
241 * Returns the first address (memory address or I/O port number)
242 * associated with one of the PCI I/O regions.The region is selected by
243 * the integer bar (the base address register), ranging from 0–5 (inclusive).
244 * The return value can be used by ioremap()
246 static inline phys_addr_t
247 pci_resource_start(struct pci_dev *pdev, int bar)
249 struct resource *res;
250 int rid;
252 rid = PCIR_BAR(bar);
253 res = bus_alloc_resource_any(pdev->dev.bsddev, SYS_RES_MEMORY, &rid, RF_SHAREABLE);
254 if (res == NULL) {
255 kprintf("pci_resource_start(0x%p, 0x%x) failed\n", pdev, PCIR_BAR(bar));
256 return -1;
259 return rman_get_start(res);
262 static inline phys_addr_t
263 pci_resource_len(struct pci_dev *pdev, int bar)
265 struct resource_list_entry *rle;
267 rle = _pci_get_rle(pdev, bar);
268 if (rle == NULL)
269 return -1;
271 kprintf("pci_resource_len(0x%x, 0x%x) = 0x%lx\n",
272 pdev->device, PCIR_BAR(bar), rman_get_size(rle->res));
274 return rman_get_size(rle->res);
277 static inline void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
279 resource_size_t base, size;
281 base = pci_resource_start(dev, bar);
282 size = pci_resource_len(dev, bar);
284 if (base == 0)
285 return NULL;
287 if (maxlen && size > maxlen)
288 size = maxlen;
290 return ioremap(base, size);
293 #endif /* LINUX_PCI_H */