5 * \author Gareth Hughes <gareth@valinux.com>
9 * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
11 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
12 * All Rights Reserved.
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
21 * The above copyright notice and this permission notice (including the next
22 * paragraph) shall be included in all copies or substantial portions of the
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
26 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
27 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
28 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
29 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
30 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
31 * DEALINGS IN THE SOFTWARE.
33 * $FreeBSD: head/sys/dev/drm2/ati_pcigart.c 254885 2013-08-25 19:37:15Z dumbbell $
38 #include <drm/ati_pcigart.h>
40 #define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
42 static int drm_ati_alloc_pcigart_table(struct drm_device
*dev
,
43 struct drm_ati_pcigart_info
*gart_info
)
45 gart_info
->table_handle
= drm_pci_alloc(dev
, gart_info
->table_size
,
47 if (gart_info
->table_handle
== NULL
)
53 static void drm_ati_free_pcigart_table(struct drm_device
*dev
,
54 struct drm_ati_pcigart_info
*gart_info
)
56 drm_pci_free(dev
, gart_info
->table_handle
);
57 gart_info
->table_handle
= NULL
;
60 int drm_ati_pcigart_cleanup(struct drm_device
*dev
, struct drm_ati_pcigart_info
*gart_info
)
62 struct drm_sg_mem
*entry
= dev
->sg
;
69 /* we need to support large memory configurations */
71 DRM_ERROR("no scatter/gather memory!\n");
75 if (gart_info
->bus_addr
) {
78 max_pages
= (gart_info
->table_size
/ sizeof(u32
));
79 pages
= (entry
->pages
<= max_pages
)
80 ? entry
->pages
: max_pages
;
82 for (i
= 0; i
< pages
; i
++) {
83 if (!entry
->busaddr
[i
])
85 pci_unmap_page(dev
->pdev
, entry
->busaddr
[i
],
86 PAGE_SIZE
, PCI_DMA_BIDIRECTIONAL
);
90 if (gart_info
->gart_table_location
== DRM_ATI_GART_MAIN
)
91 gart_info
->bus_addr
= 0;
94 if (gart_info
->gart_table_location
== DRM_ATI_GART_MAIN
&&
95 gart_info
->table_handle
) {
96 drm_ati_free_pcigart_table(dev
, gart_info
);
102 int drm_ati_pcigart_init(struct drm_device
*dev
, struct drm_ati_pcigart_info
*gart_info
)
104 struct drm_local_map
*map
= &gart_info
->mapping
;
105 struct drm_sg_mem
*entry
= dev
->sg
;
106 void *address
= NULL
;
108 u32
*pci_gart
= NULL
, page_base
, gart_idx
;
109 dma_addr_t bus_address
= 0;
111 int max_ati_pages
, max_real_pages
;
114 DRM_ERROR("no scatter/gather memory!\n");
118 if (gart_info
->gart_table_location
== DRM_ATI_GART_MAIN
) {
119 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
122 if (pci_set_dma_mask(dev
->pdev
, gart_info
->table_mask
)) {
123 DRM_ERROR("fail to set dma mask to 0x%Lx\n",
124 (unsigned long long)gart_info
->table_mask
);
130 ret
= drm_ati_alloc_pcigart_table(dev
, gart_info
);
132 DRM_ERROR("cannot allocate PCI GART page!\n");
136 pci_gart
= gart_info
->table_handle
->vaddr
;
137 address
= gart_info
->table_handle
->vaddr
;
138 bus_address
= gart_info
->table_handle
->busaddr
;
140 address
= gart_info
->addr
;
141 bus_address
= gart_info
->bus_addr
;
142 DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
143 (unsigned long long)bus_address
,
144 (unsigned long)address
);
148 max_ati_pages
= (gart_info
->table_size
/ sizeof(u32
));
149 max_real_pages
= max_ati_pages
/ (PAGE_SIZE
/ ATI_PCIGART_PAGE_SIZE
);
150 pages
= (entry
->pages
<= max_real_pages
)
151 ? entry
->pages
: max_real_pages
;
153 if (gart_info
->gart_table_location
== DRM_ATI_GART_MAIN
) {
154 memset(pci_gart
, 0, max_ati_pages
* sizeof(u32
));
156 memset_io((void __iomem
*)map
->handle
, 0, max_ati_pages
* sizeof(u32
));
160 for (i
= 0; i
< pages
; i
++) {
162 /* we need to support large memory configurations */
163 entry
->busaddr
[i
] = pci_map_page(dev
->pdev
, entry
->pagelist
[i
],
164 0, PAGE_SIZE
, PCI_DMA_BIDIRECTIONAL
);
165 if (pci_dma_mapping_error(dev
->pdev
, entry
->busaddr
[i
])) {
166 DRM_ERROR("unable to map PCIGART pages!\n");
167 drm_ati_pcigart_cleanup(dev
, gart_info
);
173 page_base
= (u32
) entry
->busaddr
[i
];
175 for (j
= 0; j
< (PAGE_SIZE
/ ATI_PCIGART_PAGE_SIZE
); j
++) {
178 switch(gart_info
->gart_reg_if
) {
179 case DRM_ATI_GART_IGP
:
180 val
= page_base
| 0xc;
182 case DRM_ATI_GART_PCIE
:
183 val
= (page_base
>> 8) | 0xc;
186 case DRM_ATI_GART_PCI
:
190 if (gart_info
->gart_table_location
==
192 pci_gart
[gart_idx
] = cpu_to_le32(val
);
194 DRM_WRITE32(map
, gart_idx
* sizeof(u32
), val
);
196 page_base
+= ATI_PCIGART_PAGE_SIZE
;
204 gart_info
->addr
= address
;
205 gart_info
->bus_addr
= bus_address
;