2 * Copyright © 2007 Dave Mueller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Dave Mueller <dave.mueller@gmx.ch>
30 /* register definitions according to the TFP410 data sheet */
31 #define TFP410_VID 0x014C
32 #define TFP410_DID 0x0410
34 #define TFP410_VID_LO 0x00
35 #define TFP410_VID_HI 0x01
36 #define TFP410_DID_LO 0x02
37 #define TFP410_DID_HI 0x03
38 #define TFP410_REV 0x04
40 #define TFP410_CTL_1 0x08
41 #define TFP410_CTL_1_TDIS (1<<6)
42 #define TFP410_CTL_1_VEN (1<<5)
43 #define TFP410_CTL_1_HEN (1<<4)
44 #define TFP410_CTL_1_DSEL (1<<3)
45 #define TFP410_CTL_1_BSEL (1<<2)
46 #define TFP410_CTL_1_EDGE (1<<1)
47 #define TFP410_CTL_1_PD (1<<0)
49 #define TFP410_CTL_2 0x09
50 #define TFP410_CTL_2_VLOW (1<<7)
51 #define TFP410_CTL_2_MSEL_MASK (0x7<<4)
52 #define TFP410_CTL_2_MSEL (1<<4)
53 #define TFP410_CTL_2_TSEL (1<<3)
54 #define TFP410_CTL_2_RSEN (1<<2)
55 #define TFP410_CTL_2_HTPLG (1<<1)
56 #define TFP410_CTL_2_MDI (1<<0)
58 #define TFP410_CTL_3 0x0A
59 #define TFP410_CTL_3_DK_MASK (0x7<<5)
60 #define TFP410_CTL_3_DK (1<<5)
61 #define TFP410_CTL_3_DKEN (1<<4)
62 #define TFP410_CTL_3_CTL_MASK (0x7<<1)
63 #define TFP410_CTL_3_CTL (1<<1)
65 #define TFP410_USERCFG 0x0B
67 #define TFP410_DE_DLY 0x32
69 #define TFP410_DE_CTL 0x33
70 #define TFP410_DE_CTL_DEGEN (1<<6)
71 #define TFP410_DE_CTL_VSPOL (1<<5)
72 #define TFP410_DE_CTL_HSPOL (1<<4)
73 #define TFP410_DE_CTL_DEDLY8 (1<<0)
75 #define TFP410_DE_TOP 0x34
77 #define TFP410_DE_CNT_LO 0x36
78 #define TFP410_DE_CNT_HI 0x37
80 #define TFP410_DE_LIN_LO 0x38
81 #define TFP410_DE_LIN_HI 0x39
83 #define TFP410_H_RES_LO 0x3A
84 #define TFP410_H_RES_HI 0x3B
86 #define TFP410_V_RES_LO 0x3C
87 #define TFP410_V_RES_HI 0x3D
93 static bool tfp410_readb(struct intel_dvo_device
*dvo
, int addr
, uint8_t *ch
)
95 struct intel_iic_softc
*sc
;
96 struct tfp410_priv
*tfp
= dvo
->dev_priv
;
97 struct i2c_adapter
*adapter
= dvo
->i2c_bus
;
101 struct i2c_msg msgs
[] = {
103 .slave
= dvo
->slave_addr
<< 1,
109 .slave
= dvo
->slave_addr
<< 1,
119 sc
= device_get_softc(adapter
);
121 if (iicbus_transfer(adapter
, msgs
, 2) == 0) {
127 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
128 addr
, sc
->name
, dvo
->slave_addr
);
133 static bool tfp410_writeb(struct intel_dvo_device
*dvo
, int addr
, uint8_t ch
)
135 struct intel_iic_softc
*sc
;
136 struct tfp410_priv
*tfp
= dvo
->dev_priv
;
137 struct i2c_adapter
*adapter
= dvo
->i2c_bus
;
139 struct i2c_msg msg
= {
140 .slave
= dvo
->slave_addr
<< 1,
149 sc
= device_get_softc(adapter
);
151 if (iicbus_transfer(adapter
, &msg
, 1) == 0)
155 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
156 addr
, sc
->name
, dvo
->slave_addr
);
162 static int tfp410_getid(struct intel_dvo_device
*dvo
, int addr
)
166 if (tfp410_readb(dvo
, addr
+0, &ch1
) &&
167 tfp410_readb(dvo
, addr
+1, &ch2
))
168 return ((ch2
<< 8) & 0xFF00) | (ch1
& 0x00FF);
173 /* Ti TFP410 driver for chip on i2c bus */
174 static bool tfp410_init(struct intel_dvo_device
*dvo
,
175 struct i2c_adapter
*adapter
)
177 struct intel_iic_softc
*sc
;
178 /* this will detect the tfp410 chip on the specified i2c bus */
179 struct tfp410_priv
*tfp
;
182 sc
= device_get_softc(adapter
);
184 tfp
= kzalloc(sizeof(struct tfp410_priv
), GFP_KERNEL
);
188 dvo
->i2c_bus
= adapter
;
192 if ((id
= tfp410_getid(dvo
, TFP410_VID_LO
)) != TFP410_VID
) {
193 DRM_DEBUG_KMS("tfp410 not detected got VID %X: from %s "
195 id
, sc
->name
, dvo
->slave_addr
);
199 if ((id
= tfp410_getid(dvo
, TFP410_DID_LO
)) != TFP410_DID
) {
200 DRM_DEBUG_KMS("tfp410 not detected got DID %X: from %s "
202 id
, sc
->name
, dvo
->slave_addr
);
212 static enum drm_connector_status
tfp410_detect(struct intel_dvo_device
*dvo
)
214 enum drm_connector_status ret
= connector_status_disconnected
;
217 if (tfp410_readb(dvo
, TFP410_CTL_2
, &ctl2
)) {
218 if (ctl2
& TFP410_CTL_2_RSEN
)
219 ret
= connector_status_connected
;
221 ret
= connector_status_disconnected
;
227 static enum drm_mode_status
tfp410_mode_valid(struct intel_dvo_device
*dvo
,
228 struct drm_display_mode
*mode
)
233 static void tfp410_mode_set(struct intel_dvo_device
*dvo
,
234 struct drm_display_mode
*mode
,
235 struct drm_display_mode
*adjusted_mode
)
237 /* As long as the basics are set up, since we don't have clock dependencies
238 * in the mode setup, we can just leave the registers alone and everything
245 /* set the tfp410 power state */
246 static void tfp410_dpms(struct intel_dvo_device
*dvo
, bool enable
)
250 if (!tfp410_readb(dvo
, TFP410_CTL_1
, &ctl1
))
254 ctl1
|= TFP410_CTL_1_PD
;
256 ctl1
&= ~TFP410_CTL_1_PD
;
258 tfp410_writeb(dvo
, TFP410_CTL_1
, ctl1
);
261 static bool tfp410_get_hw_state(struct intel_dvo_device
*dvo
)
265 if (!tfp410_readb(dvo
, TFP410_CTL_1
, &ctl1
))
268 if (ctl1
& TFP410_CTL_1_PD
)
274 static void tfp410_dump_regs(struct intel_dvo_device
*dvo
)
278 tfp410_readb(dvo
, TFP410_REV
, &val
);
279 DRM_DEBUG_KMS("TFP410_REV: 0x%02X\n", val
);
280 tfp410_readb(dvo
, TFP410_CTL_1
, &val
);
281 DRM_DEBUG_KMS("TFP410_CTL1: 0x%02X\n", val
);
282 tfp410_readb(dvo
, TFP410_CTL_2
, &val
);
283 DRM_DEBUG_KMS("TFP410_CTL2: 0x%02X\n", val
);
284 tfp410_readb(dvo
, TFP410_CTL_3
, &val
);
285 DRM_DEBUG_KMS("TFP410_CTL3: 0x%02X\n", val
);
286 tfp410_readb(dvo
, TFP410_USERCFG
, &val
);
287 DRM_DEBUG_KMS("TFP410_USERCFG: 0x%02X\n", val
);
288 tfp410_readb(dvo
, TFP410_DE_DLY
, &val
);
289 DRM_DEBUG_KMS("TFP410_DE_DLY: 0x%02X\n", val
);
290 tfp410_readb(dvo
, TFP410_DE_CTL
, &val
);
291 DRM_DEBUG_KMS("TFP410_DE_CTL: 0x%02X\n", val
);
292 tfp410_readb(dvo
, TFP410_DE_TOP
, &val
);
293 DRM_DEBUG_KMS("TFP410_DE_TOP: 0x%02X\n", val
);
294 tfp410_readb(dvo
, TFP410_DE_CNT_LO
, &val
);
295 tfp410_readb(dvo
, TFP410_DE_CNT_HI
, &val2
);
296 DRM_DEBUG_KMS("TFP410_DE_CNT: 0x%02X%02X\n", val2
, val
);
297 tfp410_readb(dvo
, TFP410_DE_LIN_LO
, &val
);
298 tfp410_readb(dvo
, TFP410_DE_LIN_HI
, &val2
);
299 DRM_DEBUG_KMS("TFP410_DE_LIN: 0x%02X%02X\n", val2
, val
);
300 tfp410_readb(dvo
, TFP410_H_RES_LO
, &val
);
301 tfp410_readb(dvo
, TFP410_H_RES_HI
, &val2
);
302 DRM_DEBUG_KMS("TFP410_H_RES: 0x%02X%02X\n", val2
, val
);
303 tfp410_readb(dvo
, TFP410_V_RES_LO
, &val
);
304 tfp410_readb(dvo
, TFP410_V_RES_HI
, &val2
);
305 DRM_DEBUG_KMS("TFP410_V_RES: 0x%02X%02X\n", val2
, val
);
308 static void tfp410_destroy(struct intel_dvo_device
*dvo
)
310 struct tfp410_priv
*tfp
= dvo
->dev_priv
;
314 dvo
->dev_priv
= NULL
;
318 struct intel_dvo_dev_ops tfp410_ops
= {
320 .detect
= tfp410_detect
,
321 .mode_valid
= tfp410_mode_valid
,
322 .mode_set
= tfp410_mode_set
,
324 .get_hw_state
= tfp410_get_hw_state
,
325 .dump_regs
= tfp410_dump_regs
,
326 .destroy
= tfp410_destroy
,