sys/dev/atm/hfa/fore_aali.h

   1 /*
   2  *
   3  * ===================================
   4  * HARP  |  Host ATM Research Platform
   5  * ===================================
   6  *
   7  *
   8  * This Host ATM Research Platform ("HARP") file (the "Software") is
   9  * made available by Network Computing Services, Inc. ("NetworkCS")
  10  * "AS IS".  NetworkCS does not provide maintenance, improvements or
  11  * support of any kind.
  12  *
  13  * NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
  14  * INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
  15  * AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
  16  * SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
  17  * In no event shall NetworkCS be responsible for any damages, including
  18  * but not limited to consequential damages, arising from or relating to
  19  * any use of the Software or related support.
  20  *
  21  * Copyright 1994-1998 Network Computing Services, Inc.
  22  *
  23  * Copies of this Software may be made, however, the above copyright
  24  * notice must be reproduced on all copies.
  25  *
  26  *      @(#) $FreeBSD: src/sys/dev/hfa/fore_aali.h,v 1.2 1999/08/28 00:41:48 peter Exp $
  27  *      @(#) $DragonFly: src/sys/dev/atm/hfa/fore_aali.h,v 1.2 2003/06/17 04:28:27 dillon Exp $
  28  *
  29  */
  30
  31 /*
  32  * FORE Systems 200-Series Adapter Support
  33  * ---------------------------------------
  34  *
  35  * ATM Adaptation Layer Interface (AALI) definitions
  36  *
  37  */
  38
  39 #ifndef _FORE_AALI_H
  40 #define _FORE_AALI_H
  41
  42 /*
  43  * This file contains the definitions required by the FORE ATM Adaptation
  44  * Layer Interface (AALI) specification.
  45  */
  46
  47
  48 /*
  49  * Addressing/Pointer definitions
  50  *
  51  * The CP memory only supports 32-bit word accesses (read and write) - thus,
  52  * all memory must be defined and accessed as 32-bit words.  Also, since the
  53  * data transfers are word-sized, we must take care of byte-swapping issues
  54  * from/to little-endian hosts (the CP is an i960 processor, ie big-endian).
  55  *
  56  * All pointers to CP memory areas are actually offsets from the start of
  57  * the adapter RAM address space.
  58  *
  59  * All CP-resident data structures are declared volatile.
  60  */
  61 typedef void *          H_addr;         /* Host-resident address */
  62 typedef unsigned long   H_dma;          /* Host-resident DMA address */
  63 typedef unsigned long   CP_word;        /* CP-resident word */
  64 typedef unsigned long   CP_addr;        /* CP-resident CP memory offset */
  65 typedef unsigned long   CP_dma;         /* CP-resident DMA address */
  66
  67
  68 /*
  69  * Structure defining the CP's shared memory interface to the mon960 program
  70  */
  71 struct mon960 {
  72         CP_word         mon_xmitmon;    /* Uart - host to mon960 (see below) */
  73         CP_word         mon_xmithost;   /* Uart - mon960 to host (see below) */
  74         CP_word         mon_bstat;      /* Boot status word (see below) */
  75         CP_addr         mon_appl;       /* Pointer to application memory area */
  76         CP_word         mon_ver;        /* Mon960 firmware version */
  77 };
  78 typedef volatile struct mon960  Mon960;
  79
  80 /*
  81  * Pseudo-UART usage
  82  */
  83 #define UART_READY      0x00000000      /* UART is ready for more data */
  84 #define UART_VALID      0x01000000      /* UART character is valid */
  85 #define UART_DATAMASK   0x000000ff      /* UART character data mask */
  86
  87 /*
  88  * Boot Status Word
  89  */
  90 #define BOOT_COLDSTART  0xc01dc01d      /* CP is performing cold start */
  91 #define BOOT_MONREADY   0x02201958      /* Monitor is waiting for commands */
  92 #define BOOT_FAILTEST   0xadbadbad      /* Monitor failed self-test */
  93 #define BOOT_RUNNING    0xce11feed      /* Microcode downloaded and running */
  94
  95 #define BOOT_LOOPS      20              /* Loops to wait for CP to boot */
  96 #define BOOT_DELAY      100000          /* Delay (us) for each boot loop */
  97
  98
  99 /*
 100  * Supported AALs
 101  */
 102 enum fore_aal {
 103         FORE_AAL_0 = 0,                 /* Cell Service */
 104         FORE_AAL_4 = 4,                 /* AAL 3/4 */
 105         FORE_AAL_5 = 5                  /* AAL 5 */
 106 };
 107 typedef enum fore_aal Fore_aal;
 108
 109
 110 /*
 111  * Buffer strategy definition
 112  */
 113 struct buf_strategy {
 114         CP_word         bfs_quelen;     /* Buffer supply queue entries */
 115         CP_word         bfs_bufsize;    /* Buffer size */
 116         CP_word         bfs_cppool;     /* Buffers in CP-resident pool */
 117         CP_word         bfs_entsize;    /* Buffers in each supply queue entry */
 118 };
 119 typedef volatile struct buf_strategy    Buf_strategy;
 120
 121 /*
 122  * Buffer strategy id
 123  */
 124 #define BUF_STRAT_1     0               /* Buffer strategy one */
 125 #define BUF_STRAT_2     1               /* Buffer strategy two */
 126
 127
 128
 129 #ifdef ATM_KERNEL
 130 /*
 131  * Common Queue Element
 132  *
 133  * Used for Transmit, Receive and Buffer Supply Queues
 134  */
 135 struct com_queue {
 136         CP_dma          cq_descr;       /* Pointer to element descriptor */
 137         CP_dma          cq_status;      /* Pointer to element status word */
 138 };
 139 typedef volatile struct com_queue       Com_queue;
 140
 141
 142 /*
 143  * Queue element status word
 144  */
 145 typedef volatile unsigned long  Q_status;
 146
 147 #define QSTAT_PENDING   0x01            /* Operation is pending */
 148 #define QSTAT_COMPLETED 0x02            /* Operation successfully completed */
 149 #define QSTAT_FREE      0x04            /* Queue element is free/unused */
 150 #define QSTAT_ERROR     0x08            /* Operation encountered an error */
 151
 152 #define QSTAT_ALIGN     4
 153
 154
 155 /*
 156  * PDU Transmit Queue
 157  */
 158
 159 /*
 160  * PDU Transmit Queue Element
 161  */
 162 typedef volatile struct com_queue       Xmit_queue;
 163
 164
 165 /*
 166  * PDU Transmit buffer segment descriptor
 167  */
 168 struct xmit_seg_descr {
 169         H_dma           xsd_buffer;     /* Buffer's DMA address */
 170         u_int           xsd_len;        /* Data length in buffer */
 171 };
 172 typedef struct xmit_seg_descr   Xmit_seg_descr;
 173
 174 #define XMIT_SEG_ALIGN  4
 175
 176
 177 /*
 178  * PDU Transmit descriptor header
 179  */
 180 struct xmit_descr_hdr {
 181         u_long          xdh_cell_hdr;   /* Cell header (minus HEC) */
 182         u_long          xdh_spec;       /* Transmit specification (see below) */
 183         u_long          xdh_rate;       /* Rate control (data/idle cell ratio)*/
 184         u_long          xdh_pad;        /* Pad to quad-word boundary */
 185 };
 186 typedef struct xmit_descr_hdr   Xmit_descr_hdr;
 187
 188
 189 #define XMIT_BLK_BITS           5               /* Bits to encode block size */
 190 #define XMIT_MAX_BLK_BITS       4               /* Max bits we can use */
 191 #define XMIT_BLK_SIZE           (1 << XMIT_BLK_BITS)
 192 #define XMIT_SEGS_TO_BLKS(nseg) \
 193                 ((((nseg) * sizeof(Xmit_seg_descr)) \
 194                 + sizeof(Xmit_descr_hdr) + (XMIT_BLK_SIZE - 1)) \
 195                 >> XMIT_BLK_BITS)
 196 #define XMIT_MAX_BLKS           ((1 << XMIT_MAX_BLK_BITS) - 1)
 197 #define XMIT_HDR_SEGS           ((XMIT_BLK_SIZE - sizeof(Xmit_descr_hdr)) \
 198                                         / sizeof(Xmit_seg_descr))
 199 #define XMIT_BLK_SEGS           (XMIT_BLK_SIZE / sizeof(Xmit_seg_descr))
 200 #define XMIT_EXTRA_SEGS         ((XMIT_MAX_BLKS - 1) * XMIT_BLK_SEGS)
 201 #define XMIT_MAX_SEGS           (XMIT_EXTRA_SEGS + XMIT_HDR_SEGS)
 202
 203
 204 /*
 205  * PDU Transmit descriptor
 206  */
 207 struct xmit_descr {
 208         Xmit_descr_hdr  xd_hdr;         /* Descriptor header */
 209         Xmit_seg_descr  xd_seg[XMIT_MAX_SEGS];  /* PDU segments */
 210 };
 211 typedef struct xmit_descr       Xmit_descr;
 212
 213 #define xd_cell_hdr     xd_hdr.xdh_cell_hdr
 214 #define xd_spec         xd_hdr.xdh_spec
 215 #define xd_rate         xd_hdr.xdh_rate
 216
 217 /*
 218  * Transmit specification
 219  *
 220  *      Bits  0-15 - Total PDU length
 221  *      Bits 16-23 - Number of transmit segments
 222  *      Bits 24-27 - AAL type
 223  *      Bits 28-31 - Interrupt flag
 224  */
 225 #define XDS_SET_SPEC(i,a,n,l)   (((i) << 28) | ((a) << 24) | ((n) << 16) | (l))
 226 #define XDS_GET_LEN(s)          ((s) & 0xffff)
 227 #define XDS_GET_SEGS(s)         (((s) >> 16) & 0xff)
 228 #define XDS_GET_AAL(s)          (((s) >> 24) & 0xf)
 229 #define XDS_GET_INTR(s)         (((s) >> 28) & 0xf)
 230
 231 #define XMIT_MAX_PDULEN         65535
 232 #define XMIT_DESCR_ALIGN        32
 233
 234
 235
 236 /*
 237  * PDU Receive Queue
 238  */
 239
 240 /*
 241  * PDU Receive Queue Element
 242  */
 243 typedef volatile struct com_queue       Recv_queue;
 244
 245
 246 /*
 247  * Receive PDU buffer segment description
 248  */
 249 struct recv_seg_descr {
 250         H_addr          rsd_handle;     /* Buffer handle (from supply) */
 251         u_int           rsd_len;        /* Data length in buffer */
 252 };
 253 typedef struct recv_seg_descr   Recv_seg_descr;
 254
 255
 256 /*
 257  * PDU Receive descriptor header
 258  */
 259 struct recv_descr_hdr {
 260         u_long          rdh_cell_hdr;   /* Cell header (minus HEC) */
 261         u_long          rdh_nsegs;      /* Number of receive segments */
 262 };
 263 typedef struct recv_descr_hdr   Recv_descr_hdr;
 264
 265
 266 #define RECV_BLK_SIZE           32
 267 #define RECV_HDR_SEGS           ((RECV_BLK_SIZE - sizeof(Recv_descr_hdr)) \
 268                                         / sizeof(Recv_seg_descr))
 269 #define RECV_BLK_SEGS           (RECV_BLK_SIZE / sizeof(Recv_seg_descr))
 270 #define RECV_MAX_LG_SEGS        ((FORE_IFF_MTU - BUF1_SM_SIZE \
 271                                         + (BUF1_LG_SIZE - 1)) / BUF1_LG_SIZE)
 272 #define RECV_EXTRA_BLKS         (((RECV_MAX_LG_SEGS + 1 - RECV_HDR_SEGS) \
 273                                         + (RECV_BLK_SEGS - 1)) / RECV_BLK_SEGS)
 274 #define RECV_EXTRA_SEGS         (RECV_EXTRA_BLKS * RECV_BLK_SEGS)
 275 #define RECV_MAX_SEGS           (RECV_EXTRA_SEGS + RECV_HDR_SEGS)
 276
 277
 278 /*
 279  * PDU Receive descriptor
 280  */
 281 struct recv_descr {
 282         Recv_descr_hdr  rd_hdr;         /* Descriptor header */
 283         Recv_seg_descr  rd_seg[RECV_MAX_SEGS];  /* PDU segments */
 284 };
 285 typedef struct recv_descr       Recv_descr;
 286
 287 #define rd_cell_hdr     rd_hdr.rdh_cell_hdr
 288 #define rd_nsegs        rd_hdr.rdh_nsegs
 289
 290 #define RECV_DESCR_ALIGN        32
 291
 292
 293
 294 /*
 295  * Buffer Supply Queue
 296  */
 297
 298 /*
 299  * Buffer Supply Queue Element
 300  */
 301 typedef volatile struct com_queue       Buf_queue;
 302
 303
 304 /*
 305  * Buffer supply descriptor for supplying receive buffers
 306  */
 307 struct buf_descr {
 308         H_addr          bsd_handle;     /* Host-specific buffer handle */
 309         H_dma           bsd_buffer;     /* Buffer DMA address */
 310 };
 311 typedef struct buf_descr        Buf_descr;
 312
 313 #define BUF_DESCR_ALIGN         32
 314
 315
 316
 317 /*
 318  * Command Queue
 319  */
 320
 321 /*
 322  * Command Codes
 323  */
 324 typedef volatile unsigned long  Cmd_code;
 325
 326 #define CMD_INIT        0x01            /* Initialize microcode */
 327 #define CMD_ACT_VCCIN   0x02            /* Activate incoming VCC */
 328 #define CMD_ACT_VCCOUT  0x03            /* Activate outgoing VCC */
 329 #define CMD_DACT_VCCIN  0x04            /* Deactivate incoming VCC */
 330 #define CMD_DACT_VCCOUT 0x05            /* Deactivate outgoing VCC */
 331 #define CMD_GET_STATS   0x06            /* Get adapter statistics */
 332 #define CMD_SET_OC3_REG 0x07            /* Set SUNI OC3 registers */
 333 #define CMD_GET_OC3_REG 0x08            /* Get SUNI OC3 registers */
 334 #define CMD_GET_PROM    0x09            /* Get PROM data */
 335 #define CMD_INTR_REQ    0x80            /* Request host interrupt */
 336
 337 #endif  /* ATM_KERNEL */
 338
 339
 340 /*
 341  * Structure defining the parameters for the Initialize command
 342  */
 343 struct init_parms {
 344         CP_word         init_cmd;       /* Command code */
 345         CP_word         init_status;    /* Completion status */
 346         CP_word         init_indisc;    /* Not used */
 347         CP_word         init_numvcc;    /* Number of VCC's supported */
 348         CP_word         init_cmd_elem;  /* # of command queue elements */
 349         CP_word         init_xmit_elem; /* # of transmit queue elements */
 350         CP_word         init_recv_elem; /* # of receive queue elements */
 351         CP_word         init_recv_ext;  /* # of extra receive descr SEGMENTS */
 352         CP_word         init_xmit_ext;  /* # of extra transmit descr SEGMENTS */
 353         CP_word         init_cls_vcc;   /* Not used */
 354         CP_word         init_pad[2];    /* Pad to quad-word boundary */
 355         Buf_strategy    init_buf1s;     /* Buffer strategy - 1 small */
 356         Buf_strategy    init_buf1l;     /* Buffer strategy - 1 large */
 357         Buf_strategy    init_buf2s;     /* Buffer strategy - 2 small */
 358         Buf_strategy    init_buf2l;     /* Buffer strategy - 2 large */
 359 };
 360 typedef volatile struct init_parms      Init_parms;
 361
 362
 363 #ifdef ATM_KERNEL
 364 /*
 365  * Structure defining the parameters for the Activate commands
 366  */
 367 struct activate_parms {
 368         CP_word         act_spec;       /* Command specification (see below) */
 369         CP_word         act_vccid;      /* VCC id (VPI=0,VCI=id) */
 370         CP_word         act_batch;      /* # cells in batch (AAL=NULL) */
 371         CP_word         act_pad;        /* Pad to quad-word boundary */
 372 };
 373 typedef volatile struct activate_parms  Activate_parms;
 374
 375 /*
 376  * Activate command specification
 377  *
 378  *      Bits  0-7  - command code
 379  *      Bits  8-15 - AAL type
 380  *      Bits 16-23 - buffer strategy
 381  *      Bits 24-31 - reserved
 382  */
 383 #define ACT_SET_SPEC(b,a,c)     (((b) << 16) | ((a) << 8) | (c))
 384 #define ACT_GET_CMD(s)          ((s) & 0xff)
 385 #define ACT_GET_AAL(s)          (((s) >> 8) & 0xff)
 386 #define ACT_GET_STRAT(s)        (((s) >> 16) & 0xff)
 387
 388
 389 /*
 390  * Structure defining the parameters for the Deactivate commands
 391  */
 392 struct dactivate_parms {
 393         CP_word         dact_cmd;       /* Command code */
 394         CP_word         dact_vccid;     /* VCC id (VPI=0,VCI=id) */
 395         CP_word         dact_pad[2];    /* Pad to quad-word boundary */
 396 };
 397 typedef volatile struct dactivate_parms Dactivate_parms;
 398
 399
 400 /*
 401  * Structure defining the parameters for the Get Statistics command
 402  */
 403 struct stats_parms {
 404         CP_word         stats_cmd;      /* Command code */
 405         CP_dma          stats_buffer;   /* DMA address of host stats buffer */
 406         CP_word         stats_pad[2];   /* Pad to quad-word boundary */
 407 };
 408 typedef volatile struct stats_parms     Stats_parms;
 409
 410
 411 /*
 412  * Structure defining the parameters for the SUNI OC3 commands
 413  */
 414 struct suni_parms {
 415         CP_word         suni_spec;      /* Command specification (see below) */
 416         CP_dma          suni_buffer;    /* DMA address of host SUNI buffer */
 417         CP_word         suni_pad[2];    /* Pad to quad-word boundary */
 418 };
 419 typedef volatile struct suni_parms      Suni_parms;
 420
 421 /*
 422  * SUNI OC3 command specification
 423  *
 424  *      Bits  0-7  - command code
 425  *      Bits  8-15 - SUNI register number
 426  *      Bits 16-23 - Value(s) to set in register
 427  *      Bits 24-31 - Mask selecting value bits
 428  */
 429 #define SUNI_SET_SPEC(m,v,r,c)  (((m) << 24) | ((v) << 16) | ((r) << 8) | (c))
 430 #define SUNI_GET_CMD(s)         ((s) & 0xff)
 431 #define SUNI_GET_REG(s)         (((s) >> 8) & 0xff)
 432 #define SUNI_GET_VALUE(s)       (((s) >> 16) & 0xff)
 433 #define SUNI_GET_MASK(s)        (((s) >> 24) & 0xff)
 434
 435
 436 /*
 437  * Structure defining the parameters for the Get Prom command
 438  */
 439 struct  prom_parms {
 440         CP_word         prom_cmd;       /* Command code */
 441         CP_dma          prom_buffer;    /* DMA address of host prom buffer */
 442         CP_word         prom_pad[2];    /* Pad to quad-word boundary */
 443 };
 444 typedef volatile struct prom_parms      Prom_parms;
 445
 446
 447 /*
 448  * Command Queue Element
 449  */
 450 struct cmd_queue {
 451         union {                         /* Command-specific parameters */
 452                 Activate_parms  cmdqu_act;
 453                 Dactivate_parms cmdqu_dact;
 454                 Stats_parms     cmdqu_stats;
 455                 Suni_parms      cmdqu_suni;
 456                 Prom_parms      cmdqu_prom;
 457         } cmdq_u;
 458         CP_dma          cmdq_status;    /* Pointer to element status word */
 459         CP_word         cmdq_pad[3];    /* Pad to quad-word boundary */
 460 };
 461 #define cmdq_act        cmdq_u.cmdqu_act
 462 #define cmdq_dact       cmdq_u.cmdqu_dact
 463 #define cmdq_stats      cmdq_u.cmdqu_stats
 464 #define cmdq_suni       cmdq_u.cmdqu_suni
 465 #define cmdq_prom       cmdq_u.cmdqu_prom
 466 typedef volatile struct cmd_queue       Cmd_queue;
 467
 468 #endif  /* ATM_KERNEL */
 469
 470
 471
 472 /*
 473  * Structure defining the CP's shared memory interface to the
 474  * AALI firmware program (downloaded microcode)
 475  */
 476 struct aali {
 477         CP_addr         aali_cmd_q;     /* Pointer to command queue */
 478         CP_addr         aali_xmit_q;    /* Pointer to transmit queue */
 479         CP_addr         aali_recv_q;    /* Pointer to receive queue */
 480         CP_addr         aali_buf1s_q;   /* Pointer to strategy-1 small queue */
 481         CP_addr         aali_buf1l_q;   /* Pointer to strategy-1 large queue */
 482         CP_addr         aali_buf2s_q;   /* Pointer to strategy-2 small queue */
 483         CP_addr         aali_buf2l_q;   /* Pointer to strategy-2 large queue */
 484         CP_word         aali_intr_ena;  /* Enables interrupts if non-zero */
 485         CP_word         aali_intr_sent; /* Interrupt issued if non-zero */
 486         CP_addr         aali_heap;      /* Pointer to application heap */
 487         CP_word         aali_heaplen;   /* Length of application heap */
 488         CP_word         aali_hostlog;   /* FORE internal use */
 489         CP_word         aali_heartbeat; /* Monitor microcode health */
 490         CP_word         aali_ucode_ver; /* Microcode firmware version */
 491         CP_word         aali_mon_ver;   /* Mon960 version */
 492         CP_word         aali_xmit_tput; /* FORE internal use */
 493
 494         /* This must be on a quad-word boundary */
 495         Init_parms      aali_init;      /* Initialize command parameters */
 496 };
 497 typedef volatile struct aali    Aali;
 498
 499
 500 /*
 501  * CP maintained statistics - DMA'd to host with CMD_GET_STATS command
 502  */
 503 struct stats_taxi {
 504         u_long          taxi_bad_crc;   /* Bad header CRC errors */
 505         u_long          taxi_framing;   /* Framing errors */
 506         u_long          taxi_pad[2];    /* Pad to quad-word boundary */
 507 };
 508 typedef struct stats_taxi       Stats_taxi;
 509
 510 struct stats_oc3 {
 511         u_long          oc3_sect_bip8;  /* Section 8-bit intrlv parity errors */
 512         u_long          oc3_path_bip8;  /* Path 8-bit intrlv parity errors */
 513         u_long          oc3_line_bip24; /* Line 24-bit intrlv parity errors */
 514         u_long          oc3_line_febe;  /* Line far-end block errors */
 515         u_long          oc3_path_febe;  /* Path far-end block errors */
 516         u_long          oc3_hec_corr;   /* Correctible HEC errors */
 517         u_long          oc3_hec_uncorr; /* Uncorrectible HEC errors */
 518         u_long          oc3_pad;        /* Pad to quad-word boundary */
 519 };
 520 typedef struct stats_oc3        Stats_oc3;
 521
 522 struct stats_atm {
 523         u_long          atm_xmit;       /* Cells transmitted */
 524         u_long          atm_rcvd;       /* Cells received */
 525         u_long          atm_vpi_range;  /* Cell drops - VPI out of range */
 526         u_long          atm_vpi_noconn; /* Cell drops - no connect for VPI */
 527         u_long          atm_vci_range;  /* Cell drops - VCI out of range */
 528         u_long          atm_vci_noconn; /* Cell drops - no connect for VCI */
 529         u_long          atm_pad[2];     /* Pad to quad-word boundary */
 530 };
 531 typedef struct stats_atm        Stats_atm;
 532
 533 struct stats_aal0 {
 534         u_long          aal0_xmit;      /* Cells transmitted */
 535         u_long          aal0_rcvd;      /* Cells received */
 536         u_long          aal0_drops;     /* Cell drops */
 537         u_long          aal0_pad;       /* Pad to quad-word boundary */
 538 };
 539 typedef struct stats_aal0       Stats_aal0;
 540
 541 struct stats_aal4 {
 542         u_long          aal4_xmit;      /* Cells transmitted */
 543         u_long          aal4_rcvd;      /* Cells received */
 544         u_long          aal4_crc;       /* Cells with payload CRC errors */
 545         u_long          aal4_sar_cs;    /* Cells with SAR/CS errors */
 546         u_long          aal4_drops;     /* Cell drops */
 547         u_long          aal4_pdu_xmit;  /* CS PDUs transmitted */
 548         u_long          aal4_pdu_rcvd;  /* CS PDUs received */
 549         u_long          aal4_pdu_errs;  /* CS layer protocol errors */
 550         u_long          aal4_pdu_drops; /* CS PDUs dropped */
 551         u_long          aal4_pad[3];    /* Pad to quad-word boundary */
 552 };
 553 typedef struct stats_aal4       Stats_aal4;
 554
 555 struct stats_aal5 {
 556         u_long          aal5_xmit;      /* Cells transmitted */
 557         u_long          aal5_rcvd;      /* Cells received */
 558         u_long          aal5_crc_len;   /* Cells with CRC/length errors */
 559         u_long          aal5_drops;     /* Cell drops */
 560         u_long          aal5_pdu_xmit;  /* CS PDUs transmitted */
 561         u_long          aal5_pdu_rcvd;  /* CS PDUs received */
 562         u_long          aal5_pdu_crc;   /* CS PDUs with CRC errors */
 563         u_long          aal5_pdu_errs;  /* CS layer protocol errors */
 564         u_long          aal5_pdu_drops; /* CS PDUs dropped */
 565         u_long          aal5_pad[3];    /* Pad to quad-word boundary */
 566 };
 567 typedef struct stats_aal5       Stats_aal5;
 568
 569 struct stats_misc {
 570         u_long          buf1_sm_fail;   /* Alloc fail: buffer strat 1 small */
 571         u_long          buf1_lg_fail;   /* Alloc fail: buffer strat 1 large */
 572         u_long          buf2_sm_fail;   /* Alloc fail: buffer strat 2 small */
 573         u_long          buf2_lg_fail;   /* Alloc fail: buffer strat 2 large */
 574         u_long          rcvd_pdu_fail;  /* Received PDU allocation failure */
 575         u_long          carrier_status; /* Carrier status */
 576         u_long          misc_pad[2];    /* Pad to quad-word boundary */
 577 };
 578 typedef struct stats_misc       Stats_misc;
 579
 580 struct fore_cp_stats {
 581         Stats_taxi      st_cp_taxi;     /* TAXI layer statistics */
 582         Stats_oc3       st_cp_oc3;      /* OC3 layer statistics */
 583         Stats_atm       st_cp_atm;      /* ATM layer statistics */
 584         Stats_aal0      st_cp_aal0;     /* AAL0 layer statistics */
 585         Stats_aal4      st_cp_aal4;     /* AAL3/4 layer statistics */
 586         Stats_aal5      st_cp_aal5;     /* AAL5 layer statistics */
 587         Stats_misc      st_cp_misc;     /* Miscellaneous statistics */
 588 };
 589 typedef struct fore_cp_stats    Fore_cp_stats;
 590
 591 #define FORE_STATS_ALIGN        32
 592
 593 /*
 594  * CP PROM data - DMA'd to host with CMD_GET_PROM command
 595  */
 596 struct fore_prom {
 597         u_long          pr_hwver;       /* Hardware version number */
 598         u_long          pr_serno;       /* Serial number */
 599         u_char          pr_mac[8];      /* MAC address */
 600 };
 601 typedef struct fore_prom        Fore_prom;
 602
 603 #define FORE_PROM_ALIGN         32
 604
 605 #endif  /* _FORE_AALI_H */