sys/dev/drm/mga_irq.c

   1 /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   5  *
   6  * The Weather Channel (TM) funded Tungsten Graphics to develop the
   7  * initial release of the Radeon 8500 driver under the XFree86 license.
   8  * This notice must be preserved.
   9  *
  10  * Permission is hereby granted, free of charge, to any person obtaining a
  11  * copy of this software and associated documentation files (the "Software"),
  12  * to deal in the Software without restriction, including without limitation
  13  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  14  * and/or sell copies of the Software, and to permit persons to whom the
  15  * Software is furnished to do so, subject to the following conditions:
  16  *
  17  * The above copyright notice and this permission notice (including the next
  18  * paragraph) shall be included in all copies or substantial portions of the
  19  * Software.
  20  *
  21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  24  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  25  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  26  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27  * DEALINGS IN THE SOFTWARE.
  28  *
  29  * Authors:
  30  *    Keith Whitwell <keith@tungstengraphics.com>
  31  *    Eric Anholt <anholt@FreeBSD.org>
  32  *
  33  * $DragonFly: src/sys/dev/drm/mga_irq.c,v 1.1 2008/04/05 18:12:29 hasso Exp $
  34  */
  35
  36 #include "drmP.h"
  37 #include "drm.h"
  38 #include "mga_drm.h"
  39 #include "mga_drv.h"
  40
  41 irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
  42 {
  43         struct drm_device *dev = (struct drm_device *) arg;
  44         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  45         int status;
  46         int handled = 0;
  47
  48         status = MGA_READ(MGA_STATUS);
  49
  50         /* VBLANK interrupt */
  51         if (status & MGA_VLINEPEN) {
  52                 MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
  53                 atomic_inc(&dev->vbl_received);
  54                 DRM_WAKEUP(&dev->vbl_queue);
  55                 drm_vbl_send_signals(dev);
  56                 handled = 1;
  57         }
  58
  59         /* SOFTRAP interrupt */
  60         if (status & MGA_SOFTRAPEN) {
  61                 const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
  62                 const u32 prim_end = MGA_READ(MGA_PRIMEND);
  63
  64
  65                 MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
  66
  67                 /* In addition to clearing the interrupt-pending bit, we
  68                  * have to write to MGA_PRIMEND to re-start the DMA operation.
  69                  */
  70                 if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
  71                         MGA_WRITE(MGA_PRIMEND, prim_end);
  72                 }
  73
  74                 atomic_inc(&dev_priv->last_fence_retired);
  75                 DRM_WAKEUP(&dev_priv->fence_queue);
  76                 handled = 1;
  77         }
  78
  79         if (handled)
  80                 return IRQ_HANDLED;
  81         return IRQ_NONE;
  82 }
  83
  84 int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence)
  85 {
  86         unsigned int cur_vblank;
  87         int ret = 0;
  88
  89         /* Assume that the user has missed the current sequence number
  90          * by about a day rather than she wants to wait for years
  91          * using vertical blanks...
  92          */
  93         DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
  94                     (((cur_vblank = atomic_read(&dev->vbl_received))
  95                       - *sequence) <= (1 << 23)));
  96
  97         *sequence = cur_vblank;
  98
  99         return ret;
 100 }
 101
 102 int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
 103 {
 104         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 105         unsigned int cur_fence;
 106         int ret = 0;
 107
 108         /* Assume that the user has missed the current sequence number
 109          * by about a day rather than she wants to wait for years
 110          * using fences.
 111          */
 112         DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
 113                     (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
 114                       - *sequence) <= (1 << 23)));
 115
 116         *sequence = cur_fence;
 117
 118         return ret;
 119 }
 120
 121 void mga_driver_irq_preinstall(struct drm_device * dev)
 122 {
 123         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 124
 125         /* Disable *all* interrupts */
 126         MGA_WRITE(MGA_IEN, 0);
 127         /* Clear bits if they're already high */
 128         MGA_WRITE(MGA_ICLEAR, ~0);
 129 }
 130
 131 void mga_driver_irq_postinstall(struct drm_device * dev)
 132 {
 133         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 134
 135         DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
 136
 137         /* Turn on vertical blank interrupt and soft trap interrupt. */
 138         MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
 139 }
 140
 141 void mga_driver_irq_uninstall(struct drm_device * dev)
 142 {
 143         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 144         if (!dev_priv)
 145                 return;
 146
 147         /* Disable *all* interrupts */
 148         MGA_WRITE(MGA_IEN, 0);
 149
 150         dev->irq_enabled = 0;
 151 }