sys/dev/drm/mach64_irq.c

   1 /* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*-
   2  * Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c
   3  */
   4 /*-
   5  * Copyright (C) The Weather Channel, Inc.  2002.
   6  * Copyright 2003 Leif Delgass
   7  * All Rights Reserved.
   8  *
   9  * The Weather Channel (TM) funded Tungsten Graphics to develop the
  10  * initial release of the Radeon 8500 driver under the XFree86 license.
  11  * This notice must be preserved.
  12  *
  13  * Permission is hereby granted, free of charge, to any person obtaining a
  14  * copy of this software and associated documentation files (the "Software"),
  15  * to deal in the Software without restriction, including without limitation
  16  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  17  * and/or sell copies of the Software, and to permit persons to whom the
  18  * Software is furnished to do so, subject to the following conditions:
  19  *
  20  * The above copyright notice and this permission notice (including the next
  21  * paragraph) shall be included in all copies or substantial portions of the
  22  * Software.
  23  *
  24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  25  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  26  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  27  * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  28  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  29  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  30  * DEALINGS IN THE SOFTWARE.
  31  *
  32  * Authors:
  33  *    Keith Whitwell <keith@tungstengraphics.com>
  34  *    Eric Anholt <anholt@FreeBSD.org>
  35  *    Leif Delgass <ldelgass@retinalburn.net>
  36  *
  37  * $DragonFly: src/sys/dev/drm/mach64_irq.c,v 1.1 2008/04/05 18:12:29 hasso Exp $
  38  */
  39
  40 #include "drmP.h"
  41 #include "drm.h"
  42 #include "mach64_drm.h"
  43 #include "mach64_drv.h"
  44
  45 irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS)
  46 {
  47         struct drm_device *dev = (struct drm_device *) arg;
  48         drm_mach64_private_t *dev_priv =
  49             (drm_mach64_private_t *) dev->dev_private;
  50         int status;
  51
  52         status = MACH64_READ(MACH64_CRTC_INT_CNTL);
  53
  54         /* VBLANK interrupt */
  55         if (status & MACH64_CRTC_VBLANK_INT) {
  56                 /* Mask off all interrupt ack bits before setting the ack bit, since
  57                  * there may be other handlers outside the DRM.
  58                  *
  59                  * NOTE: On mach64, you need to keep the enable bits set when doing
  60                  * the ack, despite what the docs say about not acking and enabling
  61                  * in a single write.
  62                  */
  63                 MACH64_WRITE(MACH64_CRTC_INT_CNTL,
  64                              (status & ~MACH64_CRTC_INT_ACKS)
  65                              | MACH64_CRTC_VBLANK_INT);
  66
  67                 atomic_inc(&dev->vbl_received);
  68                 DRM_WAKEUP(&dev->vbl_queue);
  69                 drm_vbl_send_signals(dev);
  70                 return IRQ_HANDLED;
  71         }
  72         return IRQ_NONE;
  73 }
  74
  75 int mach64_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence)
  76 {
  77         unsigned int cur_vblank;
  78         int ret = 0;
  79
  80         /* Assume that the user has missed the current sequence number
  81          * by about a day rather than she wants to wait for years
  82          * using vertical blanks...
  83          */
  84         DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
  85                     (((cur_vblank = atomic_read(&dev->vbl_received))
  86                       - *sequence) <= (1 << 23)));
  87
  88         *sequence = cur_vblank;
  89
  90         return ret;
  91 }
  92
  93 /* drm_dma.h hooks
  94 */
  95 void mach64_driver_irq_preinstall(struct drm_device * dev)
  96 {
  97         drm_mach64_private_t *dev_priv =
  98             (drm_mach64_private_t *) dev->dev_private;
  99
 100         u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
 101
 102         DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status);
 103
 104         /* Disable and clear VBLANK interrupt */
 105         MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN)
 106                      | MACH64_CRTC_VBLANK_INT);
 107 }
 108
 109 void mach64_driver_irq_postinstall(struct drm_device * dev)
 110 {
 111         drm_mach64_private_t *dev_priv =
 112             (drm_mach64_private_t *) dev->dev_private;
 113
 114         /* Turn on VBLANK interrupt */
 115         MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL)
 116                      | MACH64_CRTC_VBLANK_INT_EN);
 117
 118         DRM_DEBUG("after install CRTC_INT_CTNL: 0x%08x\n",
 119                   MACH64_READ(MACH64_CRTC_INT_CNTL));
 120
 121 }
 122
 123 void mach64_driver_irq_uninstall(struct drm_device * dev)
 124 {
 125         drm_mach64_private_t *dev_priv =
 126             (drm_mach64_private_t *) dev->dev_private;
 127         if (!dev_priv)
 128                 return;
 129
 130         /* Disable and clear VBLANK interrupt */
 131         MACH64_WRITE(MACH64_CRTC_INT_CNTL,
 132                      (MACH64_READ(MACH64_CRTC_INT_CNTL) &
 133                       ~MACH64_CRTC_VBLANK_INT_EN)
 134                      | MACH64_CRTC_VBLANK_INT);
 135
 136         DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n",
 137                   MACH64_READ(MACH64_CRTC_INT_CNTL));
 138 }