2 * Copyright (c) 1991 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the University nor the names of its contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
33 * $FreeBSD: src/sys/i386/isa/isa_dma.c,v 1.4.2.1 2000/08/08 19:49:53 peter Exp $
37 * code to manage AT bus
39 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
40 * Fixed uninitialized variable problem and added code to deal
41 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
42 * mode DMA count compution and reorganized DMA setup code in
46 #include <sys/param.h>
47 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/malloc.h>
53 #include <vm/vm_param.h>
56 #include <machine_base/isa/ic/i8237.h>
57 #include <machine/pmap.h>
58 #include <bus/isa/isavar.h>
61 ** Register definitions for DMA controller 1 (channels 0..3):
63 #define DMA1_CHN(c) (IO_DMA1 + 1*(2*(c))) /* addr reg for channel c */
64 #define DMA1_SMSK (IO_DMA1 + 1*10) /* single mask register */
65 #define DMA1_MODE (IO_DMA1 + 1*11) /* mode register */
66 #define DMA1_FFC (IO_DMA1 + 1*12) /* clear first/last FF */
69 ** Register definitions for DMA controller 2 (channels 4..7):
71 #define DMA2_CHN(c) (IO_DMA2 + 2*(2*(c))) /* addr reg for channel c */
72 #define DMA2_SMSK (IO_DMA2 + 2*10) /* single mask register */
73 #define DMA2_MODE (IO_DMA2 + 2*11) /* mode register */
74 #define DMA2_FFC (IO_DMA2 + 2*12) /* clear first/last FF */
76 static int isa_dmarangecheck (caddr_t va
, u_int length
, int chan
);
78 static caddr_t dma_bouncebuf
[8];
79 static u_int dma_bouncebufsize
[8];
80 static u_int8_t dma_bounced
= 0;
81 static u_int8_t dma_busy
= 0; /* Used in isa_dmastart() */
82 static u_int8_t dma_inuse
= 0; /* User for acquire/release */
83 static u_int8_t dma_auto_mode
= 0;
85 #define VALID_DMA_MASK (7)
87 /* high byte of address is stored in this port for i-th dma channel */
88 static int dmapageport
[8] = { 0x87, 0x83, 0x81, 0x82, 0x8f, 0x8b, 0x89, 0x8a };
91 * Setup a DMA channel's bounce buffer.
94 isa_dmainit(int chan
, u_int bouncebufsize
)
99 if (chan
& ~VALID_DMA_MASK
)
100 panic("isa_dmainit: channel out of range");
102 if (dma_bouncebuf
[chan
] != NULL
)
103 panic("isa_dmainit: impossible request");
106 dma_bouncebufsize
[chan
] = bouncebufsize
;
108 /* Try malloc() first. It works better if it works. */
109 buf
= kmalloc(bouncebufsize
, M_DEVBUF
, M_NOWAIT
);
111 if (isa_dmarangecheck(buf
, bouncebufsize
, chan
) == 0) {
112 dma_bouncebuf
[chan
] = buf
;
115 kfree(buf
, M_DEVBUF
);
117 buf
= contigmalloc(bouncebufsize
, M_DEVBUF
, M_NOWAIT
, 0ul, 0xfffffful
,
118 1ul, chan
& 4 ? 0x20000ul
: 0x10000ul
);
120 kprintf("isa_dmainit(%d, %d) failed\n", chan
, bouncebufsize
);
122 dma_bouncebuf
[chan
] = buf
;
126 * Register a DMA channel's usage. Usually called from a device driver
127 * in open() or during its initialization.
130 isa_dma_acquire(int chan
)
133 if (chan
& ~VALID_DMA_MASK
)
134 panic("isa_dma_acquire: channel out of range");
137 if (dma_inuse
& (1 << chan
)) {
138 kprintf("isa_dma_acquire: channel %d already in use\n", chan
);
141 dma_inuse
|= (1 << chan
);
142 dma_auto_mode
&= ~(1 << chan
);
148 * Unregister a DMA channel's usage. Usually called from a device driver
149 * during close() or during its shutdown.
152 isa_dma_release(int chan
)
155 if (chan
& ~VALID_DMA_MASK
)
156 panic("isa_dma_release: channel out of range");
158 if ((dma_inuse
& (1 << chan
)) == 0)
159 kprintf("isa_dma_release: channel %d not in use\n", chan
);
162 if (dma_busy
& (1 << chan
)) {
163 dma_busy
&= ~(1 << chan
);
165 * XXX We should also do "dma_bounced &= (1 << chan);"
166 * because we are acting on behalf of isa_dmadone() which
167 * was not called to end the last DMA operation. This does
168 * not matter now, but it may in the future.
172 dma_inuse
&= ~(1 << chan
);
173 dma_auto_mode
&= ~(1 << chan
);
177 * isa_dmacascade(): program 8237 DMA controller channel to accept
178 * external dma control by a board.
181 isa_dmacascade(int chan
)
184 if (chan
& ~VALID_DMA_MASK
)
185 panic("isa_dmacascade: channel out of range");
188 /* set dma channel mode, and set dma channel mode */
189 if ((chan
& 4) == 0) {
190 outb(DMA1_MODE
, DMA37MD_CASCADE
| chan
);
191 outb(DMA1_SMSK
, chan
);
193 outb(DMA2_MODE
, DMA37MD_CASCADE
| (chan
& 3));
194 outb(DMA2_SMSK
, chan
& 3);
199 * isa_dmastart(): program 8237 DMA controller channel, avoid page alignment
200 * problems by using a bounce buffer.
203 isa_dmastart(int flags
, caddr_t addr
, u_int nbytes
, int chan
)
210 if (chan
& ~VALID_DMA_MASK
)
211 panic("isa_dmastart: channel out of range");
213 if ((chan
< 4 && nbytes
> (1<<16))
214 || (chan
>= 4 && (nbytes
> (1<<17) || (u_int
)(uintptr_t)addr
& 1)))
215 panic("isa_dmastart: impossible request");
217 if ((dma_inuse
& (1 << chan
)) == 0)
218 kprintf("isa_dmastart: channel %d not acquired\n", chan
);
223 * XXX This should be checked, but drivers like ad1848 only call
224 * isa_dmastart() once because they use Auto DMA mode. If we
225 * leave this in, drivers that do this will print this continuously.
227 if (dma_busy
& (1 << chan
))
228 kprintf("isa_dmastart: channel %d busy\n", chan
);
231 dma_busy
|= (1 << chan
);
233 if (isa_dmarangecheck(addr
, nbytes
, chan
)) {
234 if (dma_bouncebuf
[chan
] == NULL
235 || dma_bouncebufsize
[chan
] < nbytes
)
236 panic("isa_dmastart: bad bounce buffer");
237 dma_bounced
|= (1 << chan
);
238 newaddr
= dma_bouncebuf
[chan
];
240 /* copy bounce buffer on write */
241 if (flags
& ISADMA_WRITE
)
242 bcopy(addr
, newaddr
, nbytes
);
246 /* translate to physical */
247 phys
= pmap_kextract((vm_offset_t
)addr
);
249 if (flags
& ISADMA_RAW
) {
250 dma_auto_mode
|= (1 << chan
);
252 dma_auto_mode
&= ~(1 << chan
);
255 if ((chan
& 4) == 0) {
257 * Program one of DMA channels 0..3. These are
258 * byte mode channels.
260 /* set dma channel mode, and reset address ff */
262 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
263 if (flags
& ISADMA_RAW
) {
264 if (flags
& ISADMA_READ
)
265 outb(DMA1_MODE
, DMA37MD_AUTO
|DMA37MD_WRITE
|chan
);
267 outb(DMA1_MODE
, DMA37MD_AUTO
|DMA37MD_READ
|chan
);
270 if (flags
& ISADMA_READ
)
271 outb(DMA1_MODE
, DMA37MD_SINGLE
|DMA37MD_WRITE
|chan
);
273 outb(DMA1_MODE
, DMA37MD_SINGLE
|DMA37MD_READ
|chan
);
276 /* send start address */
277 waport
= DMA1_CHN(chan
);
279 outb(waport
, phys
>>8);
280 outb(dmapageport
[chan
], phys
>>16);
283 outb(waport
+ 1, --nbytes
);
284 outb(waport
+ 1, nbytes
>>8);
287 outb(DMA1_SMSK
, chan
);
290 * Program one of DMA channels 4..7. These are
291 * word mode channels.
293 /* set dma channel mode, and reset address ff */
295 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
296 if (flags
& ISADMA_RAW
) {
297 if (flags
& ISADMA_READ
)
298 outb(DMA2_MODE
, DMA37MD_AUTO
|DMA37MD_WRITE
|(chan
&3));
300 outb(DMA2_MODE
, DMA37MD_AUTO
|DMA37MD_READ
|(chan
&3));
303 if (flags
& ISADMA_READ
)
304 outb(DMA2_MODE
, DMA37MD_SINGLE
|DMA37MD_WRITE
|(chan
&3));
306 outb(DMA2_MODE
, DMA37MD_SINGLE
|DMA37MD_READ
|(chan
&3));
309 /* send start address */
310 waport
= DMA2_CHN(chan
- 4);
311 outb(waport
, phys
>>1);
312 outb(waport
, phys
>>9);
313 outb(dmapageport
[chan
], phys
>>16);
317 outb(waport
+ 2, --nbytes
);
318 outb(waport
+ 2, nbytes
>>8);
321 outb(DMA2_SMSK
, chan
& 3);
326 isa_dmadone(int flags
, caddr_t addr
, int nbytes
, int chan
)
329 if (chan
& ~VALID_DMA_MASK
)
330 panic("isa_dmadone: channel out of range");
332 if ((dma_inuse
& (1 << chan
)) == 0)
333 kprintf("isa_dmadone: channel %d not acquired\n", chan
);
336 if (((dma_busy
& (1 << chan
)) == 0) &&
337 (dma_auto_mode
& (1 << chan
)) == 0 )
338 kprintf("isa_dmadone: channel %d not busy\n", chan
);
340 if ((dma_auto_mode
& (1 << chan
)) == 0)
341 outb(chan
& 4 ? DMA2_SMSK
: DMA1_SMSK
, (chan
& 3) | 4);
343 if (dma_bounced
& (1 << chan
)) {
344 /* copy bounce buffer on read */
345 if (flags
& ISADMA_READ
)
346 bcopy(dma_bouncebuf
[chan
], addr
, nbytes
);
348 dma_bounced
&= ~(1 << chan
);
350 dma_busy
&= ~(1 << chan
);
354 * Check for problems with the address range of a DMA transfer
355 * (non-contiguous physical pages, outside of bus address space,
356 * crossing DMA page boundaries).
357 * Return true if special handling needed.
361 isa_dmarangecheck(caddr_t va
, u_int length
, int chan
)
363 vm_paddr_t phys
, priorpage
= 0;
365 u_int dma_pgmsk
= (chan
& 4) ? ~(128*1024-1) : ~(64*1024-1);
367 endva
= (vm_offset_t
)round_page((vm_offset_t
)va
+ length
);
368 for (; va
< (caddr_t
) endva
; va
+= PAGE_SIZE
) {
369 phys
= trunc_page(pmap_kextract((vm_offset_t
)va
));
370 #define ISARAM_END RAM_END
372 panic("isa_dmacheck: no physical page present");
373 if (phys
>= ISARAM_END
)
376 if (priorpage
+ PAGE_SIZE
!= phys
)
378 /* check if crossing a DMA page boundary */
379 if (((u_int
)priorpage
^ (u_int
)phys
) & dma_pgmsk
)
388 * Query the progress of a transfer on a DMA channel.
390 * To avoid having to interrupt a transfer in progress, we sample
391 * each of the high and low databytes twice, and apply the following
392 * logic to determine the correct count.
394 * Reads are performed with interrupts disabled, thus it is to be
395 * expected that the time between reads is very small. At most
396 * one rollover in the low count byte can be expected within the
397 * four reads that are performed.
399 * There are three gaps in which a rollover can occur :
409 * If a rollover occurs in gap1 or gap2, the low2 value will be
410 * greater than the low1 value. In this case, low2 and high2 are a
411 * corresponding pair.
413 * In any other case, low1 and high1 can be considered to be correct.
415 * The function returns the number of bytes remaining in the transfer,
416 * or -1 if the channel requested is not active.
420 isa_dmastatus(int chan
)
424 u_long low1
, high1
, low2
, high2
;
426 /* channel active? */
427 if ((dma_inuse
& (1 << chan
)) == 0) {
428 kprintf("isa_dmastatus: channel %d not active\n", chan
);
433 if (((dma_busy
& (1 << chan
)) == 0) &&
434 (dma_auto_mode
& (1 << chan
)) == 0 ) {
435 kprintf("chan %d not busy\n", chan
);
438 if (chan
< 4) { /* low DMA controller */
440 waport
= DMA1_CHN(chan
) + 1;
441 } else { /* high DMA controller */
443 waport
= DMA2_CHN(chan
- 4) + 2;
446 cpu_disable_intr(); /* YYY *//* no interrupts Mr Jones! */
447 outb(ffport
, 0); /* clear register LSB flipflop */
450 outb(ffport
, 0); /* clear again */
453 cpu_enable_intr(); /* enable interrupts again */
456 * Now decide if a wrap has tried to skew our results.
457 * Note that after TC, the count will read 0xffff, while we want
458 * to return zero, so we add and then mask to compensate.
461 cnt
= (low1
+ (high1
<< 8) + 1) & 0xffff;
463 cnt
= (low2
+ (high2
<< 8) + 1) & 0xffff;
466 if (chan
>= 4) /* high channels move words */
472 * Stop a DMA transfer currently in progress.
475 isa_dmastop(int chan
)
477 if ((dma_inuse
& (1 << chan
)) == 0)
478 kprintf("isa_dmastop: channel %d not acquired\n", chan
);
480 if (((dma_busy
& (1 << chan
)) == 0) &&
481 ((dma_auto_mode
& (1 << chan
)) == 0)) {
482 kprintf("chan %d not busy\n", chan
);
486 if ((chan
& 4) == 0) {
487 outb(DMA1_SMSK
, (chan
& 3) | 4 /* disable mask */);
489 outb(DMA2_SMSK
, (chan
& 3) | 4 /* disable mask */);
491 return(isa_dmastatus(chan
));
495 isa_dmabp(struct buf
*bp
)
499 KKASSERT(bp
->b_cmd
!= BUF_CMD_DONE
);
500 if (bp
->b_flags
& B_RAW
)
502 if (bp
->b_cmd
== BUF_CMD_READ
) {
503 flags
|= ISADMA_READ
;
505 /* BUF_CMD_WRITE, BUF_CMD_FORMAT */
506 flags
|= ISADMA_WRITE
;