sys/dev/drm/mga_warp.c

   1 /* mga_warp.c -- Matrox G200/G400 WARP engine management -*- linux-c -*-
   2  * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com
   3  */
   4 /*
   5  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25  * OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  * Authors:
  28  *    Gareth Hughes <gareth@valinux.com>
  29  *
  30  * $DragonFly: src/sys/dev/drm/mga_warp.c,v 1.1 2008/04/05 18:12:29 hasso Exp $
  31  */
  32
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "mga_drm.h"
  36 #include "mga_drv.h"
  37 #include "mga_ucode.h"
  38
  39 #define MGA_WARP_CODE_ALIGN             256     /* in bytes */
  40
  41 #define WARP_UCODE_SIZE( which )                                        \
  42         ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
  43
  44 #define WARP_UCODE_INSTALL( which, where )                              \
  45 do {                                                                    \
  46         DRM_DEBUG( " pcbase = 0x%08lx  vcbase = %p\n", pcbase, vcbase );\
  47         dev_priv->warp_pipe_phys[where] = pcbase;                       \
  48         memcpy( vcbase, which, sizeof(which) );                         \
  49         pcbase += WARP_UCODE_SIZE( which );                             \
  50         vcbase += WARP_UCODE_SIZE( which );                             \
  51 } while (0)
  52
  53 static const unsigned int mga_warp_g400_microcode_size =
  54                (WARP_UCODE_SIZE(warp_g400_tgz) +
  55                 WARP_UCODE_SIZE(warp_g400_tgza) +
  56                 WARP_UCODE_SIZE(warp_g400_tgzaf) +
  57                 WARP_UCODE_SIZE(warp_g400_tgzf) +
  58                 WARP_UCODE_SIZE(warp_g400_tgzs) +
  59                 WARP_UCODE_SIZE(warp_g400_tgzsa) +
  60                 WARP_UCODE_SIZE(warp_g400_tgzsaf) +
  61                 WARP_UCODE_SIZE(warp_g400_tgzsf) +
  62                 WARP_UCODE_SIZE(warp_g400_t2gz) +
  63                 WARP_UCODE_SIZE(warp_g400_t2gza) +
  64                 WARP_UCODE_SIZE(warp_g400_t2gzaf) +
  65                 WARP_UCODE_SIZE(warp_g400_t2gzf) +
  66                 WARP_UCODE_SIZE(warp_g400_t2gzs) +
  67                 WARP_UCODE_SIZE(warp_g400_t2gzsa) +
  68                 WARP_UCODE_SIZE(warp_g400_t2gzsaf) +
  69                 WARP_UCODE_SIZE(warp_g400_t2gzsf));
  70
  71 static const unsigned int mga_warp_g200_microcode_size =
  72                (WARP_UCODE_SIZE(warp_g200_tgz) +
  73                 WARP_UCODE_SIZE(warp_g200_tgza) +
  74                 WARP_UCODE_SIZE(warp_g200_tgzaf) +
  75                 WARP_UCODE_SIZE(warp_g200_tgzf) +
  76                 WARP_UCODE_SIZE(warp_g200_tgzs) +
  77                 WARP_UCODE_SIZE(warp_g200_tgzsa) +
  78                 WARP_UCODE_SIZE(warp_g200_tgzsaf) +
  79                 WARP_UCODE_SIZE(warp_g200_tgzsf));
  80
  81
  82 unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv)
  83 {
  84         switch (dev_priv->chipset) {
  85         case MGA_CARD_TYPE_G400:
  86         case MGA_CARD_TYPE_G550:
  87                 return PAGE_ALIGN(mga_warp_g400_microcode_size);
  88         case MGA_CARD_TYPE_G200:
  89                 return PAGE_ALIGN(mga_warp_g200_microcode_size);
  90         default:
  91                 DRM_ERROR("Unknown chipset value: 0x%x\n", dev_priv->chipset);
  92                 return 0;
  93         }
  94 }
  95
  96 static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv)
  97 {
  98         unsigned char *vcbase = dev_priv->warp->handle;
  99         unsigned long pcbase = dev_priv->warp->offset;
 100
 101         memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
 102
 103         WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ);
 104         WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF);
 105         WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA);
 106         WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF);
 107         WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS);
 108         WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF);
 109         WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA);
 110         WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF);
 111
 112         WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ);
 113         WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF);
 114         WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA);
 115         WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF);
 116         WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS);
 117         WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF);
 118         WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA);
 119         WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF);
 120
 121         return 0;
 122 }
 123
 124 static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv)
 125 {
 126         unsigned char *vcbase = dev_priv->warp->handle;
 127         unsigned long pcbase = dev_priv->warp->offset;
 128
 129         memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
 130
 131         WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ);
 132         WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF);
 133         WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA);
 134         WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF);
 135         WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS);
 136         WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF);
 137         WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA);
 138         WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF);
 139
 140         return 0;
 141 }
 142
 143 int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
 144 {
 145         const unsigned int size = mga_warp_microcode_size(dev_priv);
 146
 147         DRM_DEBUG("MGA ucode size = %d bytes\n", size);
 148         if (size > dev_priv->warp->size) {
 149                 DRM_ERROR("microcode too large! (%u > %lu)\n",
 150                           size, dev_priv->warp->size);
 151                 return -ENOMEM;
 152         }
 153
 154         switch (dev_priv->chipset) {
 155         case MGA_CARD_TYPE_G400:
 156         case MGA_CARD_TYPE_G550:
 157                 return mga_warp_install_g400_microcode(dev_priv);
 158         case MGA_CARD_TYPE_G200:
 159                 return mga_warp_install_g200_microcode(dev_priv);
 160         default:
 161                 return -EINVAL;
 162         }
 163 }
 164
 165 #define WMISC_EXPECTED          (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
 166
 167 int mga_warp_init(drm_mga_private_t * dev_priv)
 168 {
 169         u32 wmisc;
 170
 171         /* FIXME: Get rid of these damned magic numbers...
 172          */
 173         switch (dev_priv->chipset) {
 174         case MGA_CARD_TYPE_G400:
 175         case MGA_CARD_TYPE_G550:
 176                 MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND);
 177                 MGA_WRITE(MGA_WGETMSB, 0x00000E00);
 178                 MGA_WRITE(MGA_WVRTXSZ, 0x00001807);
 179                 MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000);
 180                 break;
 181         case MGA_CARD_TYPE_G200:
 182                 MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND);
 183                 MGA_WRITE(MGA_WGETMSB, 0x1606);
 184                 MGA_WRITE(MGA_WVRTXSZ, 7);
 185                 break;
 186         default:
 187                 return -EINVAL;
 188         }
 189
 190         MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
 191                               MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE));
 192         wmisc = MGA_READ(MGA_WMISC);
 193         if (wmisc != WMISC_EXPECTED) {
 194                 DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n",
 195                           wmisc, WMISC_EXPECTED);
 196                 return -EINVAL;
 197         }
 198
 199         return 0;
 200 }