pipe - pre-MP work, change indexing to circular FIFO rindex/windex.
[dragonfly.git] / contrib / gcc-3.4 / gcc / cse.c
blob72af39aa4f3b1f3c45b87863361299b4aa089a8c
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include "coretypes.h"
26 #include "tm.h"
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "basic-block.h"
33 #include "flags.h"
34 #include "real.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "function.h"
38 #include "expr.h"
39 #include "toplev.h"
40 #include "output.h"
41 #include "ggc.h"
42 #include "timevar.h"
43 #include "except.h"
44 #include "target.h"
45 #include "params.h"
47 /* The basic idea of common subexpression elimination is to go
48 through the code, keeping a record of expressions that would
49 have the same value at the current scan point, and replacing
50 expressions encountered with the cheapest equivalent expression.
52 It is too complicated to keep track of the different possibilities
53 when control paths merge in this code; so, at each label, we forget all
54 that is known and start fresh. This can be described as processing each
55 extended basic block separately. We have a separate pass to perform
56 global CSE.
58 Note CSE can turn a conditional or computed jump into a nop or
59 an unconditional jump. When this occurs we arrange to run the jump
60 optimizer after CSE to delete the unreachable code.
62 We use two data structures to record the equivalent expressions:
63 a hash table for most expressions, and a vector of "quantity
64 numbers" to record equivalent (pseudo) registers.
66 The use of the special data structure for registers is desirable
67 because it is faster. It is possible because registers references
68 contain a fairly small number, the register number, taken from
69 a contiguously allocated series, and two register references are
70 identical if they have the same number. General expressions
71 do not have any such thing, so the only way to retrieve the
72 information recorded on an expression other than a register
73 is to keep it in a hash table.
75 Registers and "quantity numbers":
77 At the start of each basic block, all of the (hardware and pseudo)
78 registers used in the function are given distinct quantity
79 numbers to indicate their contents. During scan, when the code
80 copies one register into another, we copy the quantity number.
81 When a register is loaded in any other way, we allocate a new
82 quantity number to describe the value generated by this operation.
83 `reg_qty' records what quantity a register is currently thought
84 of as containing.
86 All real quantity numbers are greater than or equal to zero.
87 If register N has not been assigned a quantity, reg_qty[N] will
88 equal -N - 1, which is always negative.
90 Quantity numbers below zero do not exist and none of the `qty_table'
91 entries should be referenced with a negative index.
93 We also maintain a bidirectional chain of registers for each
94 quantity number. The `qty_table` members `first_reg' and `last_reg',
95 and `reg_eqv_table' members `next' and `prev' hold these chains.
97 The first register in a chain is the one whose lifespan is least local.
98 Among equals, it is the one that was seen first.
99 We replace any equivalent register with that one.
101 If two registers have the same quantity number, it must be true that
102 REG expressions with qty_table `mode' must be in the hash table for both
103 registers and must be in the same class.
105 The converse is not true. Since hard registers may be referenced in
106 any mode, two REG expressions might be equivalent in the hash table
107 but not have the same quantity number if the quantity number of one
108 of the registers is not the same mode as those expressions.
110 Constants and quantity numbers
112 When a quantity has a known constant value, that value is stored
113 in the appropriate qty_table `const_rtx'. This is in addition to
114 putting the constant in the hash table as is usual for non-regs.
116 Whether a reg or a constant is preferred is determined by the configuration
117 macro CONST_COSTS and will often depend on the constant value. In any
118 event, expressions containing constants can be simplified, by fold_rtx.
120 When a quantity has a known nearly constant value (such as an address
121 of a stack slot), that value is stored in the appropriate qty_table
122 `const_rtx'.
124 Integer constants don't have a machine mode. However, cse
125 determines the intended machine mode from the destination
126 of the instruction that moves the constant. The machine mode
127 is recorded in the hash table along with the actual RTL
128 constant expression so that different modes are kept separate.
130 Other expressions:
132 To record known equivalences among expressions in general
133 we use a hash table called `table'. It has a fixed number of buckets
134 that contain chains of `struct table_elt' elements for expressions.
135 These chains connect the elements whose expressions have the same
136 hash codes.
138 Other chains through the same elements connect the elements which
139 currently have equivalent values.
141 Register references in an expression are canonicalized before hashing
142 the expression. This is done using `reg_qty' and qty_table `first_reg'.
143 The hash code of a register reference is computed using the quantity
144 number, not the register number.
146 When the value of an expression changes, it is necessary to remove from the
147 hash table not just that expression but all expressions whose values
148 could be different as a result.
150 1. If the value changing is in memory, except in special cases
151 ANYTHING referring to memory could be changed. That is because
152 nobody knows where a pointer does not point.
153 The function `invalidate_memory' removes what is necessary.
155 The special cases are when the address is constant or is
156 a constant plus a fixed register such as the frame pointer
157 or a static chain pointer. When such addresses are stored in,
158 we can tell exactly which other such addresses must be invalidated
159 due to overlap. `invalidate' does this.
160 All expressions that refer to non-constant
161 memory addresses are also invalidated. `invalidate_memory' does this.
163 2. If the value changing is a register, all expressions
164 containing references to that register, and only those,
165 must be removed.
167 Because searching the entire hash table for expressions that contain
168 a register is very slow, we try to figure out when it isn't necessary.
169 Precisely, this is necessary only when expressions have been
170 entered in the hash table using this register, and then the value has
171 changed, and then another expression wants to be added to refer to
172 the register's new value. This sequence of circumstances is rare
173 within any one basic block.
175 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
176 reg_tick[i] is incremented whenever a value is stored in register i.
177 reg_in_table[i] holds -1 if no references to register i have been
178 entered in the table; otherwise, it contains the value reg_tick[i] had
179 when the references were entered. If we want to enter a reference
180 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
181 Until we want to enter a new entry, the mere fact that the two vectors
182 don't match makes the entries be ignored if anyone tries to match them.
184 Registers themselves are entered in the hash table as well as in
185 the equivalent-register chains. However, the vectors `reg_tick'
186 and `reg_in_table' do not apply to expressions which are simple
187 register references. These expressions are removed from the table
188 immediately when they become invalid, and this can be done even if
189 we do not immediately search for all the expressions that refer to
190 the register.
192 A CLOBBER rtx in an instruction invalidates its operand for further
193 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
194 invalidates everything that resides in memory.
196 Related expressions:
198 Constant expressions that differ only by an additive integer
199 are called related. When a constant expression is put in
200 the table, the related expression with no constant term
201 is also entered. These are made to point at each other
202 so that it is possible to find out if there exists any
203 register equivalent to an expression related to a given expression. */
205 /* One plus largest register number used in this function. */
207 static int max_reg;
209 /* One plus largest instruction UID used in this function at time of
210 cse_main call. */
212 static int max_insn_uid;
214 /* Length of qty_table vector. We know in advance we will not need
215 a quantity number this big. */
217 static int max_qty;
219 /* Next quantity number to be allocated.
220 This is 1 + the largest number needed so far. */
222 static int next_qty;
224 /* Per-qty information tracking.
226 `first_reg' and `last_reg' track the head and tail of the
227 chain of registers which currently contain this quantity.
229 `mode' contains the machine mode of this quantity.
231 `const_rtx' holds the rtx of the constant value of this
232 quantity, if known. A summations of the frame/arg pointer
233 and a constant can also be entered here. When this holds
234 a known value, `const_insn' is the insn which stored the
235 constant value.
237 `comparison_{code,const,qty}' are used to track when a
238 comparison between a quantity and some constant or register has
239 been passed. In such a case, we know the results of the comparison
240 in case we see it again. These members record a comparison that
241 is known to be true. `comparison_code' holds the rtx code of such
242 a comparison, else it is set to UNKNOWN and the other two
243 comparison members are undefined. `comparison_const' holds
244 the constant being compared against, or zero if the comparison
245 is not against a constant. `comparison_qty' holds the quantity
246 being compared against when the result is known. If the comparison
247 is not with a register, `comparison_qty' is -1. */
249 struct qty_table_elem
251 rtx const_rtx;
252 rtx const_insn;
253 rtx comparison_const;
254 int comparison_qty;
255 unsigned int first_reg, last_reg;
256 /* The sizes of these fields should match the sizes of the
257 code and mode fields of struct rtx_def (see rtl.h). */
258 ENUM_BITFIELD(rtx_code) comparison_code : 16;
259 ENUM_BITFIELD(machine_mode) mode : 8;
262 /* The table of all qtys, indexed by qty number. */
263 static struct qty_table_elem *qty_table;
265 #ifdef HAVE_cc0
266 /* For machines that have a CC0, we do not record its value in the hash
267 table since its use is guaranteed to be the insn immediately following
268 its definition and any other insn is presumed to invalidate it.
270 Instead, we store below the value last assigned to CC0. If it should
271 happen to be a constant, it is stored in preference to the actual
272 assigned value. In case it is a constant, we store the mode in which
273 the constant should be interpreted. */
275 static rtx prev_insn_cc0;
276 static enum machine_mode prev_insn_cc0_mode;
278 /* Previous actual insn. 0 if at first insn of basic block. */
280 static rtx prev_insn;
281 #endif
283 /* Insn being scanned. */
285 static rtx this_insn;
287 /* Index by register number, gives the number of the next (or
288 previous) register in the chain of registers sharing the same
289 value.
291 Or -1 if this register is at the end of the chain.
293 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
295 /* Per-register equivalence chain. */
296 struct reg_eqv_elem
298 int next, prev;
301 /* The table of all register equivalence chains. */
302 static struct reg_eqv_elem *reg_eqv_table;
304 struct cse_reg_info
306 /* Next in hash chain. */
307 struct cse_reg_info *hash_next;
309 /* The next cse_reg_info structure in the free or used list. */
310 struct cse_reg_info *next;
312 /* Search key */
313 unsigned int regno;
315 /* The quantity number of the register's current contents. */
316 int reg_qty;
318 /* The number of times the register has been altered in the current
319 basic block. */
320 int reg_tick;
322 /* The REG_TICK value at which rtx's containing this register are
323 valid in the hash table. If this does not equal the current
324 reg_tick value, such expressions existing in the hash table are
325 invalid. */
326 int reg_in_table;
328 /* The SUBREG that was set when REG_TICK was last incremented. Set
329 to -1 if the last store was to the whole register, not a subreg. */
330 unsigned int subreg_ticked;
333 /* A free list of cse_reg_info entries. */
334 static struct cse_reg_info *cse_reg_info_free_list;
336 /* A used list of cse_reg_info entries. */
337 static struct cse_reg_info *cse_reg_info_used_list;
338 static struct cse_reg_info *cse_reg_info_used_list_end;
340 /* A mapping from registers to cse_reg_info data structures. */
341 #define REGHASH_SHIFT 7
342 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
343 #define REGHASH_MASK (REGHASH_SIZE - 1)
344 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
346 #define REGHASH_FN(REGNO) \
347 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
349 /* The last lookup we did into the cse_reg_info_tree. This allows us
350 to cache repeated lookups. */
351 static unsigned int cached_regno;
352 static struct cse_reg_info *cached_cse_reg_info;
354 /* A HARD_REG_SET containing all the hard registers for which there is
355 currently a REG expression in the hash table. Note the difference
356 from the above variables, which indicate if the REG is mentioned in some
357 expression in the table. */
359 static HARD_REG_SET hard_regs_in_table;
361 /* CUID of insn that starts the basic block currently being cse-processed. */
363 static int cse_basic_block_start;
365 /* CUID of insn that ends the basic block currently being cse-processed. */
367 static int cse_basic_block_end;
369 /* Vector mapping INSN_UIDs to cuids.
370 The cuids are like uids but increase monotonically always.
371 We use them to see whether a reg is used outside a given basic block. */
373 static int *uid_cuid;
375 /* Highest UID in UID_CUID. */
376 static int max_uid;
378 /* Get the cuid of an insn. */
380 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
382 /* Nonzero if this pass has made changes, and therefore it's
383 worthwhile to run the garbage collector. */
385 static int cse_altered;
387 /* Nonzero if cse has altered conditional jump insns
388 in such a way that jump optimization should be redone. */
390 static int cse_jumps_altered;
392 /* Nonzero if we put a LABEL_REF into the hash table for an INSN without a
393 REG_LABEL, we have to rerun jump after CSE to put in the note. */
394 static int recorded_label_ref;
396 /* canon_hash stores 1 in do_not_record
397 if it notices a reference to CC0, PC, or some other volatile
398 subexpression. */
400 static int do_not_record;
402 #ifdef LOAD_EXTEND_OP
404 /* Scratch rtl used when looking for load-extended copy of a MEM. */
405 static rtx memory_extend_rtx;
406 #endif
408 /* canon_hash stores 1 in hash_arg_in_memory
409 if it notices a reference to memory within the expression being hashed. */
411 static int hash_arg_in_memory;
413 /* The hash table contains buckets which are chains of `struct table_elt's,
414 each recording one expression's information.
415 That expression is in the `exp' field.
417 The canon_exp field contains a canonical (from the point of view of
418 alias analysis) version of the `exp' field.
420 Those elements with the same hash code are chained in both directions
421 through the `next_same_hash' and `prev_same_hash' fields.
423 Each set of expressions with equivalent values
424 are on a two-way chain through the `next_same_value'
425 and `prev_same_value' fields, and all point with
426 the `first_same_value' field at the first element in
427 that chain. The chain is in order of increasing cost.
428 Each element's cost value is in its `cost' field.
430 The `in_memory' field is nonzero for elements that
431 involve any reference to memory. These elements are removed
432 whenever a write is done to an unidentified location in memory.
433 To be safe, we assume that a memory address is unidentified unless
434 the address is either a symbol constant or a constant plus
435 the frame pointer or argument pointer.
437 The `related_value' field is used to connect related expressions
438 (that differ by adding an integer).
439 The related expressions are chained in a circular fashion.
440 `related_value' is zero for expressions for which this
441 chain is not useful.
443 The `cost' field stores the cost of this element's expression.
444 The `regcost' field stores the value returned by approx_reg_cost for
445 this element's expression.
447 The `is_const' flag is set if the element is a constant (including
448 a fixed address).
450 The `flag' field is used as a temporary during some search routines.
452 The `mode' field is usually the same as GET_MODE (`exp'), but
453 if `exp' is a CONST_INT and has no machine mode then the `mode'
454 field is the mode it was being used as. Each constant is
455 recorded separately for each mode it is used with. */
457 struct table_elt
459 rtx exp;
460 rtx canon_exp;
461 struct table_elt *next_same_hash;
462 struct table_elt *prev_same_hash;
463 struct table_elt *next_same_value;
464 struct table_elt *prev_same_value;
465 struct table_elt *first_same_value;
466 struct table_elt *related_value;
467 int cost;
468 int regcost;
469 /* The size of this field should match the size
470 of the mode field of struct rtx_def (see rtl.h). */
471 ENUM_BITFIELD(machine_mode) mode : 8;
472 char in_memory;
473 char is_const;
474 char flag;
477 /* We don't want a lot of buckets, because we rarely have very many
478 things stored in the hash table, and a lot of buckets slows
479 down a lot of loops that happen frequently. */
480 #define HASH_SHIFT 5
481 #define HASH_SIZE (1 << HASH_SHIFT)
482 #define HASH_MASK (HASH_SIZE - 1)
484 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
485 register (hard registers may require `do_not_record' to be set). */
487 #define HASH(X, M) \
488 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
489 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
490 : canon_hash (X, M)) & HASH_MASK)
492 /* Determine whether register number N is considered a fixed register for the
493 purpose of approximating register costs.
494 It is desirable to replace other regs with fixed regs, to reduce need for
495 non-fixed hard regs.
496 A reg wins if it is either the frame pointer or designated as fixed. */
497 #define FIXED_REGNO_P(N) \
498 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
499 || fixed_regs[N] || global_regs[N])
501 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
502 hard registers and pointers into the frame are the cheapest with a cost
503 of 0. Next come pseudos with a cost of one and other hard registers with
504 a cost of 2. Aside from these special cases, call `rtx_cost'. */
506 #define CHEAP_REGNO(N) \
507 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
508 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
509 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
510 || ((N) < FIRST_PSEUDO_REGISTER \
511 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
513 #define COST(X) (GET_CODE (X) == REG ? 0 : notreg_cost (X, SET))
514 #define COST_IN(X,OUTER) (GET_CODE (X) == REG ? 0 : notreg_cost (X, OUTER))
516 /* Get the info associated with register N. */
518 #define GET_CSE_REG_INFO(N) \
519 (((N) == cached_regno && cached_cse_reg_info) \
520 ? cached_cse_reg_info : get_cse_reg_info ((N)))
522 /* Get the number of times this register has been updated in this
523 basic block. */
525 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
527 /* Get the point at which REG was recorded in the table. */
529 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
531 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
532 SUBREG). */
534 #define SUBREG_TICKED(N) ((GET_CSE_REG_INFO (N))->subreg_ticked)
536 /* Get the quantity number for REG. */
538 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
540 /* Determine if the quantity number for register X represents a valid index
541 into the qty_table. */
543 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) >= 0)
545 static struct table_elt *table[HASH_SIZE];
547 /* Chain of `struct table_elt's made so far for this function
548 but currently removed from the table. */
550 static struct table_elt *free_element_chain;
552 /* Number of `struct table_elt' structures made so far for this function. */
554 static int n_elements_made;
556 /* Maximum value `n_elements_made' has had so far in this compilation
557 for functions previously processed. */
559 static int max_elements_made;
561 /* Surviving equivalence class when two equivalence classes are merged
562 by recording the effects of a jump in the last insn. Zero if the
563 last insn was not a conditional jump. */
565 static struct table_elt *last_jump_equiv_class;
567 /* Set to the cost of a constant pool reference if one was found for a
568 symbolic constant. If this was found, it means we should try to
569 convert constants into constant pool entries if they don't fit in
570 the insn. */
572 static int constant_pool_entries_cost;
573 static int constant_pool_entries_regcost;
575 /* This data describes a block that will be processed by cse_basic_block. */
577 struct cse_basic_block_data
579 /* Lowest CUID value of insns in block. */
580 int low_cuid;
581 /* Highest CUID value of insns in block. */
582 int high_cuid;
583 /* Total number of SETs in block. */
584 int nsets;
585 /* Last insn in the block. */
586 rtx last;
587 /* Size of current branch path, if any. */
588 int path_size;
589 /* Current branch path, indicating which branches will be taken. */
590 struct branch_path
592 /* The branch insn. */
593 rtx branch;
594 /* Whether it should be taken or not. AROUND is the same as taken
595 except that it is used when the destination label is not preceded
596 by a BARRIER. */
597 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
598 } *path;
601 static bool fixed_base_plus_p (rtx x);
602 static int notreg_cost (rtx, enum rtx_code);
603 static int approx_reg_cost_1 (rtx *, void *);
604 static int approx_reg_cost (rtx);
605 static int preferrable (int, int, int, int);
606 static void new_basic_block (void);
607 static void make_new_qty (unsigned int, enum machine_mode);
608 static void make_regs_eqv (unsigned int, unsigned int);
609 static void delete_reg_equiv (unsigned int);
610 static int mention_regs (rtx);
611 static int insert_regs (rtx, struct table_elt *, int);
612 static void remove_from_table (struct table_elt *, unsigned);
613 static struct table_elt *lookup (rtx, unsigned, enum machine_mode);
614 static struct table_elt *lookup_for_remove (rtx, unsigned, enum machine_mode);
615 static rtx lookup_as_function (rtx, enum rtx_code);
616 static struct table_elt *insert (rtx, struct table_elt *, unsigned,
617 enum machine_mode);
618 static void merge_equiv_classes (struct table_elt *, struct table_elt *);
619 static void invalidate (rtx, enum machine_mode);
620 static int cse_rtx_varies_p (rtx, int);
621 static void remove_invalid_refs (unsigned int);
622 static void remove_invalid_subreg_refs (unsigned int, unsigned int,
623 enum machine_mode);
624 static void rehash_using_reg (rtx);
625 static void invalidate_memory (void);
626 static void invalidate_for_call (void);
627 static rtx use_related_value (rtx, struct table_elt *);
628 static unsigned canon_hash (rtx, enum machine_mode);
629 static unsigned canon_hash_string (const char *);
630 static unsigned safe_hash (rtx, enum machine_mode);
631 static int exp_equiv_p (rtx, rtx, int, int);
632 static rtx canon_reg (rtx, rtx);
633 static void find_best_addr (rtx, rtx *, enum machine_mode);
634 static enum rtx_code find_comparison_args (enum rtx_code, rtx *, rtx *,
635 enum machine_mode *,
636 enum machine_mode *);
637 static rtx fold_rtx (rtx, rtx);
638 static rtx equiv_constant (rtx);
639 static void record_jump_equiv (rtx, int);
640 static void record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx,
641 int);
642 static void cse_insn (rtx, rtx);
643 static int addr_affects_sp_p (rtx);
644 static void invalidate_from_clobbers (rtx);
645 static rtx cse_process_notes (rtx, rtx);
646 static void cse_around_loop (rtx);
647 static void invalidate_skipped_set (rtx, rtx, void *);
648 static void invalidate_skipped_block (rtx);
649 static void cse_check_loop_start (rtx, rtx, void *);
650 static void cse_set_around_loop (rtx, rtx, rtx);
651 static rtx cse_basic_block (rtx, rtx, struct branch_path *, int);
652 static void count_reg_usage (rtx, int *, int);
653 static int check_for_label_ref (rtx *, void *);
654 extern void dump_class (struct table_elt*);
655 static struct cse_reg_info * get_cse_reg_info (unsigned int);
656 static int check_dependence (rtx *, void *);
658 static void flush_hash_table (void);
659 static bool insn_live_p (rtx, int *);
660 static bool set_live_p (rtx, rtx, int *);
661 static bool dead_libcall_p (rtx, int *);
662 static int cse_change_cc_mode (rtx *, void *);
663 static void cse_change_cc_mode_insns (rtx, rtx, rtx);
664 static enum machine_mode cse_cc_succs (basic_block, rtx, rtx, bool);
666 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
667 virtual regs here because the simplify_*_operation routines are called
668 by integrate.c, which is called before virtual register instantiation. */
670 static bool
671 fixed_base_plus_p (rtx x)
673 switch (GET_CODE (x))
675 case REG:
676 if (x == frame_pointer_rtx || x == hard_frame_pointer_rtx)
677 return true;
678 if (x == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])
679 return true;
680 if (REGNO (x) >= FIRST_VIRTUAL_REGISTER
681 && REGNO (x) <= LAST_VIRTUAL_REGISTER)
682 return true;
683 return false;
685 case PLUS:
686 if (GET_CODE (XEXP (x, 1)) != CONST_INT)
687 return false;
688 return fixed_base_plus_p (XEXP (x, 0));
690 case ADDRESSOF:
691 return true;
693 default:
694 return false;
698 /* Dump the expressions in the equivalence class indicated by CLASSP.
699 This function is used only for debugging. */
700 void
701 dump_class (struct table_elt *classp)
703 struct table_elt *elt;
705 fprintf (stderr, "Equivalence chain for ");
706 print_rtl (stderr, classp->exp);
707 fprintf (stderr, ": \n");
709 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
711 print_rtl (stderr, elt->exp);
712 fprintf (stderr, "\n");
716 /* Subroutine of approx_reg_cost; called through for_each_rtx. */
718 static int
719 approx_reg_cost_1 (rtx *xp, void *data)
721 rtx x = *xp;
722 int *cost_p = data;
724 if (x && GET_CODE (x) == REG)
726 unsigned int regno = REGNO (x);
728 if (! CHEAP_REGNO (regno))
730 if (regno < FIRST_PSEUDO_REGISTER)
732 if (SMALL_REGISTER_CLASSES)
733 return 1;
734 *cost_p += 2;
736 else
737 *cost_p += 1;
741 return 0;
744 /* Return an estimate of the cost of the registers used in an rtx.
745 This is mostly the number of different REG expressions in the rtx;
746 however for some exceptions like fixed registers we use a cost of
747 0. If any other hard register reference occurs, return MAX_COST. */
749 static int
750 approx_reg_cost (rtx x)
752 int cost = 0;
754 if (for_each_rtx (&x, approx_reg_cost_1, (void *) &cost))
755 return MAX_COST;
757 return cost;
760 /* Return a negative value if an rtx A, whose costs are given by COST_A
761 and REGCOST_A, is more desirable than an rtx B.
762 Return a positive value if A is less desirable, or 0 if the two are
763 equally good. */
764 static int
765 preferrable (int cost_a, int regcost_a, int cost_b, int regcost_b)
767 /* First, get rid of cases involving expressions that are entirely
768 unwanted. */
769 if (cost_a != cost_b)
771 if (cost_a == MAX_COST)
772 return 1;
773 if (cost_b == MAX_COST)
774 return -1;
777 /* Avoid extending lifetimes of hardregs. */
778 if (regcost_a != regcost_b)
780 if (regcost_a == MAX_COST)
781 return 1;
782 if (regcost_b == MAX_COST)
783 return -1;
786 /* Normal operation costs take precedence. */
787 if (cost_a != cost_b)
788 return cost_a - cost_b;
789 /* Only if these are identical consider effects on register pressure. */
790 if (regcost_a != regcost_b)
791 return regcost_a - regcost_b;
792 return 0;
795 /* Internal function, to compute cost when X is not a register; called
796 from COST macro to keep it simple. */
798 static int
799 notreg_cost (rtx x, enum rtx_code outer)
801 return ((GET_CODE (x) == SUBREG
802 && GET_CODE (SUBREG_REG (x)) == REG
803 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
804 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
805 && (GET_MODE_SIZE (GET_MODE (x))
806 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
807 && subreg_lowpart_p (x)
808 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
809 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
811 : rtx_cost (x, outer) * 2);
814 /* Return an estimate of the cost of computing rtx X.
815 One use is in cse, to decide which expression to keep in the hash table.
816 Another is in rtl generation, to pick the cheapest way to multiply.
817 Other uses like the latter are expected in the future. */
820 rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED)
822 int i, j;
823 enum rtx_code code;
824 const char *fmt;
825 int total;
827 if (x == 0)
828 return 0;
830 /* Compute the default costs of certain things.
831 Note that targetm.rtx_costs can override the defaults. */
833 code = GET_CODE (x);
834 switch (code)
836 case MULT:
837 total = COSTS_N_INSNS (5);
838 break;
839 case DIV:
840 case UDIV:
841 case MOD:
842 case UMOD:
843 total = COSTS_N_INSNS (7);
844 break;
845 case USE:
846 /* Used in loop.c and combine.c as a marker. */
847 total = 0;
848 break;
849 default:
850 total = COSTS_N_INSNS (1);
853 switch (code)
855 case REG:
856 return 0;
858 case SUBREG:
859 /* If we can't tie these modes, make this expensive. The larger
860 the mode, the more expensive it is. */
861 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
862 return COSTS_N_INSNS (2
863 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
864 break;
866 default:
867 if ((*targetm.rtx_costs) (x, code, outer_code, &total))
868 return total;
869 break;
872 /* Sum the costs of the sub-rtx's, plus cost of this operation,
873 which is already in total. */
875 fmt = GET_RTX_FORMAT (code);
876 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
877 if (fmt[i] == 'e')
878 total += rtx_cost (XEXP (x, i), code);
879 else if (fmt[i] == 'E')
880 for (j = 0; j < XVECLEN (x, i); j++)
881 total += rtx_cost (XVECEXP (x, i, j), code);
883 return total;
886 /* Return cost of address expression X.
887 Expect that X is properly formed address reference. */
890 address_cost (rtx x, enum machine_mode mode)
892 /* The address_cost target hook does not deal with ADDRESSOF nodes. But,
893 during CSE, such nodes are present. Using an ADDRESSOF node which
894 refers to the address of a REG is a good thing because we can then
895 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
897 if (GET_CODE (x) == ADDRESSOF && REG_P (XEXP ((x), 0)))
898 return -1;
900 /* We may be asked for cost of various unusual addresses, such as operands
901 of push instruction. It is not worthwhile to complicate writing
902 of the target hook by such cases. */
904 if (!memory_address_p (mode, x))
905 return 1000;
907 return (*targetm.address_cost) (x);
910 /* If the target doesn't override, compute the cost as with arithmetic. */
913 default_address_cost (rtx x)
915 return rtx_cost (x, MEM);
918 static struct cse_reg_info *
919 get_cse_reg_info (unsigned int regno)
921 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
922 struct cse_reg_info *p;
924 for (p = *hash_head; p != NULL; p = p->hash_next)
925 if (p->regno == regno)
926 break;
928 if (p == NULL)
930 /* Get a new cse_reg_info structure. */
931 if (cse_reg_info_free_list)
933 p = cse_reg_info_free_list;
934 cse_reg_info_free_list = p->next;
936 else
937 p = xmalloc (sizeof (struct cse_reg_info));
939 /* Insert into hash table. */
940 p->hash_next = *hash_head;
941 *hash_head = p;
943 /* Initialize it. */
944 p->reg_tick = 1;
945 p->reg_in_table = -1;
946 p->subreg_ticked = -1;
947 p->reg_qty = -regno - 1;
948 p->regno = regno;
949 p->next = cse_reg_info_used_list;
950 cse_reg_info_used_list = p;
951 if (!cse_reg_info_used_list_end)
952 cse_reg_info_used_list_end = p;
955 /* Cache this lookup; we tend to be looking up information about the
956 same register several times in a row. */
957 cached_regno = regno;
958 cached_cse_reg_info = p;
960 return p;
963 /* Clear the hash table and initialize each register with its own quantity,
964 for a new basic block. */
966 static void
967 new_basic_block (void)
969 int i;
971 next_qty = 0;
973 /* Clear out hash table state for this pass. */
975 memset (reg_hash, 0, sizeof reg_hash);
977 if (cse_reg_info_used_list)
979 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
980 cse_reg_info_free_list = cse_reg_info_used_list;
981 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
983 cached_cse_reg_info = 0;
985 CLEAR_HARD_REG_SET (hard_regs_in_table);
987 /* The per-quantity values used to be initialized here, but it is
988 much faster to initialize each as it is made in `make_new_qty'. */
990 for (i = 0; i < HASH_SIZE; i++)
992 struct table_elt *first;
994 first = table[i];
995 if (first != NULL)
997 struct table_elt *last = first;
999 table[i] = NULL;
1001 while (last->next_same_hash != NULL)
1002 last = last->next_same_hash;
1004 /* Now relink this hash entire chain into
1005 the free element list. */
1007 last->next_same_hash = free_element_chain;
1008 free_element_chain = first;
1012 #ifdef HAVE_cc0
1013 prev_insn = 0;
1014 prev_insn_cc0 = 0;
1015 #endif
1018 /* Say that register REG contains a quantity in mode MODE not in any
1019 register before and initialize that quantity. */
1021 static void
1022 make_new_qty (unsigned int reg, enum machine_mode mode)
1024 int q;
1025 struct qty_table_elem *ent;
1026 struct reg_eqv_elem *eqv;
1028 if (next_qty >= max_qty)
1029 abort ();
1031 q = REG_QTY (reg) = next_qty++;
1032 ent = &qty_table[q];
1033 ent->first_reg = reg;
1034 ent->last_reg = reg;
1035 ent->mode = mode;
1036 ent->const_rtx = ent->const_insn = NULL_RTX;
1037 ent->comparison_code = UNKNOWN;
1039 eqv = &reg_eqv_table[reg];
1040 eqv->next = eqv->prev = -1;
1043 /* Make reg NEW equivalent to reg OLD.
1044 OLD is not changing; NEW is. */
1046 static void
1047 make_regs_eqv (unsigned int new, unsigned int old)
1049 unsigned int lastr, firstr;
1050 int q = REG_QTY (old);
1051 struct qty_table_elem *ent;
1053 ent = &qty_table[q];
1055 /* Nothing should become eqv until it has a "non-invalid" qty number. */
1056 if (! REGNO_QTY_VALID_P (old))
1057 abort ();
1059 REG_QTY (new) = q;
1060 firstr = ent->first_reg;
1061 lastr = ent->last_reg;
1063 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
1064 hard regs. Among pseudos, if NEW will live longer than any other reg
1065 of the same qty, and that is beyond the current basic block,
1066 make it the new canonical replacement for this qty. */
1067 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1068 /* Certain fixed registers might be of the class NO_REGS. This means
1069 that not only can they not be allocated by the compiler, but
1070 they cannot be used in substitutions or canonicalizations
1071 either. */
1072 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1073 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1074 || (new >= FIRST_PSEUDO_REGISTER
1075 && (firstr < FIRST_PSEUDO_REGISTER
1076 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1077 || (uid_cuid[REGNO_FIRST_UID (new)]
1078 < cse_basic_block_start))
1079 && (uid_cuid[REGNO_LAST_UID (new)]
1080 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1082 reg_eqv_table[firstr].prev = new;
1083 reg_eqv_table[new].next = firstr;
1084 reg_eqv_table[new].prev = -1;
1085 ent->first_reg = new;
1087 else
1089 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1090 Otherwise, insert before any non-fixed hard regs that are at the
1091 end. Registers of class NO_REGS cannot be used as an
1092 equivalent for anything. */
1093 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1094 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1095 && new >= FIRST_PSEUDO_REGISTER)
1096 lastr = reg_eqv_table[lastr].prev;
1097 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1098 if (reg_eqv_table[lastr].next >= 0)
1099 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1100 else
1101 qty_table[q].last_reg = new;
1102 reg_eqv_table[lastr].next = new;
1103 reg_eqv_table[new].prev = lastr;
1107 /* Remove REG from its equivalence class. */
1109 static void
1110 delete_reg_equiv (unsigned int reg)
1112 struct qty_table_elem *ent;
1113 int q = REG_QTY (reg);
1114 int p, n;
1116 /* If invalid, do nothing. */
1117 if (! REGNO_QTY_VALID_P (reg))
1118 return;
1120 ent = &qty_table[q];
1122 p = reg_eqv_table[reg].prev;
1123 n = reg_eqv_table[reg].next;
1125 if (n != -1)
1126 reg_eqv_table[n].prev = p;
1127 else
1128 ent->last_reg = p;
1129 if (p != -1)
1130 reg_eqv_table[p].next = n;
1131 else
1132 ent->first_reg = n;
1134 REG_QTY (reg) = -reg - 1;
1137 /* Remove any invalid expressions from the hash table
1138 that refer to any of the registers contained in expression X.
1140 Make sure that newly inserted references to those registers
1141 as subexpressions will be considered valid.
1143 mention_regs is not called when a register itself
1144 is being stored in the table.
1146 Return 1 if we have done something that may have changed the hash code
1147 of X. */
1149 static int
1150 mention_regs (rtx x)
1152 enum rtx_code code;
1153 int i, j;
1154 const char *fmt;
1155 int changed = 0;
1157 if (x == 0)
1158 return 0;
1160 code = GET_CODE (x);
1161 if (code == REG)
1163 unsigned int regno = REGNO (x);
1164 unsigned int endregno
1165 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1166 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1167 unsigned int i;
1169 for (i = regno; i < endregno; i++)
1171 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1172 remove_invalid_refs (i);
1174 REG_IN_TABLE (i) = REG_TICK (i);
1175 SUBREG_TICKED (i) = -1;
1178 return 0;
1181 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1182 pseudo if they don't use overlapping words. We handle only pseudos
1183 here for simplicity. */
1184 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1185 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1187 unsigned int i = REGNO (SUBREG_REG (x));
1189 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1191 /* If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
1192 the last store to this register really stored into this
1193 subreg, then remove the memory of this subreg.
1194 Otherwise, remove any memory of the entire register and
1195 all its subregs from the table. */
1196 if (REG_TICK (i) - REG_IN_TABLE (i) > 1
1197 || SUBREG_TICKED (i) != REGNO (SUBREG_REG (x)))
1198 remove_invalid_refs (i);
1199 else
1200 remove_invalid_subreg_refs (i, SUBREG_BYTE (x), GET_MODE (x));
1203 REG_IN_TABLE (i) = REG_TICK (i);
1204 SUBREG_TICKED (i) = REGNO (SUBREG_REG (x));
1205 return 0;
1208 /* If X is a comparison or a COMPARE and either operand is a register
1209 that does not have a quantity, give it one. This is so that a later
1210 call to record_jump_equiv won't cause X to be assigned a different
1211 hash code and not found in the table after that call.
1213 It is not necessary to do this here, since rehash_using_reg can
1214 fix up the table later, but doing this here eliminates the need to
1215 call that expensive function in the most common case where the only
1216 use of the register is in the comparison. */
1218 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1220 if (GET_CODE (XEXP (x, 0)) == REG
1221 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1222 if (insert_regs (XEXP (x, 0), NULL, 0))
1224 rehash_using_reg (XEXP (x, 0));
1225 changed = 1;
1228 if (GET_CODE (XEXP (x, 1)) == REG
1229 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1230 if (insert_regs (XEXP (x, 1), NULL, 0))
1232 rehash_using_reg (XEXP (x, 1));
1233 changed = 1;
1237 fmt = GET_RTX_FORMAT (code);
1238 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1239 if (fmt[i] == 'e')
1240 changed |= mention_regs (XEXP (x, i));
1241 else if (fmt[i] == 'E')
1242 for (j = 0; j < XVECLEN (x, i); j++)
1243 changed |= mention_regs (XVECEXP (x, i, j));
1245 return changed;
1248 /* Update the register quantities for inserting X into the hash table
1249 with a value equivalent to CLASSP.
1250 (If the class does not contain a REG, it is irrelevant.)
1251 If MODIFIED is nonzero, X is a destination; it is being modified.
1252 Note that delete_reg_equiv should be called on a register
1253 before insert_regs is done on that register with MODIFIED != 0.
1255 Nonzero value means that elements of reg_qty have changed
1256 so X's hash code may be different. */
1258 static int
1259 insert_regs (rtx x, struct table_elt *classp, int modified)
1261 if (GET_CODE (x) == REG)
1263 unsigned int regno = REGNO (x);
1264 int qty_valid;
1266 /* If REGNO is in the equivalence table already but is of the
1267 wrong mode for that equivalence, don't do anything here. */
1269 qty_valid = REGNO_QTY_VALID_P (regno);
1270 if (qty_valid)
1272 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1274 if (ent->mode != GET_MODE (x))
1275 return 0;
1278 if (modified || ! qty_valid)
1280 if (classp)
1281 for (classp = classp->first_same_value;
1282 classp != 0;
1283 classp = classp->next_same_value)
1284 if (GET_CODE (classp->exp) == REG
1285 && GET_MODE (classp->exp) == GET_MODE (x))
1287 make_regs_eqv (regno, REGNO (classp->exp));
1288 return 1;
1291 /* Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
1292 than REG_IN_TABLE to find out if there was only a single preceding
1293 invalidation - for the SUBREG - or another one, which would be
1294 for the full register. However, if we find here that REG_TICK
1295 indicates that the register is invalid, it means that it has
1296 been invalidated in a separate operation. The SUBREG might be used
1297 now (then this is a recursive call), or we might use the full REG
1298 now and a SUBREG of it later. So bump up REG_TICK so that
1299 mention_regs will do the right thing. */
1300 if (! modified
1301 && REG_IN_TABLE (regno) >= 0
1302 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1303 REG_TICK (regno)++;
1304 make_new_qty (regno, GET_MODE (x));
1305 return 1;
1308 return 0;
1311 /* If X is a SUBREG, we will likely be inserting the inner register in the
1312 table. If that register doesn't have an assigned quantity number at
1313 this point but does later, the insertion that we will be doing now will
1314 not be accessible because its hash code will have changed. So assign
1315 a quantity number now. */
1317 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1318 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1320 insert_regs (SUBREG_REG (x), NULL, 0);
1321 mention_regs (x);
1322 return 1;
1324 else
1325 return mention_regs (x);
1328 /* Look in or update the hash table. */
1330 /* Remove table element ELT from use in the table.
1331 HASH is its hash code, made using the HASH macro.
1332 It's an argument because often that is known in advance
1333 and we save much time not recomputing it. */
1335 static void
1336 remove_from_table (struct table_elt *elt, unsigned int hash)
1338 if (elt == 0)
1339 return;
1341 /* Mark this element as removed. See cse_insn. */
1342 elt->first_same_value = 0;
1344 /* Remove the table element from its equivalence class. */
1347 struct table_elt *prev = elt->prev_same_value;
1348 struct table_elt *next = elt->next_same_value;
1350 if (next)
1351 next->prev_same_value = prev;
1353 if (prev)
1354 prev->next_same_value = next;
1355 else
1357 struct table_elt *newfirst = next;
1358 while (next)
1360 next->first_same_value = newfirst;
1361 next = next->next_same_value;
1366 /* Remove the table element from its hash bucket. */
1369 struct table_elt *prev = elt->prev_same_hash;
1370 struct table_elt *next = elt->next_same_hash;
1372 if (next)
1373 next->prev_same_hash = prev;
1375 if (prev)
1376 prev->next_same_hash = next;
1377 else if (table[hash] == elt)
1378 table[hash] = next;
1379 else
1381 /* This entry is not in the proper hash bucket. This can happen
1382 when two classes were merged by `merge_equiv_classes'. Search
1383 for the hash bucket that it heads. This happens only very
1384 rarely, so the cost is acceptable. */
1385 for (hash = 0; hash < HASH_SIZE; hash++)
1386 if (table[hash] == elt)
1387 table[hash] = next;
1391 /* Remove the table element from its related-value circular chain. */
1393 if (elt->related_value != 0 && elt->related_value != elt)
1395 struct table_elt *p = elt->related_value;
1397 while (p->related_value != elt)
1398 p = p->related_value;
1399 p->related_value = elt->related_value;
1400 if (p->related_value == p)
1401 p->related_value = 0;
1404 /* Now add it to the free element chain. */
1405 elt->next_same_hash = free_element_chain;
1406 free_element_chain = elt;
1409 /* Look up X in the hash table and return its table element,
1410 or 0 if X is not in the table.
1412 MODE is the machine-mode of X, or if X is an integer constant
1413 with VOIDmode then MODE is the mode with which X will be used.
1415 Here we are satisfied to find an expression whose tree structure
1416 looks like X. */
1418 static struct table_elt *
1419 lookup (rtx x, unsigned int hash, enum machine_mode mode)
1421 struct table_elt *p;
1423 for (p = table[hash]; p; p = p->next_same_hash)
1424 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1425 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1426 return p;
1428 return 0;
1431 /* Like `lookup' but don't care whether the table element uses invalid regs.
1432 Also ignore discrepancies in the machine mode of a register. */
1434 static struct table_elt *
1435 lookup_for_remove (rtx x, unsigned int hash, enum machine_mode mode)
1437 struct table_elt *p;
1439 if (GET_CODE (x) == REG)
1441 unsigned int regno = REGNO (x);
1443 /* Don't check the machine mode when comparing registers;
1444 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1445 for (p = table[hash]; p; p = p->next_same_hash)
1446 if (GET_CODE (p->exp) == REG
1447 && REGNO (p->exp) == regno)
1448 return p;
1450 else
1452 for (p = table[hash]; p; p = p->next_same_hash)
1453 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1454 return p;
1457 return 0;
1460 /* Look for an expression equivalent to X and with code CODE.
1461 If one is found, return that expression. */
1463 static rtx
1464 lookup_as_function (rtx x, enum rtx_code code)
1466 struct table_elt *p
1467 = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, GET_MODE (x));
1469 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1470 long as we are narrowing. So if we looked in vain for a mode narrower
1471 than word_mode before, look for word_mode now. */
1472 if (p == 0 && code == CONST_INT
1473 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1475 x = copy_rtx (x);
1476 PUT_MODE (x, word_mode);
1477 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1480 if (p == 0)
1481 return 0;
1483 for (p = p->first_same_value; p; p = p->next_same_value)
1484 if (GET_CODE (p->exp) == code
1485 /* Make sure this is a valid entry in the table. */
1486 && exp_equiv_p (p->exp, p->exp, 1, 0))
1487 return p->exp;
1489 return 0;
1492 /* Insert X in the hash table, assuming HASH is its hash code
1493 and CLASSP is an element of the class it should go in
1494 (or 0 if a new class should be made).
1495 It is inserted at the proper position to keep the class in
1496 the order cheapest first.
1498 MODE is the machine-mode of X, or if X is an integer constant
1499 with VOIDmode then MODE is the mode with which X will be used.
1501 For elements of equal cheapness, the most recent one
1502 goes in front, except that the first element in the list
1503 remains first unless a cheaper element is added. The order of
1504 pseudo-registers does not matter, as canon_reg will be called to
1505 find the cheapest when a register is retrieved from the table.
1507 The in_memory field in the hash table element is set to 0.
1508 The caller must set it nonzero if appropriate.
1510 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1511 and if insert_regs returns a nonzero value
1512 you must then recompute its hash code before calling here.
1514 If necessary, update table showing constant values of quantities. */
1516 #define CHEAPER(X, Y) \
1517 (preferrable ((X)->cost, (X)->regcost, (Y)->cost, (Y)->regcost) < 0)
1519 static struct table_elt *
1520 insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode)
1522 struct table_elt *elt;
1524 /* If X is a register and we haven't made a quantity for it,
1525 something is wrong. */
1526 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1527 abort ();
1529 /* If X is a hard register, show it is being put in the table. */
1530 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1532 unsigned int regno = REGNO (x);
1533 unsigned int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1534 unsigned int i;
1536 for (i = regno; i < endregno; i++)
1537 SET_HARD_REG_BIT (hard_regs_in_table, i);
1540 /* Put an element for X into the right hash bucket. */
1542 elt = free_element_chain;
1543 if (elt)
1544 free_element_chain = elt->next_same_hash;
1545 else
1547 n_elements_made++;
1548 elt = xmalloc (sizeof (struct table_elt));
1551 elt->exp = x;
1552 elt->canon_exp = NULL_RTX;
1553 elt->cost = COST (x);
1554 elt->regcost = approx_reg_cost (x);
1555 elt->next_same_value = 0;
1556 elt->prev_same_value = 0;
1557 elt->next_same_hash = table[hash];
1558 elt->prev_same_hash = 0;
1559 elt->related_value = 0;
1560 elt->in_memory = 0;
1561 elt->mode = mode;
1562 elt->is_const = (CONSTANT_P (x)
1563 /* GNU C++ takes advantage of this for `this'
1564 (and other const values). */
1565 || (GET_CODE (x) == REG
1566 && RTX_UNCHANGING_P (x)
1567 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1568 || fixed_base_plus_p (x));
1570 if (table[hash])
1571 table[hash]->prev_same_hash = elt;
1572 table[hash] = elt;
1574 /* Put it into the proper value-class. */
1575 if (classp)
1577 classp = classp->first_same_value;
1578 if (CHEAPER (elt, classp))
1579 /* Insert at the head of the class. */
1581 struct table_elt *p;
1582 elt->next_same_value = classp;
1583 classp->prev_same_value = elt;
1584 elt->first_same_value = elt;
1586 for (p = classp; p; p = p->next_same_value)
1587 p->first_same_value = elt;
1589 else
1591 /* Insert not at head of the class. */
1592 /* Put it after the last element cheaper than X. */
1593 struct table_elt *p, *next;
1595 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1596 p = next);
1598 /* Put it after P and before NEXT. */
1599 elt->next_same_value = next;
1600 if (next)
1601 next->prev_same_value = elt;
1603 elt->prev_same_value = p;
1604 p->next_same_value = elt;
1605 elt->first_same_value = classp;
1608 else
1609 elt->first_same_value = elt;
1611 /* If this is a constant being set equivalent to a register or a register
1612 being set equivalent to a constant, note the constant equivalence.
1614 If this is a constant, it cannot be equivalent to a different constant,
1615 and a constant is the only thing that can be cheaper than a register. So
1616 we know the register is the head of the class (before the constant was
1617 inserted).
1619 If this is a register that is not already known equivalent to a
1620 constant, we must check the entire class.
1622 If this is a register that is already known equivalent to an insn,
1623 update the qtys `const_insn' to show that `this_insn' is the latest
1624 insn making that quantity equivalent to the constant. */
1626 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1627 && GET_CODE (x) != REG)
1629 int exp_q = REG_QTY (REGNO (classp->exp));
1630 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1632 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1633 exp_ent->const_insn = this_insn;
1636 else if (GET_CODE (x) == REG
1637 && classp
1638 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1639 && ! elt->is_const)
1641 struct table_elt *p;
1643 for (p = classp; p != 0; p = p->next_same_value)
1645 if (p->is_const && GET_CODE (p->exp) != REG)
1647 int x_q = REG_QTY (REGNO (x));
1648 struct qty_table_elem *x_ent = &qty_table[x_q];
1650 x_ent->const_rtx
1651 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1652 x_ent->const_insn = this_insn;
1653 break;
1658 else if (GET_CODE (x) == REG
1659 && qty_table[REG_QTY (REGNO (x))].const_rtx
1660 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1661 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1663 /* If this is a constant with symbolic value,
1664 and it has a term with an explicit integer value,
1665 link it up with related expressions. */
1666 if (GET_CODE (x) == CONST)
1668 rtx subexp = get_related_value (x);
1669 unsigned subhash;
1670 struct table_elt *subelt, *subelt_prev;
1672 if (subexp != 0)
1674 /* Get the integer-free subexpression in the hash table. */
1675 subhash = safe_hash (subexp, mode) & HASH_MASK;
1676 subelt = lookup (subexp, subhash, mode);
1677 if (subelt == 0)
1678 subelt = insert (subexp, NULL, subhash, mode);
1679 /* Initialize SUBELT's circular chain if it has none. */
1680 if (subelt->related_value == 0)
1681 subelt->related_value = subelt;
1682 /* Find the element in the circular chain that precedes SUBELT. */
1683 subelt_prev = subelt;
1684 while (subelt_prev->related_value != subelt)
1685 subelt_prev = subelt_prev->related_value;
1686 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1687 This way the element that follows SUBELT is the oldest one. */
1688 elt->related_value = subelt_prev->related_value;
1689 subelt_prev->related_value = elt;
1693 return elt;
1696 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1697 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1698 the two classes equivalent.
1700 CLASS1 will be the surviving class; CLASS2 should not be used after this
1701 call.
1703 Any invalid entries in CLASS2 will not be copied. */
1705 static void
1706 merge_equiv_classes (struct table_elt *class1, struct table_elt *class2)
1708 struct table_elt *elt, *next, *new;
1710 /* Ensure we start with the head of the classes. */
1711 class1 = class1->first_same_value;
1712 class2 = class2->first_same_value;
1714 /* If they were already equal, forget it. */
1715 if (class1 == class2)
1716 return;
1718 for (elt = class2; elt; elt = next)
1720 unsigned int hash;
1721 rtx exp = elt->exp;
1722 enum machine_mode mode = elt->mode;
1724 next = elt->next_same_value;
1726 /* Remove old entry, make a new one in CLASS1's class.
1727 Don't do this for invalid entries as we cannot find their
1728 hash code (it also isn't necessary). */
1729 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1731 bool need_rehash = false;
1733 hash_arg_in_memory = 0;
1734 hash = HASH (exp, mode);
1736 if (GET_CODE (exp) == REG)
1738 need_rehash = REGNO_QTY_VALID_P (REGNO (exp));
1739 delete_reg_equiv (REGNO (exp));
1742 remove_from_table (elt, hash);
1744 if (insert_regs (exp, class1, 0) || need_rehash)
1746 rehash_using_reg (exp);
1747 hash = HASH (exp, mode);
1749 new = insert (exp, class1, hash, mode);
1750 new->in_memory = hash_arg_in_memory;
1755 /* Flush the entire hash table. */
1757 static void
1758 flush_hash_table (void)
1760 int i;
1761 struct table_elt *p;
1763 for (i = 0; i < HASH_SIZE; i++)
1764 for (p = table[i]; p; p = table[i])
1766 /* Note that invalidate can remove elements
1767 after P in the current hash chain. */
1768 if (GET_CODE (p->exp) == REG)
1769 invalidate (p->exp, p->mode);
1770 else
1771 remove_from_table (p, i);
1775 /* Function called for each rtx to check whether true dependence exist. */
1776 struct check_dependence_data
1778 enum machine_mode mode;
1779 rtx exp;
1780 rtx addr;
1783 static int
1784 check_dependence (rtx *x, void *data)
1786 struct check_dependence_data *d = (struct check_dependence_data *) data;
1787 if (*x && GET_CODE (*x) == MEM)
1788 return canon_true_dependence (d->exp, d->mode, d->addr, *x,
1789 cse_rtx_varies_p);
1790 else
1791 return 0;
1794 /* Remove from the hash table, or mark as invalid, all expressions whose
1795 values could be altered by storing in X. X is a register, a subreg, or
1796 a memory reference with nonvarying address (because, when a memory
1797 reference with a varying address is stored in, all memory references are
1798 removed by invalidate_memory so specific invalidation is superfluous).
1799 FULL_MODE, if not VOIDmode, indicates that this much should be
1800 invalidated instead of just the amount indicated by the mode of X. This
1801 is only used for bitfield stores into memory.
1803 A nonvarying address may be just a register or just a symbol reference,
1804 or it may be either of those plus a numeric offset. */
1806 static void
1807 invalidate (rtx x, enum machine_mode full_mode)
1809 int i;
1810 struct table_elt *p;
1811 rtx addr;
1813 switch (GET_CODE (x))
1815 case REG:
1817 /* If X is a register, dependencies on its contents are recorded
1818 through the qty number mechanism. Just change the qty number of
1819 the register, mark it as invalid for expressions that refer to it,
1820 and remove it itself. */
1821 unsigned int regno = REGNO (x);
1822 unsigned int hash = HASH (x, GET_MODE (x));
1824 /* Remove REGNO from any quantity list it might be on and indicate
1825 that its value might have changed. If it is a pseudo, remove its
1826 entry from the hash table.
1828 For a hard register, we do the first two actions above for any
1829 additional hard registers corresponding to X. Then, if any of these
1830 registers are in the table, we must remove any REG entries that
1831 overlap these registers. */
1833 delete_reg_equiv (regno);
1834 REG_TICK (regno)++;
1835 SUBREG_TICKED (regno) = -1;
1837 if (regno >= FIRST_PSEUDO_REGISTER)
1839 /* Because a register can be referenced in more than one mode,
1840 we might have to remove more than one table entry. */
1841 struct table_elt *elt;
1843 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1844 remove_from_table (elt, hash);
1846 else
1848 HOST_WIDE_INT in_table
1849 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1850 unsigned int endregno
1851 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1852 unsigned int tregno, tendregno, rn;
1853 struct table_elt *p, *next;
1855 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1857 for (rn = regno + 1; rn < endregno; rn++)
1859 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, rn);
1860 CLEAR_HARD_REG_BIT (hard_regs_in_table, rn);
1861 delete_reg_equiv (rn);
1862 REG_TICK (rn)++;
1863 SUBREG_TICKED (rn) = -1;
1866 if (in_table)
1867 for (hash = 0; hash < HASH_SIZE; hash++)
1868 for (p = table[hash]; p; p = next)
1870 next = p->next_same_hash;
1872 if (GET_CODE (p->exp) != REG
1873 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1874 continue;
1876 tregno = REGNO (p->exp);
1877 tendregno
1878 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1879 if (tendregno > regno && tregno < endregno)
1880 remove_from_table (p, hash);
1884 return;
1886 case SUBREG:
1887 invalidate (SUBREG_REG (x), VOIDmode);
1888 return;
1890 case PARALLEL:
1891 for (i = XVECLEN (x, 0) - 1; i >= 0; --i)
1892 invalidate (XVECEXP (x, 0, i), VOIDmode);
1893 return;
1895 case EXPR_LIST:
1896 /* This is part of a disjoint return value; extract the location in
1897 question ignoring the offset. */
1898 invalidate (XEXP (x, 0), VOIDmode);
1899 return;
1901 case MEM:
1902 addr = canon_rtx (get_addr (XEXP (x, 0)));
1903 /* Calculate the canonical version of X here so that
1904 true_dependence doesn't generate new RTL for X on each call. */
1905 x = canon_rtx (x);
1907 /* Remove all hash table elements that refer to overlapping pieces of
1908 memory. */
1909 if (full_mode == VOIDmode)
1910 full_mode = GET_MODE (x);
1912 for (i = 0; i < HASH_SIZE; i++)
1914 struct table_elt *next;
1916 for (p = table[i]; p; p = next)
1918 next = p->next_same_hash;
1919 if (p->in_memory)
1921 struct check_dependence_data d;
1923 /* Just canonicalize the expression once;
1924 otherwise each time we call invalidate
1925 true_dependence will canonicalize the
1926 expression again. */
1927 if (!p->canon_exp)
1928 p->canon_exp = canon_rtx (p->exp);
1929 d.exp = x;
1930 d.addr = addr;
1931 d.mode = full_mode;
1932 if (for_each_rtx (&p->canon_exp, check_dependence, &d))
1933 remove_from_table (p, i);
1937 return;
1939 default:
1940 abort ();
1944 /* Remove all expressions that refer to register REGNO,
1945 since they are already invalid, and we are about to
1946 mark that register valid again and don't want the old
1947 expressions to reappear as valid. */
1949 static void
1950 remove_invalid_refs (unsigned int regno)
1952 unsigned int i;
1953 struct table_elt *p, *next;
1955 for (i = 0; i < HASH_SIZE; i++)
1956 for (p = table[i]; p; p = next)
1958 next = p->next_same_hash;
1959 if (GET_CODE (p->exp) != REG
1960 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1961 remove_from_table (p, i);
1965 /* Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET,
1966 and mode MODE. */
1967 static void
1968 remove_invalid_subreg_refs (unsigned int regno, unsigned int offset,
1969 enum machine_mode mode)
1971 unsigned int i;
1972 struct table_elt *p, *next;
1973 unsigned int end = offset + (GET_MODE_SIZE (mode) - 1);
1975 for (i = 0; i < HASH_SIZE; i++)
1976 for (p = table[i]; p; p = next)
1978 rtx exp = p->exp;
1979 next = p->next_same_hash;
1981 if (GET_CODE (exp) != REG
1982 && (GET_CODE (exp) != SUBREG
1983 || GET_CODE (SUBREG_REG (exp)) != REG
1984 || REGNO (SUBREG_REG (exp)) != regno
1985 || (((SUBREG_BYTE (exp)
1986 + (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
1987 && SUBREG_BYTE (exp) <= end))
1988 && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
1989 remove_from_table (p, i);
1993 /* Recompute the hash codes of any valid entries in the hash table that
1994 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1996 This is called when we make a jump equivalence. */
1998 static void
1999 rehash_using_reg (rtx x)
2001 unsigned int i;
2002 struct table_elt *p, *next;
2003 unsigned hash;
2005 if (GET_CODE (x) == SUBREG)
2006 x = SUBREG_REG (x);
2008 /* If X is not a register or if the register is known not to be in any
2009 valid entries in the table, we have no work to do. */
2011 if (GET_CODE (x) != REG
2012 || REG_IN_TABLE (REGNO (x)) < 0
2013 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
2014 return;
2016 /* Scan all hash chains looking for valid entries that mention X.
2017 If we find one and it is in the wrong hash chain, move it. */
2019 for (i = 0; i < HASH_SIZE; i++)
2020 for (p = table[i]; p; p = next)
2022 next = p->next_same_hash;
2023 if (reg_mentioned_p (x, p->exp)
2024 && exp_equiv_p (p->exp, p->exp, 1, 0)
2025 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
2027 if (p->next_same_hash)
2028 p->next_same_hash->prev_same_hash = p->prev_same_hash;
2030 if (p->prev_same_hash)
2031 p->prev_same_hash->next_same_hash = p->next_same_hash;
2032 else
2033 table[i] = p->next_same_hash;
2035 p->next_same_hash = table[hash];
2036 p->prev_same_hash = 0;
2037 if (table[hash])
2038 table[hash]->prev_same_hash = p;
2039 table[hash] = p;
2044 /* Remove from the hash table any expression that is a call-clobbered
2045 register. Also update their TICK values. */
2047 static void
2048 invalidate_for_call (void)
2050 unsigned int regno, endregno;
2051 unsigned int i;
2052 unsigned hash;
2053 struct table_elt *p, *next;
2054 int in_table = 0;
2056 /* Go through all the hard registers. For each that is clobbered in
2057 a CALL_INSN, remove the register from quantity chains and update
2058 reg_tick if defined. Also see if any of these registers is currently
2059 in the table. */
2061 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
2062 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
2064 delete_reg_equiv (regno);
2065 if (REG_TICK (regno) >= 0)
2067 REG_TICK (regno)++;
2068 SUBREG_TICKED (regno) = -1;
2071 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
2074 /* In the case where we have no call-clobbered hard registers in the
2075 table, we are done. Otherwise, scan the table and remove any
2076 entry that overlaps a call-clobbered register. */
2078 if (in_table)
2079 for (hash = 0; hash < HASH_SIZE; hash++)
2080 for (p = table[hash]; p; p = next)
2082 next = p->next_same_hash;
2084 if (GET_CODE (p->exp) != REG
2085 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
2086 continue;
2088 regno = REGNO (p->exp);
2089 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
2091 for (i = regno; i < endregno; i++)
2092 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2094 remove_from_table (p, hash);
2095 break;
2100 /* Given an expression X of type CONST,
2101 and ELT which is its table entry (or 0 if it
2102 is not in the hash table),
2103 return an alternate expression for X as a register plus integer.
2104 If none can be found, return 0. */
2106 static rtx
2107 use_related_value (rtx x, struct table_elt *elt)
2109 struct table_elt *relt = 0;
2110 struct table_elt *p, *q;
2111 HOST_WIDE_INT offset;
2113 /* First, is there anything related known?
2114 If we have a table element, we can tell from that.
2115 Otherwise, must look it up. */
2117 if (elt != 0 && elt->related_value != 0)
2118 relt = elt;
2119 else if (elt == 0 && GET_CODE (x) == CONST)
2121 rtx subexp = get_related_value (x);
2122 if (subexp != 0)
2123 relt = lookup (subexp,
2124 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2125 GET_MODE (subexp));
2128 if (relt == 0)
2129 return 0;
2131 /* Search all related table entries for one that has an
2132 equivalent register. */
2134 p = relt;
2135 while (1)
2137 /* This loop is strange in that it is executed in two different cases.
2138 The first is when X is already in the table. Then it is searching
2139 the RELATED_VALUE list of X's class (RELT). The second case is when
2140 X is not in the table. Then RELT points to a class for the related
2141 value.
2143 Ensure that, whatever case we are in, that we ignore classes that have
2144 the same value as X. */
2146 if (rtx_equal_p (x, p->exp))
2147 q = 0;
2148 else
2149 for (q = p->first_same_value; q; q = q->next_same_value)
2150 if (GET_CODE (q->exp) == REG)
2151 break;
2153 if (q)
2154 break;
2156 p = p->related_value;
2158 /* We went all the way around, so there is nothing to be found.
2159 Alternatively, perhaps RELT was in the table for some other reason
2160 and it has no related values recorded. */
2161 if (p == relt || p == 0)
2162 break;
2165 if (q == 0)
2166 return 0;
2168 offset = (get_integer_term (x) - get_integer_term (p->exp));
2169 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2170 return plus_constant (q->exp, offset);
2173 /* Hash a string. Just add its bytes up. */
2174 static inline unsigned
2175 canon_hash_string (const char *ps)
2177 unsigned hash = 0;
2178 const unsigned char *p = (const unsigned char *) ps;
2180 if (p)
2181 while (*p)
2182 hash += *p++;
2184 return hash;
2187 /* Hash an rtx. We are careful to make sure the value is never negative.
2188 Equivalent registers hash identically.
2189 MODE is used in hashing for CONST_INTs only;
2190 otherwise the mode of X is used.
2192 Store 1 in do_not_record if any subexpression is volatile.
2194 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2195 which does not have the RTX_UNCHANGING_P bit set.
2197 Note that cse_insn knows that the hash code of a MEM expression
2198 is just (int) MEM plus the hash code of the address. */
2200 static unsigned
2201 canon_hash (rtx x, enum machine_mode mode)
2203 int i, j;
2204 unsigned hash = 0;
2205 enum rtx_code code;
2206 const char *fmt;
2208 /* repeat is used to turn tail-recursion into iteration. */
2209 repeat:
2210 if (x == 0)
2211 return hash;
2213 code = GET_CODE (x);
2214 switch (code)
2216 case REG:
2218 unsigned int regno = REGNO (x);
2219 bool record;
2221 /* On some machines, we can't record any non-fixed hard register,
2222 because extending its life will cause reload problems. We
2223 consider ap, fp, sp, gp to be fixed for this purpose.
2225 We also consider CCmode registers to be fixed for this purpose;
2226 failure to do so leads to failure to simplify 0<100 type of
2227 conditionals.
2229 On all machines, we can't record any global registers.
2230 Nor should we record any register that is in a small
2231 class, as defined by CLASS_LIKELY_SPILLED_P. */
2233 if (regno >= FIRST_PSEUDO_REGISTER)
2234 record = true;
2235 else if (x == frame_pointer_rtx
2236 || x == hard_frame_pointer_rtx
2237 || x == arg_pointer_rtx
2238 || x == stack_pointer_rtx
2239 || x == pic_offset_table_rtx)
2240 record = true;
2241 else if (global_regs[regno])
2242 record = false;
2243 else if (fixed_regs[regno])
2244 record = true;
2245 else if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC)
2246 record = true;
2247 else if (SMALL_REGISTER_CLASSES)
2248 record = false;
2249 else if (CLASS_LIKELY_SPILLED_P (REGNO_REG_CLASS (regno)))
2250 record = false;
2251 else
2252 record = true;
2254 if (!record)
2256 do_not_record = 1;
2257 return 0;
2260 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2261 return hash;
2264 /* We handle SUBREG of a REG specially because the underlying
2265 reg changes its hash value with every value change; we don't
2266 want to have to forget unrelated subregs when one subreg changes. */
2267 case SUBREG:
2269 if (GET_CODE (SUBREG_REG (x)) == REG)
2271 hash += (((unsigned) SUBREG << 7)
2272 + REGNO (SUBREG_REG (x))
2273 + (SUBREG_BYTE (x) / UNITS_PER_WORD));
2274 return hash;
2276 break;
2279 case CONST_INT:
2281 unsigned HOST_WIDE_INT tem = INTVAL (x);
2282 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2283 return hash;
2286 case CONST_DOUBLE:
2287 /* This is like the general case, except that it only counts
2288 the integers representing the constant. */
2289 hash += (unsigned) code + (unsigned) GET_MODE (x);
2290 if (GET_MODE (x) != VOIDmode)
2291 hash += real_hash (CONST_DOUBLE_REAL_VALUE (x));
2292 else
2293 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2294 + (unsigned) CONST_DOUBLE_HIGH (x));
2295 return hash;
2297 case CONST_VECTOR:
2299 int units;
2300 rtx elt;
2302 units = CONST_VECTOR_NUNITS (x);
2304 for (i = 0; i < units; ++i)
2306 elt = CONST_VECTOR_ELT (x, i);
2307 hash += canon_hash (elt, GET_MODE (elt));
2310 return hash;
2313 /* Assume there is only one rtx object for any given label. */
2314 case LABEL_REF:
2315 hash += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2316 return hash;
2318 case SYMBOL_REF:
2319 hash += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2320 return hash;
2322 case MEM:
2323 /* We don't record if marked volatile or if BLKmode since we don't
2324 know the size of the move. */
2325 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2327 do_not_record = 1;
2328 return 0;
2330 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2331 hash_arg_in_memory = 1;
2333 /* Now that we have already found this special case,
2334 might as well speed it up as much as possible. */
2335 hash += (unsigned) MEM;
2336 x = XEXP (x, 0);
2337 goto repeat;
2339 case USE:
2340 /* A USE that mentions non-volatile memory needs special
2341 handling since the MEM may be BLKmode which normally
2342 prevents an entry from being made. Pure calls are
2343 marked by a USE which mentions BLKmode memory. */
2344 if (GET_CODE (XEXP (x, 0)) == MEM
2345 && ! MEM_VOLATILE_P (XEXP (x, 0)))
2347 hash += (unsigned) USE;
2348 x = XEXP (x, 0);
2350 if (! RTX_UNCHANGING_P (x) || fixed_base_plus_p (XEXP (x, 0)))
2351 hash_arg_in_memory = 1;
2353 /* Now that we have already found this special case,
2354 might as well speed it up as much as possible. */
2355 hash += (unsigned) MEM;
2356 x = XEXP (x, 0);
2357 goto repeat;
2359 break;
2361 case PRE_DEC:
2362 case PRE_INC:
2363 case POST_DEC:
2364 case POST_INC:
2365 case PRE_MODIFY:
2366 case POST_MODIFY:
2367 case PC:
2368 case CC0:
2369 case CALL:
2370 case UNSPEC_VOLATILE:
2371 do_not_record = 1;
2372 return 0;
2374 case ASM_OPERANDS:
2375 if (MEM_VOLATILE_P (x))
2377 do_not_record = 1;
2378 return 0;
2380 else
2382 /* We don't want to take the filename and line into account. */
2383 hash += (unsigned) code + (unsigned) GET_MODE (x)
2384 + canon_hash_string (ASM_OPERANDS_TEMPLATE (x))
2385 + canon_hash_string (ASM_OPERANDS_OUTPUT_CONSTRAINT (x))
2386 + (unsigned) ASM_OPERANDS_OUTPUT_IDX (x);
2388 if (ASM_OPERANDS_INPUT_LENGTH (x))
2390 for (i = 1; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
2392 hash += (canon_hash (ASM_OPERANDS_INPUT (x, i),
2393 GET_MODE (ASM_OPERANDS_INPUT (x, i)))
2394 + canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT
2395 (x, i)));
2398 hash += canon_hash_string (ASM_OPERANDS_INPUT_CONSTRAINT (x, 0));
2399 x = ASM_OPERANDS_INPUT (x, 0);
2400 mode = GET_MODE (x);
2401 goto repeat;
2404 return hash;
2406 break;
2408 default:
2409 break;
2412 i = GET_RTX_LENGTH (code) - 1;
2413 hash += (unsigned) code + (unsigned) GET_MODE (x);
2414 fmt = GET_RTX_FORMAT (code);
2415 for (; i >= 0; i--)
2417 if (fmt[i] == 'e')
2419 rtx tem = XEXP (x, i);
2421 /* If we are about to do the last recursive call
2422 needed at this level, change it into iteration.
2423 This function is called enough to be worth it. */
2424 if (i == 0)
2426 x = tem;
2427 goto repeat;
2429 hash += canon_hash (tem, 0);
2431 else if (fmt[i] == 'E')
2432 for (j = 0; j < XVECLEN (x, i); j++)
2433 hash += canon_hash (XVECEXP (x, i, j), 0);
2434 else if (fmt[i] == 's')
2435 hash += canon_hash_string (XSTR (x, i));
2436 else if (fmt[i] == 'i')
2438 unsigned tem = XINT (x, i);
2439 hash += tem;
2441 else if (fmt[i] == '0' || fmt[i] == 't')
2442 /* Unused. */
2444 else
2445 abort ();
2447 return hash;
2450 /* Like canon_hash but with no side effects. */
2452 static unsigned
2453 safe_hash (rtx x, enum machine_mode mode)
2455 int save_do_not_record = do_not_record;
2456 int save_hash_arg_in_memory = hash_arg_in_memory;
2457 unsigned hash = canon_hash (x, mode);
2458 hash_arg_in_memory = save_hash_arg_in_memory;
2459 do_not_record = save_do_not_record;
2460 return hash;
2463 /* Return 1 iff X and Y would canonicalize into the same thing,
2464 without actually constructing the canonicalization of either one.
2465 If VALIDATE is nonzero,
2466 we assume X is an expression being processed from the rtl
2467 and Y was found in the hash table. We check register refs
2468 in Y for being marked as valid.
2470 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2471 that is known to be in the register. Ordinarily, we don't allow them
2472 to match, because letting them match would cause unpredictable results
2473 in all the places that search a hash table chain for an equivalent
2474 for a given value. A possible equivalent that has different structure
2475 has its hash code computed from different data. Whether the hash code
2476 is the same as that of the given value is pure luck. */
2478 static int
2479 exp_equiv_p (rtx x, rtx y, int validate, int equal_values)
2481 int i, j;
2482 enum rtx_code code;
2483 const char *fmt;
2485 /* Note: it is incorrect to assume an expression is equivalent to itself
2486 if VALIDATE is nonzero. */
2487 if (x == y && !validate)
2488 return 1;
2489 if (x == 0 || y == 0)
2490 return x == y;
2492 code = GET_CODE (x);
2493 if (code != GET_CODE (y))
2495 if (!equal_values)
2496 return 0;
2498 /* If X is a constant and Y is a register or vice versa, they may be
2499 equivalent. We only have to validate if Y is a register. */
2500 if (CONSTANT_P (x) && GET_CODE (y) == REG
2501 && REGNO_QTY_VALID_P (REGNO (y)))
2503 int y_q = REG_QTY (REGNO (y));
2504 struct qty_table_elem *y_ent = &qty_table[y_q];
2506 if (GET_MODE (y) == y_ent->mode
2507 && rtx_equal_p (x, y_ent->const_rtx)
2508 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2509 return 1;
2512 if (CONSTANT_P (y) && code == REG
2513 && REGNO_QTY_VALID_P (REGNO (x)))
2515 int x_q = REG_QTY (REGNO (x));
2516 struct qty_table_elem *x_ent = &qty_table[x_q];
2518 if (GET_MODE (x) == x_ent->mode
2519 && rtx_equal_p (y, x_ent->const_rtx))
2520 return 1;
2523 return 0;
2526 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2527 if (GET_MODE (x) != GET_MODE (y))
2528 return 0;
2530 switch (code)
2532 case PC:
2533 case CC0:
2534 case CONST_INT:
2535 return x == y;
2537 case LABEL_REF:
2538 return XEXP (x, 0) == XEXP (y, 0);
2540 case SYMBOL_REF:
2541 return XSTR (x, 0) == XSTR (y, 0);
2543 case REG:
2545 unsigned int regno = REGNO (y);
2546 unsigned int endregno
2547 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2548 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2549 unsigned int i;
2551 /* If the quantities are not the same, the expressions are not
2552 equivalent. If there are and we are not to validate, they
2553 are equivalent. Otherwise, ensure all regs are up-to-date. */
2555 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2556 return 0;
2558 if (! validate)
2559 return 1;
2561 for (i = regno; i < endregno; i++)
2562 if (REG_IN_TABLE (i) != REG_TICK (i))
2563 return 0;
2565 return 1;
2568 /* For commutative operations, check both orders. */
2569 case PLUS:
2570 case MULT:
2571 case AND:
2572 case IOR:
2573 case XOR:
2574 case NE:
2575 case EQ:
2576 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2577 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2578 validate, equal_values))
2579 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2580 validate, equal_values)
2581 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2582 validate, equal_values)));
2584 case ASM_OPERANDS:
2585 /* We don't use the generic code below because we want to
2586 disregard filename and line numbers. */
2588 /* A volatile asm isn't equivalent to any other. */
2589 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
2590 return 0;
2592 if (GET_MODE (x) != GET_MODE (y)
2593 || strcmp (ASM_OPERANDS_TEMPLATE (x), ASM_OPERANDS_TEMPLATE (y))
2594 || strcmp (ASM_OPERANDS_OUTPUT_CONSTRAINT (x),
2595 ASM_OPERANDS_OUTPUT_CONSTRAINT (y))
2596 || ASM_OPERANDS_OUTPUT_IDX (x) != ASM_OPERANDS_OUTPUT_IDX (y)
2597 || ASM_OPERANDS_INPUT_LENGTH (x) != ASM_OPERANDS_INPUT_LENGTH (y))
2598 return 0;
2600 if (ASM_OPERANDS_INPUT_LENGTH (x))
2602 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
2603 if (! exp_equiv_p (ASM_OPERANDS_INPUT (x, i),
2604 ASM_OPERANDS_INPUT (y, i),
2605 validate, equal_values)
2606 || strcmp (ASM_OPERANDS_INPUT_CONSTRAINT (x, i),
2607 ASM_OPERANDS_INPUT_CONSTRAINT (y, i)))
2608 return 0;
2611 return 1;
2613 default:
2614 break;
2617 /* Compare the elements. If any pair of corresponding elements
2618 fail to match, return 0 for the whole things. */
2620 fmt = GET_RTX_FORMAT (code);
2621 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2623 switch (fmt[i])
2625 case 'e':
2626 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2627 return 0;
2628 break;
2630 case 'E':
2631 if (XVECLEN (x, i) != XVECLEN (y, i))
2632 return 0;
2633 for (j = 0; j < XVECLEN (x, i); j++)
2634 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2635 validate, equal_values))
2636 return 0;
2637 break;
2639 case 's':
2640 if (strcmp (XSTR (x, i), XSTR (y, i)))
2641 return 0;
2642 break;
2644 case 'i':
2645 if (XINT (x, i) != XINT (y, i))
2646 return 0;
2647 break;
2649 case 'w':
2650 if (XWINT (x, i) != XWINT (y, i))
2651 return 0;
2652 break;
2654 case '0':
2655 case 't':
2656 break;
2658 default:
2659 abort ();
2663 return 1;
2666 /* Return 1 if X has a value that can vary even between two
2667 executions of the program. 0 means X can be compared reliably
2668 against certain constants or near-constants. */
2670 static int
2671 cse_rtx_varies_p (rtx x, int from_alias)
2673 /* We need not check for X and the equivalence class being of the same
2674 mode because if X is equivalent to a constant in some mode, it
2675 doesn't vary in any mode. */
2677 if (GET_CODE (x) == REG
2678 && REGNO_QTY_VALID_P (REGNO (x)))
2680 int x_q = REG_QTY (REGNO (x));
2681 struct qty_table_elem *x_ent = &qty_table[x_q];
2683 if (GET_MODE (x) == x_ent->mode
2684 && x_ent->const_rtx != NULL_RTX)
2685 return 0;
2688 if (GET_CODE (x) == PLUS
2689 && GET_CODE (XEXP (x, 1)) == CONST_INT
2690 && GET_CODE (XEXP (x, 0)) == REG
2691 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2693 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2694 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2696 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2697 && x0_ent->const_rtx != NULL_RTX)
2698 return 0;
2701 /* This can happen as the result of virtual register instantiation, if
2702 the initial constant is too large to be a valid address. This gives
2703 us a three instruction sequence, load large offset into a register,
2704 load fp minus a constant into a register, then a MEM which is the
2705 sum of the two `constant' registers. */
2706 if (GET_CODE (x) == PLUS
2707 && GET_CODE (XEXP (x, 0)) == REG
2708 && GET_CODE (XEXP (x, 1)) == REG
2709 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2710 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2712 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2713 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2714 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2715 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2717 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2718 && x0_ent->const_rtx != NULL_RTX
2719 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2720 && x1_ent->const_rtx != NULL_RTX)
2721 return 0;
2724 return rtx_varies_p (x, from_alias);
2727 /* Canonicalize an expression:
2728 replace each register reference inside it
2729 with the "oldest" equivalent register.
2731 If INSN is nonzero and we are replacing a pseudo with a hard register
2732 or vice versa, validate_change is used to ensure that INSN remains valid
2733 after we make our substitution. The calls are made with IN_GROUP nonzero
2734 so apply_change_group must be called upon the outermost return from this
2735 function (unless INSN is zero). The result of apply_change_group can
2736 generally be discarded since the changes we are making are optional. */
2738 static rtx
2739 canon_reg (rtx x, rtx insn)
2741 int i;
2742 enum rtx_code code;
2743 const char *fmt;
2745 if (x == 0)
2746 return x;
2748 code = GET_CODE (x);
2749 switch (code)
2751 case PC:
2752 case CC0:
2753 case CONST:
2754 case CONST_INT:
2755 case CONST_DOUBLE:
2756 case CONST_VECTOR:
2757 case SYMBOL_REF:
2758 case LABEL_REF:
2759 case ADDR_VEC:
2760 case ADDR_DIFF_VEC:
2761 return x;
2763 case REG:
2765 int first;
2766 int q;
2767 struct qty_table_elem *ent;
2769 /* Never replace a hard reg, because hard regs can appear
2770 in more than one machine mode, and we must preserve the mode
2771 of each occurrence. Also, some hard regs appear in
2772 MEMs that are shared and mustn't be altered. Don't try to
2773 replace any reg that maps to a reg of class NO_REGS. */
2774 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2775 || ! REGNO_QTY_VALID_P (REGNO (x)))
2776 return x;
2778 q = REG_QTY (REGNO (x));
2779 ent = &qty_table[q];
2780 first = ent->first_reg;
2781 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2782 : REGNO_REG_CLASS (first) == NO_REGS ? x
2783 : gen_rtx_REG (ent->mode, first));
2786 default:
2787 break;
2790 fmt = GET_RTX_FORMAT (code);
2791 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2793 int j;
2795 if (fmt[i] == 'e')
2797 rtx new = canon_reg (XEXP (x, i), insn);
2798 int insn_code;
2800 /* If replacing pseudo with hard reg or vice versa, ensure the
2801 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2802 if (insn != 0 && new != 0
2803 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2804 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2805 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2806 || (insn_code = recog_memoized (insn)) < 0
2807 || insn_data[insn_code].n_dups > 0))
2808 validate_change (insn, &XEXP (x, i), new, 1);
2809 else
2810 XEXP (x, i) = new;
2812 else if (fmt[i] == 'E')
2813 for (j = 0; j < XVECLEN (x, i); j++)
2814 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2817 return x;
2820 /* LOC is a location within INSN that is an operand address (the contents of
2821 a MEM). Find the best equivalent address to use that is valid for this
2822 insn.
2824 On most CISC machines, complicated address modes are costly, and rtx_cost
2825 is a good approximation for that cost. However, most RISC machines have
2826 only a few (usually only one) memory reference formats. If an address is
2827 valid at all, it is often just as cheap as any other address. Hence, for
2828 RISC machines, we use `address_cost' to compare the costs of various
2829 addresses. For two addresses of equal cost, choose the one with the
2830 highest `rtx_cost' value as that has the potential of eliminating the
2831 most insns. For equal costs, we choose the first in the equivalence
2832 class. Note that we ignore the fact that pseudo registers are cheaper than
2833 hard registers here because we would also prefer the pseudo registers. */
2835 static void
2836 find_best_addr (rtx insn, rtx *loc, enum machine_mode mode)
2838 struct table_elt *elt;
2839 rtx addr = *loc;
2840 struct table_elt *p;
2841 int found_better = 1;
2842 int save_do_not_record = do_not_record;
2843 int save_hash_arg_in_memory = hash_arg_in_memory;
2844 int addr_volatile;
2845 int regno;
2846 unsigned hash;
2848 /* Do not try to replace constant addresses or addresses of local and
2849 argument slots. These MEM expressions are made only once and inserted
2850 in many instructions, as well as being used to control symbol table
2851 output. It is not safe to clobber them.
2853 There are some uncommon cases where the address is already in a register
2854 for some reason, but we cannot take advantage of that because we have
2855 no easy way to unshare the MEM. In addition, looking up all stack
2856 addresses is costly. */
2857 if ((GET_CODE (addr) == PLUS
2858 && GET_CODE (XEXP (addr, 0)) == REG
2859 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2860 && (regno = REGNO (XEXP (addr, 0)),
2861 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2862 || regno == ARG_POINTER_REGNUM))
2863 || (GET_CODE (addr) == REG
2864 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2865 || regno == HARD_FRAME_POINTER_REGNUM
2866 || regno == ARG_POINTER_REGNUM))
2867 || GET_CODE (addr) == ADDRESSOF
2868 || CONSTANT_ADDRESS_P (addr))
2869 return;
2871 /* If this address is not simply a register, try to fold it. This will
2872 sometimes simplify the expression. Many simplifications
2873 will not be valid, but some, usually applying the associative rule, will
2874 be valid and produce better code. */
2875 if (GET_CODE (addr) != REG)
2877 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2878 int addr_folded_cost = address_cost (folded, mode);
2879 int addr_cost = address_cost (addr, mode);
2881 if ((addr_folded_cost < addr_cost
2882 || (addr_folded_cost == addr_cost
2883 /* ??? The rtx_cost comparison is left over from an older
2884 version of this code. It is probably no longer helpful. */
2885 && (rtx_cost (folded, MEM) > rtx_cost (addr, MEM)
2886 || approx_reg_cost (folded) < approx_reg_cost (addr))))
2887 && validate_change (insn, loc, folded, 0))
2888 addr = folded;
2891 /* If this address is not in the hash table, we can't look for equivalences
2892 of the whole address. Also, ignore if volatile. */
2894 do_not_record = 0;
2895 hash = HASH (addr, Pmode);
2896 addr_volatile = do_not_record;
2897 do_not_record = save_do_not_record;
2898 hash_arg_in_memory = save_hash_arg_in_memory;
2900 if (addr_volatile)
2901 return;
2903 elt = lookup (addr, hash, Pmode);
2905 if (elt)
2907 /* We need to find the best (under the criteria documented above) entry
2908 in the class that is valid. We use the `flag' field to indicate
2909 choices that were invalid and iterate until we can't find a better
2910 one that hasn't already been tried. */
2912 for (p = elt->first_same_value; p; p = p->next_same_value)
2913 p->flag = 0;
2915 while (found_better)
2917 int best_addr_cost = address_cost (*loc, mode);
2918 int best_rtx_cost = (elt->cost + 1) >> 1;
2919 int exp_cost;
2920 struct table_elt *best_elt = elt;
2922 found_better = 0;
2923 for (p = elt->first_same_value; p; p = p->next_same_value)
2924 if (! p->flag)
2926 if ((GET_CODE (p->exp) == REG
2927 || exp_equiv_p (p->exp, p->exp, 1, 0))
2928 && ((exp_cost = address_cost (p->exp, mode)) < best_addr_cost
2929 || (exp_cost == best_addr_cost
2930 && ((p->cost + 1) >> 1) > best_rtx_cost)))
2932 found_better = 1;
2933 best_addr_cost = exp_cost;
2934 best_rtx_cost = (p->cost + 1) >> 1;
2935 best_elt = p;
2939 if (found_better)
2941 if (validate_change (insn, loc,
2942 canon_reg (copy_rtx (best_elt->exp),
2943 NULL_RTX), 0))
2944 return;
2945 else
2946 best_elt->flag = 1;
2951 /* If the address is a binary operation with the first operand a register
2952 and the second a constant, do the same as above, but looking for
2953 equivalences of the register. Then try to simplify before checking for
2954 the best address to use. This catches a few cases: First is when we
2955 have REG+const and the register is another REG+const. We can often merge
2956 the constants and eliminate one insn and one register. It may also be
2957 that a machine has a cheap REG+REG+const. Finally, this improves the
2958 code on the Alpha for unaligned byte stores. */
2960 if (flag_expensive_optimizations
2961 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2962 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2963 && GET_CODE (XEXP (*loc, 0)) == REG)
2965 rtx op1 = XEXP (*loc, 1);
2967 do_not_record = 0;
2968 hash = HASH (XEXP (*loc, 0), Pmode);
2969 do_not_record = save_do_not_record;
2970 hash_arg_in_memory = save_hash_arg_in_memory;
2972 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2973 if (elt == 0)
2974 return;
2976 /* We need to find the best (under the criteria documented above) entry
2977 in the class that is valid. We use the `flag' field to indicate
2978 choices that were invalid and iterate until we can't find a better
2979 one that hasn't already been tried. */
2981 for (p = elt->first_same_value; p; p = p->next_same_value)
2982 p->flag = 0;
2984 while (found_better)
2986 int best_addr_cost = address_cost (*loc, mode);
2987 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2988 struct table_elt *best_elt = elt;
2989 rtx best_rtx = *loc;
2990 int count;
2992 /* This is at worst case an O(n^2) algorithm, so limit our search
2993 to the first 32 elements on the list. This avoids trouble
2994 compiling code with very long basic blocks that can easily
2995 call simplify_gen_binary so many times that we run out of
2996 memory. */
2998 found_better = 0;
2999 for (p = elt->first_same_value, count = 0;
3000 p && count < 32;
3001 p = p->next_same_value, count++)
3002 if (! p->flag
3003 && (GET_CODE (p->exp) == REG
3004 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3006 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
3007 p->exp, op1);
3008 int new_cost;
3009 new_cost = address_cost (new, mode);
3011 if (new_cost < best_addr_cost
3012 || (new_cost == best_addr_cost
3013 && (COST (new) + 1) >> 1 > best_rtx_cost))
3015 found_better = 1;
3016 best_addr_cost = new_cost;
3017 best_rtx_cost = (COST (new) + 1) >> 1;
3018 best_elt = p;
3019 best_rtx = new;
3023 if (found_better)
3025 if (validate_change (insn, loc,
3026 canon_reg (copy_rtx (best_rtx),
3027 NULL_RTX), 0))
3028 return;
3029 else
3030 best_elt->flag = 1;
3036 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3037 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3038 what values are being compared.
3040 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3041 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3042 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3043 compared to produce cc0.
3045 The return value is the comparison operator and is either the code of
3046 A or the code corresponding to the inverse of the comparison. */
3048 static enum rtx_code
3049 find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
3050 enum machine_mode *pmode1, enum machine_mode *pmode2)
3052 rtx arg1, arg2;
3054 arg1 = *parg1, arg2 = *parg2;
3056 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3058 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3060 /* Set nonzero when we find something of interest. */
3061 rtx x = 0;
3062 int reverse_code = 0;
3063 struct table_elt *p = 0;
3065 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3066 On machines with CC0, this is the only case that can occur, since
3067 fold_rtx will return the COMPARE or item being compared with zero
3068 when given CC0. */
3070 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3071 x = arg1;
3073 /* If ARG1 is a comparison operator and CODE is testing for
3074 STORE_FLAG_VALUE, get the inner arguments. */
3076 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3078 #ifdef FLOAT_STORE_FLAG_VALUE
3079 REAL_VALUE_TYPE fsfv;
3080 #endif
3082 if (code == NE
3083 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3084 && code == LT && STORE_FLAG_VALUE == -1)
3085 #ifdef FLOAT_STORE_FLAG_VALUE
3086 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3087 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3088 REAL_VALUE_NEGATIVE (fsfv)))
3089 #endif
3091 x = arg1;
3092 else if (code == EQ
3093 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3094 && code == GE && STORE_FLAG_VALUE == -1)
3095 #ifdef FLOAT_STORE_FLAG_VALUE
3096 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3097 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3098 REAL_VALUE_NEGATIVE (fsfv)))
3099 #endif
3101 x = arg1, reverse_code = 1;
3104 /* ??? We could also check for
3106 (ne (and (eq (...) (const_int 1))) (const_int 0))
3108 and related forms, but let's wait until we see them occurring. */
3110 if (x == 0)
3111 /* Look up ARG1 in the hash table and see if it has an equivalence
3112 that lets us see what is being compared. */
3113 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
3114 GET_MODE (arg1));
3115 if (p)
3117 p = p->first_same_value;
3119 /* If what we compare is already known to be constant, that is as
3120 good as it gets.
3121 We need to break the loop in this case, because otherwise we
3122 can have an infinite loop when looking at a reg that is known
3123 to be a constant which is the same as a comparison of a reg
3124 against zero which appears later in the insn stream, which in
3125 turn is constant and the same as the comparison of the first reg
3126 against zero... */
3127 if (p->is_const)
3128 break;
3131 for (; p; p = p->next_same_value)
3133 enum machine_mode inner_mode = GET_MODE (p->exp);
3134 #ifdef FLOAT_STORE_FLAG_VALUE
3135 REAL_VALUE_TYPE fsfv;
3136 #endif
3138 /* If the entry isn't valid, skip it. */
3139 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3140 continue;
3142 if (GET_CODE (p->exp) == COMPARE
3143 /* Another possibility is that this machine has a compare insn
3144 that includes the comparison code. In that case, ARG1 would
3145 be equivalent to a comparison operation that would set ARG1 to
3146 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3147 ORIG_CODE is the actual comparison being done; if it is an EQ,
3148 we must reverse ORIG_CODE. On machine with a negative value
3149 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3150 || ((code == NE
3151 || (code == LT
3152 && GET_MODE_CLASS (inner_mode) == MODE_INT
3153 && (GET_MODE_BITSIZE (inner_mode)
3154 <= HOST_BITS_PER_WIDE_INT)
3155 && (STORE_FLAG_VALUE
3156 & ((HOST_WIDE_INT) 1
3157 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3158 #ifdef FLOAT_STORE_FLAG_VALUE
3159 || (code == LT
3160 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3161 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3162 REAL_VALUE_NEGATIVE (fsfv)))
3163 #endif
3165 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3167 x = p->exp;
3168 break;
3170 else if ((code == EQ
3171 || (code == GE
3172 && GET_MODE_CLASS (inner_mode) == MODE_INT
3173 && (GET_MODE_BITSIZE (inner_mode)
3174 <= HOST_BITS_PER_WIDE_INT)
3175 && (STORE_FLAG_VALUE
3176 & ((HOST_WIDE_INT) 1
3177 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3178 #ifdef FLOAT_STORE_FLAG_VALUE
3179 || (code == GE
3180 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3181 && (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
3182 REAL_VALUE_NEGATIVE (fsfv)))
3183 #endif
3185 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3187 reverse_code = 1;
3188 x = p->exp;
3189 break;
3192 /* If this non-trapping address, e.g. fp + constant, the
3193 equivalent is a better operand since it may let us predict
3194 the value of the comparison. */
3195 else if (!rtx_addr_can_trap_p (p->exp))
3197 arg1 = p->exp;
3198 continue;
3202 /* If we didn't find a useful equivalence for ARG1, we are done.
3203 Otherwise, set up for the next iteration. */
3204 if (x == 0)
3205 break;
3207 /* If we need to reverse the comparison, make sure that that is
3208 possible -- we can't necessarily infer the value of GE from LT
3209 with floating-point operands. */
3210 if (reverse_code)
3212 enum rtx_code reversed = reversed_comparison_code (x, NULL_RTX);
3213 if (reversed == UNKNOWN)
3214 break;
3215 else
3216 code = reversed;
3218 else if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3219 code = GET_CODE (x);
3220 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3223 /* Return our results. Return the modes from before fold_rtx
3224 because fold_rtx might produce const_int, and then it's too late. */
3225 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3226 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3228 return code;
3231 /* If X is a nontrivial arithmetic operation on an argument
3232 for which a constant value can be determined, return
3233 the result of operating on that value, as a constant.
3234 Otherwise, return X, possibly with one or more operands
3235 modified by recursive calls to this function.
3237 If X is a register whose contents are known, we do NOT
3238 return those contents here. equiv_constant is called to
3239 perform that task.
3241 INSN is the insn that we may be modifying. If it is 0, make a copy
3242 of X before modifying it. */
3244 static rtx
3245 fold_rtx (rtx x, rtx insn)
3247 enum rtx_code code;
3248 enum machine_mode mode;
3249 const char *fmt;
3250 int i;
3251 rtx new = 0;
3252 int copied = 0;
3253 int must_swap = 0;
3255 /* Folded equivalents of first two operands of X. */
3256 rtx folded_arg0;
3257 rtx folded_arg1;
3259 /* Constant equivalents of first three operands of X;
3260 0 when no such equivalent is known. */
3261 rtx const_arg0;
3262 rtx const_arg1;
3263 rtx const_arg2;
3265 /* The mode of the first operand of X. We need this for sign and zero
3266 extends. */
3267 enum machine_mode mode_arg0;
3269 if (x == 0)
3270 return x;
3272 mode = GET_MODE (x);
3273 code = GET_CODE (x);
3274 switch (code)
3276 case CONST:
3277 case CONST_INT:
3278 case CONST_DOUBLE:
3279 case CONST_VECTOR:
3280 case SYMBOL_REF:
3281 case LABEL_REF:
3282 case REG:
3283 /* No use simplifying an EXPR_LIST
3284 since they are used only for lists of args
3285 in a function call's REG_EQUAL note. */
3286 case EXPR_LIST:
3287 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3288 want to (e.g.,) make (addressof (const_int 0)) just because
3289 the location is known to be zero. */
3290 case ADDRESSOF:
3291 return x;
3293 #ifdef HAVE_cc0
3294 case CC0:
3295 return prev_insn_cc0;
3296 #endif
3298 case PC:
3299 /* If the next insn is a CODE_LABEL followed by a jump table,
3300 PC's value is a LABEL_REF pointing to that label. That
3301 lets us fold switch statements on the VAX. */
3303 rtx next;
3304 if (insn && tablejump_p (insn, &next, NULL))
3305 return gen_rtx_LABEL_REF (Pmode, next);
3307 break;
3309 case SUBREG:
3310 /* See if we previously assigned a constant value to this SUBREG. */
3311 if ((new = lookup_as_function (x, CONST_INT)) != 0
3312 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3313 return new;
3315 /* If this is a paradoxical SUBREG, we have no idea what value the
3316 extra bits would have. However, if the operand is equivalent
3317 to a SUBREG whose operand is the same as our mode, and all the
3318 modes are within a word, we can just use the inner operand
3319 because these SUBREGs just say how to treat the register.
3321 Similarly if we find an integer constant. */
3323 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3325 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3326 struct table_elt *elt;
3328 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3329 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3330 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3331 imode)) != 0)
3332 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
3334 if (CONSTANT_P (elt->exp)
3335 && GET_MODE (elt->exp) == VOIDmode)
3336 return elt->exp;
3338 if (GET_CODE (elt->exp) == SUBREG
3339 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3340 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3341 return copy_rtx (SUBREG_REG (elt->exp));
3344 return x;
3347 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3348 We might be able to if the SUBREG is extracting a single word in an
3349 integral mode or extracting the low part. */
3351 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3352 const_arg0 = equiv_constant (folded_arg0);
3353 if (const_arg0)
3354 folded_arg0 = const_arg0;
3356 if (folded_arg0 != SUBREG_REG (x))
3358 new = simplify_subreg (mode, folded_arg0,
3359 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
3360 if (new)
3361 return new;
3364 /* If this is a narrowing SUBREG and our operand is a REG, see if
3365 we can find an equivalence for REG that is an arithmetic operation
3366 in a wider mode where both operands are paradoxical SUBREGs
3367 from objects of our result mode. In that case, we couldn't report
3368 an equivalent value for that operation, since we don't know what the
3369 extra bits will be. But we can find an equivalence for this SUBREG
3370 by folding that operation is the narrow mode. This allows us to
3371 fold arithmetic in narrow modes when the machine only supports
3372 word-sized arithmetic.
3374 Also look for a case where we have a SUBREG whose operand is the
3375 same as our result. If both modes are smaller than a word, we
3376 are simply interpreting a register in different modes and we
3377 can use the inner value. */
3379 if (GET_CODE (folded_arg0) == REG
3380 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3381 && subreg_lowpart_p (x))
3383 struct table_elt *elt;
3385 /* We can use HASH here since we know that canon_hash won't be
3386 called. */
3387 elt = lookup (folded_arg0,
3388 HASH (folded_arg0, GET_MODE (folded_arg0)),
3389 GET_MODE (folded_arg0));
3391 if (elt)
3392 elt = elt->first_same_value;
3394 for (; elt; elt = elt->next_same_value)
3396 enum rtx_code eltcode = GET_CODE (elt->exp);
3398 /* Just check for unary and binary operations. */
3399 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3400 && GET_CODE (elt->exp) != SIGN_EXTEND
3401 && GET_CODE (elt->exp) != ZERO_EXTEND
3402 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3403 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode
3404 && (GET_MODE_CLASS (mode)
3405 == GET_MODE_CLASS (GET_MODE (XEXP (elt->exp, 0)))))
3407 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3409 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3410 op0 = fold_rtx (op0, NULL_RTX);
3412 op0 = equiv_constant (op0);
3413 if (op0)
3414 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3415 op0, mode);
3417 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3418 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3419 && eltcode != DIV && eltcode != MOD
3420 && eltcode != UDIV && eltcode != UMOD
3421 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3422 && eltcode != ROTATE && eltcode != ROTATERT
3423 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3424 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3425 == mode))
3426 || CONSTANT_P (XEXP (elt->exp, 0)))
3427 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3428 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3429 == mode))
3430 || CONSTANT_P (XEXP (elt->exp, 1))))
3432 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3433 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3435 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3436 op0 = fold_rtx (op0, NULL_RTX);
3438 if (op0)
3439 op0 = equiv_constant (op0);
3441 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3442 op1 = fold_rtx (op1, NULL_RTX);
3444 if (op1)
3445 op1 = equiv_constant (op1);
3447 /* If we are looking for the low SImode part of
3448 (ashift:DI c (const_int 32)), it doesn't work
3449 to compute that in SImode, because a 32-bit shift
3450 in SImode is unpredictable. We know the value is 0. */
3451 if (op0 && op1
3452 && GET_CODE (elt->exp) == ASHIFT
3453 && GET_CODE (op1) == CONST_INT
3454 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3456 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3458 /* If the count fits in the inner mode's width,
3459 but exceeds the outer mode's width,
3460 the value will get truncated to 0
3461 by the subreg. */
3462 new = const0_rtx;
3463 else
3464 /* If the count exceeds even the inner mode's width,
3465 don't fold this expression. */
3466 new = 0;
3468 else if (op0 && op1)
3469 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3470 op0, op1);
3473 else if (GET_CODE (elt->exp) == SUBREG
3474 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3475 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3476 <= UNITS_PER_WORD)
3477 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3478 new = copy_rtx (SUBREG_REG (elt->exp));
3480 if (new)
3481 return new;
3485 return x;
3487 case NOT:
3488 case NEG:
3489 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3490 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3491 new = lookup_as_function (XEXP (x, 0), code);
3492 if (new)
3493 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3494 break;
3496 case MEM:
3497 /* If we are not actually processing an insn, don't try to find the
3498 best address. Not only don't we care, but we could modify the
3499 MEM in an invalid way since we have no insn to validate against. */
3500 if (insn != 0)
3501 find_best_addr (insn, &XEXP (x, 0), GET_MODE (x));
3504 /* Even if we don't fold in the insn itself,
3505 we can safely do so here, in hopes of getting a constant. */
3506 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3507 rtx base = 0;
3508 HOST_WIDE_INT offset = 0;
3510 if (GET_CODE (addr) == REG
3511 && REGNO_QTY_VALID_P (REGNO (addr)))
3513 int addr_q = REG_QTY (REGNO (addr));
3514 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3516 if (GET_MODE (addr) == addr_ent->mode
3517 && addr_ent->const_rtx != NULL_RTX)
3518 addr = addr_ent->const_rtx;
3521 /* Call target hook to avoid the effects of -fpic etc.... */
3522 addr = targetm.delegitimize_address (addr);
3524 /* If address is constant, split it into a base and integer offset. */
3525 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3526 base = addr;
3527 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3528 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3530 base = XEXP (XEXP (addr, 0), 0);
3531 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3533 else if (GET_CODE (addr) == LO_SUM
3534 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3535 base = XEXP (addr, 1);
3536 else if (GET_CODE (addr) == ADDRESSOF)
3537 return change_address (x, VOIDmode, addr);
3539 /* If this is a constant pool reference, we can fold it into its
3540 constant to allow better value tracking. */
3541 if (base && GET_CODE (base) == SYMBOL_REF
3542 && CONSTANT_POOL_ADDRESS_P (base))
3544 rtx constant = get_pool_constant (base);
3545 enum machine_mode const_mode = get_pool_mode (base);
3546 rtx new;
3548 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3550 constant_pool_entries_cost = COST (constant);
3551 constant_pool_entries_regcost = approx_reg_cost (constant);
3554 /* If we are loading the full constant, we have an equivalence. */
3555 if (offset == 0 && mode == const_mode)
3556 return constant;
3558 /* If this actually isn't a constant (weird!), we can't do
3559 anything. Otherwise, handle the two most common cases:
3560 extracting a word from a multi-word constant, and extracting
3561 the low-order bits. Other cases don't seem common enough to
3562 worry about. */
3563 if (! CONSTANT_P (constant))
3564 return x;
3566 if (GET_MODE_CLASS (mode) == MODE_INT
3567 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3568 && offset % UNITS_PER_WORD == 0
3569 && (new = operand_subword (constant,
3570 offset / UNITS_PER_WORD,
3571 0, const_mode)) != 0)
3572 return new;
3574 if (((BYTES_BIG_ENDIAN
3575 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3576 || (! BYTES_BIG_ENDIAN && offset == 0))
3577 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3578 return new;
3581 /* If this is a reference to a label at a known position in a jump
3582 table, we also know its value. */
3583 if (base && GET_CODE (base) == LABEL_REF)
3585 rtx label = XEXP (base, 0);
3586 rtx table_insn = NEXT_INSN (label);
3588 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3589 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3591 rtx table = PATTERN (table_insn);
3593 if (offset >= 0
3594 && (offset / GET_MODE_SIZE (GET_MODE (table))
3595 < XVECLEN (table, 0)))
3596 return XVECEXP (table, 0,
3597 offset / GET_MODE_SIZE (GET_MODE (table)));
3599 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3600 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3602 rtx table = PATTERN (table_insn);
3604 if (offset >= 0
3605 && (offset / GET_MODE_SIZE (GET_MODE (table))
3606 < XVECLEN (table, 1)))
3608 offset /= GET_MODE_SIZE (GET_MODE (table));
3609 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3610 XEXP (table, 0));
3612 if (GET_MODE (table) != Pmode)
3613 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3615 /* Indicate this is a constant. This isn't a
3616 valid form of CONST, but it will only be used
3617 to fold the next insns and then discarded, so
3618 it should be safe.
3620 Note this expression must be explicitly discarded,
3621 by cse_insn, else it may end up in a REG_EQUAL note
3622 and "escape" to cause problems elsewhere. */
3623 return gen_rtx_CONST (GET_MODE (new), new);
3628 return x;
3631 #ifdef NO_FUNCTION_CSE
3632 case CALL:
3633 if (CONSTANT_P (XEXP (XEXP (x, 0), 0)))
3634 return x;
3635 break;
3636 #endif
3638 case ASM_OPERANDS:
3639 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
3640 validate_change (insn, &ASM_OPERANDS_INPUT (x, i),
3641 fold_rtx (ASM_OPERANDS_INPUT (x, i), insn), 0);
3642 break;
3644 default:
3645 break;
3648 const_arg0 = 0;
3649 const_arg1 = 0;
3650 const_arg2 = 0;
3651 mode_arg0 = VOIDmode;
3653 /* Try folding our operands.
3654 Then see which ones have constant values known. */
3656 fmt = GET_RTX_FORMAT (code);
3657 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3658 if (fmt[i] == 'e')
3660 rtx arg = XEXP (x, i);
3661 rtx folded_arg = arg, const_arg = 0;
3662 enum machine_mode mode_arg = GET_MODE (arg);
3663 rtx cheap_arg, expensive_arg;
3664 rtx replacements[2];
3665 int j;
3666 int old_cost = COST_IN (XEXP (x, i), code);
3668 /* Most arguments are cheap, so handle them specially. */
3669 switch (GET_CODE (arg))
3671 case REG:
3672 /* This is the same as calling equiv_constant; it is duplicated
3673 here for speed. */
3674 if (REGNO_QTY_VALID_P (REGNO (arg)))
3676 int arg_q = REG_QTY (REGNO (arg));
3677 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3679 if (arg_ent->const_rtx != NULL_RTX
3680 && GET_CODE (arg_ent->const_rtx) != REG
3681 && GET_CODE (arg_ent->const_rtx) != PLUS)
3682 const_arg
3683 = gen_lowpart_if_possible (GET_MODE (arg),
3684 arg_ent->const_rtx);
3686 break;
3688 case CONST:
3689 case CONST_INT:
3690 case SYMBOL_REF:
3691 case LABEL_REF:
3692 case CONST_DOUBLE:
3693 case CONST_VECTOR:
3694 const_arg = arg;
3695 break;
3697 #ifdef HAVE_cc0
3698 case CC0:
3699 folded_arg = prev_insn_cc0;
3700 mode_arg = prev_insn_cc0_mode;
3701 const_arg = equiv_constant (folded_arg);
3702 break;
3703 #endif
3705 default:
3706 folded_arg = fold_rtx (arg, insn);
3707 const_arg = equiv_constant (folded_arg);
3710 /* For the first three operands, see if the operand
3711 is constant or equivalent to a constant. */
3712 switch (i)
3714 case 0:
3715 folded_arg0 = folded_arg;
3716 const_arg0 = const_arg;
3717 mode_arg0 = mode_arg;
3718 break;
3719 case 1:
3720 folded_arg1 = folded_arg;
3721 const_arg1 = const_arg;
3722 break;
3723 case 2:
3724 const_arg2 = const_arg;
3725 break;
3728 /* Pick the least expensive of the folded argument and an
3729 equivalent constant argument. */
3730 if (const_arg == 0 || const_arg == folded_arg
3731 || COST_IN (const_arg, code) > COST_IN (folded_arg, code))
3732 cheap_arg = folded_arg, expensive_arg = const_arg;
3733 else
3734 cheap_arg = const_arg, expensive_arg = folded_arg;
3736 /* Try to replace the operand with the cheapest of the two
3737 possibilities. If it doesn't work and this is either of the first
3738 two operands of a commutative operation, try swapping them.
3739 If THAT fails, try the more expensive, provided it is cheaper
3740 than what is already there. */
3742 if (cheap_arg == XEXP (x, i))
3743 continue;
3745 if (insn == 0 && ! copied)
3747 x = copy_rtx (x);
3748 copied = 1;
3751 /* Order the replacements from cheapest to most expensive. */
3752 replacements[0] = cheap_arg;
3753 replacements[1] = expensive_arg;
3755 for (j = 0; j < 2 && replacements[j]; j++)
3757 int new_cost = COST_IN (replacements[j], code);
3759 /* Stop if what existed before was cheaper. Prefer constants
3760 in the case of a tie. */
3761 if (new_cost > old_cost
3762 || (new_cost == old_cost && CONSTANT_P (XEXP (x, i))))
3763 break;
3765 /* It's not safe to substitute the operand of a conversion
3766 operator with a constant, as the conversion's identity
3767 depends upon the mode of it's operand. This optimization
3768 is handled by the call to simplify_unary_operation. */
3769 if (GET_RTX_CLASS (code) == '1'
3770 && GET_MODE (replacements[j]) != mode_arg0
3771 && (code == ZERO_EXTEND
3772 || code == SIGN_EXTEND
3773 || code == TRUNCATE
3774 || code == FLOAT_TRUNCATE
3775 || code == FLOAT_EXTEND
3776 || code == FLOAT
3777 || code == FIX
3778 || code == UNSIGNED_FLOAT
3779 || code == UNSIGNED_FIX))
3780 continue;
3782 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3783 break;
3785 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c'
3786 || code == LTGT || code == UNEQ || code == ORDERED
3787 || code == UNORDERED)
3789 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3790 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3792 if (apply_change_group ())
3794 /* Swap them back to be invalid so that this loop can
3795 continue and flag them to be swapped back later. */
3796 rtx tem;
3798 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3799 XEXP (x, 1) = tem;
3800 must_swap = 1;
3801 break;
3807 else
3809 if (fmt[i] == 'E')
3810 /* Don't try to fold inside of a vector of expressions.
3811 Doing nothing is harmless. */
3815 /* If a commutative operation, place a constant integer as the second
3816 operand unless the first operand is also a constant integer. Otherwise,
3817 place any constant second unless the first operand is also a constant. */
3819 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c'
3820 || code == LTGT || code == UNEQ || code == ORDERED
3821 || code == UNORDERED)
3823 if (must_swap
3824 || swap_commutative_operands_p (const_arg0 ? const_arg0
3825 : XEXP (x, 0),
3826 const_arg1 ? const_arg1
3827 : XEXP (x, 1)))
3829 rtx tem = XEXP (x, 0);
3831 if (insn == 0 && ! copied)
3833 x = copy_rtx (x);
3834 copied = 1;
3837 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3838 validate_change (insn, &XEXP (x, 1), tem, 1);
3839 if (apply_change_group ())
3841 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3842 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3847 /* If X is an arithmetic operation, see if we can simplify it. */
3849 switch (GET_RTX_CLASS (code))
3851 case '1':
3853 int is_const = 0;
3855 /* We can't simplify extension ops unless we know the
3856 original mode. */
3857 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3858 && mode_arg0 == VOIDmode)
3859 break;
3861 /* If we had a CONST, strip it off and put it back later if we
3862 fold. */
3863 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3864 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3866 new = simplify_unary_operation (code, mode,
3867 const_arg0 ? const_arg0 : folded_arg0,
3868 mode_arg0);
3869 if (new != 0 && is_const)
3870 new = gen_rtx_CONST (mode, new);
3872 break;
3874 case '<':
3875 /* Don't perform any simplifications of vector mode comparisons. */
3876 if (VECTOR_MODE_P (mode))
3877 break;
3879 /* See what items are actually being compared and set FOLDED_ARG[01]
3880 to those values and CODE to the actual comparison code. If any are
3881 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3882 do anything if both operands are already known to be constant. */
3884 if (const_arg0 == 0 || const_arg1 == 0)
3886 struct table_elt *p0, *p1;
3887 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
3888 enum machine_mode mode_arg1;
3890 #ifdef FLOAT_STORE_FLAG_VALUE
3891 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3893 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
3894 (FLOAT_STORE_FLAG_VALUE (mode), mode));
3895 false_rtx = CONST0_RTX (mode);
3897 #endif
3899 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3900 &mode_arg0, &mode_arg1);
3901 const_arg0 = equiv_constant (folded_arg0);
3902 const_arg1 = equiv_constant (folded_arg1);
3904 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3905 what kinds of things are being compared, so we can't do
3906 anything with this comparison. */
3908 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3909 break;
3911 /* If we do not now have two constants being compared, see
3912 if we can nevertheless deduce some things about the
3913 comparison. */
3914 if (const_arg0 == 0 || const_arg1 == 0)
3916 /* Some addresses are known to be nonzero. We don't know
3917 their sign, but equality comparisons are known. */
3918 if (const_arg1 == const0_rtx
3919 && nonzero_address_p (folded_arg0))
3921 if (code == EQ)
3922 return false_rtx;
3923 else if (code == NE)
3924 return true_rtx;
3927 /* See if the two operands are the same. */
3929 if (folded_arg0 == folded_arg1
3930 || (GET_CODE (folded_arg0) == REG
3931 && GET_CODE (folded_arg1) == REG
3932 && (REG_QTY (REGNO (folded_arg0))
3933 == REG_QTY (REGNO (folded_arg1))))
3934 || ((p0 = lookup (folded_arg0,
3935 (safe_hash (folded_arg0, mode_arg0)
3936 & HASH_MASK), mode_arg0))
3937 && (p1 = lookup (folded_arg1,
3938 (safe_hash (folded_arg1, mode_arg0)
3939 & HASH_MASK), mode_arg0))
3940 && p0->first_same_value == p1->first_same_value))
3942 /* Sadly two equal NaNs are not equivalent. */
3943 if (!HONOR_NANS (mode_arg0))
3944 return ((code == EQ || code == LE || code == GE
3945 || code == LEU || code == GEU || code == UNEQ
3946 || code == UNLE || code == UNGE
3947 || code == ORDERED)
3948 ? true_rtx : false_rtx);
3949 /* Take care for the FP compares we can resolve. */
3950 if (code == UNEQ || code == UNLE || code == UNGE)
3951 return true_rtx;
3952 if (code == LTGT || code == LT || code == GT)
3953 return false_rtx;
3956 /* If FOLDED_ARG0 is a register, see if the comparison we are
3957 doing now is either the same as we did before or the reverse
3958 (we only check the reverse if not floating-point). */
3959 else if (GET_CODE (folded_arg0) == REG)
3961 int qty = REG_QTY (REGNO (folded_arg0));
3963 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3965 struct qty_table_elem *ent = &qty_table[qty];
3967 if ((comparison_dominates_p (ent->comparison_code, code)
3968 || (! FLOAT_MODE_P (mode_arg0)
3969 && comparison_dominates_p (ent->comparison_code,
3970 reverse_condition (code))))
3971 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3972 || (const_arg1
3973 && rtx_equal_p (ent->comparison_const,
3974 const_arg1))
3975 || (GET_CODE (folded_arg1) == REG
3976 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3977 return (comparison_dominates_p (ent->comparison_code, code)
3978 ? true_rtx : false_rtx);
3984 /* If we are comparing against zero, see if the first operand is
3985 equivalent to an IOR with a constant. If so, we may be able to
3986 determine the result of this comparison. */
3988 if (const_arg1 == const0_rtx)
3990 rtx y = lookup_as_function (folded_arg0, IOR);
3991 rtx inner_const;
3993 if (y != 0
3994 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3995 && GET_CODE (inner_const) == CONST_INT
3996 && INTVAL (inner_const) != 0)
3998 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3999 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
4000 && (INTVAL (inner_const)
4001 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
4002 rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
4004 #ifdef FLOAT_STORE_FLAG_VALUE
4005 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
4007 true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
4008 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4009 false_rtx = CONST0_RTX (mode);
4011 #endif
4013 switch (code)
4015 case EQ:
4016 return false_rtx;
4017 case NE:
4018 return true_rtx;
4019 case LT: case LE:
4020 if (has_sign)
4021 return true_rtx;
4022 break;
4023 case GT: case GE:
4024 if (has_sign)
4025 return false_rtx;
4026 break;
4027 default:
4028 break;
4033 new = simplify_relational_operation (code,
4034 (mode_arg0 != VOIDmode
4035 ? mode_arg0
4036 : (GET_MODE (const_arg0
4037 ? const_arg0
4038 : folded_arg0)
4039 != VOIDmode)
4040 ? GET_MODE (const_arg0
4041 ? const_arg0
4042 : folded_arg0)
4043 : GET_MODE (const_arg1
4044 ? const_arg1
4045 : folded_arg1)),
4046 const_arg0 ? const_arg0 : folded_arg0,
4047 const_arg1 ? const_arg1 : folded_arg1);
4048 #ifdef FLOAT_STORE_FLAG_VALUE
4049 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
4051 if (new == const0_rtx)
4052 new = CONST0_RTX (mode);
4053 else
4054 new = (CONST_DOUBLE_FROM_REAL_VALUE
4055 (FLOAT_STORE_FLAG_VALUE (mode), mode));
4057 #endif
4058 break;
4060 case '2':
4061 case 'c':
4062 switch (code)
4064 case PLUS:
4065 /* If the second operand is a LABEL_REF, see if the first is a MINUS
4066 with that LABEL_REF as its second operand. If so, the result is
4067 the first operand of that MINUS. This handles switches with an
4068 ADDR_DIFF_VEC table. */
4069 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4071 rtx y
4072 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
4073 : lookup_as_function (folded_arg0, MINUS);
4075 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4076 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4077 return XEXP (y, 0);
4079 /* Now try for a CONST of a MINUS like the above. */
4080 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
4081 : lookup_as_function (folded_arg0, CONST))) != 0
4082 && GET_CODE (XEXP (y, 0)) == MINUS
4083 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4084 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg1, 0))
4085 return XEXP (XEXP (y, 0), 0);
4088 /* Likewise if the operands are in the other order. */
4089 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
4091 rtx y
4092 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
4093 : lookup_as_function (folded_arg1, MINUS);
4095 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4096 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
4097 return XEXP (y, 0);
4099 /* Now try for a CONST of a MINUS like the above. */
4100 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
4101 : lookup_as_function (folded_arg1, CONST))) != 0
4102 && GET_CODE (XEXP (y, 0)) == MINUS
4103 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
4104 && XEXP (XEXP (XEXP (y, 0), 1), 0) == XEXP (const_arg0, 0))
4105 return XEXP (XEXP (y, 0), 0);
4108 /* If second operand is a register equivalent to a negative
4109 CONST_INT, see if we can find a register equivalent to the
4110 positive constant. Make a MINUS if so. Don't do this for
4111 a non-negative constant since we might then alternate between
4112 choosing positive and negative constants. Having the positive
4113 constant previously-used is the more common case. Be sure
4114 the resulting constant is non-negative; if const_arg1 were
4115 the smallest negative number this would overflow: depending
4116 on the mode, this would either just be the same value (and
4117 hence not save anything) or be incorrect. */
4118 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
4119 && INTVAL (const_arg1) < 0
4120 /* This used to test
4122 -INTVAL (const_arg1) >= 0
4124 But The Sun V5.0 compilers mis-compiled that test. So
4125 instead we test for the problematic value in a more direct
4126 manner and hope the Sun compilers get it correct. */
4127 && INTVAL (const_arg1) !=
4128 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
4129 && GET_CODE (folded_arg1) == REG)
4131 rtx new_const = GEN_INT (-INTVAL (const_arg1));
4132 struct table_elt *p
4133 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
4134 mode);
4136 if (p)
4137 for (p = p->first_same_value; p; p = p->next_same_value)
4138 if (GET_CODE (p->exp) == REG)
4139 return simplify_gen_binary (MINUS, mode, folded_arg0,
4140 canon_reg (p->exp, NULL_RTX));
4142 goto from_plus;
4144 case MINUS:
4145 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
4146 If so, produce (PLUS Z C2-C). */
4147 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
4149 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
4150 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
4151 return fold_rtx (plus_constant (copy_rtx (y),
4152 -INTVAL (const_arg1)),
4153 NULL_RTX);
4156 /* Fall through. */
4158 from_plus:
4159 case SMIN: case SMAX: case UMIN: case UMAX:
4160 case IOR: case AND: case XOR:
4161 case MULT:
4162 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4163 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4164 is known to be of similar form, we may be able to replace the
4165 operation with a combined operation. This may eliminate the
4166 intermediate operation if every use is simplified in this way.
4167 Note that the similar optimization done by combine.c only works
4168 if the intermediate operation's result has only one reference. */
4170 if (GET_CODE (folded_arg0) == REG
4171 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4173 int is_shift
4174 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4175 rtx y = lookup_as_function (folded_arg0, code);
4176 rtx inner_const;
4177 enum rtx_code associate_code;
4178 rtx new_const;
4180 if (y == 0
4181 || 0 == (inner_const
4182 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4183 || GET_CODE (inner_const) != CONST_INT
4184 /* If we have compiled a statement like
4185 "if (x == (x & mask1))", and now are looking at
4186 "x & mask2", we will have a case where the first operand
4187 of Y is the same as our first operand. Unless we detect
4188 this case, an infinite loop will result. */
4189 || XEXP (y, 0) == folded_arg0)
4190 break;
4192 /* Don't associate these operations if they are a PLUS with the
4193 same constant and it is a power of two. These might be doable
4194 with a pre- or post-increment. Similarly for two subtracts of
4195 identical powers of two with post decrement. */
4197 if (code == PLUS && const_arg1 == inner_const
4198 && ((HAVE_PRE_INCREMENT
4199 && exact_log2 (INTVAL (const_arg1)) >= 0)
4200 || (HAVE_POST_INCREMENT
4201 && exact_log2 (INTVAL (const_arg1)) >= 0)
4202 || (HAVE_PRE_DECREMENT
4203 && exact_log2 (- INTVAL (const_arg1)) >= 0)
4204 || (HAVE_POST_DECREMENT
4205 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
4206 break;
4208 /* Compute the code used to compose the constants. For example,
4209 A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. */
4211 associate_code = (is_shift || code == MINUS ? PLUS : code);
4213 new_const = simplify_binary_operation (associate_code, mode,
4214 const_arg1, inner_const);
4216 if (new_const == 0)
4217 break;
4219 /* If we are associating shift operations, don't let this
4220 produce a shift of the size of the object or larger.
4221 This could occur when we follow a sign-extend by a right
4222 shift on a machine that does a sign-extend as a pair
4223 of shifts. */
4225 if (is_shift && GET_CODE (new_const) == CONST_INT
4226 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
4228 /* As an exception, we can turn an ASHIFTRT of this
4229 form into a shift of the number of bits - 1. */
4230 if (code == ASHIFTRT)
4231 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
4232 else
4233 break;
4236 y = copy_rtx (XEXP (y, 0));
4238 /* If Y contains our first operand (the most common way this
4239 can happen is if Y is a MEM), we would do into an infinite
4240 loop if we tried to fold it. So don't in that case. */
4242 if (! reg_mentioned_p (folded_arg0, y))
4243 y = fold_rtx (y, insn);
4245 return simplify_gen_binary (code, mode, y, new_const);
4247 break;
4249 case DIV: case UDIV:
4250 /* ??? The associative optimization performed immediately above is
4251 also possible for DIV and UDIV using associate_code of MULT.
4252 However, we would need extra code to verify that the
4253 multiplication does not overflow, that is, there is no overflow
4254 in the calculation of new_const. */
4255 break;
4257 default:
4258 break;
4261 new = simplify_binary_operation (code, mode,
4262 const_arg0 ? const_arg0 : folded_arg0,
4263 const_arg1 ? const_arg1 : folded_arg1);
4264 break;
4266 case 'o':
4267 /* (lo_sum (high X) X) is simply X. */
4268 if (code == LO_SUM && const_arg0 != 0
4269 && GET_CODE (const_arg0) == HIGH
4270 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4271 return const_arg1;
4272 break;
4274 case '3':
4275 case 'b':
4276 new = simplify_ternary_operation (code, mode, mode_arg0,
4277 const_arg0 ? const_arg0 : folded_arg0,
4278 const_arg1 ? const_arg1 : folded_arg1,
4279 const_arg2 ? const_arg2 : XEXP (x, 2));
4280 break;
4282 case 'x':
4283 /* Eliminate CONSTANT_P_RTX if its constant. */
4284 if (code == CONSTANT_P_RTX)
4286 if (const_arg0)
4287 return const1_rtx;
4288 if (optimize == 0 || !flag_gcse)
4289 return const0_rtx;
4291 break;
4294 return new ? new : x;
4297 /* Return a constant value currently equivalent to X.
4298 Return 0 if we don't know one. */
4300 static rtx
4301 equiv_constant (rtx x)
4303 if (GET_CODE (x) == REG
4304 && REGNO_QTY_VALID_P (REGNO (x)))
4306 int x_q = REG_QTY (REGNO (x));
4307 struct qty_table_elem *x_ent = &qty_table[x_q];
4309 if (x_ent->const_rtx)
4310 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4313 if (x == 0 || CONSTANT_P (x))
4314 return x;
4316 /* If X is a MEM, try to fold it outside the context of any insn to see if
4317 it might be equivalent to a constant. That handles the case where it
4318 is a constant-pool reference. Then try to look it up in the hash table
4319 in case it is something whose value we have seen before. */
4321 if (GET_CODE (x) == MEM)
4323 struct table_elt *elt;
4325 x = fold_rtx (x, NULL_RTX);
4326 if (CONSTANT_P (x))
4327 return x;
4329 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4330 if (elt == 0)
4331 return 0;
4333 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4334 if (elt->is_const && CONSTANT_P (elt->exp))
4335 return elt->exp;
4338 return 0;
4341 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4342 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4343 least-significant part of X.
4344 MODE specifies how big a part of X to return.
4346 If the requested operation cannot be done, 0 is returned.
4348 This is similar to gen_lowpart in emit-rtl.c. */
4351 gen_lowpart_if_possible (enum machine_mode mode, rtx x)
4353 rtx result = gen_lowpart_common (mode, x);
4355 if (result)
4356 return result;
4357 else if (GET_CODE (x) == MEM)
4359 /* This is the only other case we handle. */
4360 int offset = 0;
4361 rtx new;
4363 if (WORDS_BIG_ENDIAN)
4364 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4365 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4366 if (BYTES_BIG_ENDIAN)
4367 /* Adjust the address so that the address-after-the-data is
4368 unchanged. */
4369 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4370 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4372 new = adjust_address_nv (x, mode, offset);
4373 if (! memory_address_p (mode, XEXP (new, 0)))
4374 return 0;
4376 return new;
4378 else
4379 return 0;
4382 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4383 branch. It will be zero if not.
4385 In certain cases, this can cause us to add an equivalence. For example,
4386 if we are following the taken case of
4387 if (i == 2)
4388 we can add the fact that `i' and '2' are now equivalent.
4390 In any case, we can record that this comparison was passed. If the same
4391 comparison is seen later, we will know its value. */
4393 static void
4394 record_jump_equiv (rtx insn, int taken)
4396 int cond_known_true;
4397 rtx op0, op1;
4398 rtx set;
4399 enum machine_mode mode, mode0, mode1;
4400 int reversed_nonequality = 0;
4401 enum rtx_code code;
4403 /* Ensure this is the right kind of insn. */
4404 if (! any_condjump_p (insn))
4405 return;
4406 set = pc_set (insn);
4408 /* See if this jump condition is known true or false. */
4409 if (taken)
4410 cond_known_true = (XEXP (SET_SRC (set), 2) == pc_rtx);
4411 else
4412 cond_known_true = (XEXP (SET_SRC (set), 1) == pc_rtx);
4414 /* Get the type of comparison being done and the operands being compared.
4415 If we had to reverse a non-equality condition, record that fact so we
4416 know that it isn't valid for floating-point. */
4417 code = GET_CODE (XEXP (SET_SRC (set), 0));
4418 op0 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 0), insn);
4419 op1 = fold_rtx (XEXP (XEXP (SET_SRC (set), 0), 1), insn);
4421 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4422 if (! cond_known_true)
4424 code = reversed_comparison_code_parts (code, op0, op1, insn);
4426 /* Don't remember if we can't find the inverse. */
4427 if (code == UNKNOWN)
4428 return;
4431 /* The mode is the mode of the non-constant. */
4432 mode = mode0;
4433 if (mode1 != VOIDmode)
4434 mode = mode1;
4436 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4439 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4440 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4441 Make any useful entries we can with that information. Called from
4442 above function and called recursively. */
4444 static void
4445 record_jump_cond (enum rtx_code code, enum machine_mode mode, rtx op0,
4446 rtx op1, int reversed_nonequality)
4448 unsigned op0_hash, op1_hash;
4449 int op0_in_memory, op1_in_memory;
4450 struct table_elt *op0_elt, *op1_elt;
4452 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4453 we know that they are also equal in the smaller mode (this is also
4454 true for all smaller modes whether or not there is a SUBREG, but
4455 is not worth testing for with no SUBREG). */
4457 /* Note that GET_MODE (op0) may not equal MODE. */
4458 if (code == EQ && GET_CODE (op0) == SUBREG
4459 && (GET_MODE_SIZE (GET_MODE (op0))
4460 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4462 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4463 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4465 record_jump_cond (code, mode, SUBREG_REG (op0),
4466 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4467 reversed_nonequality);
4470 if (code == EQ && GET_CODE (op1) == SUBREG
4471 && (GET_MODE_SIZE (GET_MODE (op1))
4472 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4474 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4475 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4477 record_jump_cond (code, mode, SUBREG_REG (op1),
4478 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4479 reversed_nonequality);
4482 /* Similarly, if this is an NE comparison, and either is a SUBREG
4483 making a smaller mode, we know the whole thing is also NE. */
4485 /* Note that GET_MODE (op0) may not equal MODE;
4486 if we test MODE instead, we can get an infinite recursion
4487 alternating between two modes each wider than MODE. */
4489 if (code == NE && GET_CODE (op0) == SUBREG
4490 && subreg_lowpart_p (op0)
4491 && (GET_MODE_SIZE (GET_MODE (op0))
4492 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4494 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4495 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4497 record_jump_cond (code, mode, SUBREG_REG (op0),
4498 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4499 reversed_nonequality);
4502 if (code == NE && GET_CODE (op1) == SUBREG
4503 && subreg_lowpart_p (op1)
4504 && (GET_MODE_SIZE (GET_MODE (op1))
4505 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4507 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4508 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4510 record_jump_cond (code, mode, SUBREG_REG (op1),
4511 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4512 reversed_nonequality);
4515 /* Hash both operands. */
4517 do_not_record = 0;
4518 hash_arg_in_memory = 0;
4519 op0_hash = HASH (op0, mode);
4520 op0_in_memory = hash_arg_in_memory;
4522 if (do_not_record)
4523 return;
4525 do_not_record = 0;
4526 hash_arg_in_memory = 0;
4527 op1_hash = HASH (op1, mode);
4528 op1_in_memory = hash_arg_in_memory;
4530 if (do_not_record)
4531 return;
4533 /* Look up both operands. */
4534 op0_elt = lookup (op0, op0_hash, mode);
4535 op1_elt = lookup (op1, op1_hash, mode);
4537 /* If both operands are already equivalent or if they are not in the
4538 table but are identical, do nothing. */
4539 if ((op0_elt != 0 && op1_elt != 0
4540 && op0_elt->first_same_value == op1_elt->first_same_value)
4541 || op0 == op1 || rtx_equal_p (op0, op1))
4542 return;
4544 /* If we aren't setting two things equal all we can do is save this
4545 comparison. Similarly if this is floating-point. In the latter
4546 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4547 If we record the equality, we might inadvertently delete code
4548 whose intent was to change -0 to +0. */
4550 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4552 struct qty_table_elem *ent;
4553 int qty;
4555 /* If we reversed a floating-point comparison, if OP0 is not a
4556 register, or if OP1 is neither a register or constant, we can't
4557 do anything. */
4559 if (GET_CODE (op1) != REG)
4560 op1 = equiv_constant (op1);
4562 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4563 || GET_CODE (op0) != REG || op1 == 0)
4564 return;
4566 /* Put OP0 in the hash table if it isn't already. This gives it a
4567 new quantity number. */
4568 if (op0_elt == 0)
4570 if (insert_regs (op0, NULL, 0))
4572 rehash_using_reg (op0);
4573 op0_hash = HASH (op0, mode);
4575 /* If OP0 is contained in OP1, this changes its hash code
4576 as well. Faster to rehash than to check, except
4577 for the simple case of a constant. */
4578 if (! CONSTANT_P (op1))
4579 op1_hash = HASH (op1,mode);
4582 op0_elt = insert (op0, NULL, op0_hash, mode);
4583 op0_elt->in_memory = op0_in_memory;
4586 qty = REG_QTY (REGNO (op0));
4587 ent = &qty_table[qty];
4589 ent->comparison_code = code;
4590 if (GET_CODE (op1) == REG)
4592 /* Look it up again--in case op0 and op1 are the same. */
4593 op1_elt = lookup (op1, op1_hash, mode);
4595 /* Put OP1 in the hash table so it gets a new quantity number. */
4596 if (op1_elt == 0)
4598 if (insert_regs (op1, NULL, 0))
4600 rehash_using_reg (op1);
4601 op1_hash = HASH (op1, mode);
4604 op1_elt = insert (op1, NULL, op1_hash, mode);
4605 op1_elt->in_memory = op1_in_memory;
4608 ent->comparison_const = NULL_RTX;
4609 ent->comparison_qty = REG_QTY (REGNO (op1));
4611 else
4613 ent->comparison_const = op1;
4614 ent->comparison_qty = -1;
4617 return;
4620 /* If either side is still missing an equivalence, make it now,
4621 then merge the equivalences. */
4623 if (op0_elt == 0)
4625 if (insert_regs (op0, NULL, 0))
4627 rehash_using_reg (op0);
4628 op0_hash = HASH (op0, mode);
4631 op0_elt = insert (op0, NULL, op0_hash, mode);
4632 op0_elt->in_memory = op0_in_memory;
4635 if (op1_elt == 0)
4637 if (insert_regs (op1, NULL, 0))
4639 rehash_using_reg (op1);
4640 op1_hash = HASH (op1, mode);
4643 op1_elt = insert (op1, NULL, op1_hash, mode);
4644 op1_elt->in_memory = op1_in_memory;
4647 merge_equiv_classes (op0_elt, op1_elt);
4648 last_jump_equiv_class = op0_elt;
4651 /* CSE processing for one instruction.
4652 First simplify sources and addresses of all assignments
4653 in the instruction, using previously-computed equivalents values.
4654 Then install the new sources and destinations in the table
4655 of available values.
4657 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4658 the insn. It means that INSN is inside libcall block. In this
4659 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4661 /* Data on one SET contained in the instruction. */
4663 struct set
4665 /* The SET rtx itself. */
4666 rtx rtl;
4667 /* The SET_SRC of the rtx (the original value, if it is changing). */
4668 rtx src;
4669 /* The hash-table element for the SET_SRC of the SET. */
4670 struct table_elt *src_elt;
4671 /* Hash value for the SET_SRC. */
4672 unsigned src_hash;
4673 /* Hash value for the SET_DEST. */
4674 unsigned dest_hash;
4675 /* The SET_DEST, with SUBREG, etc., stripped. */
4676 rtx inner_dest;
4677 /* Nonzero if the SET_SRC is in memory. */
4678 char src_in_memory;
4679 /* Nonzero if the SET_SRC contains something
4680 whose value cannot be predicted and understood. */
4681 char src_volatile;
4682 /* Original machine mode, in case it becomes a CONST_INT.
4683 The size of this field should match the size of the mode
4684 field of struct rtx_def (see rtl.h). */
4685 ENUM_BITFIELD(machine_mode) mode : 8;
4686 /* A constant equivalent for SET_SRC, if any. */
4687 rtx src_const;
4688 /* Original SET_SRC value used for libcall notes. */
4689 rtx orig_src;
4690 /* Hash value of constant equivalent for SET_SRC. */
4691 unsigned src_const_hash;
4692 /* Table entry for constant equivalent for SET_SRC, if any. */
4693 struct table_elt *src_const_elt;
4696 static void
4697 cse_insn (rtx insn, rtx libcall_insn)
4699 rtx x = PATTERN (insn);
4700 int i;
4701 rtx tem;
4702 int n_sets = 0;
4704 #ifdef HAVE_cc0
4705 /* Records what this insn does to set CC0. */
4706 rtx this_insn_cc0 = 0;
4707 enum machine_mode this_insn_cc0_mode = VOIDmode;
4708 #endif
4710 rtx src_eqv = 0;
4711 struct table_elt *src_eqv_elt = 0;
4712 int src_eqv_volatile = 0;
4713 int src_eqv_in_memory = 0;
4714 unsigned src_eqv_hash = 0;
4716 struct set *sets = (struct set *) 0;
4718 this_insn = insn;
4720 /* Find all the SETs and CLOBBERs in this instruction.
4721 Record all the SETs in the array `set' and count them.
4722 Also determine whether there is a CLOBBER that invalidates
4723 all memory references, or all references at varying addresses. */
4725 if (GET_CODE (insn) == CALL_INSN)
4727 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4729 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4730 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4731 XEXP (tem, 0) = canon_reg (XEXP (tem, 0), insn);
4735 if (GET_CODE (x) == SET)
4737 sets = alloca (sizeof (struct set));
4738 sets[0].rtl = x;
4740 /* Ignore SETs that are unconditional jumps.
4741 They never need cse processing, so this does not hurt.
4742 The reason is not efficiency but rather
4743 so that we can test at the end for instructions
4744 that have been simplified to unconditional jumps
4745 and not be misled by unchanged instructions
4746 that were unconditional jumps to begin with. */
4747 if (SET_DEST (x) == pc_rtx
4748 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4751 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4752 The hard function value register is used only once, to copy to
4753 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4754 Ensure we invalidate the destination register. On the 80386 no
4755 other code would invalidate it since it is a fixed_reg.
4756 We need not check the return of apply_change_group; see canon_reg. */
4758 else if (GET_CODE (SET_SRC (x)) == CALL)
4760 canon_reg (SET_SRC (x), insn);
4761 apply_change_group ();
4762 fold_rtx (SET_SRC (x), insn);
4763 invalidate (SET_DEST (x), VOIDmode);
4765 else
4766 n_sets = 1;
4768 else if (GET_CODE (x) == PARALLEL)
4770 int lim = XVECLEN (x, 0);
4772 sets = alloca (lim * sizeof (struct set));
4774 /* Find all regs explicitly clobbered in this insn,
4775 and ensure they are not replaced with any other regs
4776 elsewhere in this insn.
4777 When a reg that is clobbered is also used for input,
4778 we should presume that that is for a reason,
4779 and we should not substitute some other register
4780 which is not supposed to be clobbered.
4781 Therefore, this loop cannot be merged into the one below
4782 because a CALL may precede a CLOBBER and refer to the
4783 value clobbered. We must not let a canonicalization do
4784 anything in that case. */
4785 for (i = 0; i < lim; i++)
4787 rtx y = XVECEXP (x, 0, i);
4788 if (GET_CODE (y) == CLOBBER)
4790 rtx clobbered = XEXP (y, 0);
4792 if (GET_CODE (clobbered) == REG
4793 || GET_CODE (clobbered) == SUBREG)
4794 invalidate (clobbered, VOIDmode);
4795 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4796 || GET_CODE (clobbered) == ZERO_EXTRACT)
4797 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4801 for (i = 0; i < lim; i++)
4803 rtx y = XVECEXP (x, 0, i);
4804 if (GET_CODE (y) == SET)
4806 /* As above, we ignore unconditional jumps and call-insns and
4807 ignore the result of apply_change_group. */
4808 if (GET_CODE (SET_SRC (y)) == CALL)
4810 canon_reg (SET_SRC (y), insn);
4811 apply_change_group ();
4812 fold_rtx (SET_SRC (y), insn);
4813 invalidate (SET_DEST (y), VOIDmode);
4815 else if (SET_DEST (y) == pc_rtx
4816 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4818 else
4819 sets[n_sets++].rtl = y;
4821 else if (GET_CODE (y) == CLOBBER)
4823 /* If we clobber memory, canon the address.
4824 This does nothing when a register is clobbered
4825 because we have already invalidated the reg. */
4826 if (GET_CODE (XEXP (y, 0)) == MEM)
4827 canon_reg (XEXP (y, 0), NULL_RTX);
4829 else if (GET_CODE (y) == USE
4830 && ! (GET_CODE (XEXP (y, 0)) == REG
4831 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4832 canon_reg (y, NULL_RTX);
4833 else if (GET_CODE (y) == CALL)
4835 /* The result of apply_change_group can be ignored; see
4836 canon_reg. */
4837 canon_reg (y, insn);
4838 apply_change_group ();
4839 fold_rtx (y, insn);
4843 else if (GET_CODE (x) == CLOBBER)
4845 if (GET_CODE (XEXP (x, 0)) == MEM)
4846 canon_reg (XEXP (x, 0), NULL_RTX);
4849 /* Canonicalize a USE of a pseudo register or memory location. */
4850 else if (GET_CODE (x) == USE
4851 && ! (GET_CODE (XEXP (x, 0)) == REG
4852 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4853 canon_reg (XEXP (x, 0), NULL_RTX);
4854 else if (GET_CODE (x) == CALL)
4856 /* The result of apply_change_group can be ignored; see canon_reg. */
4857 canon_reg (x, insn);
4858 apply_change_group ();
4859 fold_rtx (x, insn);
4862 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4863 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4864 is handled specially for this case, and if it isn't set, then there will
4865 be no equivalence for the destination. */
4866 if (n_sets == 1 && REG_NOTES (insn) != 0
4867 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4868 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4869 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4871 src_eqv = fold_rtx (canon_reg (XEXP (tem, 0), NULL_RTX), insn);
4872 XEXP (tem, 0) = src_eqv;
4875 /* Canonicalize sources and addresses of destinations.
4876 We do this in a separate pass to avoid problems when a MATCH_DUP is
4877 present in the insn pattern. In that case, we want to ensure that
4878 we don't break the duplicate nature of the pattern. So we will replace
4879 both operands at the same time. Otherwise, we would fail to find an
4880 equivalent substitution in the loop calling validate_change below.
4882 We used to suppress canonicalization of DEST if it appears in SRC,
4883 but we don't do this any more. */
4885 for (i = 0; i < n_sets; i++)
4887 rtx dest = SET_DEST (sets[i].rtl);
4888 rtx src = SET_SRC (sets[i].rtl);
4889 rtx new = canon_reg (src, insn);
4890 int insn_code;
4892 sets[i].orig_src = src;
4893 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4894 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4895 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4896 || (insn_code = recog_memoized (insn)) < 0
4897 || insn_data[insn_code].n_dups > 0)
4898 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4899 else
4900 SET_SRC (sets[i].rtl) = new;
4902 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4904 validate_change (insn, &XEXP (dest, 1),
4905 canon_reg (XEXP (dest, 1), insn), 1);
4906 validate_change (insn, &XEXP (dest, 2),
4907 canon_reg (XEXP (dest, 2), insn), 1);
4910 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4911 || GET_CODE (dest) == ZERO_EXTRACT
4912 || GET_CODE (dest) == SIGN_EXTRACT)
4913 dest = XEXP (dest, 0);
4915 if (GET_CODE (dest) == MEM)
4916 canon_reg (dest, insn);
4919 /* Now that we have done all the replacements, we can apply the change
4920 group and see if they all work. Note that this will cause some
4921 canonicalizations that would have worked individually not to be applied
4922 because some other canonicalization didn't work, but this should not
4923 occur often.
4925 The result of apply_change_group can be ignored; see canon_reg. */
4927 apply_change_group ();
4929 /* Set sets[i].src_elt to the class each source belongs to.
4930 Detect assignments from or to volatile things
4931 and set set[i] to zero so they will be ignored
4932 in the rest of this function.
4934 Nothing in this loop changes the hash table or the register chains. */
4936 for (i = 0; i < n_sets; i++)
4938 rtx src, dest;
4939 rtx src_folded;
4940 struct table_elt *elt = 0, *p;
4941 enum machine_mode mode;
4942 rtx src_eqv_here;
4943 rtx src_const = 0;
4944 rtx src_related = 0;
4945 struct table_elt *src_const_elt = 0;
4946 int src_cost = MAX_COST;
4947 int src_eqv_cost = MAX_COST;
4948 int src_folded_cost = MAX_COST;
4949 int src_related_cost = MAX_COST;
4950 int src_elt_cost = MAX_COST;
4951 int src_regcost = MAX_COST;
4952 int src_eqv_regcost = MAX_COST;
4953 int src_folded_regcost = MAX_COST;
4954 int src_related_regcost = MAX_COST;
4955 int src_elt_regcost = MAX_COST;
4956 /* Set nonzero if we need to call force_const_mem on with the
4957 contents of src_folded before using it. */
4958 int src_folded_force_flag = 0;
4960 dest = SET_DEST (sets[i].rtl);
4961 src = SET_SRC (sets[i].rtl);
4963 /* If SRC is a constant that has no machine mode,
4964 hash it with the destination's machine mode.
4965 This way we can keep different modes separate. */
4967 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4968 sets[i].mode = mode;
4970 if (src_eqv)
4972 enum machine_mode eqvmode = mode;
4973 if (GET_CODE (dest) == STRICT_LOW_PART)
4974 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4975 do_not_record = 0;
4976 hash_arg_in_memory = 0;
4977 src_eqv_hash = HASH (src_eqv, eqvmode);
4979 /* Find the equivalence class for the equivalent expression. */
4981 if (!do_not_record)
4982 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4984 src_eqv_volatile = do_not_record;
4985 src_eqv_in_memory = hash_arg_in_memory;
4988 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4989 value of the INNER register, not the destination. So it is not
4990 a valid substitution for the source. But save it for later. */
4991 if (GET_CODE (dest) == STRICT_LOW_PART)
4992 src_eqv_here = 0;
4993 else
4994 src_eqv_here = src_eqv;
4996 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4997 simplified result, which may not necessarily be valid. */
4998 src_folded = fold_rtx (src, insn);
5000 #if 0
5001 /* ??? This caused bad code to be generated for the m68k port with -O2.
5002 Suppose src is (CONST_INT -1), and that after truncation src_folded
5003 is (CONST_INT 3). Suppose src_folded is then used for src_const.
5004 At the end we will add src and src_const to the same equivalence
5005 class. We now have 3 and -1 on the same equivalence class. This
5006 causes later instructions to be mis-optimized. */
5007 /* If storing a constant in a bitfield, pre-truncate the constant
5008 so we will be able to record it later. */
5009 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5010 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5012 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5014 if (GET_CODE (src) == CONST_INT
5015 && GET_CODE (width) == CONST_INT
5016 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5017 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5018 src_folded
5019 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
5020 << INTVAL (width)) - 1));
5022 #endif
5024 /* Compute SRC's hash code, and also notice if it
5025 should not be recorded at all. In that case,
5026 prevent any further processing of this assignment. */
5027 do_not_record = 0;
5028 hash_arg_in_memory = 0;
5030 sets[i].src = src;
5031 sets[i].src_hash = HASH (src, mode);
5032 sets[i].src_volatile = do_not_record;
5033 sets[i].src_in_memory = hash_arg_in_memory;
5035 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
5036 a pseudo, do not record SRC. Using SRC as a replacement for
5037 anything else will be incorrect in that situation. Note that
5038 this usually occurs only for stack slots, in which case all the
5039 RTL would be referring to SRC, so we don't lose any optimization
5040 opportunities by not having SRC in the hash table. */
5042 if (GET_CODE (src) == MEM
5043 && find_reg_note (insn, REG_EQUIV, NULL_RTX) != 0
5044 && GET_CODE (dest) == REG
5045 && REGNO (dest) >= FIRST_PSEUDO_REGISTER)
5046 sets[i].src_volatile = 1;
5048 #if 0
5049 /* It is no longer clear why we used to do this, but it doesn't
5050 appear to still be needed. So let's try without it since this
5051 code hurts cse'ing widened ops. */
5052 /* If source is a perverse subreg (such as QI treated as an SI),
5053 treat it as volatile. It may do the work of an SI in one context
5054 where the extra bits are not being used, but cannot replace an SI
5055 in general. */
5056 if (GET_CODE (src) == SUBREG
5057 && (GET_MODE_SIZE (GET_MODE (src))
5058 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5059 sets[i].src_volatile = 1;
5060 #endif
5062 /* Locate all possible equivalent forms for SRC. Try to replace
5063 SRC in the insn with each cheaper equivalent.
5065 We have the following types of equivalents: SRC itself, a folded
5066 version, a value given in a REG_EQUAL note, or a value related
5067 to a constant.
5069 Each of these equivalents may be part of an additional class
5070 of equivalents (if more than one is in the table, they must be in
5071 the same class; we check for this).
5073 If the source is volatile, we don't do any table lookups.
5075 We note any constant equivalent for possible later use in a
5076 REG_NOTE. */
5078 if (!sets[i].src_volatile)
5079 elt = lookup (src, sets[i].src_hash, mode);
5081 sets[i].src_elt = elt;
5083 if (elt && src_eqv_here && src_eqv_elt)
5085 if (elt->first_same_value != src_eqv_elt->first_same_value)
5087 /* The REG_EQUAL is indicating that two formerly distinct
5088 classes are now equivalent. So merge them. */
5089 merge_equiv_classes (elt, src_eqv_elt);
5090 src_eqv_hash = HASH (src_eqv, elt->mode);
5091 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
5094 src_eqv_here = 0;
5097 else if (src_eqv_elt)
5098 elt = src_eqv_elt;
5100 /* Try to find a constant somewhere and record it in `src_const'.
5101 Record its table element, if any, in `src_const_elt'. Look in
5102 any known equivalences first. (If the constant is not in the
5103 table, also set `sets[i].src_const_hash'). */
5104 if (elt)
5105 for (p = elt->first_same_value; p; p = p->next_same_value)
5106 if (p->is_const)
5108 src_const = p->exp;
5109 src_const_elt = elt;
5110 break;
5113 if (src_const == 0
5114 && (CONSTANT_P (src_folded)
5115 /* Consider (minus (label_ref L1) (label_ref L2)) as
5116 "constant" here so we will record it. This allows us
5117 to fold switch statements when an ADDR_DIFF_VEC is used. */
5118 || (GET_CODE (src_folded) == MINUS
5119 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5120 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5121 src_const = src_folded, src_const_elt = elt;
5122 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5123 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5125 /* If we don't know if the constant is in the table, get its
5126 hash code and look it up. */
5127 if (src_const && src_const_elt == 0)
5129 sets[i].src_const_hash = HASH (src_const, mode);
5130 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
5133 sets[i].src_const = src_const;
5134 sets[i].src_const_elt = src_const_elt;
5136 /* If the constant and our source are both in the table, mark them as
5137 equivalent. Otherwise, if a constant is in the table but the source
5138 isn't, set ELT to it. */
5139 if (src_const_elt && elt
5140 && src_const_elt->first_same_value != elt->first_same_value)
5141 merge_equiv_classes (elt, src_const_elt);
5142 else if (src_const_elt && elt == 0)
5143 elt = src_const_elt;
5145 /* See if there is a register linearly related to a constant
5146 equivalent of SRC. */
5147 if (src_const
5148 && (GET_CODE (src_const) == CONST
5149 || (src_const_elt && src_const_elt->related_value != 0)))
5151 src_related = use_related_value (src_const, src_const_elt);
5152 if (src_related)
5154 struct table_elt *src_related_elt
5155 = lookup (src_related, HASH (src_related, mode), mode);
5156 if (src_related_elt && elt)
5158 if (elt->first_same_value
5159 != src_related_elt->first_same_value)
5160 /* This can occur when we previously saw a CONST
5161 involving a SYMBOL_REF and then see the SYMBOL_REF
5162 twice. Merge the involved classes. */
5163 merge_equiv_classes (elt, src_related_elt);
5165 src_related = 0;
5166 src_related_elt = 0;
5168 else if (src_related_elt && elt == 0)
5169 elt = src_related_elt;
5173 /* See if we have a CONST_INT that is already in a register in a
5174 wider mode. */
5176 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
5177 && GET_MODE_CLASS (mode) == MODE_INT
5178 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
5180 enum machine_mode wider_mode;
5182 for (wider_mode = GET_MODE_WIDER_MODE (mode);
5183 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
5184 && src_related == 0;
5185 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
5187 struct table_elt *const_elt
5188 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
5190 if (const_elt == 0)
5191 continue;
5193 for (const_elt = const_elt->first_same_value;
5194 const_elt; const_elt = const_elt->next_same_value)
5195 if (GET_CODE (const_elt->exp) == REG)
5197 src_related = gen_lowpart_if_possible (mode,
5198 const_elt->exp);
5199 break;
5204 /* Another possibility is that we have an AND with a constant in
5205 a mode narrower than a word. If so, it might have been generated
5206 as part of an "if" which would narrow the AND. If we already
5207 have done the AND in a wider mode, we can use a SUBREG of that
5208 value. */
5210 if (flag_expensive_optimizations && ! src_related
5211 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5212 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5214 enum machine_mode tmode;
5215 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
5217 for (tmode = GET_MODE_WIDER_MODE (mode);
5218 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5219 tmode = GET_MODE_WIDER_MODE (tmode))
5221 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5222 struct table_elt *larger_elt;
5224 if (inner)
5226 PUT_MODE (new_and, tmode);
5227 XEXP (new_and, 0) = inner;
5228 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5229 if (larger_elt == 0)
5230 continue;
5232 for (larger_elt = larger_elt->first_same_value;
5233 larger_elt; larger_elt = larger_elt->next_same_value)
5234 if (GET_CODE (larger_elt->exp) == REG)
5236 src_related
5237 = gen_lowpart_if_possible (mode, larger_elt->exp);
5238 break;
5241 if (src_related)
5242 break;
5247 #ifdef LOAD_EXTEND_OP
5248 /* See if a MEM has already been loaded with a widening operation;
5249 if it has, we can use a subreg of that. Many CISC machines
5250 also have such operations, but this is only likely to be
5251 beneficial these machines. */
5253 if (flag_expensive_optimizations && src_related == 0
5254 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5255 && GET_MODE_CLASS (mode) == MODE_INT
5256 && GET_CODE (src) == MEM && ! do_not_record
5257 && LOAD_EXTEND_OP (mode) != NIL)
5259 enum machine_mode tmode;
5261 /* Set what we are trying to extend and the operation it might
5262 have been extended with. */
5263 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
5264 XEXP (memory_extend_rtx, 0) = src;
5266 for (tmode = GET_MODE_WIDER_MODE (mode);
5267 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5268 tmode = GET_MODE_WIDER_MODE (tmode))
5270 struct table_elt *larger_elt;
5272 PUT_MODE (memory_extend_rtx, tmode);
5273 larger_elt = lookup (memory_extend_rtx,
5274 HASH (memory_extend_rtx, tmode), tmode);
5275 if (larger_elt == 0)
5276 continue;
5278 for (larger_elt = larger_elt->first_same_value;
5279 larger_elt; larger_elt = larger_elt->next_same_value)
5280 if (GET_CODE (larger_elt->exp) == REG)
5282 src_related = gen_lowpart_if_possible (mode,
5283 larger_elt->exp);
5284 break;
5287 if (src_related)
5288 break;
5291 #endif /* LOAD_EXTEND_OP */
5293 if (src == src_folded)
5294 src_folded = 0;
5296 /* At this point, ELT, if nonzero, points to a class of expressions
5297 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5298 and SRC_RELATED, if nonzero, each contain additional equivalent
5299 expressions. Prune these latter expressions by deleting expressions
5300 already in the equivalence class.
5302 Check for an equivalent identical to the destination. If found,
5303 this is the preferred equivalent since it will likely lead to
5304 elimination of the insn. Indicate this by placing it in
5305 `src_related'. */
5307 if (elt)
5308 elt = elt->first_same_value;
5309 for (p = elt; p; p = p->next_same_value)
5311 enum rtx_code code = GET_CODE (p->exp);
5313 /* If the expression is not valid, ignore it. Then we do not
5314 have to check for validity below. In most cases, we can use
5315 `rtx_equal_p', since canonicalization has already been done. */
5316 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5317 continue;
5319 /* Also skip paradoxical subregs, unless that's what we're
5320 looking for. */
5321 if (code == SUBREG
5322 && (GET_MODE_SIZE (GET_MODE (p->exp))
5323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5324 && ! (src != 0
5325 && GET_CODE (src) == SUBREG
5326 && GET_MODE (src) == GET_MODE (p->exp)
5327 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5328 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5329 continue;
5331 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5332 src = 0;
5333 else if (src_folded && GET_CODE (src_folded) == code
5334 && rtx_equal_p (src_folded, p->exp))
5335 src_folded = 0;
5336 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5337 && rtx_equal_p (src_eqv_here, p->exp))
5338 src_eqv_here = 0;
5339 else if (src_related && GET_CODE (src_related) == code
5340 && rtx_equal_p (src_related, p->exp))
5341 src_related = 0;
5343 /* This is the same as the destination of the insns, we want
5344 to prefer it. Copy it to src_related. The code below will
5345 then give it a negative cost. */
5346 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5347 src_related = dest;
5350 /* Find the cheapest valid equivalent, trying all the available
5351 possibilities. Prefer items not in the hash table to ones
5352 that are when they are equal cost. Note that we can never
5353 worsen an insn as the current contents will also succeed.
5354 If we find an equivalent identical to the destination, use it as best,
5355 since this insn will probably be eliminated in that case. */
5356 if (src)
5358 if (rtx_equal_p (src, dest))
5359 src_cost = src_regcost = -1;
5360 else
5362 src_cost = COST (src);
5363 src_regcost = approx_reg_cost (src);
5367 if (src_eqv_here)
5369 if (rtx_equal_p (src_eqv_here, dest))
5370 src_eqv_cost = src_eqv_regcost = -1;
5371 else
5373 src_eqv_cost = COST (src_eqv_here);
5374 src_eqv_regcost = approx_reg_cost (src_eqv_here);
5378 if (src_folded)
5380 if (rtx_equal_p (src_folded, dest))
5381 src_folded_cost = src_folded_regcost = -1;
5382 else
5384 src_folded_cost = COST (src_folded);
5385 src_folded_regcost = approx_reg_cost (src_folded);
5389 if (src_related)
5391 if (rtx_equal_p (src_related, dest))
5392 src_related_cost = src_related_regcost = -1;
5393 else
5395 src_related_cost = COST (src_related);
5396 src_related_regcost = approx_reg_cost (src_related);
5400 /* If this was an indirect jump insn, a known label will really be
5401 cheaper even though it looks more expensive. */
5402 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5403 src_folded = src_const, src_folded_cost = src_folded_regcost = -1;
5405 /* Terminate loop when replacement made. This must terminate since
5406 the current contents will be tested and will always be valid. */
5407 while (1)
5409 rtx trial;
5411 /* Skip invalid entries. */
5412 while (elt && GET_CODE (elt->exp) != REG
5413 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5414 elt = elt->next_same_value;
5416 /* A paradoxical subreg would be bad here: it'll be the right
5417 size, but later may be adjusted so that the upper bits aren't
5418 what we want. So reject it. */
5419 if (elt != 0
5420 && GET_CODE (elt->exp) == SUBREG
5421 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5422 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5423 /* It is okay, though, if the rtx we're trying to match
5424 will ignore any of the bits we can't predict. */
5425 && ! (src != 0
5426 && GET_CODE (src) == SUBREG
5427 && GET_MODE (src) == GET_MODE (elt->exp)
5428 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5429 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5431 elt = elt->next_same_value;
5432 continue;
5435 if (elt)
5437 src_elt_cost = elt->cost;
5438 src_elt_regcost = elt->regcost;
5441 /* Find cheapest and skip it for the next time. For items
5442 of equal cost, use this order:
5443 src_folded, src, src_eqv, src_related and hash table entry. */
5444 if (src_folded
5445 && preferrable (src_folded_cost, src_folded_regcost,
5446 src_cost, src_regcost) <= 0
5447 && preferrable (src_folded_cost, src_folded_regcost,
5448 src_eqv_cost, src_eqv_regcost) <= 0
5449 && preferrable (src_folded_cost, src_folded_regcost,
5450 src_related_cost, src_related_regcost) <= 0
5451 && preferrable (src_folded_cost, src_folded_regcost,
5452 src_elt_cost, src_elt_regcost) <= 0)
5454 trial = src_folded, src_folded_cost = MAX_COST;
5455 if (src_folded_force_flag)
5457 rtx forced = force_const_mem (mode, trial);
5458 if (forced)
5459 trial = forced;
5462 else if (src
5463 && preferrable (src_cost, src_regcost,
5464 src_eqv_cost, src_eqv_regcost) <= 0
5465 && preferrable (src_cost, src_regcost,
5466 src_related_cost, src_related_regcost) <= 0
5467 && preferrable (src_cost, src_regcost,
5468 src_elt_cost, src_elt_regcost) <= 0)
5469 trial = src, src_cost = MAX_COST;
5470 else if (src_eqv_here
5471 && preferrable (src_eqv_cost, src_eqv_regcost,
5472 src_related_cost, src_related_regcost) <= 0
5473 && preferrable (src_eqv_cost, src_eqv_regcost,
5474 src_elt_cost, src_elt_regcost) <= 0)
5475 trial = copy_rtx (src_eqv_here), src_eqv_cost = MAX_COST;
5476 else if (src_related
5477 && preferrable (src_related_cost, src_related_regcost,
5478 src_elt_cost, src_elt_regcost) <= 0)
5479 trial = copy_rtx (src_related), src_related_cost = MAX_COST;
5480 else
5482 trial = copy_rtx (elt->exp);
5483 elt = elt->next_same_value;
5484 src_elt_cost = MAX_COST;
5487 /* We don't normally have an insn matching (set (pc) (pc)), so
5488 check for this separately here. We will delete such an
5489 insn below.
5491 For other cases such as a table jump or conditional jump
5492 where we know the ultimate target, go ahead and replace the
5493 operand. While that may not make a valid insn, we will
5494 reemit the jump below (and also insert any necessary
5495 barriers). */
5496 if (n_sets == 1 && dest == pc_rtx
5497 && (trial == pc_rtx
5498 || (GET_CODE (trial) == LABEL_REF
5499 && ! condjump_p (insn))))
5501 SET_SRC (sets[i].rtl) = trial;
5502 cse_jumps_altered = 1;
5503 break;
5506 /* Look for a substitution that makes a valid insn. */
5507 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5509 rtx new = canon_reg (SET_SRC (sets[i].rtl), insn);
5511 /* If we just made a substitution inside a libcall, then we
5512 need to make the same substitution in any notes attached
5513 to the RETVAL insn. */
5514 if (libcall_insn
5515 && (GET_CODE (sets[i].orig_src) == REG
5516 || GET_CODE (sets[i].orig_src) == SUBREG
5517 || GET_CODE (sets[i].orig_src) == MEM))
5518 simplify_replace_rtx (REG_NOTES (libcall_insn),
5519 sets[i].orig_src, copy_rtx (new));
5521 /* The result of apply_change_group can be ignored; see
5522 canon_reg. */
5524 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
5525 apply_change_group ();
5526 break;
5529 /* If we previously found constant pool entries for
5530 constants and this is a constant, try making a
5531 pool entry. Put it in src_folded unless we already have done
5532 this since that is where it likely came from. */
5534 else if (constant_pool_entries_cost
5535 && CONSTANT_P (trial)
5536 /* Reject cases that will abort in decode_rtx_const.
5537 On the alpha when simplifying a switch, we get
5538 (const (truncate (minus (label_ref) (label_ref)))). */
5539 && ! (GET_CODE (trial) == CONST
5540 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5541 /* Likewise on IA-64, except without the truncate. */
5542 && ! (GET_CODE (trial) == CONST
5543 && GET_CODE (XEXP (trial, 0)) == MINUS
5544 && GET_CODE (XEXP (XEXP (trial, 0), 0)) == LABEL_REF
5545 && GET_CODE (XEXP (XEXP (trial, 0), 1)) == LABEL_REF)
5546 && (src_folded == 0
5547 || (GET_CODE (src_folded) != MEM
5548 && ! src_folded_force_flag))
5549 && GET_MODE_CLASS (mode) != MODE_CC
5550 && mode != VOIDmode)
5552 src_folded_force_flag = 1;
5553 src_folded = trial;
5554 src_folded_cost = constant_pool_entries_cost;
5555 src_folded_regcost = constant_pool_entries_regcost;
5559 src = SET_SRC (sets[i].rtl);
5561 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5562 However, there is an important exception: If both are registers
5563 that are not the head of their equivalence class, replace SET_SRC
5564 with the head of the class. If we do not do this, we will have
5565 both registers live over a portion of the basic block. This way,
5566 their lifetimes will likely abut instead of overlapping. */
5567 if (GET_CODE (dest) == REG
5568 && REGNO_QTY_VALID_P (REGNO (dest)))
5570 int dest_q = REG_QTY (REGNO (dest));
5571 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5573 if (dest_ent->mode == GET_MODE (dest)
5574 && dest_ent->first_reg != REGNO (dest)
5575 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5576 /* Don't do this if the original insn had a hard reg as
5577 SET_SRC or SET_DEST. */
5578 && (GET_CODE (sets[i].src) != REG
5579 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5580 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5581 /* We can't call canon_reg here because it won't do anything if
5582 SRC is a hard register. */
5584 int src_q = REG_QTY (REGNO (src));
5585 struct qty_table_elem *src_ent = &qty_table[src_q];
5586 int first = src_ent->first_reg;
5587 rtx new_src
5588 = (first >= FIRST_PSEUDO_REGISTER
5589 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5591 /* We must use validate-change even for this, because this
5592 might be a special no-op instruction, suitable only to
5593 tag notes onto. */
5594 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5596 src = new_src;
5597 /* If we had a constant that is cheaper than what we are now
5598 setting SRC to, use that constant. We ignored it when we
5599 thought we could make this into a no-op. */
5600 if (src_const && COST (src_const) < COST (src)
5601 && validate_change (insn, &SET_SRC (sets[i].rtl),
5602 src_const, 0))
5603 src = src_const;
5608 /* If we made a change, recompute SRC values. */
5609 if (src != sets[i].src)
5611 cse_altered = 1;
5612 do_not_record = 0;
5613 hash_arg_in_memory = 0;
5614 sets[i].src = src;
5615 sets[i].src_hash = HASH (src, mode);
5616 sets[i].src_volatile = do_not_record;
5617 sets[i].src_in_memory = hash_arg_in_memory;
5618 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5621 /* If this is a single SET, we are setting a register, and we have an
5622 equivalent constant, we want to add a REG_NOTE. We don't want
5623 to write a REG_EQUAL note for a constant pseudo since verifying that
5624 that pseudo hasn't been eliminated is a pain. Such a note also
5625 won't help anything.
5627 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5628 which can be created for a reference to a compile time computable
5629 entry in a jump table. */
5631 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5632 && GET_CODE (src_const) != REG
5633 && ! (GET_CODE (src_const) == CONST
5634 && GET_CODE (XEXP (src_const, 0)) == MINUS
5635 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5636 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5638 /* We only want a REG_EQUAL note if src_const != src. */
5639 if (! rtx_equal_p (src, src_const))
5641 /* Make sure that the rtx is not shared. */
5642 src_const = copy_rtx (src_const);
5644 /* Record the actual constant value in a REG_EQUAL note,
5645 making a new one if one does not already exist. */
5646 set_unique_reg_note (insn, REG_EQUAL, src_const);
5650 /* Now deal with the destination. */
5651 do_not_record = 0;
5653 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5654 to the MEM or REG within it. */
5655 while (GET_CODE (dest) == SIGN_EXTRACT
5656 || GET_CODE (dest) == ZERO_EXTRACT
5657 || GET_CODE (dest) == SUBREG
5658 || GET_CODE (dest) == STRICT_LOW_PART)
5659 dest = XEXP (dest, 0);
5661 sets[i].inner_dest = dest;
5663 if (GET_CODE (dest) == MEM)
5665 #ifdef PUSH_ROUNDING
5666 /* Stack pushes invalidate the stack pointer. */
5667 rtx addr = XEXP (dest, 0);
5668 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
5669 && XEXP (addr, 0) == stack_pointer_rtx)
5670 invalidate (stack_pointer_rtx, Pmode);
5671 #endif
5672 dest = fold_rtx (dest, insn);
5675 /* Compute the hash code of the destination now,
5676 before the effects of this instruction are recorded,
5677 since the register values used in the address computation
5678 are those before this instruction. */
5679 sets[i].dest_hash = HASH (dest, mode);
5681 /* Don't enter a bit-field in the hash table
5682 because the value in it after the store
5683 may not equal what was stored, due to truncation. */
5685 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5686 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5688 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5690 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5691 && GET_CODE (width) == CONST_INT
5692 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5693 && ! (INTVAL (src_const)
5694 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5695 /* Exception: if the value is constant,
5696 and it won't be truncated, record it. */
5698 else
5700 /* This is chosen so that the destination will be invalidated
5701 but no new value will be recorded.
5702 We must invalidate because sometimes constant
5703 values can be recorded for bitfields. */
5704 sets[i].src_elt = 0;
5705 sets[i].src_volatile = 1;
5706 src_eqv = 0;
5707 src_eqv_elt = 0;
5711 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5712 the insn. */
5713 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5715 /* One less use of the label this insn used to jump to. */
5716 delete_insn (insn);
5717 cse_jumps_altered = 1;
5718 /* No more processing for this set. */
5719 sets[i].rtl = 0;
5722 /* If this SET is now setting PC to a label, we know it used to
5723 be a conditional or computed branch. */
5724 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5726 /* Now emit a BARRIER after the unconditional jump. */
5727 if (NEXT_INSN (insn) == 0
5728 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5729 emit_barrier_after (insn);
5731 /* We reemit the jump in as many cases as possible just in
5732 case the form of an unconditional jump is significantly
5733 different than a computed jump or conditional jump.
5735 If this insn has multiple sets, then reemitting the
5736 jump is nontrivial. So instead we just force rerecognition
5737 and hope for the best. */
5738 if (n_sets == 1)
5740 rtx new = emit_jump_insn_after (gen_jump (XEXP (src, 0)), insn);
5742 JUMP_LABEL (new) = XEXP (src, 0);
5743 LABEL_NUSES (XEXP (src, 0))++;
5744 delete_insn (insn);
5745 insn = new;
5747 /* Now emit a BARRIER after the unconditional jump. */
5748 if (NEXT_INSN (insn) == 0
5749 || GET_CODE (NEXT_INSN (insn)) != BARRIER)
5750 emit_barrier_after (insn);
5752 else
5753 INSN_CODE (insn) = -1;
5755 never_reached_warning (insn, NULL);
5757 /* Do not bother deleting any unreachable code,
5758 let jump/flow do that. */
5760 cse_jumps_altered = 1;
5761 sets[i].rtl = 0;
5764 /* If destination is volatile, invalidate it and then do no further
5765 processing for this assignment. */
5767 else if (do_not_record)
5769 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5770 invalidate (dest, VOIDmode);
5771 else if (GET_CODE (dest) == MEM)
5773 /* Outgoing arguments for a libcall don't
5774 affect any recorded expressions. */
5775 if (! libcall_insn || insn == libcall_insn)
5776 invalidate (dest, VOIDmode);
5778 else if (GET_CODE (dest) == STRICT_LOW_PART
5779 || GET_CODE (dest) == ZERO_EXTRACT)
5780 invalidate (XEXP (dest, 0), GET_MODE (dest));
5781 sets[i].rtl = 0;
5784 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5785 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5787 #ifdef HAVE_cc0
5788 /* If setting CC0, record what it was set to, or a constant, if it
5789 is equivalent to a constant. If it is being set to a floating-point
5790 value, make a COMPARE with the appropriate constant of 0. If we
5791 don't do this, later code can interpret this as a test against
5792 const0_rtx, which can cause problems if we try to put it into an
5793 insn as a floating-point operand. */
5794 if (dest == cc0_rtx)
5796 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5797 this_insn_cc0_mode = mode;
5798 if (FLOAT_MODE_P (mode))
5799 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5800 CONST0_RTX (mode));
5802 #endif
5805 /* Now enter all non-volatile source expressions in the hash table
5806 if they are not already present.
5807 Record their equivalence classes in src_elt.
5808 This way we can insert the corresponding destinations into
5809 the same classes even if the actual sources are no longer in them
5810 (having been invalidated). */
5812 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5813 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5815 struct table_elt *elt;
5816 struct table_elt *classp = sets[0].src_elt;
5817 rtx dest = SET_DEST (sets[0].rtl);
5818 enum machine_mode eqvmode = GET_MODE (dest);
5820 if (GET_CODE (dest) == STRICT_LOW_PART)
5822 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5823 classp = 0;
5825 if (insert_regs (src_eqv, classp, 0))
5827 rehash_using_reg (src_eqv);
5828 src_eqv_hash = HASH (src_eqv, eqvmode);
5830 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5831 elt->in_memory = src_eqv_in_memory;
5832 src_eqv_elt = elt;
5834 /* Check to see if src_eqv_elt is the same as a set source which
5835 does not yet have an elt, and if so set the elt of the set source
5836 to src_eqv_elt. */
5837 for (i = 0; i < n_sets; i++)
5838 if (sets[i].rtl && sets[i].src_elt == 0
5839 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5840 sets[i].src_elt = src_eqv_elt;
5843 for (i = 0; i < n_sets; i++)
5844 if (sets[i].rtl && ! sets[i].src_volatile
5845 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5847 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5849 /* REG_EQUAL in setting a STRICT_LOW_PART
5850 gives an equivalent for the entire destination register,
5851 not just for the subreg being stored in now.
5852 This is a more interesting equivalence, so we arrange later
5853 to treat the entire reg as the destination. */
5854 sets[i].src_elt = src_eqv_elt;
5855 sets[i].src_hash = src_eqv_hash;
5857 else
5859 /* Insert source and constant equivalent into hash table, if not
5860 already present. */
5861 struct table_elt *classp = src_eqv_elt;
5862 rtx src = sets[i].src;
5863 rtx dest = SET_DEST (sets[i].rtl);
5864 enum machine_mode mode
5865 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5867 /* It's possible that we have a source value known to be
5868 constant but don't have a REG_EQUAL note on the insn.
5869 Lack of a note will mean src_eqv_elt will be NULL. This
5870 can happen where we've generated a SUBREG to access a
5871 CONST_INT that is already in a register in a wider mode.
5872 Ensure that the source expression is put in the proper
5873 constant class. */
5874 if (!classp)
5875 classp = sets[i].src_const_elt;
5877 if (sets[i].src_elt == 0)
5879 /* Don't put a hard register source into the table if this is
5880 the last insn of a libcall. In this case, we only need
5881 to put src_eqv_elt in src_elt. */
5882 if (! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5884 struct table_elt *elt;
5886 /* Note that these insert_regs calls cannot remove
5887 any of the src_elt's, because they would have failed to
5888 match if not still valid. */
5889 if (insert_regs (src, classp, 0))
5891 rehash_using_reg (src);
5892 sets[i].src_hash = HASH (src, mode);
5894 elt = insert (src, classp, sets[i].src_hash, mode);
5895 elt->in_memory = sets[i].src_in_memory;
5896 sets[i].src_elt = classp = elt;
5898 else
5899 sets[i].src_elt = classp;
5901 if (sets[i].src_const && sets[i].src_const_elt == 0
5902 && src != sets[i].src_const
5903 && ! rtx_equal_p (sets[i].src_const, src))
5904 sets[i].src_elt = insert (sets[i].src_const, classp,
5905 sets[i].src_const_hash, mode);
5908 else if (sets[i].src_elt == 0)
5909 /* If we did not insert the source into the hash table (e.g., it was
5910 volatile), note the equivalence class for the REG_EQUAL value, if any,
5911 so that the destination goes into that class. */
5912 sets[i].src_elt = src_eqv_elt;
5914 invalidate_from_clobbers (x);
5916 /* Some registers are invalidated by subroutine calls. Memory is
5917 invalidated by non-constant calls. */
5919 if (GET_CODE (insn) == CALL_INSN)
5921 if (! CONST_OR_PURE_CALL_P (insn))
5922 invalidate_memory ();
5923 invalidate_for_call ();
5926 /* Now invalidate everything set by this instruction.
5927 If a SUBREG or other funny destination is being set,
5928 sets[i].rtl is still nonzero, so here we invalidate the reg
5929 a part of which is being set. */
5931 for (i = 0; i < n_sets; i++)
5932 if (sets[i].rtl)
5934 /* We can't use the inner dest, because the mode associated with
5935 a ZERO_EXTRACT is significant. */
5936 rtx dest = SET_DEST (sets[i].rtl);
5938 /* Needed for registers to remove the register from its
5939 previous quantity's chain.
5940 Needed for memory if this is a nonvarying address, unless
5941 we have just done an invalidate_memory that covers even those. */
5942 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5943 invalidate (dest, VOIDmode);
5944 else if (GET_CODE (dest) == MEM)
5946 /* Outgoing arguments for a libcall don't
5947 affect any recorded expressions. */
5948 if (! libcall_insn || insn == libcall_insn)
5949 invalidate (dest, VOIDmode);
5951 else if (GET_CODE (dest) == STRICT_LOW_PART
5952 || GET_CODE (dest) == ZERO_EXTRACT)
5953 invalidate (XEXP (dest, 0), GET_MODE (dest));
5956 /* A volatile ASM invalidates everything. */
5957 if (GET_CODE (insn) == INSN
5958 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5959 && MEM_VOLATILE_P (PATTERN (insn)))
5960 flush_hash_table ();
5962 /* Make sure registers mentioned in destinations
5963 are safe for use in an expression to be inserted.
5964 This removes from the hash table
5965 any invalid entry that refers to one of these registers.
5967 We don't care about the return value from mention_regs because
5968 we are going to hash the SET_DEST values unconditionally. */
5970 for (i = 0; i < n_sets; i++)
5972 if (sets[i].rtl)
5974 rtx x = SET_DEST (sets[i].rtl);
5976 if (GET_CODE (x) != REG)
5977 mention_regs (x);
5978 else
5980 /* We used to rely on all references to a register becoming
5981 inaccessible when a register changes to a new quantity,
5982 since that changes the hash code. However, that is not
5983 safe, since after HASH_SIZE new quantities we get a
5984 hash 'collision' of a register with its own invalid
5985 entries. And since SUBREGs have been changed not to
5986 change their hash code with the hash code of the register,
5987 it wouldn't work any longer at all. So we have to check
5988 for any invalid references lying around now.
5989 This code is similar to the REG case in mention_regs,
5990 but it knows that reg_tick has been incremented, and
5991 it leaves reg_in_table as -1 . */
5992 unsigned int regno = REGNO (x);
5993 unsigned int endregno
5994 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5995 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5996 unsigned int i;
5998 for (i = regno; i < endregno; i++)
6000 if (REG_IN_TABLE (i) >= 0)
6002 remove_invalid_refs (i);
6003 REG_IN_TABLE (i) = -1;
6010 /* We may have just removed some of the src_elt's from the hash table.
6011 So replace each one with the current head of the same class. */
6013 for (i = 0; i < n_sets; i++)
6014 if (sets[i].rtl)
6016 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6017 /* If elt was removed, find current head of same class,
6018 or 0 if nothing remains of that class. */
6020 struct table_elt *elt = sets[i].src_elt;
6022 while (elt && elt->prev_same_value)
6023 elt = elt->prev_same_value;
6025 while (elt && elt->first_same_value == 0)
6026 elt = elt->next_same_value;
6027 sets[i].src_elt = elt ? elt->first_same_value : 0;
6031 /* Now insert the destinations into their equivalence classes. */
6033 for (i = 0; i < n_sets; i++)
6034 if (sets[i].rtl)
6036 rtx dest = SET_DEST (sets[i].rtl);
6037 rtx inner_dest = sets[i].inner_dest;
6038 struct table_elt *elt;
6040 /* Don't record value if we are not supposed to risk allocating
6041 floating-point values in registers that might be wider than
6042 memory. */
6043 if ((flag_float_store
6044 && GET_CODE (dest) == MEM
6045 && FLOAT_MODE_P (GET_MODE (dest)))
6046 /* Don't record BLKmode values, because we don't know the
6047 size of it, and can't be sure that other BLKmode values
6048 have the same or smaller size. */
6049 || GET_MODE (dest) == BLKmode
6050 /* Don't record values of destinations set inside a libcall block
6051 since we might delete the libcall. Things should have been set
6052 up so we won't want to reuse such a value, but we play it safe
6053 here. */
6054 || libcall_insn
6055 /* If we didn't put a REG_EQUAL value or a source into the hash
6056 table, there is no point is recording DEST. */
6057 || sets[i].src_elt == 0
6058 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
6059 or SIGN_EXTEND, don't record DEST since it can cause
6060 some tracking to be wrong.
6062 ??? Think about this more later. */
6063 || (GET_CODE (dest) == SUBREG
6064 && (GET_MODE_SIZE (GET_MODE (dest))
6065 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6066 && (GET_CODE (sets[i].src) == SIGN_EXTEND
6067 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
6068 continue;
6070 /* STRICT_LOW_PART isn't part of the value BEING set,
6071 and neither is the SUBREG inside it.
6072 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6073 if (GET_CODE (dest) == STRICT_LOW_PART)
6074 dest = SUBREG_REG (XEXP (dest, 0));
6076 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
6077 /* Registers must also be inserted into chains for quantities. */
6078 if (insert_regs (dest, sets[i].src_elt, 1))
6080 /* If `insert_regs' changes something, the hash code must be
6081 recalculated. */
6082 rehash_using_reg (dest);
6083 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
6086 if (GET_CODE (inner_dest) == MEM
6087 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
6088 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
6089 that (MEM (ADDRESSOF (X))) is equivalent to Y.
6090 Consider the case in which the address of the MEM is
6091 passed to a function, which alters the MEM. Then, if we
6092 later use Y instead of the MEM we'll miss the update. */
6093 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
6094 else
6095 elt = insert (dest, sets[i].src_elt,
6096 sets[i].dest_hash, GET_MODE (dest));
6098 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
6099 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
6100 || fixed_base_plus_p (XEXP (sets[i].inner_dest,
6101 0))));
6103 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6104 narrower than M2, and both M1 and M2 are the same number of words,
6105 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6106 make that equivalence as well.
6108 However, BAR may have equivalences for which gen_lowpart_if_possible
6109 will produce a simpler value than gen_lowpart_if_possible applied to
6110 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6111 BAR's equivalences. If we don't get a simplified form, make
6112 the SUBREG. It will not be used in an equivalence, but will
6113 cause two similar assignments to be detected.
6115 Note the loop below will find SUBREG_REG (DEST) since we have
6116 already entered SRC and DEST of the SET in the table. */
6118 if (GET_CODE (dest) == SUBREG
6119 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
6120 / UNITS_PER_WORD)
6121 == (GET_MODE_SIZE (GET_MODE (dest)) - 1) / UNITS_PER_WORD)
6122 && (GET_MODE_SIZE (GET_MODE (dest))
6123 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6124 && sets[i].src_elt != 0)
6126 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6127 struct table_elt *elt, *classp = 0;
6129 for (elt = sets[i].src_elt->first_same_value; elt;
6130 elt = elt->next_same_value)
6132 rtx new_src = 0;
6133 unsigned src_hash;
6134 struct table_elt *src_elt;
6135 int byte = 0;
6137 /* Ignore invalid entries. */
6138 if (GET_CODE (elt->exp) != REG
6139 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6140 continue;
6142 /* We may have already been playing subreg games. If the
6143 mode is already correct for the destination, use it. */
6144 if (GET_MODE (elt->exp) == new_mode)
6145 new_src = elt->exp;
6146 else
6148 /* Calculate big endian correction for the SUBREG_BYTE.
6149 We have already checked that M1 (GET_MODE (dest))
6150 is not narrower than M2 (new_mode). */
6151 if (BYTES_BIG_ENDIAN)
6152 byte = (GET_MODE_SIZE (GET_MODE (dest))
6153 - GET_MODE_SIZE (new_mode));
6155 new_src = simplify_gen_subreg (new_mode, elt->exp,
6156 GET_MODE (dest), byte);
6159 /* The call to simplify_gen_subreg fails if the value
6160 is VOIDmode, yet we can't do any simplification, e.g.
6161 for EXPR_LISTs denoting function call results.
6162 It is invalid to construct a SUBREG with a VOIDmode
6163 SUBREG_REG, hence a zero new_src means we can't do
6164 this substitution. */
6165 if (! new_src)
6166 continue;
6168 src_hash = HASH (new_src, new_mode);
6169 src_elt = lookup (new_src, src_hash, new_mode);
6171 /* Put the new source in the hash table is if isn't
6172 already. */
6173 if (src_elt == 0)
6175 if (insert_regs (new_src, classp, 0))
6177 rehash_using_reg (new_src);
6178 src_hash = HASH (new_src, new_mode);
6180 src_elt = insert (new_src, classp, src_hash, new_mode);
6181 src_elt->in_memory = elt->in_memory;
6183 else if (classp && classp != src_elt->first_same_value)
6184 /* Show that two things that we've seen before are
6185 actually the same. */
6186 merge_equiv_classes (src_elt, classp);
6188 classp = src_elt->first_same_value;
6189 /* Ignore invalid entries. */
6190 while (classp
6191 && GET_CODE (classp->exp) != REG
6192 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
6193 classp = classp->next_same_value;
6198 /* Special handling for (set REG0 REG1) where REG0 is the
6199 "cheapest", cheaper than REG1. After cse, REG1 will probably not
6200 be used in the sequel, so (if easily done) change this insn to
6201 (set REG1 REG0) and replace REG1 with REG0 in the previous insn
6202 that computed their value. Then REG1 will become a dead store
6203 and won't cloud the situation for later optimizations.
6205 Do not make this change if REG1 is a hard register, because it will
6206 then be used in the sequel and we may be changing a two-operand insn
6207 into a three-operand insn.
6209 Also do not do this if we are operating on a copy of INSN.
6211 Also don't do this if INSN ends a libcall; this would cause an unrelated
6212 register to be set in the middle of a libcall, and we then get bad code
6213 if the libcall is deleted. */
6215 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6216 && NEXT_INSN (PREV_INSN (insn)) == insn
6217 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6218 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6219 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
6221 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
6222 struct qty_table_elem *src_ent = &qty_table[src_q];
6224 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
6225 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
6227 rtx prev = insn;
6228 /* Scan for the previous nonnote insn, but stop at a basic
6229 block boundary. */
6232 prev = PREV_INSN (prev);
6234 while (prev && GET_CODE (prev) == NOTE
6235 && NOTE_LINE_NUMBER (prev) != NOTE_INSN_BASIC_BLOCK);
6237 /* Do not swap the registers around if the previous instruction
6238 attaches a REG_EQUIV note to REG1.
6240 ??? It's not entirely clear whether we can transfer a REG_EQUIV
6241 from the pseudo that originally shadowed an incoming argument
6242 to another register. Some uses of REG_EQUIV might rely on it
6243 being attached to REG1 rather than REG2.
6245 This section previously turned the REG_EQUIV into a REG_EQUAL
6246 note. We cannot do that because REG_EQUIV may provide an
6247 uninitialized stack slot when REG_PARM_STACK_SPACE is used. */
6249 if (prev != 0 && GET_CODE (prev) == INSN
6250 && GET_CODE (PATTERN (prev)) == SET
6251 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)
6252 && ! find_reg_note (prev, REG_EQUIV, NULL_RTX))
6254 rtx dest = SET_DEST (sets[0].rtl);
6255 rtx src = SET_SRC (sets[0].rtl);
6256 rtx note;
6258 validate_change (prev, &SET_DEST (PATTERN (prev)), dest, 1);
6259 validate_change (insn, &SET_DEST (sets[0].rtl), src, 1);
6260 validate_change (insn, &SET_SRC (sets[0].rtl), dest, 1);
6261 apply_change_group ();
6263 /* If INSN has a REG_EQUAL note, and this note mentions
6264 REG0, then we must delete it, because the value in
6265 REG0 has changed. If the note's value is REG1, we must
6266 also delete it because that is now this insn's dest. */
6267 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
6268 if (note != 0
6269 && (reg_mentioned_p (dest, XEXP (note, 0))
6270 || rtx_equal_p (src, XEXP (note, 0))))
6271 remove_note (insn, note);
6276 /* If this is a conditional jump insn, record any known equivalences due to
6277 the condition being tested. */
6279 last_jump_equiv_class = 0;
6280 if (GET_CODE (insn) == JUMP_INSN
6281 && n_sets == 1 && GET_CODE (x) == SET
6282 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6283 record_jump_equiv (insn, 0);
6285 #ifdef HAVE_cc0
6286 /* If the previous insn set CC0 and this insn no longer references CC0,
6287 delete the previous insn. Here we use the fact that nothing expects CC0
6288 to be valid over an insn, which is true until the final pass. */
6289 if (prev_insn && GET_CODE (prev_insn) == INSN
6290 && (tem = single_set (prev_insn)) != 0
6291 && SET_DEST (tem) == cc0_rtx
6292 && ! reg_mentioned_p (cc0_rtx, x))
6293 delete_insn (prev_insn);
6295 prev_insn_cc0 = this_insn_cc0;
6296 prev_insn_cc0_mode = this_insn_cc0_mode;
6297 prev_insn = insn;
6298 #endif
6301 /* Remove from the hash table all expressions that reference memory. */
6303 static void
6304 invalidate_memory (void)
6306 int i;
6307 struct table_elt *p, *next;
6309 for (i = 0; i < HASH_SIZE; i++)
6310 for (p = table[i]; p; p = next)
6312 next = p->next_same_hash;
6313 if (p->in_memory)
6314 remove_from_table (p, i);
6318 /* If ADDR is an address that implicitly affects the stack pointer, return
6319 1 and update the register tables to show the effect. Else, return 0. */
6321 static int
6322 addr_affects_sp_p (rtx addr)
6324 if (GET_RTX_CLASS (GET_CODE (addr)) == 'a'
6325 && GET_CODE (XEXP (addr, 0)) == REG
6326 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6328 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6330 REG_TICK (STACK_POINTER_REGNUM)++;
6331 /* Is it possible to use a subreg of SP? */
6332 SUBREG_TICKED (STACK_POINTER_REGNUM) = -1;
6335 /* This should be *very* rare. */
6336 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6337 invalidate (stack_pointer_rtx, VOIDmode);
6339 return 1;
6342 return 0;
6345 /* Perform invalidation on the basis of everything about an insn
6346 except for invalidating the actual places that are SET in it.
6347 This includes the places CLOBBERed, and anything that might
6348 alias with something that is SET or CLOBBERed.
6350 X is the pattern of the insn. */
6352 static void
6353 invalidate_from_clobbers (rtx x)
6355 if (GET_CODE (x) == CLOBBER)
6357 rtx ref = XEXP (x, 0);
6358 if (ref)
6360 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6361 || GET_CODE (ref) == MEM)
6362 invalidate (ref, VOIDmode);
6363 else if (GET_CODE (ref) == STRICT_LOW_PART
6364 || GET_CODE (ref) == ZERO_EXTRACT)
6365 invalidate (XEXP (ref, 0), GET_MODE (ref));
6368 else if (GET_CODE (x) == PARALLEL)
6370 int i;
6371 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6373 rtx y = XVECEXP (x, 0, i);
6374 if (GET_CODE (y) == CLOBBER)
6376 rtx ref = XEXP (y, 0);
6377 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6378 || GET_CODE (ref) == MEM)
6379 invalidate (ref, VOIDmode);
6380 else if (GET_CODE (ref) == STRICT_LOW_PART
6381 || GET_CODE (ref) == ZERO_EXTRACT)
6382 invalidate (XEXP (ref, 0), GET_MODE (ref));
6388 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6389 and replace any registers in them with either an equivalent constant
6390 or the canonical form of the register. If we are inside an address,
6391 only do this if the address remains valid.
6393 OBJECT is 0 except when within a MEM in which case it is the MEM.
6395 Return the replacement for X. */
6397 static rtx
6398 cse_process_notes (rtx x, rtx object)
6400 enum rtx_code code = GET_CODE (x);
6401 const char *fmt = GET_RTX_FORMAT (code);
6402 int i;
6404 switch (code)
6406 case CONST_INT:
6407 case CONST:
6408 case SYMBOL_REF:
6409 case LABEL_REF:
6410 case CONST_DOUBLE:
6411 case CONST_VECTOR:
6412 case PC:
6413 case CC0:
6414 case LO_SUM:
6415 return x;
6417 case MEM:
6418 validate_change (x, &XEXP (x, 0),
6419 cse_process_notes (XEXP (x, 0), x), 0);
6420 return x;
6422 case EXPR_LIST:
6423 case INSN_LIST:
6424 if (REG_NOTE_KIND (x) == REG_EQUAL)
6425 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6426 if (XEXP (x, 1))
6427 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6428 return x;
6430 case SIGN_EXTEND:
6431 case ZERO_EXTEND:
6432 case SUBREG:
6434 rtx new = cse_process_notes (XEXP (x, 0), object);
6435 /* We don't substitute VOIDmode constants into these rtx,
6436 since they would impede folding. */
6437 if (GET_MODE (new) != VOIDmode)
6438 validate_change (object, &XEXP (x, 0), new, 0);
6439 return x;
6442 case REG:
6443 i = REG_QTY (REGNO (x));
6445 /* Return a constant or a constant register. */
6446 if (REGNO_QTY_VALID_P (REGNO (x)))
6448 struct qty_table_elem *ent = &qty_table[i];
6450 if (ent->const_rtx != NULL_RTX
6451 && (CONSTANT_P (ent->const_rtx)
6452 || GET_CODE (ent->const_rtx) == REG))
6454 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6455 if (new)
6456 return new;
6460 /* Otherwise, canonicalize this register. */
6461 return canon_reg (x, NULL_RTX);
6463 default:
6464 break;
6467 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6468 if (fmt[i] == 'e')
6469 validate_change (object, &XEXP (x, i),
6470 cse_process_notes (XEXP (x, i), object), 0);
6472 return x;
6475 /* Find common subexpressions between the end test of a loop and the beginning
6476 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6478 Often we have a loop where an expression in the exit test is used
6479 in the body of the loop. For example "while (*p) *q++ = *p++;".
6480 Because of the way we duplicate the loop exit test in front of the loop,
6481 however, we don't detect that common subexpression. This will be caught
6482 when global cse is implemented, but this is a quite common case.
6484 This function handles the most common cases of these common expressions.
6485 It is called after we have processed the basic block ending with the
6486 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6487 jumps to a label used only once. */
6489 static void
6490 cse_around_loop (rtx loop_start)
6492 rtx insn;
6493 int i;
6494 struct table_elt *p;
6496 /* If the jump at the end of the loop doesn't go to the start, we don't
6497 do anything. */
6498 for (insn = PREV_INSN (loop_start);
6499 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6500 insn = PREV_INSN (insn))
6503 if (insn == 0
6504 || GET_CODE (insn) != NOTE
6505 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6506 return;
6508 /* If the last insn of the loop (the end test) was an NE comparison,
6509 we will interpret it as an EQ comparison, since we fell through
6510 the loop. Any equivalences resulting from that comparison are
6511 therefore not valid and must be invalidated. */
6512 if (last_jump_equiv_class)
6513 for (p = last_jump_equiv_class->first_same_value; p;
6514 p = p->next_same_value)
6516 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6517 || (GET_CODE (p->exp) == SUBREG
6518 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6519 invalidate (p->exp, VOIDmode);
6520 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6521 || GET_CODE (p->exp) == ZERO_EXTRACT)
6522 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6525 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6526 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6528 The only thing we do with SET_DEST is invalidate entries, so we
6529 can safely process each SET in order. It is slightly less efficient
6530 to do so, but we only want to handle the most common cases.
6532 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6533 These pseudos won't have valid entries in any of the tables indexed
6534 by register number, such as reg_qty. We avoid out-of-range array
6535 accesses by not processing any instructions created after cse started. */
6537 for (insn = NEXT_INSN (loop_start);
6538 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6539 && INSN_UID (insn) < max_insn_uid
6540 && ! (GET_CODE (insn) == NOTE
6541 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6542 insn = NEXT_INSN (insn))
6544 if (INSN_P (insn)
6545 && (GET_CODE (PATTERN (insn)) == SET
6546 || GET_CODE (PATTERN (insn)) == CLOBBER))
6547 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6548 else if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == PARALLEL)
6549 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6550 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6551 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6552 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6553 loop_start);
6557 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6558 since they are done elsewhere. This function is called via note_stores. */
6560 static void
6561 invalidate_skipped_set (rtx dest, rtx set, void *data ATTRIBUTE_UNUSED)
6563 enum rtx_code code = GET_CODE (dest);
6565 if (code == MEM
6566 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6567 /* There are times when an address can appear varying and be a PLUS
6568 during this scan when it would be a fixed address were we to know
6569 the proper equivalences. So invalidate all memory if there is
6570 a BLKmode or nonscalar memory reference or a reference to a
6571 variable address. */
6572 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6573 || cse_rtx_varies_p (XEXP (dest, 0), 0)))
6575 invalidate_memory ();
6576 return;
6579 if (GET_CODE (set) == CLOBBER
6580 || CC0_P (dest)
6581 || dest == pc_rtx)
6582 return;
6584 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6585 invalidate (XEXP (dest, 0), GET_MODE (dest));
6586 else if (code == REG || code == SUBREG || code == MEM)
6587 invalidate (dest, VOIDmode);
6590 /* Invalidate all insns from START up to the end of the function or the
6591 next label. This called when we wish to CSE around a block that is
6592 conditionally executed. */
6594 static void
6595 invalidate_skipped_block (rtx start)
6597 rtx insn;
6599 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6600 insn = NEXT_INSN (insn))
6602 if (! INSN_P (insn))
6603 continue;
6605 if (GET_CODE (insn) == CALL_INSN)
6607 if (! CONST_OR_PURE_CALL_P (insn))
6608 invalidate_memory ();
6609 invalidate_for_call ();
6612 invalidate_from_clobbers (PATTERN (insn));
6613 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6617 /* If modifying X will modify the value in *DATA (which is really an
6618 `rtx *'), indicate that fact by setting the pointed to value to
6619 NULL_RTX. */
6621 static void
6622 cse_check_loop_start (rtx x, rtx set ATTRIBUTE_UNUSED, void *data)
6624 rtx *cse_check_loop_start_value = (rtx *) data;
6626 if (*cse_check_loop_start_value == NULL_RTX
6627 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6628 return;
6630 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6631 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6632 *cse_check_loop_start_value = NULL_RTX;
6635 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6636 a loop that starts with the label at LOOP_START.
6638 If X is a SET, we see if its SET_SRC is currently in our hash table.
6639 If so, we see if it has a value equal to some register used only in the
6640 loop exit code (as marked by jump.c).
6642 If those two conditions are true, we search backwards from the start of
6643 the loop to see if that same value was loaded into a register that still
6644 retains its value at the start of the loop.
6646 If so, we insert an insn after the load to copy the destination of that
6647 load into the equivalent register and (try to) replace our SET_SRC with that
6648 register.
6650 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6652 static void
6653 cse_set_around_loop (rtx x, rtx insn, rtx loop_start)
6655 struct table_elt *src_elt;
6657 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6658 are setting PC or CC0 or whose SET_SRC is already a register. */
6659 if (GET_CODE (x) == SET
6660 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6661 && GET_CODE (SET_SRC (x)) != REG)
6663 src_elt = lookup (SET_SRC (x),
6664 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6665 GET_MODE (SET_DEST (x)));
6667 if (src_elt)
6668 for (src_elt = src_elt->first_same_value; src_elt;
6669 src_elt = src_elt->next_same_value)
6670 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6671 && COST (src_elt->exp) < COST (SET_SRC (x)))
6673 rtx p, set;
6675 /* Look for an insn in front of LOOP_START that sets
6676 something in the desired mode to SET_SRC (x) before we hit
6677 a label or CALL_INSN. */
6679 for (p = prev_nonnote_insn (loop_start);
6680 p && GET_CODE (p) != CALL_INSN
6681 && GET_CODE (p) != CODE_LABEL;
6682 p = prev_nonnote_insn (p))
6683 if ((set = single_set (p)) != 0
6684 && GET_CODE (SET_DEST (set)) == REG
6685 && GET_MODE (SET_DEST (set)) == src_elt->mode
6686 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6688 /* We now have to ensure that nothing between P
6689 and LOOP_START modified anything referenced in
6690 SET_SRC (x). We know that nothing within the loop
6691 can modify it, or we would have invalidated it in
6692 the hash table. */
6693 rtx q;
6694 rtx cse_check_loop_start_value = SET_SRC (x);
6695 for (q = p; q != loop_start; q = NEXT_INSN (q))
6696 if (INSN_P (q))
6697 note_stores (PATTERN (q),
6698 cse_check_loop_start,
6699 &cse_check_loop_start_value);
6701 /* If nothing was changed and we can replace our
6702 SET_SRC, add an insn after P to copy its destination
6703 to what we will be replacing SET_SRC with. */
6704 if (cse_check_loop_start_value
6705 && single_set (p)
6706 && !can_throw_internal (insn)
6707 && validate_change (insn, &SET_SRC (x),
6708 src_elt->exp, 0))
6710 /* If this creates new pseudos, this is unsafe,
6711 because the regno of new pseudo is unsuitable
6712 to index into reg_qty when cse_insn processes
6713 the new insn. Therefore, if a new pseudo was
6714 created, discard this optimization. */
6715 int nregs = max_reg_num ();
6716 rtx move
6717 = gen_move_insn (src_elt->exp, SET_DEST (set));
6718 if (nregs != max_reg_num ())
6720 if (! validate_change (insn, &SET_SRC (x),
6721 SET_SRC (set), 0))
6722 abort ();
6724 else
6726 if (CONSTANT_P (SET_SRC (set))
6727 && ! find_reg_equal_equiv_note (insn))
6728 set_unique_reg_note (insn, REG_EQUAL,
6729 SET_SRC (set));
6730 if (control_flow_insn_p (p))
6731 /* p can cause a control flow transfer so it
6732 is the last insn of a basic block. We can't
6733 therefore use emit_insn_after. */
6734 emit_insn_before (move, next_nonnote_insn (p));
6735 else
6736 emit_insn_after (move, p);
6739 break;
6744 /* Deal with the destination of X affecting the stack pointer. */
6745 addr_affects_sp_p (SET_DEST (x));
6747 /* See comment on similar code in cse_insn for explanation of these
6748 tests. */
6749 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6750 || GET_CODE (SET_DEST (x)) == MEM)
6751 invalidate (SET_DEST (x), VOIDmode);
6752 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6753 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6754 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6757 /* Find the end of INSN's basic block and return its range,
6758 the total number of SETs in all the insns of the block, the last insn of the
6759 block, and the branch path.
6761 The branch path indicates which branches should be followed. If a nonzero
6762 path size is specified, the block should be rescanned and a different set
6763 of branches will be taken. The branch path is only used if
6764 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is nonzero.
6766 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6767 used to describe the block. It is filled in with the information about
6768 the current block. The incoming structure's branch path, if any, is used
6769 to construct the output branch path. */
6771 void
6772 cse_end_of_basic_block (rtx insn, struct cse_basic_block_data *data,
6773 int follow_jumps, int after_loop, int skip_blocks)
6775 rtx p = insn, q;
6776 int nsets = 0;
6777 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6778 rtx next = INSN_P (insn) ? insn : next_real_insn (insn);
6779 int path_size = data->path_size;
6780 int path_entry = 0;
6781 int i;
6783 /* Update the previous branch path, if any. If the last branch was
6784 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6785 shorten the path by one and look at the previous branch. We know that
6786 at least one branch must have been taken if PATH_SIZE is nonzero. */
6787 while (path_size > 0)
6789 if (data->path[path_size - 1].status != NOT_TAKEN)
6791 data->path[path_size - 1].status = NOT_TAKEN;
6792 break;
6794 else
6795 path_size--;
6798 /* If the first instruction is marked with QImode, that means we've
6799 already processed this block. Our caller will look at DATA->LAST
6800 to figure out where to go next. We want to return the next block
6801 in the instruction stream, not some branched-to block somewhere
6802 else. We accomplish this by pretending our called forbid us to
6803 follow jumps, or skip blocks. */
6804 if (GET_MODE (insn) == QImode)
6805 follow_jumps = skip_blocks = 0;
6807 /* Scan to end of this basic block. */
6808 while (p && GET_CODE (p) != CODE_LABEL)
6810 /* Don't cse out the end of a loop. This makes a difference
6811 only for the unusual loops that always execute at least once;
6812 all other loops have labels there so we will stop in any case.
6813 Cse'ing out the end of the loop is dangerous because it
6814 might cause an invariant expression inside the loop
6815 to be reused after the end of the loop. This would make it
6816 hard to move the expression out of the loop in loop.c,
6817 especially if it is one of several equivalent expressions
6818 and loop.c would like to eliminate it.
6820 If we are running after loop.c has finished, we can ignore
6821 the NOTE_INSN_LOOP_END. */
6823 if (! after_loop && GET_CODE (p) == NOTE
6824 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6825 break;
6827 /* Don't cse over a call to setjmp; on some machines (eg VAX)
6828 the regs restored by the longjmp come from
6829 a later time than the setjmp. */
6830 if (PREV_INSN (p) && GET_CODE (PREV_INSN (p)) == CALL_INSN
6831 && find_reg_note (PREV_INSN (p), REG_SETJMP, NULL))
6832 break;
6834 /* A PARALLEL can have lots of SETs in it,
6835 especially if it is really an ASM_OPERANDS. */
6836 if (INSN_P (p) && GET_CODE (PATTERN (p)) == PARALLEL)
6837 nsets += XVECLEN (PATTERN (p), 0);
6838 else if (GET_CODE (p) != NOTE)
6839 nsets += 1;
6841 /* Ignore insns made by CSE; they cannot affect the boundaries of
6842 the basic block. */
6844 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6845 high_cuid = INSN_CUID (p);
6846 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6847 low_cuid = INSN_CUID (p);
6849 /* See if this insn is in our branch path. If it is and we are to
6850 take it, do so. */
6851 if (path_entry < path_size && data->path[path_entry].branch == p)
6853 if (data->path[path_entry].status != NOT_TAKEN)
6854 p = JUMP_LABEL (p);
6856 /* Point to next entry in path, if any. */
6857 path_entry++;
6860 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6861 was specified, we haven't reached our maximum path length, there are
6862 insns following the target of the jump, this is the only use of the
6863 jump label, and the target label is preceded by a BARRIER.
6865 Alternatively, we can follow the jump if it branches around a
6866 block of code and there are no other branches into the block.
6867 In this case invalidate_skipped_block will be called to invalidate any
6868 registers set in the block when following the jump. */
6870 else if ((follow_jumps || skip_blocks) && path_size < PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH) - 1
6871 && GET_CODE (p) == JUMP_INSN
6872 && GET_CODE (PATTERN (p)) == SET
6873 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6874 && JUMP_LABEL (p) != 0
6875 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6876 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6878 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6879 if ((GET_CODE (q) != NOTE
6880 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6881 || (PREV_INSN (q) && GET_CODE (PREV_INSN (q)) == CALL_INSN
6882 && find_reg_note (PREV_INSN (q), REG_SETJMP, NULL)))
6883 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6884 break;
6886 /* If we ran into a BARRIER, this code is an extension of the
6887 basic block when the branch is taken. */
6888 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6890 /* Don't allow ourself to keep walking around an
6891 always-executed loop. */
6892 if (next_real_insn (q) == next)
6894 p = NEXT_INSN (p);
6895 continue;
6898 /* Similarly, don't put a branch in our path more than once. */
6899 for (i = 0; i < path_entry; i++)
6900 if (data->path[i].branch == p)
6901 break;
6903 if (i != path_entry)
6904 break;
6906 data->path[path_entry].branch = p;
6907 data->path[path_entry++].status = TAKEN;
6909 /* This branch now ends our path. It was possible that we
6910 didn't see this branch the last time around (when the
6911 insn in front of the target was a JUMP_INSN that was
6912 turned into a no-op). */
6913 path_size = path_entry;
6915 p = JUMP_LABEL (p);
6916 /* Mark block so we won't scan it again later. */
6917 PUT_MODE (NEXT_INSN (p), QImode);
6919 /* Detect a branch around a block of code. */
6920 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6922 rtx tmp;
6924 if (next_real_insn (q) == next)
6926 p = NEXT_INSN (p);
6927 continue;
6930 for (i = 0; i < path_entry; i++)
6931 if (data->path[i].branch == p)
6932 break;
6934 if (i != path_entry)
6935 break;
6937 /* This is no_labels_between_p (p, q) with an added check for
6938 reaching the end of a function (in case Q precedes P). */
6939 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6940 if (GET_CODE (tmp) == CODE_LABEL)
6941 break;
6943 if (tmp == q)
6945 data->path[path_entry].branch = p;
6946 data->path[path_entry++].status = AROUND;
6948 path_size = path_entry;
6950 p = JUMP_LABEL (p);
6951 /* Mark block so we won't scan it again later. */
6952 PUT_MODE (NEXT_INSN (p), QImode);
6956 p = NEXT_INSN (p);
6959 data->low_cuid = low_cuid;
6960 data->high_cuid = high_cuid;
6961 data->nsets = nsets;
6962 data->last = p;
6964 /* If all jumps in the path are not taken, set our path length to zero
6965 so a rescan won't be done. */
6966 for (i = path_size - 1; i >= 0; i--)
6967 if (data->path[i].status != NOT_TAKEN)
6968 break;
6970 if (i == -1)
6971 data->path_size = 0;
6972 else
6973 data->path_size = path_size;
6975 /* End the current branch path. */
6976 data->path[path_size].branch = 0;
6979 /* Perform cse on the instructions of a function.
6980 F is the first instruction.
6981 NREGS is one plus the highest pseudo-reg number used in the instruction.
6983 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6984 (only if -frerun-cse-after-loop).
6986 Returns 1 if jump_optimize should be redone due to simplifications
6987 in conditional jump instructions. */
6990 cse_main (rtx f, int nregs, int after_loop, FILE *file)
6992 struct cse_basic_block_data val;
6993 rtx insn = f;
6994 int i;
6996 val.path = xmalloc (sizeof (struct branch_path)
6997 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
6999 cse_jumps_altered = 0;
7000 recorded_label_ref = 0;
7001 constant_pool_entries_cost = 0;
7002 constant_pool_entries_regcost = 0;
7003 val.path_size = 0;
7005 init_recog ();
7006 init_alias_analysis ();
7008 max_reg = nregs;
7010 max_insn_uid = get_max_uid ();
7012 reg_eqv_table = xmalloc (nregs * sizeof (struct reg_eqv_elem));
7014 #ifdef LOAD_EXTEND_OP
7016 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
7017 and change the code and mode as appropriate. */
7018 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
7019 #endif
7021 /* Reset the counter indicating how many elements have been made
7022 thus far. */
7023 n_elements_made = 0;
7025 /* Find the largest uid. */
7027 max_uid = get_max_uid ();
7028 uid_cuid = xcalloc (max_uid + 1, sizeof (int));
7030 /* Compute the mapping from uids to cuids.
7031 CUIDs are numbers assigned to insns, like uids,
7032 except that cuids increase monotonically through the code.
7033 Don't assign cuids to line-number NOTEs, so that the distance in cuids
7034 between two insns is not affected by -g. */
7036 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7038 if (GET_CODE (insn) != NOTE
7039 || NOTE_LINE_NUMBER (insn) < 0)
7040 INSN_CUID (insn) = ++i;
7041 else
7042 /* Give a line number note the same cuid as preceding insn. */
7043 INSN_CUID (insn) = i;
7046 ggc_push_context ();
7048 /* Loop over basic blocks.
7049 Compute the maximum number of qty's needed for each basic block
7050 (which is 2 for each SET). */
7051 insn = f;
7052 while (insn)
7054 cse_altered = 0;
7055 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7056 flag_cse_skip_blocks);
7058 /* If this basic block was already processed or has no sets, skip it. */
7059 if (val.nsets == 0 || GET_MODE (insn) == QImode)
7061 PUT_MODE (insn, VOIDmode);
7062 insn = (val.last ? NEXT_INSN (val.last) : 0);
7063 val.path_size = 0;
7064 continue;
7067 cse_basic_block_start = val.low_cuid;
7068 cse_basic_block_end = val.high_cuid;
7069 max_qty = val.nsets * 2;
7071 if (file)
7072 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
7073 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7074 val.nsets);
7076 /* Make MAX_QTY bigger to give us room to optimize
7077 past the end of this basic block, if that should prove useful. */
7078 if (max_qty < 500)
7079 max_qty = 500;
7081 /* If this basic block is being extended by following certain jumps,
7082 (see `cse_end_of_basic_block'), we reprocess the code from the start.
7083 Otherwise, we start after this basic block. */
7084 if (val.path_size > 0)
7085 cse_basic_block (insn, val.last, val.path, 0);
7086 else
7088 int old_cse_jumps_altered = cse_jumps_altered;
7089 rtx temp;
7091 /* When cse changes a conditional jump to an unconditional
7092 jump, we want to reprocess the block, since it will give
7093 us a new branch path to investigate. */
7094 cse_jumps_altered = 0;
7095 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
7096 if (cse_jumps_altered == 0
7097 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7098 insn = temp;
7100 cse_jumps_altered |= old_cse_jumps_altered;
7103 if (cse_altered)
7104 ggc_collect ();
7106 #ifdef USE_C_ALLOCA
7107 alloca (0);
7108 #endif
7111 ggc_pop_context ();
7113 if (max_elements_made < n_elements_made)
7114 max_elements_made = n_elements_made;
7116 /* Clean up. */
7117 end_alias_analysis ();
7118 free (uid_cuid);
7119 free (reg_eqv_table);
7120 free (val.path);
7122 return cse_jumps_altered || recorded_label_ref;
7125 /* Process a single basic block. FROM and TO and the limits of the basic
7126 block. NEXT_BRANCH points to the branch path when following jumps or
7127 a null path when not following jumps.
7129 AROUND_LOOP is nonzero if we are to try to cse around to the start of a
7130 loop. This is true when we are being called for the last time on a
7131 block and this CSE pass is before loop.c. */
7133 static rtx
7134 cse_basic_block (rtx from, rtx to, struct branch_path *next_branch,
7135 int around_loop)
7137 rtx insn;
7138 int to_usage = 0;
7139 rtx libcall_insn = NULL_RTX;
7140 int num_insns = 0;
7141 int no_conflict = 0;
7143 /* Allocate the space needed by qty_table. */
7144 qty_table = xmalloc (max_qty * sizeof (struct qty_table_elem));
7146 new_basic_block ();
7148 /* TO might be a label. If so, protect it from being deleted. */
7149 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7150 ++LABEL_NUSES (to);
7152 for (insn = from; insn != to; insn = NEXT_INSN (insn))
7154 enum rtx_code code = GET_CODE (insn);
7156 /* If we have processed 1,000 insns, flush the hash table to
7157 avoid extreme quadratic behavior. We must not include NOTEs
7158 in the count since there may be more of them when generating
7159 debugging information. If we clear the table at different
7160 times, code generated with -g -O might be different than code
7161 generated with -O but not -g.
7163 ??? This is a real kludge and needs to be done some other way.
7164 Perhaps for 2.9. */
7165 if (code != NOTE && num_insns++ > 1000)
7167 flush_hash_table ();
7168 num_insns = 0;
7171 /* See if this is a branch that is part of the path. If so, and it is
7172 to be taken, do so. */
7173 if (next_branch->branch == insn)
7175 enum taken status = next_branch++->status;
7176 if (status != NOT_TAKEN)
7178 if (status == TAKEN)
7179 record_jump_equiv (insn, 1);
7180 else
7181 invalidate_skipped_block (NEXT_INSN (insn));
7183 /* Set the last insn as the jump insn; it doesn't affect cc0.
7184 Then follow this branch. */
7185 #ifdef HAVE_cc0
7186 prev_insn_cc0 = 0;
7187 prev_insn = insn;
7188 #endif
7189 insn = JUMP_LABEL (insn);
7190 continue;
7194 if (GET_MODE (insn) == QImode)
7195 PUT_MODE (insn, VOIDmode);
7197 if (GET_RTX_CLASS (code) == 'i')
7199 rtx p;
7201 /* Process notes first so we have all notes in canonical forms when
7202 looking for duplicate operations. */
7204 if (REG_NOTES (insn))
7205 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
7207 /* Track when we are inside in LIBCALL block. Inside such a block,
7208 we do not want to record destinations. The last insn of a
7209 LIBCALL block is not considered to be part of the block, since
7210 its destination is the result of the block and hence should be
7211 recorded. */
7213 if (REG_NOTES (insn) != 0)
7215 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
7216 libcall_insn = XEXP (p, 0);
7217 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7219 /* Keep libcall_insn for the last SET insn of a no-conflict
7220 block to prevent changing the destination. */
7221 if (! no_conflict)
7222 libcall_insn = 0;
7223 else
7224 no_conflict = -1;
7226 else if (find_reg_note (insn, REG_NO_CONFLICT, NULL_RTX))
7227 no_conflict = 1;
7230 cse_insn (insn, libcall_insn);
7232 if (no_conflict == -1)
7234 libcall_insn = 0;
7235 no_conflict = 0;
7238 /* If we haven't already found an insn where we added a LABEL_REF,
7239 check this one. */
7240 if (GET_CODE (insn) == INSN && ! recorded_label_ref
7241 && for_each_rtx (&PATTERN (insn), check_for_label_ref,
7242 (void *) insn))
7243 recorded_label_ref = 1;
7246 /* If INSN is now an unconditional jump, skip to the end of our
7247 basic block by pretending that we just did the last insn in the
7248 basic block. If we are jumping to the end of our block, show
7249 that we can have one usage of TO. */
7251 if (any_uncondjump_p (insn))
7253 if (to == 0)
7255 free (qty_table);
7256 return 0;
7259 if (JUMP_LABEL (insn) == to)
7260 to_usage = 1;
7262 /* Maybe TO was deleted because the jump is unconditional.
7263 If so, there is nothing left in this basic block. */
7264 /* ??? Perhaps it would be smarter to set TO
7265 to whatever follows this insn,
7266 and pretend the basic block had always ended here. */
7267 if (INSN_DELETED_P (to))
7268 break;
7270 insn = PREV_INSN (to);
7273 /* See if it is ok to keep on going past the label
7274 which used to end our basic block. Remember that we incremented
7275 the count of that label, so we decrement it here. If we made
7276 a jump unconditional, TO_USAGE will be one; in that case, we don't
7277 want to count the use in that jump. */
7279 if (to != 0 && NEXT_INSN (insn) == to
7280 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7282 struct cse_basic_block_data val;
7283 rtx prev;
7285 insn = NEXT_INSN (to);
7287 /* If TO was the last insn in the function, we are done. */
7288 if (insn == 0)
7290 free (qty_table);
7291 return 0;
7294 /* If TO was preceded by a BARRIER we are done with this block
7295 because it has no continuation. */
7296 prev = prev_nonnote_insn (to);
7297 if (prev && GET_CODE (prev) == BARRIER)
7299 free (qty_table);
7300 return insn;
7303 /* Find the end of the following block. Note that we won't be
7304 following branches in this case. */
7305 to_usage = 0;
7306 val.path_size = 0;
7307 val.path = xmalloc (sizeof (struct branch_path)
7308 * PARAM_VALUE (PARAM_MAX_CSE_PATH_LENGTH));
7309 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7310 free (val.path);
7312 /* If the tables we allocated have enough space left
7313 to handle all the SETs in the next basic block,
7314 continue through it. Otherwise, return,
7315 and that block will be scanned individually. */
7316 if (val.nsets * 2 + next_qty > max_qty)
7317 break;
7319 cse_basic_block_start = val.low_cuid;
7320 cse_basic_block_end = val.high_cuid;
7321 to = val.last;
7323 /* Prevent TO from being deleted if it is a label. */
7324 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7325 ++LABEL_NUSES (to);
7327 /* Back up so we process the first insn in the extension. */
7328 insn = PREV_INSN (insn);
7332 if (next_qty > max_qty)
7333 abort ();
7335 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7336 the previous insn is the only insn that branches to the head of a loop,
7337 we can cse into the loop. Don't do this if we changed the jump
7338 structure of a loop unless we aren't going to be following jumps. */
7340 insn = prev_nonnote_insn (to);
7341 if ((cse_jumps_altered == 0
7342 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7343 && around_loop && to != 0
7344 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7345 && GET_CODE (insn) == JUMP_INSN
7346 && JUMP_LABEL (insn) != 0
7347 && LABEL_NUSES (JUMP_LABEL (insn)) == 1)
7348 cse_around_loop (JUMP_LABEL (insn));
7350 free (qty_table);
7352 return to ? NEXT_INSN (to) : 0;
7355 /* Called via for_each_rtx to see if an insn is using a LABEL_REF for which
7356 there isn't a REG_LABEL note. Return one if so. DATA is the insn. */
7358 static int
7359 check_for_label_ref (rtx *rtl, void *data)
7361 rtx insn = (rtx) data;
7363 /* If this insn uses a LABEL_REF and there isn't a REG_LABEL note for it,
7364 we must rerun jump since it needs to place the note. If this is a
7365 LABEL_REF for a CODE_LABEL that isn't in the insn chain, don't do this
7366 since no REG_LABEL will be added. */
7367 return (GET_CODE (*rtl) == LABEL_REF
7368 && ! LABEL_REF_NONLOCAL_P (*rtl)
7369 && LABEL_P (XEXP (*rtl, 0))
7370 && INSN_UID (XEXP (*rtl, 0)) != 0
7371 && ! find_reg_note (insn, REG_LABEL, XEXP (*rtl, 0)));
7374 /* Count the number of times registers are used (not set) in X.
7375 COUNTS is an array in which we accumulate the count, INCR is how much
7376 we count each register usage. */
7378 static void
7379 count_reg_usage (rtx x, int *counts, int incr)
7381 enum rtx_code code;
7382 rtx note;
7383 const char *fmt;
7384 int i, j;
7386 if (x == 0)
7387 return;
7389 switch (code = GET_CODE (x))
7391 case REG:
7392 counts[REGNO (x)] += incr;
7393 return;
7395 case PC:
7396 case CC0:
7397 case CONST:
7398 case CONST_INT:
7399 case CONST_DOUBLE:
7400 case CONST_VECTOR:
7401 case SYMBOL_REF:
7402 case LABEL_REF:
7403 return;
7405 case CLOBBER:
7406 /* If we are clobbering a MEM, mark any registers inside the address
7407 as being used. */
7408 if (GET_CODE (XEXP (x, 0)) == MEM)
7409 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, incr);
7410 return;
7412 case SET:
7413 /* Unless we are setting a REG, count everything in SET_DEST. */
7414 if (GET_CODE (SET_DEST (x)) != REG)
7415 count_reg_usage (SET_DEST (x), counts, incr);
7416 count_reg_usage (SET_SRC (x), counts, incr);
7417 return;
7419 case CALL_INSN:
7420 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, incr);
7421 /* Fall through. */
7423 case INSN:
7424 case JUMP_INSN:
7425 count_reg_usage (PATTERN (x), counts, incr);
7427 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7428 use them. */
7430 note = find_reg_equal_equiv_note (x);
7431 if (note)
7433 rtx eqv = XEXP (note, 0);
7435 if (GET_CODE (eqv) == EXPR_LIST)
7436 /* This REG_EQUAL note describes the result of a function call.
7437 Process all the arguments. */
7440 count_reg_usage (XEXP (eqv, 0), counts, incr);
7441 eqv = XEXP (eqv, 1);
7443 while (eqv && GET_CODE (eqv) == EXPR_LIST);
7444 else
7445 count_reg_usage (eqv, counts, incr);
7447 return;
7449 case EXPR_LIST:
7450 if (REG_NOTE_KIND (x) == REG_EQUAL
7451 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE)
7452 /* FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
7453 involving registers in the address. */
7454 || GET_CODE (XEXP (x, 0)) == CLOBBER)
7455 count_reg_usage (XEXP (x, 0), counts, incr);
7457 count_reg_usage (XEXP (x, 1), counts, incr);
7458 return;
7460 case ASM_OPERANDS:
7461 /* Iterate over just the inputs, not the constraints as well. */
7462 for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
7463 count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, incr);
7464 return;
7466 case INSN_LIST:
7467 abort ();
7469 default:
7470 break;
7473 fmt = GET_RTX_FORMAT (code);
7474 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7476 if (fmt[i] == 'e')
7477 count_reg_usage (XEXP (x, i), counts, incr);
7478 else if (fmt[i] == 'E')
7479 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7480 count_reg_usage (XVECEXP (x, i, j), counts, incr);
7484 /* Return true if set is live. */
7485 static bool
7486 set_live_p (rtx set, rtx insn ATTRIBUTE_UNUSED, /* Only used with HAVE_cc0. */
7487 int *counts)
7489 #ifdef HAVE_cc0
7490 rtx tem;
7491 #endif
7493 if (set_noop_p (set))
7496 #ifdef HAVE_cc0
7497 else if (GET_CODE (SET_DEST (set)) == CC0
7498 && !side_effects_p (SET_SRC (set))
7499 && ((tem = next_nonnote_insn (insn)) == 0
7500 || !INSN_P (tem)
7501 || !reg_referenced_p (cc0_rtx, PATTERN (tem))))
7502 return false;
7503 #endif
7504 else if (GET_CODE (SET_DEST (set)) != REG
7505 || REGNO (SET_DEST (set)) < FIRST_PSEUDO_REGISTER
7506 || counts[REGNO (SET_DEST (set))] != 0
7507 || side_effects_p (SET_SRC (set))
7508 /* An ADDRESSOF expression can turn into a use of the
7509 internal arg pointer, so always consider the
7510 internal arg pointer live. If it is truly dead,
7511 flow will delete the initializing insn. */
7512 || (SET_DEST (set) == current_function_internal_arg_pointer))
7513 return true;
7514 return false;
7517 /* Return true if insn is live. */
7519 static bool
7520 insn_live_p (rtx insn, int *counts)
7522 int i;
7523 if (flag_non_call_exceptions && may_trap_p (PATTERN (insn)))
7524 return true;
7525 else if (GET_CODE (PATTERN (insn)) == SET)
7526 return set_live_p (PATTERN (insn), insn, counts);
7527 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7529 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7531 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7533 if (GET_CODE (elt) == SET)
7535 if (set_live_p (elt, insn, counts))
7536 return true;
7538 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7539 return true;
7541 return false;
7543 else
7544 return true;
7547 /* Return true if libcall is dead as a whole. */
7549 static bool
7550 dead_libcall_p (rtx insn, int *counts)
7552 rtx note, set, new;
7554 /* See if there's a REG_EQUAL note on this insn and try to
7555 replace the source with the REG_EQUAL expression.
7557 We assume that insns with REG_RETVALs can only be reg->reg
7558 copies at this point. */
7559 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7560 if (!note)
7561 return false;
7563 set = single_set (insn);
7564 if (!set)
7565 return false;
7567 new = simplify_rtx (XEXP (note, 0));
7568 if (!new)
7569 new = XEXP (note, 0);
7571 /* While changing insn, we must update the counts accordingly. */
7572 count_reg_usage (insn, counts, -1);
7574 if (validate_change (insn, &SET_SRC (set), new, 0))
7576 count_reg_usage (insn, counts, 1);
7577 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7578 remove_note (insn, note);
7579 return true;
7582 if (CONSTANT_P (new))
7584 new = force_const_mem (GET_MODE (SET_DEST (set)), new);
7585 if (new && validate_change (insn, &SET_SRC (set), new, 0))
7587 count_reg_usage (insn, counts, 1);
7588 remove_note (insn, find_reg_note (insn, REG_RETVAL, NULL_RTX));
7589 remove_note (insn, note);
7590 return true;
7594 count_reg_usage (insn, counts, 1);
7595 return false;
7598 /* Scan all the insns and delete any that are dead; i.e., they store a register
7599 that is never used or they copy a register to itself.
7601 This is used to remove insns made obviously dead by cse, loop or other
7602 optimizations. It improves the heuristics in loop since it won't try to
7603 move dead invariants out of loops or make givs for dead quantities. The
7604 remaining passes of the compilation are also sped up. */
7607 delete_trivially_dead_insns (rtx insns, int nreg)
7609 int *counts;
7610 rtx insn, prev;
7611 int in_libcall = 0, dead_libcall = 0;
7612 int ndead = 0, nlastdead, niterations = 0;
7614 timevar_push (TV_DELETE_TRIVIALLY_DEAD);
7615 /* First count the number of times each register is used. */
7616 counts = xcalloc (nreg, sizeof (int));
7617 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7618 count_reg_usage (insn, counts, 1);
7622 nlastdead = ndead;
7623 niterations++;
7624 /* Go from the last insn to the first and delete insns that only set unused
7625 registers or copy a register to itself. As we delete an insn, remove
7626 usage counts for registers it uses.
7628 The first jump optimization pass may leave a real insn as the last
7629 insn in the function. We must not skip that insn or we may end
7630 up deleting code that is not really dead. */
7631 insn = get_last_insn ();
7632 if (! INSN_P (insn))
7633 insn = prev_real_insn (insn);
7635 for (; insn; insn = prev)
7637 int live_insn = 0;
7639 prev = prev_real_insn (insn);
7641 /* Don't delete any insns that are part of a libcall block unless
7642 we can delete the whole libcall block.
7644 Flow or loop might get confused if we did that. Remember
7645 that we are scanning backwards. */
7646 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7648 in_libcall = 1;
7649 live_insn = 1;
7650 dead_libcall = dead_libcall_p (insn, counts);
7652 else if (in_libcall)
7653 live_insn = ! dead_libcall;
7654 else
7655 live_insn = insn_live_p (insn, counts);
7657 /* If this is a dead insn, delete it and show registers in it aren't
7658 being used. */
7660 if (! live_insn)
7662 count_reg_usage (insn, counts, -1);
7663 delete_insn_and_edges (insn);
7664 ndead++;
7667 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7669 in_libcall = 0;
7670 dead_libcall = 0;
7674 while (ndead != nlastdead);
7676 if (rtl_dump_file && ndead)
7677 fprintf (rtl_dump_file, "Deleted %i trivially dead insns; %i iterations\n",
7678 ndead, niterations);
7679 /* Clean up. */
7680 free (counts);
7681 timevar_pop (TV_DELETE_TRIVIALLY_DEAD);
7682 return ndead;
7685 /* This function is called via for_each_rtx. The argument, NEWREG, is
7686 a condition code register with the desired mode. If we are looking
7687 at the same register in a different mode, replace it with
7688 NEWREG. */
7690 static int
7691 cse_change_cc_mode (rtx *loc, void *data)
7693 rtx newreg = (rtx) data;
7695 if (*loc
7696 && GET_CODE (*loc) == REG
7697 && REGNO (*loc) == REGNO (newreg)
7698 && GET_MODE (*loc) != GET_MODE (newreg))
7700 *loc = newreg;
7701 return -1;
7703 return 0;
7706 /* Change the mode of any reference to the register REGNO (NEWREG) to
7707 GET_MODE (NEWREG), starting at START. Stop before END. Stop at
7708 any instruction which modifies NEWREG. */
7710 static void
7711 cse_change_cc_mode_insns (rtx start, rtx end, rtx newreg)
7713 rtx insn;
7715 for (insn = start; insn != end; insn = NEXT_INSN (insn))
7717 if (! INSN_P (insn))
7718 continue;
7720 if (reg_set_p (newreg, insn))
7721 return;
7723 for_each_rtx (&PATTERN (insn), cse_change_cc_mode, newreg);
7724 for_each_rtx (&REG_NOTES (insn), cse_change_cc_mode, newreg);
7728 /* BB is a basic block which finishes with CC_REG as a condition code
7729 register which is set to CC_SRC. Look through the successors of BB
7730 to find blocks which have a single predecessor (i.e., this one),
7731 and look through those blocks for an assignment to CC_REG which is
7732 equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are
7733 permitted to change the mode of CC_SRC to a compatible mode. This
7734 returns VOIDmode if no equivalent assignments were found.
7735 Otherwise it returns the mode which CC_SRC should wind up with.
7737 The main complexity in this function is handling the mode issues.
7738 We may have more than one duplicate which we can eliminate, and we
7739 try to find a mode which will work for multiple duplicates. */
7741 static enum machine_mode
7742 cse_cc_succs (basic_block bb, rtx cc_reg, rtx cc_src, bool can_change_mode)
7744 bool found_equiv;
7745 enum machine_mode mode;
7746 unsigned int insn_count;
7747 edge e;
7748 rtx insns[2];
7749 enum machine_mode modes[2];
7750 rtx last_insns[2];
7751 unsigned int i;
7752 rtx newreg;
7754 /* We expect to have two successors. Look at both before picking
7755 the final mode for the comparison. If we have more successors
7756 (i.e., some sort of table jump, although that seems unlikely),
7757 then we require all beyond the first two to use the same
7758 mode. */
7760 found_equiv = false;
7761 mode = GET_MODE (cc_src);
7762 insn_count = 0;
7763 for (e = bb->succ; e; e = e->succ_next)
7765 rtx insn;
7766 rtx end;
7768 if (e->flags & EDGE_COMPLEX)
7769 continue;
7771 if (! e->dest->pred
7772 || e->dest->pred->pred_next
7773 || e->dest == EXIT_BLOCK_PTR)
7774 continue;
7776 end = NEXT_INSN (BB_END (e->dest));
7777 for (insn = BB_HEAD (e->dest); insn != end; insn = NEXT_INSN (insn))
7779 rtx set;
7781 if (! INSN_P (insn))
7782 continue;
7784 /* If CC_SRC is modified, we have to stop looking for
7785 something which uses it. */
7786 if (modified_in_p (cc_src, insn))
7787 break;
7789 /* Check whether INSN sets CC_REG to CC_SRC. */
7790 set = single_set (insn);
7791 if (set
7792 && GET_CODE (SET_DEST (set)) == REG
7793 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7795 bool found;
7796 enum machine_mode set_mode;
7797 enum machine_mode comp_mode;
7799 found = false;
7800 set_mode = GET_MODE (SET_SRC (set));
7801 comp_mode = set_mode;
7802 if (rtx_equal_p (cc_src, SET_SRC (set)))
7803 found = true;
7804 else if (GET_CODE (cc_src) == COMPARE
7805 && GET_CODE (SET_SRC (set)) == COMPARE
7806 && mode != set_mode
7807 && rtx_equal_p (XEXP (cc_src, 0),
7808 XEXP (SET_SRC (set), 0))
7809 && rtx_equal_p (XEXP (cc_src, 1),
7810 XEXP (SET_SRC (set), 1)))
7813 comp_mode = (*targetm.cc_modes_compatible) (mode, set_mode);
7814 if (comp_mode != VOIDmode
7815 && (can_change_mode || comp_mode == mode))
7816 found = true;
7819 if (found)
7821 found_equiv = true;
7822 if (insn_count < ARRAY_SIZE (insns))
7824 insns[insn_count] = insn;
7825 modes[insn_count] = set_mode;
7826 last_insns[insn_count] = end;
7827 ++insn_count;
7829 if (mode != comp_mode)
7831 if (! can_change_mode)
7832 abort ();
7833 mode = comp_mode;
7834 PUT_MODE (cc_src, mode);
7837 else
7839 if (set_mode != mode)
7841 /* We found a matching expression in the
7842 wrong mode, but we don't have room to
7843 store it in the array. Punt. This case
7844 should be rare. */
7845 break;
7847 /* INSN sets CC_REG to a value equal to CC_SRC
7848 with the right mode. We can simply delete
7849 it. */
7850 delete_insn (insn);
7853 /* We found an instruction to delete. Keep looking,
7854 in the hopes of finding a three-way jump. */
7855 continue;
7858 /* We found an instruction which sets the condition
7859 code, so don't look any farther. */
7860 break;
7863 /* If INSN sets CC_REG in some other way, don't look any
7864 farther. */
7865 if (reg_set_p (cc_reg, insn))
7866 break;
7869 /* If we fell off the bottom of the block, we can keep looking
7870 through successors. We pass CAN_CHANGE_MODE as false because
7871 we aren't prepared to handle compatibility between the
7872 further blocks and this block. */
7873 if (insn == end)
7875 enum machine_mode submode;
7877 submode = cse_cc_succs (e->dest, cc_reg, cc_src, false);
7878 if (submode != VOIDmode)
7880 if (submode != mode)
7881 abort ();
7882 found_equiv = true;
7883 can_change_mode = false;
7888 if (! found_equiv)
7889 return VOIDmode;
7891 /* Now INSN_COUNT is the number of instructions we found which set
7892 CC_REG to a value equivalent to CC_SRC. The instructions are in
7893 INSNS. The modes used by those instructions are in MODES. */
7895 newreg = NULL_RTX;
7896 for (i = 0; i < insn_count; ++i)
7898 if (modes[i] != mode)
7900 /* We need to change the mode of CC_REG in INSNS[i] and
7901 subsequent instructions. */
7902 if (! newreg)
7904 if (GET_MODE (cc_reg) == mode)
7905 newreg = cc_reg;
7906 else
7907 newreg = gen_rtx_REG (mode, REGNO (cc_reg));
7909 cse_change_cc_mode_insns (NEXT_INSN (insns[i]), last_insns[i],
7910 newreg);
7913 delete_insn (insns[i]);
7916 return mode;
7919 /* If we have a fixed condition code register (or two), walk through
7920 the instructions and try to eliminate duplicate assignments. */
7922 void
7923 cse_condition_code_reg (void)
7925 unsigned int cc_regno_1;
7926 unsigned int cc_regno_2;
7927 rtx cc_reg_1;
7928 rtx cc_reg_2;
7929 basic_block bb;
7931 if (! (*targetm.fixed_condition_code_regs) (&cc_regno_1, &cc_regno_2))
7932 return;
7934 cc_reg_1 = gen_rtx_REG (CCmode, cc_regno_1);
7935 if (cc_regno_2 != INVALID_REGNUM)
7936 cc_reg_2 = gen_rtx_REG (CCmode, cc_regno_2);
7937 else
7938 cc_reg_2 = NULL_RTX;
7940 FOR_EACH_BB (bb)
7942 rtx last_insn;
7943 rtx cc_reg;
7944 rtx insn;
7945 rtx cc_src_insn;
7946 rtx cc_src;
7947 enum machine_mode mode;
7948 enum machine_mode orig_mode;
7950 /* Look for blocks which end with a conditional jump based on a
7951 condition code register. Then look for the instruction which
7952 sets the condition code register. Then look through the
7953 successor blocks for instructions which set the condition
7954 code register to the same value. There are other possible
7955 uses of the condition code register, but these are by far the
7956 most common and the ones which we are most likely to be able
7957 to optimize. */
7959 last_insn = BB_END (bb);
7960 if (GET_CODE (last_insn) != JUMP_INSN)
7961 continue;
7963 if (reg_referenced_p (cc_reg_1, PATTERN (last_insn)))
7964 cc_reg = cc_reg_1;
7965 else if (cc_reg_2 && reg_referenced_p (cc_reg_2, PATTERN (last_insn)))
7966 cc_reg = cc_reg_2;
7967 else
7968 continue;
7970 cc_src_insn = NULL_RTX;
7971 cc_src = NULL_RTX;
7972 for (insn = PREV_INSN (last_insn);
7973 insn && insn != PREV_INSN (BB_HEAD (bb));
7974 insn = PREV_INSN (insn))
7976 rtx set;
7978 if (! INSN_P (insn))
7979 continue;
7980 set = single_set (insn);
7981 if (set
7982 && GET_CODE (SET_DEST (set)) == REG
7983 && REGNO (SET_DEST (set)) == REGNO (cc_reg))
7985 cc_src_insn = insn;
7986 cc_src = SET_SRC (set);
7987 break;
7989 else if (reg_set_p (cc_reg, insn))
7990 break;
7993 if (! cc_src_insn)
7994 continue;
7996 if (modified_between_p (cc_src, cc_src_insn, NEXT_INSN (last_insn)))
7997 continue;
7999 /* Now CC_REG is a condition code register used for a
8000 conditional jump at the end of the block, and CC_SRC, in
8001 CC_SRC_INSN, is the value to which that condition code
8002 register is set, and CC_SRC is still meaningful at the end of
8003 the basic block. */
8005 orig_mode = GET_MODE (cc_src);
8006 mode = cse_cc_succs (bb, cc_reg, cc_src, true);
8007 if (mode != VOIDmode)
8009 if (mode != GET_MODE (cc_src))
8010 abort ();
8011 if (mode != orig_mode)
8013 rtx newreg = gen_rtx_REG (mode, REGNO (cc_reg));
8015 /* Change the mode of CC_REG in CC_SRC_INSN to
8016 GET_MODE (NEWREG). */
8017 for_each_rtx (&PATTERN (cc_src_insn), cse_change_cc_mode,
8018 newreg);
8019 for_each_rtx (&REG_NOTES (cc_src_insn), cse_change_cc_mode,
8020 newreg);
8022 /* Do the same in the following insns that use the
8023 current value of CC_REG within BB. */
8024 cse_change_cc_mode_insns (NEXT_INSN (cc_src_insn),
8025 NEXT_INSN (last_insn),
8026 newreg);