sys/platform/pc64/apic/apic_ipl.s

   1 /*
   2  * Copyright (c) 2003,2004,2008 The DragonFly Project.  All rights reserved.
   3  *
   4  * This code is derived from software contributed to The DragonFly Project
   5  * by Matthew Dillon <dillon@backplane.com>
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in
  15  *    the documentation and/or other materials provided with the
  16  *    distribution.
  17  * 3. Neither the name of The DragonFly Project nor the names of its
  18  *    contributors may be used to endorse or promote products derived
  19  *    from this software without specific, prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  24  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  25  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  27  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  28  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  29  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  31  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  32  * SUCH DAMAGE.
  33  *
  34  * Copyright (c) 1997, by Steve Passe,  All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. The name of the developer may NOT be used to endorse or promote products
  42  *    derived from this software without specific prior written permission.
  43  *
  44  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  45  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  46  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  47  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  48  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  49  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  50  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  51  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  52  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  53  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  54  * SUCH DAMAGE.
  55  *
  56  * $FreeBSD: src/sys/i386/isa/apic_ipl.s,v 1.27.2.2 2000/09/30 02:49:35 ps Exp $
  57  */
  58
  59 #include <machine/asmacros.h>
  60 #include <machine/segments.h>
  61 #include <machine/lock.h>
  62 #include <machine/psl.h>
  63 #include <machine/trap.h>
  64
  65 #include "apicreg.h"
  66 #include "apic_ipl.h"
  67 #include "assym.s"
  68
  69 #ifdef SMP /* APIC-IO */
  70
  71         .text
  72         SUPERALIGN_TEXT
  73
  74         /*
  75          * Functions to enable and disable a hardware interrupt.  The
  76          * IRQ number is passed as an argument.
  77          */
  78 ENTRY(APIC_INTRDIS)
  79         APIC_IMASK_LOCK                 /* enter critical reg */
  80         movl    %edi, %eax
  81 1:
  82         imull   $AIMI_SIZE, %eax
  83         orl     $AIMI_FLAG_MASKED, CNAME(int_to_apicintpin) + AIMI_FLAGS(%rax)
  84         movq    CNAME(int_to_apicintpin) + AIMI_APIC_ADDRESS(%rax), %rdx
  85         movl    CNAME(int_to_apicintpin) + AIMI_REDIRINDEX(%rax), %ecx
  86         testq   %rdx, %rdx
  87         jz      2f
  88         movl    %ecx, (%rdx)            /* target register index */
  89         orl     $IOART_INTMASK, IOAPIC_WINDOW(%rdx)
  90                                         /* set intmask in target apic reg */
  91 2:
  92         APIC_IMASK_UNLOCK               /* exit critical reg */
  93         ret
  94
  95 ENTRY(APIC_INTREN)
  96         APIC_IMASK_LOCK                 /* enter critical reg */
  97         movl    %edi, %eax
  98 1:
  99         imull   $AIMI_SIZE, %eax
 100         andl    $~AIMI_FLAG_MASKED, CNAME(int_to_apicintpin) + AIMI_FLAGS(%rax)
 101         movq    CNAME(int_to_apicintpin) + AIMI_APIC_ADDRESS(%rax), %rdx
 102         movl    CNAME(int_to_apicintpin) + AIMI_REDIRINDEX(%rax), %ecx
 103         testq   %rdx, %rdx
 104         jz      2f
 105         movl    %ecx, (%rdx)            /* write the target register index */
 106         andl    $~IOART_INTMASK, IOAPIC_WINDOW(%rdx)
 107                                         /* clear mask bit */
 108 2:
 109         APIC_IMASK_UNLOCK               /* exit critical reg */
 110         ret
 111
 112 /******************************************************************************
 113  *
 114  */
 115
 116 /*
 117  * u_int io_apic_read(int apic, int select);
 118  */
 119 ENTRY(io_apic_read)
 120         movl    %edi, %ecx              /* APIC # */
 121         movq    ioapic, %rax
 122         movq    (%rax,%rcx,8), %rdx     /* APIC base register address */
 123         movl    %esi, (%rdx)            /* write the target register index */
 124         movl    IOAPIC_WINDOW(%rdx), %eax /* read the APIC register data */
 125         ret                             /* %eax = register value */
 126
 127 /*
 128  * void io_apic_write(int apic, int select, u_int value);
 129  */
 130 ENTRY(io_apic_write)
 131         movl    %edi, %ecx              /* APIC # */
 132         movq    ioapic, %rax
 133         movq    (%rax,%rcx,8), %r8      /* APIC base register address */
 134         movl    %esi, (%r8)             /* write the target register index */
 135         movl    %edx, IOAPIC_WINDOW(%r8) /* write the APIC register data */
 136         ret                             /* %eax = void */
 137 #endif