ext2fs - A few bug fixes and syntax adjustments.
[dragonfly.git] / sys / dev / atm / hea / eni_init.c
blob3c133626531f990b2444c6c9bca9e1714044da13
1 /*
3 * ===================================
4 * HARP | Host ATM Research Platform
5 * ===================================
8 * This Host ATM Research Platform ("HARP") file (the "Software") is
9 * made available by Network Computing Services, Inc. ("NetworkCS")
10 * "AS IS". NetworkCS does not provide maintenance, improvements or
11 * support of any kind.
13 * NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
14 * INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
15 * AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
16 * SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
17 * In no event shall NetworkCS be responsible for any damages, including
18 * but not limited to consequential damages, arising from or relating to
19 * any use of the Software or related support.
21 * Copyright 1994-1998 Network Computing Services, Inc.
23 * Copies of this Software may be made, however, the above copyright
24 * notice must be reproduced on all copies.
26 * @(#) $FreeBSD: src/sys/dev/hea/eni_init.c,v 1.3 1999/08/28 00:41:44 peter Exp $
27 * @(#) $DragonFly: src/sys/dev/atm/hea/eni_init.c,v 1.5 2008/03/01 22:03:13 swildner Exp $
31 * Efficient ENI Adapter Support
32 * -----------------------------
34 * Driver initialization support
38 #include <netproto/atm/kern_include.h>
40 #include "eni_stats.h"
41 #include "eni.h"
42 #include "eni_var.h"
45 * Initialize adapter for PDU processing
47 * Enable interrupts, set master control, initialize TX buffer,
48 * set initial pointers, etc.
50 * Arguments:
51 * eup pointer to device unit structure
53 * Returns:
54 * 0 successful
55 * error error condition
57 int
58 eni_init(Eni_unit *eup)
60 u_long words, order;
63 * Allocate one large TX buffer. Currently we use only one
64 * channel with full cell rate which all VCs will use.
65 * This will (probably) have to change (alot) when we
66 * implement QoS.
69 * Server cards, which have more then 512KB of RAM, will
70 * allocate a 128KB TX buffer, while client cards, with
71 * 512KB or less will allocate a 32KB TX buffer.
73 words = ( eup->eu_ramsize > MAX_CLIENT_RAM * ENI_BUF_PGSZ ?
74 TX_LARGE_BSIZE : TX_SMALL_BSIZE ) * ENI_BUF_PGSZ;
75 if ( ( eup->eu_txbuf = eni_allocate_buffer ( eup, &words ) ) ==
76 (caddr_t)NULL ) {
77 return ENOMEM;
79 eup->eu_txsize = words >> 2; /* Bytes to words */
80 words >>= ENI_LOC_PREDIV; /* Predivide by 256 words */
81 for ( order = -1; words; order++ )
82 words >>= 1;
83 eup->eu_midway[MIDWAY_TXPLACE] =
84 (order << TXSIZE_SHIFT) | ((int)eup->eu_txbuf >> ENI_LOC_PREDIV);
85 eup->eu_txpos = eup->eu_midway[MIDWAY_DESCR] & 0x7FFF;
87 * Set first word of unack'ed data to start
89 eup->eu_txfirst = eup->eu_txpos;
92 * Set initial values of local DMA pointer used to prevent wraps
94 eup->eu_txdmawr = 0;
95 eup->eu_rxdmawr = 0;
98 * Initialize queue's for receive/transmit pdus
100 eup->eu_txqueue.ifq_maxlen = ENI_IFQ_MAXLEN;
101 eup->eu_rxqueue.ifq_maxlen = ENI_IFQ_MAXLEN;
104 * Acknowledge any interrupts
106 (void) eup->eu_midway[MIDWAY_ISA];
109 * "Zero" Sonet error counters
111 eni_zero_stats ( eup );
114 * Set master control register
116 * IntSel1 | LOCK_MODE | DMA_ENABLE | TX_ENABLE | RX_ENABLE
119 eup->eu_midway[MIDWAY_MASTER] = 1 << ENI_ISEL_SHIFT |
120 ENI_M_DMAENABLE | ENI_M_TXENABLE | ENI_M_RXENABLE;
123 * Enable interrupts
125 eup->eu_midway[MIDWAY_IE] = ENI_INT_SERVICE | ENI_INT_RX_DMA |
126 ENI_INT_TX_DMA | ENI_INT_DMA_ERR | ENI_INT_DMA_LERR |
127 ENI_INT_IDEN | ENI_INT_DMA_OVFL;
130 * Last thing to do is to indicate that we've finished initializing
131 * this unit.
133 eup->eu_flags |= CUF_INITED;
135 return 0;