sys/platform/pc64/include/pmap.h

   1 /*
   2  * Copyright (c) 1991 Regents of the University of California.
   3  * Copyright (c) 2003 Peter Wemm.
   4  * Copyright (c) 2008 The DragonFly Project.
   5  * All rights reserved.
   6  *
   7  * This code is derived from software contributed to Berkeley by
   8  * the Systems Programming Group of the University of Utah Computer
   9  * Science Department and William Jolitz of UUNET Technologies Inc.
  10  *
  11  * Redistribution and use in source and binary forms, with or without
  12  * modification, are permitted provided that the following conditions
  13  * are met:
  14  * 1. Redistributions of source code must retain the above copyright
  15  *    notice, this list of conditions and the following disclaimer.
  16  * 2. Redistributions in binary form must reproduce the above copyright
  17  *    notice, this list of conditions and the following disclaimer in the
  18  *    documentation and/or other materials provided with the distribution.
  19  * 3. Neither the name of the University nor the names of its contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  33  * SUCH DAMAGE.
  34  *
  35  * Derived from hp300 version by Mike Hibler, this version by William
  36  * Jolitz uses a recursive map [a pde points to the page directory] to
  37  * map the page tables using the pagetables themselves. This is done to
  38  * reduce the impact on kernel virtual memory for lots of sparse address
  39  * space, and to reduce the cost of memory to each process.
  40  *
  41  * from: hp300: @(#)pmap.h      7.2 (Berkeley) 12/16/90
  42  * from: @(#)pmap.h     7.4 (Berkeley) 5/12/91
  43  * $FreeBSD: src/sys/i386/include/pmap.h,v 1.65.2.3 2001/10/03 07:15:37 peter Exp $
  44  */
  45
  46 #ifndef _MACHINE_PMAP_H_
  47 #define _MACHINE_PMAP_H_
  48
  49 #include <cpu/pmap.h>
  50
  51 /*
  52  * Size of Kernel address space.  This is the number of page table pages
  53  * (2GB each) to use for the kernel.  256 pages == 512 Gigabytes.
  54  * This **MUST** be a multiple of 4 (eg: 252, 256, 260, etc).
  55  */
  56 #ifndef KVA_PAGES
  57 #define KVA_PAGES       256
  58 #endif
  59
  60 /*
  61  * Pte related macros.  This is complicated by having to deal with
  62  * the sign extension of the 48th bit.
  63  */
  64 #define KVADDR(l4, l3, l2, l1) ( \
  65         ((unsigned long)-1 << 47) | \
  66         ((unsigned long)(l4) << PML4SHIFT) | \
  67         ((unsigned long)(l3) << PDPSHIFT) | \
  68         ((unsigned long)(l2) << PDRSHIFT) | \
  69         ((unsigned long)(l1) << PAGE_SHIFT))
  70
  71 #define UVADDR(l4, l3, l2, l1) ( \
  72         ((unsigned long)(l4) << PML4SHIFT) | \
  73         ((unsigned long)(l3) << PDPSHIFT) | \
  74         ((unsigned long)(l2) << PDRSHIFT) | \
  75         ((unsigned long)(l1) << PAGE_SHIFT))
  76
  77 /*
  78  * NOTE: We no longer hardwire NKPT, it is calculated in create_pagetables()
  79  */
  80 #define NKPML4E         1               /* number of kernel PML4 slots */
  81 /* NKPDPE defined in vmparam.h */
  82
  83 /*
  84  * NUPDPs       512 (256 user)          number of PDPs in user page table
  85  * NUPDs        512 * 512               number of PDs in user page table
  86  * NUPTs        512 * 512 * 512         number of PTs in user page table
  87  * NUPTEs       512 * 512 * 512 * 512   number of PTEs in user page table
  88  *
  89  * NUPDP_USER   number of PDPs reserved for userland
  90  * NUPTE_USER   number of PTEs reserved for userland (big number)
  91  */
  92 #define NUPDP_USER      (NPML4EPG/2)
  93 #define NUPDP_TOTAL     (NPML4EPG)
  94 #define NUPD_TOTAL      (NPDPEPG * NUPDP_TOTAL)
  95 #define NUPT_TOTAL      (NPDEPG * NUPD_TOTAL)
  96 #define NUPTE_TOTAL     ((vm_pindex_t)NPTEPG * NUPT_TOTAL)
  97 #define NUPTE_USER      ((vm_pindex_t)NPTEPG * NPDEPG * NPDPEPG * NUPDP_USER)
  98
  99 /*
 100  * Number of 512G dmap PML4 slots (max ~254 or so but don't go over 64,
 101  * which gives us 32TB of ram).  Because we cache free, empty pmaps the
 102  * initialization overhead is minimal.
 103  *
 104  * It should be possible to bump this up to 255 (but not 256), which would
 105  * be able to address a maximum of ~127TB of physical ram.
 106  */
 107 #define NDMPML4E        64
 108
 109 /*
 110  * The *PML4I values control the layout of virtual memory.  Each PML4
 111  * entry represents 512G.
 112  */
 113 #define PML4PML4I       (NPML4EPG/2)    /* Index of recursive pml4 mapping */
 114
 115 #define KPML4I          (NPML4EPG-1)    /* Top 512GB for KVM */
 116 #define DMPML4I         (KPML4I-NDMPML4E) /* Next 512GBxN down for dmap */
 117
 118 /*
 119  * The location of KERNBASE in the last PD of the kernel's KVM (KPML4I)
 120  * space.  Each PD represents 1GB.  The kernel must be placed here
 121  * for the compile/link options to work properly so absolute 32-bit
 122  * addressing can be used to access stuff.
 123  */
 124 #define KPDPI           (NPDPEPG-2)     /* kernbase at -2GB */
 125
 126 /*
 127  * per-CPU data assume ~64K x SMP_MAXCPU, say up to 256 cpus
 128  * in the future or 16MB of space.  Each PD represents 2MB so
 129  * use NPDEPG-8 to place the per-CPU data.
 130  */
 131 #define MPPML4I         KPML4I
 132 #define MPPDPI          KPDPI
 133 #define MPPTDI          (NPDEPG-8)
 134
 135 /*
 136  * XXX doesn't really belong here I guess...
 137  */
 138 #define ISA_HOLE_START    0xa0000
 139 #define ISA_HOLE_LENGTH (0x100000-ISA_HOLE_START)
 140
 141 #ifndef LOCORE
 142
 143 #ifndef _SYS_TYPES_H_
 144 #include <sys/types.h>
 145 #endif
 146 #ifndef _SYS_QUEUE_H_
 147 #include <sys/queue.h>
 148 #endif
 149 #ifndef _SYS_TREE_H_
 150 #include <sys/tree.h>
 151 #endif
 152 #ifndef _SYS_SPINLOCK_H_
 153 #include <sys/spinlock.h>
 154 #endif
 155 #ifndef _SYS_THREAD_H_
 156 #include <sys/thread.h>
 157 #endif
 158 #ifndef _MACHINE_TYPES_H_
 159 #include <machine/types.h>
 160 #endif
 161 #ifndef _MACHINE_PARAM_H_
 162 #include <machine/param.h>
 163 #endif
 164
 165 /*
 166  * Address of current and alternate address space page table maps
 167  * and directories.
 168  */
 169 #ifdef _KERNEL
 170 #define addr_PTmap      (KVADDR(PML4PML4I, 0, 0, 0))
 171 #define addr_PDmap      (KVADDR(PML4PML4I, PML4PML4I, 0, 0))
 172 #define addr_PDPmap     (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, 0))
 173 #define addr_PML4map    (KVADDR(PML4PML4I, PML4PML4I, PML4PML4I, PML4PML4I))
 174 #define addr_PML4pml4e  (addr_PML4map + (PML4PML4I * sizeof(pml4_entry_t)))
 175 #define PTmap           ((pt_entry_t *)(addr_PTmap))
 176 #define PDmap           ((pd_entry_t *)(addr_PDmap))
 177 #define PDPmap          ((pd_entry_t *)(addr_PDPmap))
 178 #define PML4map         ((pd_entry_t *)(addr_PML4map))
 179 #define PML4pml4e       ((pd_entry_t *)(addr_PML4pml4e))
 180
 181 extern u_int64_t KPML4phys;     /* physical address of kernel level 4 */
 182 extern int pmap_fast_kernel_cpusync;
 183 #endif
 184
 185 #ifdef _KERNEL
 186
 187 /*
 188  * XXX
 189  */
 190 #define vtophys(va)     pmap_kextract(((vm_offset_t)(va)))
 191 #define vtophys_pte(va) ((pt_entry_t)pmap_kextract(((vm_offset_t)(va))))
 192
 193 #endif
 194
 195 #define pte_load_clear(pte)     atomic_readandclear_long(pte)
 196
 197 static __inline void
 198 pte_store(pt_entry_t *ptep, pt_entry_t pte)
 199 {
 200         *ptep = pte;
 201 }
 202
 203 #define pde_store(pdep, pde)    pte_store((pdep), (pde))
 204
 205 /*
 206  * Pmap stuff
 207  */
 208 struct pmap;
 209 struct pv_entry;
 210 struct vm_page;
 211 struct vm_object;
 212 struct vmspace;
 213
 214 TAILQ_HEAD(md_page_pv_list, pv_entry);
 215 /*
 216  * vm_page structures embed a list of related pv_entry's
 217  */
 218 struct md_page {
 219         struct md_page_pv_list  pv_list;
 220 };
 221
 222 /*
 223  * vm_object's representing large mappings can contain embedded pmaps
 224  * to organize sharing at higher page table levels for PROT_READ and
 225  * PROT_READ|PROT_WRITE maps.
 226  */
 227 struct md_object {
 228         struct pmap *pmap_rw;
 229         struct pmap *pmap_ro;
 230 };
 231
 232 /*
 233  * Each machine dependent implementation is expected to
 234  * keep certain statistics.  They may do this anyway they
 235  * so choose, but are expected to return the statistics
 236  * in the following structure.
 237  *
 238  * NOTE: We try to match the size of the pc32 pmap with the vkernel pmap
 239  * so the same utilities (like 'ps') can be used on both.
 240  */
 241 struct pmap_statistics {
 242         long resident_count;    /* # of pages mapped (total) */
 243         long wired_count;       /* # of pages wired */
 244 };
 245 typedef struct pmap_statistics *pmap_statistics_t;
 246
 247 struct pv_entry_rb_tree;
 248 RB_PROTOTYPE2(pv_entry_rb_tree, pv_entry, pv_entry,
 249               pv_entry_compare, vm_pindex_t);
 250
 251 /* Types of PMAP (regular, EPT Intel, NPT Amd) */
 252 #define REGULAR_PMAP            0
 253 #define EPT_PMAP                1
 254
 255 /* Bits indexes in pmap_bits */
 256 #define TYPE_IDX                0
 257 #define PG_V_IDX                1
 258 #define PG_RW_IDX               2
 259 #define PG_U_IDX                3
 260 #define PG_A_IDX                4
 261 #define PG_M_IDX                5
 262 #define PG_PS_IDX               6
 263 #define PG_G_IDX                7
 264 #define PG_W_IDX                8
 265 #define PG_MANAGED_IDX          9
 266 #define PG_DEVICE_IDX           10
 267 #define PG_N_IDX                11
 268 #define PG_NX_IDX               12
 269 #define PG_BITS_SIZE            13
 270
 271 #define PROTECTION_CODES_SIZE   8
 272 #define PAT_INDEX_SIZE          8
 273
 274 #define PM_PLACEMARKS           64              /* 16 @ 4 zones */
 275 #define PM_NOPLACEMARK          ((vm_pindex_t)-1)
 276 #define PM_PLACEMARK_WAKEUP     ((vm_pindex_t)0x8000000000000000LLU)
 277
 278 struct pmap {
 279         pml4_entry_t            *pm_pml4;       /* KVA of level 4 page table */
 280         struct pv_entry         *pm_pmlpv;      /* PV entry for pml4 */
 281         TAILQ_ENTRY(pmap)       pm_pmnode;      /* list of pmaps */
 282         RB_HEAD(pv_entry_rb_tree, pv_entry) pm_pvroot;
 283         int                     pm_count;       /* reference count */
 284         cpulock_t               pm_active_lock; /* interlock */
 285         cpumask_t               pm_active;      /* active on cpus */
 286         int                     pm_flags;
 287         struct pmap_statistics  pm_stats;       /* pmap statistics */
 288         struct spinlock         pm_spin;
 289         struct pv_entry         *pm_pvhint_pt;  /* pv_entry lookup hint */
 290         struct pv_entry         *pm_pvhint_pte; /* pv_entry lookup hint */
 291         vm_pindex_t             pm_placemarks[PM_PLACEMARKS];
 292         long                    pm_invgen;
 293         uint64_t                pmap_bits[PG_BITS_SIZE];
 294         uint64_t                protection_codes[PROTECTION_CODES_SIZE];
 295         pt_entry_t              pmap_cache_bits[PAT_INDEX_SIZE];
 296         pt_entry_t              pmap_cache_mask;
 297         int (*copyinstr)(const void *, void *, size_t, size_t *);
 298         int (*copyin)(const void *, void *, size_t);
 299         int (*copyout)(const void *, void *, size_t);
 300         int (*fubyte)(const uint8_t *);         /* returns int for -1 err */
 301         int (*subyte)(uint8_t *, uint8_t);
 302         int32_t (*fuword32)(const uint32_t *);
 303         int64_t (*fuword64)(const uint64_t *);
 304         int (*suword64)(uint64_t *, uint64_t);
 305         int (*suword32)(uint32_t *, int);
 306         uint32_t (*swapu32)(volatile uint32_t *, uint32_t v);
 307         uint64_t (*swapu64)(volatile uint64_t *, uint64_t v);
 308 };
 309
 310 #define PMAP_FLAG_SIMPLE        0x00000001
 311 #define PMAP_EMULATE_AD_BITS    0x00000002
 312 #define PMAP_HVM                0x00000004
 313 #define PMAP_SEGSHARED          0x00000008      /* segment shared opt */
 314
 315 #define pmap_resident_count(pmap) ((pmap)->pm_stats.resident_count)
 316 #define pmap_resident_tlnw_count(pmap) ((pmap)->pm_stats.resident_count - \
 317                                         (pmap)->pm_stats.wired_count)
 318
 319 typedef struct pmap     *pmap_t;
 320
 321 #ifdef _KERNEL
 322 extern struct pmap      kernel_pmap;
 323 #endif
 324
 325 /*
 326  * For each vm_page_t, there is a list of all currently valid virtual
 327  * mappings of that page.  An entry is a pv_entry_t, the list is pv_table.
 328  */
 329 typedef struct pv_entry {
 330         pmap_t          pv_pmap;        /* pmap where mapping lies */
 331         vm_pindex_t     pv_pindex;      /* PTE, PT, PD, PDP, or PML4 */
 332         TAILQ_ENTRY(pv_entry)   pv_list;
 333         RB_ENTRY(pv_entry)      pv_entry;
 334         struct vm_page  *pv_m;          /* page being mapped */
 335         u_int           pv_hold;        /* interlock action */
 336         u_int           pv_flags;
 337 #ifdef PMAP_DEBUG
 338         const char      *pv_func;
 339         int             pv_line;
 340         const char      *pv_func_lastfree;
 341         int             pv_line_lastfree;
 342 #endif
 343 } *pv_entry_t;
 344
 345 #define PV_HOLD_LOCKED          0x80000000U
 346 #define PV_HOLD_WAITING         0x40000000U
 347 #define PV_HOLD_UNUSED2000      0x20000000U
 348 #define PV_HOLD_MASK            0x1FFFFFFFU
 349
 350 #define PV_FLAG_VMOBJECT        0x00000001U     /* shared pt in VM obj */
 351
 352 #ifdef  _KERNEL
 353
 354 extern caddr_t  CADDR1;
 355 extern pt_entry_t *CMAP1;
 356 extern vm_paddr_t avail_end;
 357 extern vm_paddr_t avail_start;
 358 extern vm_offset_t clean_eva;
 359 extern vm_offset_t clean_sva;
 360 extern char *ptvmmap;           /* poor name! */
 361
 362 #ifndef __VM_PAGE_T_DEFINED__
 363 #define __VM_PAGE_T_DEFINED__
 364 typedef struct vm_page *vm_page_t;
 365 #endif
 366 #ifndef __VM_MEMATTR_T_DEFINED__
 367 #define __VM_MEMATTR_T_DEFINED__
 368 typedef char vm_memattr_t;
 369 #endif
 370
 371 void    pmap_release(struct pmap *pmap);
 372 void    pmap_interlock_wait (struct vmspace *);
 373 void    pmap_bootstrap (vm_paddr_t *);
 374 void    *pmap_mapbios(vm_paddr_t, vm_size_t);
 375 void    *pmap_mapdev (vm_paddr_t, vm_size_t);
 376 void    *pmap_mapdev_attr(vm_paddr_t, vm_size_t, int);
 377 void    *pmap_mapdev_uncacheable(vm_paddr_t, vm_size_t);
 378 void    pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma);
 379 void    pmap_unmapdev (vm_offset_t, vm_size_t);
 380 struct vm_page *pmap_use_pt (pmap_t, vm_offset_t);
 381 void    pmap_set_opt (void);
 382 void    pmap_init_pat(void);
 383 void    pmap_invalidate_cache_pages(vm_page_t *pages, int count);
 384 void    pmap_invalidate_cache_range(vm_offset_t sva, vm_offset_t eva);
 385
 386 static __inline int
 387 pmap_emulate_ad_bits(pmap_t pmap) {
 388         return pmap->pm_flags & PMAP_EMULATE_AD_BITS;
 389 }
 390
 391 /* Return various clipped indexes for a given VA */
 392
 393 /*
 394  * Returns the index of a PTE in a PT, representing a terminal
 395  * page.
 396  */
 397 static __inline vm_pindex_t
 398 pmap_pte_index(vm_offset_t va)
 399 {
 400         return ((va >> PAGE_SHIFT) & ((1ul << NPTEPGSHIFT) - 1));
 401 }
 402
 403 /*
 404  * Returns the index of a PT in a PD
 405  */
 406 static __inline vm_pindex_t
 407 pmap_pde_index(vm_offset_t va)
 408 {
 409         return ((va >> PDRSHIFT) & ((1ul << NPDEPGSHIFT) - 1));
 410 }
 411
 412 /*
 413  * Returns the index of a PD in a PDP
 414  */
 415 static __inline vm_pindex_t
 416 pmap_pdpe_index(vm_offset_t va)
 417 {
 418         return ((va >> PDPSHIFT) & ((1ul << NPDPEPGSHIFT) - 1));
 419 }
 420
 421 /*
 422  * Returns the index of a PDP in the PML4
 423  */
 424 static __inline vm_pindex_t
 425 pmap_pml4e_index(vm_offset_t va)
 426 {
 427         return ((va >> PML4SHIFT) & ((1ul << NPML4EPGSHIFT) - 1));
 428 }
 429
 430 #endif /* _KERNEL */
 431
 432 #endif /* !LOCORE */
 433
 434 #endif /* !_MACHINE_PMAP_H_ */