2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
30 #include <drm/drm_crtc.h>
31 #include <drm/drm_crtc_helper.h>
32 #include <drm/drm_edid.h>
33 #include "intel_drv.h"
34 #include <drm/i915_drm.h>
37 /* Here's the desired hotplug mode */
38 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
39 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
40 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
41 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
42 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
43 ADPA_CRT_HOTPLUG_ENABLE)
46 struct intel_encoder base
;
47 /* DPMS state is stored in the connector, which we need in the
48 * encoder's enable/disable callbacks */
49 struct intel_connector
*connector
;
50 bool force_hotplug_required
;
54 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
56 return container_of(encoder
, struct intel_crt
, base
);
59 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
61 return intel_encoder_to_crt(intel_attached_encoder(connector
));
64 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
67 struct drm_device
*dev
= encoder
->base
.dev
;
68 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
69 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
70 enum intel_display_power_domain power_domain
;
73 power_domain
= intel_display_port_power_domain(encoder
);
74 if (!intel_display_power_enabled(dev_priv
, power_domain
))
77 tmp
= I915_READ(crt
->adpa_reg
);
79 if (!(tmp
& ADPA_DAC_ENABLE
))
83 *pipe
= PORT_TO_PIPE_CPT(tmp
);
85 *pipe
= PORT_TO_PIPE(tmp
);
90 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
92 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
93 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
96 tmp
= I915_READ(crt
->adpa_reg
);
98 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
99 flags
|= DRM_MODE_FLAG_PHSYNC
;
101 flags
|= DRM_MODE_FLAG_NHSYNC
;
103 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
104 flags
|= DRM_MODE_FLAG_PVSYNC
;
106 flags
|= DRM_MODE_FLAG_NVSYNC
;
111 static void intel_crt_get_config(struct intel_encoder
*encoder
,
112 struct intel_crtc_config
*pipe_config
)
114 struct drm_device
*dev
= encoder
->base
.dev
;
117 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
119 dotclock
= pipe_config
->port_clock
;
121 if (HAS_PCH_SPLIT(dev
))
122 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
124 pipe_config
->adjusted_mode
.crtc_clock
= dotclock
;
127 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
128 struct intel_crtc_config
*pipe_config
)
130 intel_ddi_get_config(encoder
, pipe_config
);
132 pipe_config
->adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
133 DRM_MODE_FLAG_NHSYNC
|
134 DRM_MODE_FLAG_PVSYNC
|
135 DRM_MODE_FLAG_NVSYNC
);
136 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
139 /* Note: The caller is required to filter out dpms modes not supported by the
141 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
143 struct drm_device
*dev
= encoder
->base
.dev
;
144 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
145 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
146 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
147 struct drm_display_mode
*adjusted_mode
= &crtc
->config
.adjusted_mode
;
150 if (INTEL_INFO(dev
)->gen
>= 5)
151 adpa
= ADPA_HOTPLUG_BITS
;
155 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
156 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
157 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
158 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
160 /* For CPT allow 3 pipe config, for others just use A or B */
161 if (HAS_PCH_LPT(dev
))
162 ; /* Those bits don't exist here */
163 else if (HAS_PCH_CPT(dev
))
164 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
165 else if (crtc
->pipe
== 0)
166 adpa
|= ADPA_PIPE_A_SELECT
;
168 adpa
|= ADPA_PIPE_B_SELECT
;
170 if (!HAS_PCH_SPLIT(dev
))
171 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
174 case DRM_MODE_DPMS_ON
:
175 adpa
|= ADPA_DAC_ENABLE
;
177 case DRM_MODE_DPMS_STANDBY
:
178 adpa
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
180 case DRM_MODE_DPMS_SUSPEND
:
181 adpa
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
183 case DRM_MODE_DPMS_OFF
:
184 adpa
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
188 I915_WRITE(crt
->adpa_reg
, adpa
);
191 static void intel_disable_crt(struct intel_encoder
*encoder
)
193 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
196 static void intel_enable_crt(struct intel_encoder
*encoder
)
198 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
200 intel_crt_set_dpms(encoder
, crt
->connector
->base
.dpms
);
203 /* Special dpms function to support cloning between dvo/sdvo/crt. */
204 static void intel_crt_dpms(struct drm_connector
*connector
, int mode
)
206 struct drm_device
*dev
= connector
->dev
;
207 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
208 struct drm_crtc
*crtc
;
211 /* PCH platforms and VLV only support on/off. */
212 if (INTEL_INFO(dev
)->gen
>= 5 && mode
!= DRM_MODE_DPMS_ON
)
213 mode
= DRM_MODE_DPMS_OFF
;
215 if (mode
== connector
->dpms
)
218 old_dpms
= connector
->dpms
;
219 connector
->dpms
= mode
;
221 /* Only need to change hw state when actually enabled */
222 crtc
= encoder
->base
.crtc
;
224 encoder
->connectors_active
= false;
228 /* We need the pipe to run for anything but OFF. */
229 if (mode
== DRM_MODE_DPMS_OFF
)
230 encoder
->connectors_active
= false;
232 encoder
->connectors_active
= true;
234 /* We call connector dpms manually below in case pipe dpms doesn't
235 * change due to cloning. */
236 if (mode
< old_dpms
) {
237 /* From off to on, enable the pipe first. */
238 intel_crtc_update_dpms(crtc
);
240 intel_crt_set_dpms(encoder
, mode
);
242 intel_crt_set_dpms(encoder
, mode
);
244 intel_crtc_update_dpms(crtc
);
247 intel_modeset_check_state(connector
->dev
);
250 static enum drm_mode_status
251 intel_crt_mode_valid(struct drm_connector
*connector
,
252 struct drm_display_mode
*mode
)
254 struct drm_device
*dev
= connector
->dev
;
257 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
258 return MODE_NO_DBLESCAN
;
260 if (mode
->clock
< 25000)
261 return MODE_CLOCK_LOW
;
267 if (mode
->clock
> max_clock
)
268 return MODE_CLOCK_HIGH
;
270 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
271 if (HAS_PCH_LPT(dev
) &&
272 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
273 return MODE_CLOCK_HIGH
;
278 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
279 struct intel_crtc_config
*pipe_config
)
281 struct drm_device
*dev
= encoder
->base
.dev
;
283 if (HAS_PCH_SPLIT(dev
))
284 pipe_config
->has_pch_encoder
= true;
286 /* LPT FDI RX only supports 8bpc. */
287 if (HAS_PCH_LPT(dev
))
288 pipe_config
->pipe_bpp
= 24;
290 /* FDI must always be 2.7 GHz */
292 pipe_config
->port_clock
= 135000 * 2;
297 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
299 struct drm_device
*dev
= connector
->dev
;
300 struct intel_crt
*crt
= intel_attached_crt(connector
);
301 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
305 /* The first time through, trigger an explicit detection cycle */
306 if (crt
->force_hotplug_required
) {
307 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
310 crt
->force_hotplug_required
= 0;
312 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
313 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
315 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
317 adpa
&= ~ADPA_DAC_ENABLE
;
319 I915_WRITE(crt
->adpa_reg
, adpa
);
321 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
323 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
326 I915_WRITE(crt
->adpa_reg
, save_adpa
);
327 POSTING_READ(crt
->adpa_reg
);
331 /* Check the status to see if both blue and green are on now */
332 adpa
= I915_READ(crt
->adpa_reg
);
333 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
337 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
342 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
344 struct drm_device
*dev
= connector
->dev
;
345 struct intel_crt
*crt
= intel_attached_crt(connector
);
346 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
351 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
352 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
354 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
356 I915_WRITE(crt
->adpa_reg
, adpa
);
358 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
360 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
361 I915_WRITE(crt
->adpa_reg
, save_adpa
);
364 /* Check the status to see if both blue and green are on now */
365 adpa
= I915_READ(crt
->adpa_reg
);
366 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
371 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
377 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
379 * Not for i915G/i915GM
381 * \return true if CRT is connected.
382 * \return false if CRT is disconnected.
384 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
386 struct drm_device
*dev
= connector
->dev
;
387 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
388 u32 hotplug_en
, orig
, stat
;
392 if (HAS_PCH_SPLIT(dev
))
393 return intel_ironlake_crt_detect_hotplug(connector
);
395 if (IS_VALLEYVIEW(dev
))
396 return valleyview_crt_detect_hotplug(connector
);
399 * On 4 series desktop, CRT detect sequence need to be done twice
400 * to get a reliable result.
403 if (IS_G4X(dev
) && !IS_GM45(dev
))
407 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
408 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
410 for (i
= 0; i
< tries
; i
++) {
411 /* turn on the FORCE_DETECT */
412 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
413 /* wait for FORCE_DETECT to go off */
414 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
415 CRT_HOTPLUG_FORCE_DETECT
) == 0,
417 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
420 stat
= I915_READ(PORT_HOTPLUG_STAT
);
421 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
424 /* clear the interrupt we just generated, if any */
425 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
427 /* and put the bits back */
428 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
433 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
434 struct i2c_adapter
*i2c
)
438 edid
= drm_get_edid(connector
, i2c
);
440 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
441 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
442 intel_gmbus_force_bit(i2c
, true);
443 edid
= drm_get_edid(connector
, i2c
);
444 intel_gmbus_force_bit(i2c
, false);
450 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
451 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
452 struct i2c_adapter
*adapter
)
457 edid
= intel_crt_get_edid(connector
, adapter
);
461 ret
= intel_connector_update_modes(connector
, edid
);
467 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
469 struct intel_crt
*crt
= intel_attached_crt(connector
);
470 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
472 struct i2c_adapter
*i2c
;
474 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
476 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
477 edid
= intel_crt_get_edid(connector
, i2c
);
480 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
483 * This may be a DVI-I connector with a shared DDC
484 * link between analog and digital outputs, so we
485 * have to check the EDID input spec of the attached device.
488 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
492 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
494 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
502 static enum drm_connector_status
503 intel_crt_load_detect(struct intel_crt
*crt
)
505 struct drm_device
*dev
= crt
->base
.base
.dev
;
506 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
507 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
508 uint32_t save_bclrpat
;
509 uint32_t save_vtotal
;
510 uint32_t vtotal
, vactive
;
512 uint32_t vblank
, vblank_start
, vblank_end
;
514 uint32_t bclrpat_reg
;
518 uint32_t pipeconf_reg
;
519 uint32_t pipe_dsl_reg
;
521 enum drm_connector_status status
;
523 DRM_DEBUG_KMS("starting load-detect on CRT\n");
525 bclrpat_reg
= BCLRPAT(pipe
);
526 vtotal_reg
= VTOTAL(pipe
);
527 vblank_reg
= VBLANK(pipe
);
528 vsync_reg
= VSYNC(pipe
);
529 pipeconf_reg
= PIPECONF(pipe
);
530 pipe_dsl_reg
= PIPEDSL(pipe
);
532 save_bclrpat
= I915_READ(bclrpat_reg
);
533 save_vtotal
= I915_READ(vtotal_reg
);
534 vblank
= I915_READ(vblank_reg
);
536 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
537 vactive
= (save_vtotal
& 0x7ff) + 1;
539 vblank_start
= (vblank
& 0xfff) + 1;
540 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
542 /* Set the border color to purple. */
543 I915_WRITE(bclrpat_reg
, 0x500050);
546 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
547 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
548 POSTING_READ(pipeconf_reg
);
549 /* Wait for next Vblank to substitue
550 * border color for Color info */
551 intel_wait_for_vblank(dev
, pipe
);
552 st00
= I915_READ8(VGA_MSR_WRITE
);
553 status
= ((st00
& (1 << 4)) != 0) ?
554 connector_status_connected
:
555 connector_status_disconnected
;
557 I915_WRITE(pipeconf_reg
, pipeconf
);
559 bool restore_vblank
= false;
563 * If there isn't any border, add some.
564 * Yes, this will flicker
566 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
567 uint32_t vsync
= I915_READ(vsync_reg
);
568 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
570 vblank_start
= vsync_start
;
571 I915_WRITE(vblank_reg
,
573 ((vblank_end
- 1) << 16));
574 restore_vblank
= true;
576 /* sample in the vertical border, selecting the larger one */
577 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
578 vsample
= (vblank_start
+ vactive
) >> 1;
580 vsample
= (vtotal
+ vblank_end
) >> 1;
583 * Wait for the border to be displayed
585 while (I915_READ(pipe_dsl_reg
) >= vactive
)
587 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
590 * Watch ST00 for an entire scanline
596 /* Read the ST00 VGA status register */
597 st00
= I915_READ8(VGA_MSR_WRITE
);
600 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
602 /* restore vblank if necessary */
604 I915_WRITE(vblank_reg
, vblank
);
606 * If more than 3/4 of the scanline detected a monitor,
607 * then it is assumed to be present. This works even on i830,
608 * where there isn't any way to force the border color across
611 status
= detect
* 4 > count
* 3 ?
612 connector_status_connected
:
613 connector_status_disconnected
;
616 /* Restore previous settings */
617 I915_WRITE(bclrpat_reg
, save_bclrpat
);
622 static enum drm_connector_status
623 intel_crt_detect(struct drm_connector
*connector
, bool force
)
625 struct drm_device
*dev
= connector
->dev
;
626 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
627 struct intel_crt
*crt
= intel_attached_crt(connector
);
628 struct intel_encoder
*intel_encoder
= &crt
->base
;
629 enum intel_display_power_domain power_domain
;
630 enum drm_connector_status status
;
631 struct intel_load_detect_pipe tmp
;
632 struct drm_modeset_acquire_ctx ctx
;
634 intel_runtime_pm_get(dev_priv
);
636 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
637 connector
->base
.id
, "connector->name",
640 power_domain
= intel_display_port_power_domain(intel_encoder
);
641 intel_display_power_get(dev_priv
, power_domain
);
643 if (I915_HAS_HOTPLUG(dev
)) {
644 /* We can not rely on the HPD pin always being correctly wired
645 * up, for example many KVM do not pass it through, and so
646 * only trust an assertion that the monitor is connected.
648 if (intel_crt_detect_hotplug(connector
)) {
649 DRM_DEBUG_KMS("CRT detected via hotplug\n");
650 status
= connector_status_connected
;
653 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
656 if (intel_crt_detect_ddc(connector
)) {
657 status
= connector_status_connected
;
661 /* Load detection is broken on HPD capable machines. Whoever wants a
662 * broken monitor (without edid) to work behind a broken kvm (that fails
663 * to have the right resistors for HP detection) needs to fix this up.
664 * For now just bail out. */
665 if (I915_HAS_HOTPLUG(dev
)) {
666 status
= connector_status_disconnected
;
671 status
= connector
->status
;
675 /* for pre-945g platforms use load detect */
676 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
, &ctx
)) {
677 if (intel_crt_detect_ddc(connector
))
678 status
= connector_status_connected
;
680 status
= intel_crt_load_detect(crt
);
681 intel_release_load_detect_pipe(connector
, &tmp
, &ctx
);
683 status
= connector_status_unknown
;
686 intel_display_power_put(dev_priv
, power_domain
);
687 intel_runtime_pm_put(dev_priv
);
692 static void intel_crt_destroy(struct drm_connector
*connector
)
694 drm_connector_cleanup(connector
);
698 static int intel_crt_get_modes(struct drm_connector
*connector
)
700 struct drm_device
*dev
= connector
->dev
;
701 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
702 struct intel_crt
*crt
= intel_attached_crt(connector
);
703 struct intel_encoder
*intel_encoder
= &crt
->base
;
704 enum intel_display_power_domain power_domain
;
706 struct i2c_adapter
*i2c
;
708 power_domain
= intel_display_port_power_domain(intel_encoder
);
709 intel_display_power_get(dev_priv
, power_domain
);
711 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
712 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
713 if (ret
|| !IS_G4X(dev
))
716 /* Try to probe digital port for output in DVI-I -> VGA mode. */
717 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPB
);
718 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
721 intel_display_power_put(dev_priv
, power_domain
);
726 static int intel_crt_set_property(struct drm_connector
*connector
,
727 struct drm_property
*property
,
733 static void intel_crt_reset(struct drm_connector
*connector
)
735 struct drm_device
*dev
= connector
->dev
;
736 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
737 struct intel_crt
*crt
= intel_attached_crt(connector
);
739 if (INTEL_INFO(dev
)->gen
>= 5) {
742 adpa
= I915_READ(crt
->adpa_reg
);
743 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
744 adpa
|= ADPA_HOTPLUG_BITS
;
745 I915_WRITE(crt
->adpa_reg
, adpa
);
746 POSTING_READ(crt
->adpa_reg
);
748 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
749 crt
->force_hotplug_required
= 1;
755 * Routines for controlling stuff on the analog port
758 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
759 .reset
= intel_crt_reset
,
760 .dpms
= intel_crt_dpms
,
761 .detect
= intel_crt_detect
,
762 .fill_modes
= drm_helper_probe_single_connector_modes
,
763 .destroy
= intel_crt_destroy
,
764 .set_property
= intel_crt_set_property
,
767 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
768 .mode_valid
= intel_crt_mode_valid
,
769 .get_modes
= intel_crt_get_modes
,
770 .best_encoder
= intel_best_encoder
,
773 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
774 .destroy
= intel_encoder_destroy
,
777 static int __init
intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
779 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
783 static const struct dmi_system_id intel_no_crt
[] = {
785 .callback
= intel_no_crt_dmi_callback
,
788 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
789 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
793 .callback
= intel_no_crt_dmi_callback
,
794 .ident
= "DELL XPS 8700",
796 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
797 DMI_MATCH(DMI_PRODUCT_NAME
, "XPS 8700"),
803 void intel_crt_init(struct drm_device
*dev
)
805 struct drm_connector
*connector
;
806 struct intel_crt
*crt
;
807 struct intel_connector
*intel_connector
;
808 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
810 /* Skip machines without VGA that falsely report hotplug events */
811 if (dmi_check_system(intel_no_crt
))
814 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
818 intel_connector
= kzalloc(sizeof(*intel_connector
), GFP_KERNEL
);
819 if (!intel_connector
) {
824 connector
= &intel_connector
->base
;
825 crt
->connector
= intel_connector
;
826 drm_connector_init(dev
, &intel_connector
->base
,
827 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
829 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
830 DRM_MODE_ENCODER_DAC
);
832 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
834 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
835 crt
->base
.cloneable
= (1 << INTEL_OUTPUT_DVO
) | (1 << INTEL_OUTPUT_HDMI
);
837 crt
->base
.crtc_mask
= (1 << 0);
839 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
842 connector
->interlace_allowed
= 0;
844 connector
->interlace_allowed
= 1;
845 connector
->doublescan_allowed
= 0;
847 if (HAS_PCH_SPLIT(dev
))
848 crt
->adpa_reg
= PCH_ADPA
;
849 else if (IS_VALLEYVIEW(dev
))
850 crt
->adpa_reg
= VLV_ADPA
;
852 crt
->adpa_reg
= ADPA
;
854 crt
->base
.compute_config
= intel_crt_compute_config
;
855 crt
->base
.disable
= intel_disable_crt
;
856 crt
->base
.enable
= intel_enable_crt
;
857 if (I915_HAS_HOTPLUG(dev
))
858 crt
->base
.hpd_pin
= HPD_CRT
;
860 crt
->base
.get_config
= hsw_crt_get_config
;
861 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
863 crt
->base
.get_config
= intel_crt_get_config
;
864 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
866 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
867 intel_connector
->unregister
= intel_connector_unregister
;
869 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
871 drm_sysfs_connector_add(connector
);
873 if (!I915_HAS_HOTPLUG(dev
))
874 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
877 * Configure the automatic hotplug detection stuff
879 crt
->force_hotplug_required
= 0;
882 * TODO: find a proper way to discover whether we need to set the the
883 * polarity and link reversal bits or not, instead of relying on the
886 if (HAS_PCH_LPT(dev
)) {
887 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
888 FDI_RX_LINK_REVERSAL_OVERRIDE
;
890 dev_priv
->fdi_rx_config
= I915_READ(_FDI_RXA_CTL
) & fdi_config
;
893 intel_crt_reset(connector
);