sys/bus/isa/rtc.h

   1 /*-
   2  * Copyright (c) 1990 The Regents of the University of California.
   3  * All rights reserved.
   4  *
   5  * This code is derived from software contributed to Berkeley by
   6  * William Jolitz.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the name of the University nor the names of its contributors
  17  *    may be used to endorse or promote products derived from this software
  18  *    without specific prior written permission.
  19  *
  20  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  30  * SUCH DAMAGE.
  31  *
  32  *      from: @(#)rtc.h 7.1 (Berkeley) 5/12/91
  33  * $FreeBSD: src/sys/isa/rtc.h,v 1.12 1999/08/28 00:46:01 peter Exp $
  34  * $DragonFly: src/sys/bus/isa/rtc.h,v 1.3 2006/10/23 21:50:31 dillon Exp $
  35  */
  36
  37 #ifndef _BUS_ISA_RTC_H_
  38 #define _BUS_ISA_RTC_H_
  39
  40 /*
  41  * MC146818 RTC Register locations
  42  */
  43
  44 #define RTC_SEC         0x00    /* seconds */
  45 #define RTC_SECALRM     0x01    /* seconds alarm */
  46 #define RTC_MIN         0x02    /* minutes */
  47 #define RTC_MINALRM     0x03    /* minutes alarm */
  48 #define RTC_HRS         0x04    /* hours */
  49 #define RTC_HRSALRM     0x05    /* hours alarm */
  50 #define RTC_WDAY        0x06    /* week day */
  51 #define RTC_DAY         0x07    /* day of month */
  52 #define RTC_MONTH       0x08    /* month of year */
  53 #define RTC_YEAR        0x09    /* month of year */
  54
  55 #define RTC_STATUSA     0x0a    /* status register A */
  56 #define  RTCSA_TUP       0x80   /* time update, don't look now */
  57 #define  RTCSA_RESET     0x70   /* reset divider */
  58 #define  RTCSA_DIVIDER   0x20   /* divider correct for 32768 Hz */
  59 #define  RTCSA_8192      0x03   /* 8192 Hz interrupt */
  60 #define  RTCSA_4096      0x04
  61 #define  RTCSA_2048      0x05
  62 #define  RTCSA_1024      0x06   /* default for profiling */
  63 #define  RTCSA_PROF      RTCSA_1024
  64 #define  RTC_PROFRATE    1024
  65 #define  RTCSA_512       0x07
  66 #define  RTCSA_256       0x08
  67 #define  RTCSA_128       0x09
  68 #define  RTCSA_NOPROF    RTCSA_128
  69 #define  RTC_NOPROFRATE  128
  70 #define  RTCSA_64        0x0a
  71 #define  RTCSA_32        0x0b   /* 32 Hz interrupt */
  72
  73 #define RTC_STATUSB     0x0b    /* status register B */
  74 #define  RTCSB_DST       0x01   /* USA Daylight Savings Time enable */
  75 #define  RTCSB_24HR      0x02   /* 0 = 12 hours, 1 = 24 hours */
  76 #define  RTCSB_BCD       0x04   /* 0 = BCD, 1 = Binary coded time */
  77 #define  RTCSB_SQWE      0x08   /* 1 = output sqare wave at SQW pin */
  78 #define  RTCSB_UINTR     0x10   /* 1 = enable update-ended interrupt */
  79 #define  RTCSB_AINTR     0x20   /* 1 = enable alarm interrupt */
  80 #define  RTCSB_PINTR     0x40   /* 1 = enable periodic clock interrupt */
  81 #define  RTCSB_HALT      0x80   /* stop clock updates */
  82
  83 #define RTC_INTR        0x0c    /* status register C (R) interrupt source */
  84 #define  RTCIR_UPDATE    0x10   /* update intr */
  85 #define  RTCIR_ALARM     0x20   /* alarm intr */
  86 #define  RTCIR_PERIOD    0x40   /* periodic intr */
  87 #define  RTCIR_INT       0x80   /* interrupt output signal */
  88
  89 #define RTC_STATUSD     0x0d    /* status register D (R) Lost Power */
  90 #define  RTCSD_PWR       0x80   /* clock power OK */
  91
  92 #define RTC_DIAG        0x0e    /* status register E - bios diagnostic */
  93 #define RTCDG_BITS      "\020\010clock_battery\007ROM_cksum\006config_unit\005memory_size\004fixed_disk\003invalid_time"
  94
  95 #define RTC_RESET       0x0f    /* status register F - reset code byte */
  96 #define  RTCRS_RST       0x00           /* normal reset */
  97 #define  RTCRS_LOAD      0x04           /* load system */
  98
  99 #define RTC_FDISKETTE   0x10    /* diskette drive type in upper/lower nibble */
 100 #define  RTCFDT_NONE     0              /* none present */
 101 #define  RTCFDT_360K     0x10           /* 360K */
 102 #define  RTCFDT_12M      0x20           /* 1.2M */
 103 #define  RTCFDT_720K     0x30           /* 720K */
 104 #define  RTCFDT_144M     0x40           /* 1.44M */
 105 #define  RTCFDT_288M_1   0x50           /* 2.88M, some BIOSes */
 106 #define  RTCFDT_288M     0x60           /* 2.88M */
 107
 108 #define RTC_BASELO      0x15    /* low byte of basemem size */
 109 #define RTC_BASEHI      0x16    /* high byte of basemem size */
 110 #define RTC_EXTLO       0x17    /* low byte of extended mem size */
 111 #define RTC_EXTHI       0x18    /* low byte of extended mem size */
 112
 113 #define RTC_CENTURY     0x32    /* current century */
 114 #endif /* _BUS_ISA_RTC_H_ */