If boot verbose, print asicrev, chiprev and bus type.
[dragonfly.git] / sys / bus / pci / pcib_private.h
blobbde054b29ebd7f3a6389ec9fb13a609de43348fa
1 /*-
2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
5 * All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
30 * $FreeBSD: src/sys/dev/pci/pcib_private.h,v 1.6 2004/01/11 06:52:31 imp Exp $
31 * $DragonFly: src/sys/bus/pci/pcib_private.h,v 1.3 2006/09/30 20:03:44 swildner Exp $
34 #ifndef __PCIB_PRIVATE_H__
35 #define __PCIB_PRIVATE_H__
38 * Export portions of generic PCI:PCI bridge support so that it can be
39 * used by subclasses.
43 * Bridge-specific data.
45 struct pcib_softc
47 device_t dev;
48 uint32_t flags; /* flags */
49 #define PCIB_SUBTRACTIVE 0x1
50 uint16_t command; /* command register */
51 uint8_t secbus; /* secondary bus number */
52 uint8_t subbus; /* subordinate bus number */
53 pci_addr_t pmembase; /* base address of prefetchable memory */
54 pci_addr_t pmemlimit; /* topmost address of prefetchable memory */
55 pci_addr_t membase; /* base address of memory window */
56 pci_addr_t memlimit; /* topmost address of memory window */
57 uint32_t iobase; /* base address of port window */
58 uint32_t iolimit; /* topmost address of port window */
59 uint16_t secstat; /* secondary bus status register */
60 uint16_t bridgectl; /* bridge control register */
61 uint8_t seclat; /* secondary bus latency timer */
64 typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
66 int host_pcib_get_busno(pci_read_config_fn read_config, int bus,
67 int slot, int func, uint8_t *busnum);
68 int pcib_attach(device_t dev);
69 void pcib_attach_common(device_t dev);
70 int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
71 int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
72 struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
73 u_long start, u_long end, u_long count, u_int flags);
74 int pcib_maxslots(device_t dev);
75 uint32_t pcib_read_config(device_t dev, int b, int s, int f, int reg, int width);
76 void pcib_write_config(device_t dev, int b, int s, int f, int reg, uint32_t val, int width);
77 int pcib_route_interrupt(device_t pcib, device_t dev, int pin);
79 const char * pci_bridge_type(device_t dev);
81 #endif