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Kernel - Fix NOTE_EXIT.
[dragonfly.git] / sys / dev / raid / dpt / dpt.h
blob251c4703983a4a7894558a4bc8f1073ca3360379
1 /*
2 * Copyright (c) 1997 by Simon Shapiro
3 * All Rights Reserved
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
21 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 */
30
31 /*
32 *
33 * dpt.h: Definitions and constants used by the SCSI side of the DPT
34 *
35 * credits: Mike Neuffer; DPT low level code and in other areas as well.
36 * Mark Salyzyn; Many vital bits of info and diagnostics.
37 * Justin Gibbs; FreeBSD API, debugging and style
38 * Ron McDaniels; SCSI Software Interrupts
39 * FreeBSD.ORG; Great O/S to work on and for.
40 */
41
42
43 #ident "$FreeBSD: src/sys/dev/dpt/dpt.h,v 1.8.2.1 2000/08/07 18:48:14 peter Exp $"
44 #ident "$DragonFly: src/sys/dev/raid/dpt/dpt.h,v 1.4 2004/02/16 20:13:26 dillon Exp $"
45
46 #ifndef _DPT_H
47 #define _DPT_H
48
49 #include <sys/ioccom.h>
50
51 #define DPT_CDEV_MAJOR 88
52
53 #undef DPT_USE_DLM_SWI
54
55 extern u_long dpt_unit;
56
57 #define DPT_RELEASE 1
58 #define DPT_VERSION 4
59 #define DPT_PATCH 5
60 #define DPT_MONTH 8
61 #define DPT_DAY 3
62 #define DPT_YEAR 18 /* 1998 - 1980 */
63
64 #define DPT_CTL_RELEASE 1
65 #define DPT_CTL_VERSION 0
66 #define DPT_CTL_PATCH 6
67
68 #ifndef PAGESIZ
69 #define PAGESIZ 4096
70 #endif
71
72 #ifndef physaddr
73 typedef void *physaddr;
74 #endif
75
76 #undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */
77 #define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */
78 #define DPT_OPENNINGS 8 /* Commands-in-progress per device */
79
80 #define DPT_RETRIES 5 /* Times to retry failed commands */
81 #undef DPT_DISABLE_SG
82 #define DPT_HAS_OPEN
83
84 /* Arguments to dpt_run_queue() can be: */
85
86 #define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192
87 #define DPT_FREE_LIST_INCREMENT 64
88 #define DPT_CMD_LEN 12
89
90 /*
91 * How many segments do we want in a Scatter/Gather list?
92 * Some HBA's can do 16, Some 8192. Since we pre-allocate
93 * them in fixed increments, we need to put a practical limit on
94 * these. A passed parameter (from kernel boot or lkm) would help
95 */
96 #define DPT_MAX_SEGS 32
97
98 /* Debug levels */
99
100 #undef DPT_DEBUG_PCI
101 #undef DPT_DEBUG_INIT
102 #undef DPT_DEBUG_SETUP
103 #undef DPT_DEBUG_STATES
104 #undef DPT_DEBUG_CONFIG
105 #undef DPT_DEBUG_QUEUES
106 #undef DPT_DEBUG_SCSI_CMD
107 #undef DPT_DEBUG_SOFTINTR
108 #undef DPT_DEBUG_HARDINTR
109 #undef DPT_DEBUG_HEX_DUMPS
110 #undef DPT_DEBUG_POLLING
111 #undef DPT_DEBUG_INQUIRE
112 #undef DPT_DEBUG_COMPLETION
113 #undef DPT_DEBUG_COMPLETION_ERRORS
114 #define DPT_DEBUG_MINPHYS
115 #undef DPT_DEBUG_SG
116 #undef DPT_DEBUG_SG_SHOW_DATA
117 #undef DPT_DEBUG_SCSI_CMD_NAME
118 #undef DPT_DEBUG_CONTROL
119 #undef DPT_DEBUG_TIMEOUTS
120 #undef DPT_DEBUG_SHUTDOWN
121 #define DPT_DEBUG_USER_CMD
122
123 /*
124 * Misc. definitions
125 */
126 #undef TRUE
127 #undef FALSE
128 #define TRUE 1
129 #define FALSE 0
130
131 #define MAX_CHANNELS 3
132 #define MAX_TARGETS 16
133 #define MAX_LUNS 8
134
135 /* Map minor numbers to device identity */
136 #define TARGET_MASK 0x000f
137 #define BUS_MASK 0x0030
138 #define HBA_MASK 0x01c0
139 #define LUN_MASK 0x0e00
140
141 #define minor2target(minor) ( minor & TARGET_MASK )
142 #define minor2bus(minor) ( (minor & BUS_MASK) >> 4 )
143 #define minor2hba(minor) ( (minor & HBA_MASK) >> 6 )
144 #define minor2lun(minor) ( (minor & LUN_MASK) >> 9 )
145
146 /*
147 * Valid values for cache_type
148 */
149 #define DPT_NO_CACHE 0
150 #define DPT_CACHE_WRITETHROUGH 1
151 #define DPT_CACHE_WRITEBACK -2
152
153 #define min(a,b) ((a<b)?(a):(b))
154
155 #define MAXISA 4
156 #define MAXEISA 16
157 #define MAXPCI 16
158 #define MAXIRQ 16
159 #define MAXTARGET 16
160
161 #define IS_ISA 'I'
162 #define IS_EISA 'E'
163 #define IS_PCI 'P'
164
165 #define BROKEN_INQUIRY 1
166
167 #define BUSMASTER 0xff
168 #define PIO 0xfe
169
170 #define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */
171 #define DPT_BLINK_INDICATOR 0x42445054
172
173 #define DPT_ID1 0x12
174 #define DPT_ID2 0x1
175 #define ATT_ID1 0x06
176 #define ATT_ID2 0x94
177 #define ATT_ID3 0x0
178
179 #define NEC_ID1 0x38
180 #define NEC_ID2 0xa3
181 #define NEC_ID3 0x82
182
183 #define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */
184 #define MAX_METHOD_2 16 /* Max Devices For Method 2 */
185 #define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */
186
187 #define DPT_MAX_RETRIES 2
188
189 #define READ 0
190 #define WRITE 1
191 #define OTHER 2
192
193 #define HD(cmd) ((hostdata *)&(cmd->host->hostdata))
194 #define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
195 #define SD(host) ((hostdata *)&(host->hostdata))
196
197 /*
198 * EATA Command & Register definitions
199 */
200
201 #define PCI_REG_DPTconfig 0x40
202 #define PCI_REG_PumpModeAddress 0x44
203 #define PCI_REG_PumpModeData 0x48
204 #define PCI_REG_ConfigParam1 0x50
205 #define PCI_REG_ConfigParam2 0x54
206
207 #define EATA_CMD_PIO_SETUPTEST 0xc6
208 #define EATA_CMD_PIO_READ_CONFIG 0xf0
209 #define EATA_CMD_PIO_SET_CONFIG 0xf1
210 #define EATA_CMD_PIO_SEND_CP 0xf2
211 #define EATA_CMD_PIO_RECEIVE_SP 0xf3
212 #define EATA_CMD_PIO_TRUNC 0xf4
213
214 #define EATA_CMD_RESET 0xf9
215 #define EATA_COLD_BOOT 0x06 /* Last resort only! */
216
217 #define EATA_CMD_IMMEDIATE 0xfa
218
219 #define EATA_CMD_DMA_READ_CONFIG 0xfd
220 #define EATA_CMD_DMA_SET_CONFIG 0xfe
221 #define EATA_CMD_DMA_SEND_CP 0xff
222
223 #define ECS_EMULATE_SENSE 0xd4
224
225 /*
226 * Immediate Commands
227 * Beware of this enumeration. Not all commands are in sequence!
228 */
229
230 enum dpt_immediate_cmd {
231 EATA_GENERIC_ABORT,
232 EATA_SPECIFIC_RESET,
233 EATA_BUS_RESET,
234 EATA_SPECIFIC_ABORT,
235 EATA_QUIET_INTR,
236 EATA_SMART_ROM_DL_EN,
237 EATA_COLD_BOOT_HBA, /* Only as a last resort */
238 EATA_FORCE_IO,
239 EATA_SCSI_BUS_OFFLINE,
240 EATA_RESET_MASKED_BUS,
241 EATA_POWER_OFF_WARN
242 };
243
244 extern enum dpt_immediate_cmd dpt_immediate_cmd;
245
246 #define HA_CTRLREG 0x206 /* control register for HBA */
247 #define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */
248 #define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */
249 #define HA_CTRL_8HEADS 0x08 /*
250 * CTRLREG: set for drives with
251 * >=8 heads
252 * (WD1003 rudimentary :-)
253 */
254
255 #define HA_WCOMMAND 0x07 /* command register offset */
256 #define HA_WIFC 0x06 /* immediate command offset */
257 #define HA_WCODE 0x05
258 #define HA_WCODE2 0x04
259 #define HA_WDMAADDR 0x02 /* DMA address LSB offset */
260 #define HA_RERROR 0x01 /* Error Register, offset 1 from base */
261 #define HA_RAUXSTAT 0x08 /* aux status register offset */
262 #define HA_RSTATUS 0x07 /* status register offset */
263 #define HA_RDATA 0x00 /* data register (16bit) */
264 #define HA_WDATA 0x00 /* data register (16bit) */
265
266 #define HA_ABUSY 0x01 /* aux busy bit */
267 #define HA_AIRQ 0x02 /* aux IRQ pending bit */
268 #define HA_SERROR 0x01 /* pr. command ended in error */
269 #define HA_SMORE 0x02 /* more data soon to come */
270 #define HA_SCORR 0x04 /* datio_addra corrected */
271 #define HA_SDRQ 0x08 /* data request active */
272 #define HA_SSC 0x10 /* seek complete */
273 #define HA_SFAULT 0x20 /* write fault */
274 #define HA_SREADY 0x40 /* drive ready */
275 #define HA_SBUSY 0x80 /* drive busy */
276 #define HA_SDRDY (HA_SSC|HA_SREADY|HA_SDRQ)
277
278 /*
279 * Message definitions
280 */
281
282 enum dpt_message {
283 HA_NO_ERROR, /* No Error */
284 HA_ERR_SEL_TO, /* Selection Timeout */
285 HA_ERR_CMD_TO, /* Command Timeout */
286 HA_SCSIBUS_RESET,
287 HA_HBA_POWER_UP, /* Initial Controller Power-up */
288 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */
289 HA_UNX_BUS_FREE, /* Unexpected Bus Free */
290 HA_BUS_PARITY, /* Bus Parity Error */
291 HA_SCSI_HUNG, /* SCSI Hung */
292 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */
293 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */
294 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */
295 HA_PARITY_ERR, /* Controller Ram Parity Error */
296 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */
297 HA_CP_ABORTED, /* Abort Message sent to active cmd */
298 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */
299 HA_CP_RESET, /* Reset Message sent to active cmd */
300 HA_ECC_ERR, /* Controller Ram ECC Error */
301 HA_PCI_PARITY, /* PCI Parity Error */
302 HA_PCI_MABORT, /* PCI Master Abort */
303 HA_PCI_TABORT, /* PCI Target Abort */
304 HA_PCI_STABORT /* PCI Signaled Target Abort */
305 };
306
307 extern enum dpt_message dpt_message;
308
309 #define HA_STATUS_MASK 0x7F
310 #define HA_IDENTIFY_MSG 0x80
311 #define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */
312
313 #define DPT_RW_BUFF_HEART 0X00
314 #define DPT_RW_BUFF_DLM 0x02
315 #define DPT_RW_BUFF_ACCESS 0x03
316
317 #define HA_INTR_OFF 1
318 #define HA_INTR_ON 0
319
320 /* This is really a one-time shot through some black magic */
321 #define DPT_EATA_REVA 0x1c
322 #define DPT_EATA_REVB 0x1e
323 #define DPT_EATA_REVC 0x22
324 #define DPT_EATA_REVZ 0x24
325
326
327 /* IOCTL List */
328
329 #define DPT_RW_CMD_LEN 32
330 #define DPT_RW_CMD_DUMP_SOFTC "dump softc"
331 #define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo"
332 #define DPT_RW_CMD_DUMP_METRICS "dump metrics"
333 #define DPT_RW_CMD_CLEAR_METRICS "clear metrics"
334 #define DPT_RW_CMD_SHOW_LED "show LED"
335
336 #define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t)
337 #define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t)
338 #define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t)
339 #define SDI_SEND 0x40044444 /* Observed from dptmgr */
340
341 /*
342 * Other definitions
343 */
344
345 #define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4)
346 #define DPT_HCP_FIRST(page) (&page[4])
347 #define DPT_HCP_NEXT(param) (&param[3 + param[3] + 1])
348 #define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param))
349
350
351 /* Possible return values from dpt_register_buffer() */
352
353 #define SCSI_TM_READ_BUFFER 0x3c
354 #define SCSI_TM_WRITE_BUFFER 0x3b
355
356 #define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */
357 #define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */
358
359 typedef enum {
360 SUCCESSFULLY_REGISTERED,
361 DRIVER_DOWN,
362 ALREADY_REGISTERED,
363 REGISTERED_TO_ANOTHER,
364 NOT_REGISTERED,
365 INVALID_UNIT,
366 INVALID_SENDER,
367 INVALID_CALLBACK,
368 NO_RESOURCES
369 } dpt_rb_t;
370
371 typedef enum {
372 REGISTER_BUFFER,
373 RELEASE_BUFFER
374 } dpt_rb_op_t;
375
376 /*
377 * New way for completion routines to reliably copmplete processing.
378 * Should take properly typed dpt_softc_t and dpt_ccb_t,
379 * but interdependencies preclude that.
380 */
381 typedef void (*ccb_callback)(void *dpt, int bus, void *ccb);
382
383 typedef void (*buff_wr_done)(int unit, u_int8_t channel, u_int8_t target,
384 u_int8_t lun, u_int16_t offset, u_int16_t length,
385 int result);
386
387 typedef void (*dpt_rec_buff)(int unit, u_int8_t channel, u_int8_t target,
388 u_int8_t lun, void *buffer, u_int16_t offset,
389 u_int16_t length);
390
391 /* HBA's Status port (register) bitmap */
392 typedef struct reg_bit { /* reading this one will clear the interrupt */
393 u_int8_t error :1, /* previous command ended in an error */
394 more :1, /* More DATA coming soon Poll BSY & DRQ (PIO) */
395 corr :1, /* data read was successfully corrected with ECC */
396 drq :1, /* data request active */
397 sc :1, /* seek complete */
398 fault :1, /* write fault */
399 ready :1, /* drive ready */
400 busy :1; /* controller busy */
401 } dpt_status_reg_t;
402
403 /* HBA's Auxiliary status port (register) bitmap */
404 typedef struct reg_abit { /* reading this won't clear the interrupt */
405 u_int8_t abusy :1, /* auxiliary busy */
406 irq :1, /* set when drive interrupt is asserted */
407 :6;
408 } dpt_aux_status_t;
409
410 /* The EATA Register Set as a structure */
411 typedef struct eata_register {
412 u_int8_t data_reg[2]; /* R, couldn't figure this one out */
413 u_int8_t cp_addr[4]; /* W, CP address register */
414 union {
415 u_int8_t command; /*
416 * W, command code:
417 * [read|set] conf, send CP
418 */
419 struct reg_bit status; /* R, see register_bit1 */
420 u_int8_t statusbyte;
421 } ovr;
422 struct reg_abit aux_stat; /* R, see register_bit2 */
423 } eata_reg_t;
424
425 /*
426 * Holds the results of a READ_CONFIGURATION command
427 * Beware of data items which are larger than 1 byte.
428 * these come from the DPT in network order.
429 * On an Intel ``CPU'' they will be upside down and backwards!
430 * The dpt_get_conf function is normally responsible for flipping
431 * Everything back.
432 */
433 typedef struct get_conf { /* Read Configuration Array */
434 union {
435 struct {
436 u_int8_t foo_DevType;
437 u_int8_t foo_PageCode;
438 u_int8_t foo_Reserved0;
439 u_int8_t foo_len;
440 } foo;
441 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */
442 } bar;
443 #define gcs_length bar.foo_length
444 #define gcs_PageCode bar.foo.foo_DevType
445 #define gcs_reserved0 bar.foo.foo_Reserved0
446 #define gcs_len bar.foo.foo_len
447
448 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */
449
450 u_int8_t version2 :4,
451 version :4; /* EATA Version level */
452
453 u_int8_t OCS_enabled :1, /* Overlap Command Support enabled */
454 TAR_support :1, /* SCSI Target Mode supported */
455 TRNXFR :1, /* Truncate Transfer Cmd Used in PIO Mode */
456 MORE_support:1, /* MORE supported (PIO Mode Only) */
457 DMA_support :1, /* DMA supported */
458 DMA_valid :1, /* DRQ value in Byte 30 is valid */
459 ATA :1, /* ATA device connected (not supported) */
460 HAA_valid :1; /* Hostadapter Address is valid */
461
462 u_int16_t cppadlen; /*
463 * Number of pad bytes send after CD data set
464 * to zero for DMA commands. Ntohl()`ed
465 */
466 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */
467 u_int8_t scsi_id2; /* If not, zero is returned */
468 u_int8_t scsi_id1;
469 u_int8_t scsi_id0;
470 u_int32_t cplen; /* CP length: number of valid cp bytes */
471
472 u_int32_t splen; /* Returned bytes for a received SP command */
473 u_int16_t queuesiz; /* max number of queueable CPs */
474
475 u_int16_t dummy;
476 u_int16_t SGsiz; /* max number of SG table entrie */
477
478 u_int8_t IRQ :4,/* IRQ used this HBA */
479 IRQ_TR :1,/* IRQ Trigger: 0=edge, 1=level */
480 SECOND :1,/* This is a secondary controller */
481 DMA_channel:2;/* DRQ index, DRQ is 2comp of DRQX */
482
483 u_int8_t sync; /* 0-7 sync active bitmask (deprecated) */
484 u_int8_t DSBLE :1, /* ISA i/o addressing is disabled */
485 FORCADR :1, /* i/o address has been forced */
486 SG_64K :1,
487 SG_UAE :1,
488 :4;
489
490 u_int8_t MAX_ID :5, /* Max number of SCSI target IDs */
491 MAX_CHAN :3; /* Number of SCSI busses on HBA */
492
493 u_int8_t MAX_LUN; /* Max number of LUNs */
494 u_int8_t :3,
495 AUTOTRM :1,
496 M1_inst :1,
497 ID_qest :1, /* Raidnum ID is questionable */
498 is_PCI :1, /* HBA is PCI */
499 is_EISA :1; /* HBA is EISA */
500
501 u_int8_t RAIDNUM; /* unique HBA identifier */
502 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */
503
504 /* >>------>> End of The DPT structure <<------<< */
505
506 u_int32_t length; /* True length, after ntohl conversion */
507 } dpt_conf_t;
508
509 /* Scatter-Gather list entry */
510 typedef struct dpt_sg_segment {
511 u_int32_t seg_addr; /* All fields in network byte order */
512 u_int32_t seg_len;
513 } dpt_sg_t;
514
515
516 /* Status Packet */
517 typedef struct eata_sp {
518 u_int8_t hba_stat :7, /* HBA status */
519 EOC :1; /* True if command finished */
520
521 u_int8_t scsi_stat; /* Target SCSI status */
522
523 u_int8_t reserved[2];
524
525 u_int32_t residue_len; /* Number of bytes not transferred */
526
527 u_int32_t ccb_busaddr;
528
529 u_int8_t sp_ID_Message;
530 u_int8_t sp_Que_Message;
531 u_int8_t sp_Tag_Message;
532 u_int8_t msg[9];
533 } dpt_sp_t;
534
535 /*
536 * A strange collection of O/S-Hardware releated bits and pieces.
537 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command.
538 */
539 typedef struct dpt_drive_parameters {
540 u_int16_t cylinders; /* Up to 1024 */
541 u_int8_t heads; /* Up to 255 */
542 u_int8_t sectors; /* Up to 63 */
543 } dpt_drive_t;
544
545 typedef struct driveParam_S driveParam_T;
546
547 #define SI_CMOS_Valid 0x0001
548 #define SI_NumDrivesValid 0x0002
549 #define SI_ProcessorValid 0x0004
550 #define SI_MemorySizeValid 0x0008
551 #define SI_DriveParamsValid 0x0010
552 #define SI_SmartROMverValid 0x0020
553 #define SI_OSversionValid 0x0040
554 #define SI_OSspecificValid 0x0080
555 #define SI_BusTypeValid 0x0100
556
557 #define SI_ALL_VALID 0x0FFF
558 #define SI_NO_SmartROM 0x8000
559
560 #define SI_ISA_BUS 0x00
561 #define SI_MCA_BUS 0x01
562 #define SI_EISA_BUS 0x02
563 #define SI_PCI_BUS 0x04
564
565 #define HBA_BUS_ISA 0x00
566 #define HBA_BUS_EISA 0x01
567 #define HBA_BUS_PCI 0x02
568
569 typedef struct dpt_sysinfo {
570 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */
571 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */
572 u_int8_t numDrives; /* 0040:0075 contents */
573 u_int8_t processorFamily; /* Same as DPTSIG definition */
574 u_int8_t processorType; /* Same as DPTSIG definition */
575 u_int8_t smartROMMajorVersion;
576 u_int8_t smartROMMinorVersion; /* SmartROM version */
577 u_int8_t smartROMRevision;
578 u_int16_t flags; /* See bit definitions above */
579 u_int16_t conventionalMemSize; /* in KB */
580 u_int32_t extendedMemSize; /* in KB */
581 u_int32_t osType; /* Same as DPTSIG definition */
582 u_int8_t osMajorVersion;
583 u_int8_t osMinorVersion; /* The OS version */
584 u_int8_t osRevision;
585 u_int8_t osSubRevision;
586 u_int8_t busType; /* See defininitions above */
587 u_int8_t pad[3]; /* For alignment */
588 dpt_drive_t drives[16]; /* SmartROM Logical Drives */
589 } dpt_sysinfo_t;
590
591 /* SEND_COMMAND packet structure */
592 typedef struct eata_ccb {
593 u_int8_t SCSI_Reset :1, /* Cause a SCSI Bus reset on the cmd */
594 HBA_Init :1, /* Cause Controller to reinitialize */
595 Auto_Req_Sen :1, /* Do Auto Request Sense on errors */
596 scatter :1, /* Data Ptr points to a SG Packet */
597 Quick :1, /* Set this one for NO Status PAcket */
598 Interpret :1, /* Interpret the SCSI cdb for own use */
599 DataOut :1, /* Data Out phase with command */
600 DataIn :1; /* Data In phase with command */
601
602 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */
603 u_int8_t unused[3];
604 u_int8_t FWNEST :1, /* send cmd to phys RAID component */
605 unused2 :7;
606
607 u_int8_t Phsunit :1, /* physical unit on mirrored pair */
608 I_AT :1, /* inhibit address translation */
609 Disable_Cache :1, /* HBA inhibit caching */
610 :5;
611
612 u_int8_t cp_id :5, /* SCSI Device ID of target */
613 cp_channel :3; /* SCSI Channel # of HBA */
614
615 u_int8_t cp_LUN :5,
616 cp_luntar :1, /* CP is for target ROUTINE */
617 cp_dispri :1, /* Grant disconnect privilege */
618 cp_identify :1; /* Always TRUE */
619
620 u_int8_t cp_msg[3]; /* Message bytes 0-3 */
621
622 union {
623 struct {
624 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */
625
626 u_int8_t x_extent :1,
627 x_bytchk :1,
628 x_reladr :1,
629 x_cmplst :1,
630 x_fmtdata :1,
631 x_lun :3;
632
633 u_int8_t x_page;
634 u_int8_t reserved4;
635 u_int8_t x_len;
636 u_int8_t x_link :1;
637 u_int8_t x_flag :1;
638 u_int8_t reserved5 :4;
639 u_int8_t x_vendor :2;
640 } x;
641 u_int8_t z[12]; /* Command Descriptor Block (= 12) */
642 } cp_w;
643
644 #define cp_cdb cp_w.z
645 #define cp_scsi_cmd cp_w.x.x_scsi_cmd
646 #define cp_extent cp_w.x.x_extent
647 #define cp_lun cp_w.x.x_lun
648 #define cp_page cp_w.x.x_page
649 #define cp_len cp_w.x.x_len
650
651 #define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */
652 #define BUS_QUIET 0x04 /* Quite Scsi Bus Code */
653 #define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */
654
655 u_int32_t cp_datalen; /*
656 * Data Transfer Length. If scatter=1 len (IN
657 * BYTES!) of the S/G array
658 */
659
660 u_int32_t cp_busaddr; /* Unique identifier. Busaddr works well */
661 u_int32_t cp_dataDMA; /*
662 * Data Address, if scatter=1 then it is the
663 * address of scatter packet
664 */
665 u_int32_t cp_statDMA; /* address for Status Packet */
666 u_int32_t cp_reqDMA; /*
667 * Request Sense Address, used if CP command
668 * ends with error
669 */
670 u_int8_t CP_OpCode;
671
672 } eata_ccb_t;
673
674 /*
675 * DPT Signature Structure.
676 * Used by /dev/dpt to directly pass commands to the HBA
677 * We have more information here than we care for...
678 */
679
680 /* Current Signature Version - sigBYTE dsSigVersion; */
681 #define SIG_VERSION 1
682
683 /*
684 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE
685 *
686 * What type of processor the file is meant to run on.
687 * This will let us know whether to read sigWORDs as high/low or low/high.
688 */
689 #define PROC_INTEL 0x00 /* Intel 80x86 */
690 #define PROC_MOTOROLA 0x01 /* Motorola 68K */
691 #define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */
692 #define PROC_ALPHA 0x03 /* DEC Alpha */
693
694 /*
695 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS
696 *
697 * Different bit definitions dependent on processor_family
698 */
699
700 /* PROC_INTEL: */
701 #define PROC_8086 0x01 /* Intel 8086 */
702 #define PROC_286 0x02 /* Intel 80286 */
703 #define PROC_386 0x04 /* Intel 80386 */
704 #define PROC_486 0x08 /* Intel 80486 */
705 #define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */
706 #define PROC_P6 0x20 /* Intel 686 aka P6 */
707
708 /* PROC_MOTOROLA: */
709 #define PROC_68000 0x01 /* Motorola 68000 */
710 #define PROC_68020 0x02 /* Motorola 68020 */
711 #define PROC_68030 0x04 /* Motorola 68030 */
712 #define PROC_68040 0x08 /* Motorola 68040 */
713
714 /* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */
715 #define FT_EXECUTABLE 0 /* Executable Program */
716 #define FT_SCRIPT 1 /* Script/Batch File??? */
717 #define FT_HBADRVR 2 /* HBA Driver */
718 #define FT_OTHERDRVR 3 /* Other Driver */
719 #define FT_IFS 4 /* Installable Filesystem Driver */
720 #define FT_ENGINE 5 /* DPT Engine */
721 #define FT_COMPDRVR 6 /* Compressed Driver Disk */
722 #define FT_LANGUAGE 7 /* Foreign Language file */
723 #define FT_FIRMWARE 8 /* Downloadable or actual Firmware */
724 #define FT_COMMMODL 9 /* Communications Module */
725 #define FT_INT13 10 /* INT 13 style HBA Driver */
726 #define FT_HELPFILE 11 /* Help file */
727 #define FT_LOGGER 12 /* Event Logger */
728 #define FT_INSTALL 13 /* An Install Program */
729 #define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */
730 #define FT_RESOURCE 15 /* Storage Manager Resource File */
731 #define FT_MODEM_DB 16 /* Storage Manager Modem Database */
732
733 /* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */
734 #define FTF_DLL 0x01 /* Dynamic Link Library */
735 #define FTF_NLM 0x02 /* Netware Loadable Module */
736 #define FTF_OVERLAYS 0x04 /* Uses overlays */
737 #define FTF_DEBUG 0x08 /* Debug version */
738 #define FTF_TSR 0x10 /* TSR */
739 #define FTF_SYS 0x20 /* DOS Lodable driver */
740 #define FTF_PROTECTED 0x40 /* Runs in protected mode */
741 #define FTF_APP_SPEC 0x80 /* Application Specific */
742
743 /* OEM - sigBYTE dsOEM; DISTINCT VALUES */
744 #define OEM_DPT 0 /* DPT */
745 #define OEM_ATT 1 /* ATT */
746 #define OEM_NEC 2 /* NEC */
747 #define OEM_ALPHA 3 /* Alphatronix */
748 #define OEM_AST 4 /* AST */
749 #define OEM_OLIVETTI 5 /* Olivetti */
750 #define OEM_SNI 6 /* Siemens/Nixdorf */
751
752 /* Operating System - sigLONG dsOS; FLAG BITS */
753 #define OS_DOS 0x00000001 /* PC/MS-DOS */
754 #define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */
755 #define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */
756 #define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */
757 #define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */
758 #define OS_OS22x 0x00000020 /* IBM OS/2 2.x */
759 #define OS_NW286 0x00000040 /* Novell NetWare 286 */
760 #define OS_NW386 0x00000080 /* Novell NetWare 386 */
761 #define OS_GEN_UNIX 0x00000100 /* Generic Unix */
762 #define OS_SCO_UNIX 0x00000200 /* SCO Unix */
763 #define OS_ATT_UNIX 0x00000400 /* ATT Unix */
764 #define OS_UNIXWARE 0x00000800 /* UnixWare Unix */
765 #define OS_INT_UNIX 0x00001000 /* Interactive Unix */
766 #define OS_SOLARIS 0x00002000 /* SunSoft Solaris */
767 #define OS_QN 0x00004000 /* QNX for Tom Moch */
768 #define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */
769 #define OS_BANYAN 0x00010000 /* Banyan Vines */
770 #define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */
771 #define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */
772 #define OS_OTHER 0x80000000 /* Other */
773
774 /* Capabilities - sigWORD dsCapabilities; FLAG BITS */
775 #define CAP_RAID0 0x0001 /* RAID-0 */
776 #define CAP_RAID1 0x0002 /* RAID-1 */
777 #define CAP_RAID3 0x0004 /* RAID-3 */
778 #define CAP_RAID5 0x0008 /* RAID-5 */
779 #define CAP_SPAN 0x0010 /* Spanning */
780 #define CAP_PASS 0x0020 /* Provides passthrough */
781 #define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */
782 #define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */
783 #define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */
784 #define CAP_EXTEND 0x8000 /* Extended info appears after description */
785
786 /* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */
787 #define DEV_DASD 0x0001 /* DASD (hard drives) */
788 #define DEV_TAPE 0x0002 /* Tape drives */
789 #define DEV_PRINTER 0x0004 /* Printers */
790 #define DEV_PROC 0x0008 /* Processors */
791 #define DEV_WORM 0x0010 /* WORM drives */
792 #define DEV_CDROM 0x0020 /* CD-ROM drives */
793 #define DEV_SCANNER 0x0040 /* Scanners */
794 #define DEV_OPTICAL 0x0080 /* Optical Drives */
795 #define DEV_JUKEBOX 0x0100 /* Jukebox */
796 #define DEV_COMM 0x0200 /* Communications Devices */
797 #define DEV_OTHER 0x0400 /* Other Devices */
798 #define DEV_ALL 0xFFFF /* All SCSI Devices */
799
800 /* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */
801 #define ADF_2001 0x0001 /* PM2001 */
802 #define ADF_2012A 0x0002 /* PM2012A */
803 #define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */
804 #define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */
805 #define ADF_SC3_ISA 0x0010 /* PM2021 */
806 #define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */
807 #define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */
808 #define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */
809 #define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */
810 #define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */
811 #define ADF_ALL_MASTER 0xFFFE /* All bus mastering */
812 #define ADF_ALL_CACHE 0xFFFC /* All caching */
813 #define ADF_ALL 0xFFFF /* ALL DPT adapters */
814
815 /* Application - sigWORD dsApplication; FLAG BITS */
816 #define APP_DPTMGR 0x0001 /* DPT Storage Manager */
817 #define APP_ENGINE 0x0002 /* DPT Engine */
818 #define APP_SYTOS 0x0004 /* Sytron Sytos Plus */
819 #define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */
820 #define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */
821 #define APP_NOVABACK 0x0020 /* NovaStor Novaback */
822 #define APP_AIM 0x0040 /* Archive Information Manager */
823
824 /* Requirements - sigBYTE dsRequirements; FLAG BITS */
825 #define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */
826 #define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */
827 #define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */
828 #define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */
829 #define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */
830 #define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */
831
832 typedef struct dpt_sig {
833 char dsSignature[6]; /* ALWAYS "dPtSiG" */
834 u_int8_t SigVersion; /* signature version (currently 1) */
835 u_int8_t ProcessorFamily; /* what type of processor */
836 u_int8_t Processor; /* precise processor */
837 u_int8_t Filetype; /* type of file */
838 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */
839 u_int8_t OEM; /* OEM file was created for */
840 u_int32_t OS; /* which Operating systems */
841 u_int16_t Capabilities; /* RAID levels, etc. */
842 u_int16_t DeviceSupp; /* Types of SCSI devices supported */
843 u_int16_t AdapterSupp; /* DPT adapter families supported */
844 u_int16_t Application; /* applications file is for */
845 u_int8_t Requirements; /* Other driver dependencies */
846 u_int8_t Version; /* 1 */
847 u_int8_t Revision; /* 'J' */
848 u_int8_t SubRevision; /* '9', ' ' if N/A */
849 u_int8_t Month; /* creation month */
850 u_int8_t Day; /* creation day */
851 u_int8_t Year; /* creation year since 1980 */
852 char *Description; /* description (NULL terminated) */
853 } dpt_sig_t;
854
855 /* 32 bytes minimum - with no description. Put NULL at description[0] */
856 /* 81 bytes maximum - with 49 character description plus NULL. */
857
858 /* This line added at Roycroft's request */
859 /* Microsoft's NT compiler gets confused if you do a pack and don't */
860 /* restore it. */
861 typedef struct eata_pass_through {
862 u_int8_t eataID[4];
863 u_int32_t command;
864
865 #define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */
866 #define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */
867 #define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */
868 #define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */
869 #define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */
870 #define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */
871
872 u_int8_t *command_buffer;
873 eata_ccb_t command_packet;
874 u_int32_t timeout;
875 u_int8_t host_status;
876 u_int8_t target_status;
877 u_int8_t retries;
878 } eata_pt_t;
879
880 typedef enum {
881 DCCB_FREE = 0x00,
882 DCCB_ACTIVE = 0x01,
883 DCCB_RELEASE_SIMQ = 0x02
884 } dccb_state;
885
886 typedef struct dpt_ccb {
887 eata_ccb_t eata_ccb;
888 bus_dmamap_t dmamap;
889 dpt_sg_t *sg_list;
890 u_int32_t sg_busaddr;
891 dccb_state state;
892 union ccb *ccb;
893 struct scsi_sense_data sense_data;
894 u_int8_t tag;
895 u_int8_t retries;
896 u_int8_t status; /* status of this queueslot */
897 u_int8_t *cmd; /* address of cmd */
898
899 u_int32_t transaction_id;
900 u_int32_t result;
901 caddr_t data;
902 SLIST_ENTRY(dpt_ccb) links;
903
904 #ifdef DPT_MEASURE_PERFORMANCE
905 u_int32_t submitted_time;
906 struct timeval command_started;
907 struct timeval command_ended;
908 #endif
909 } dpt_ccb_t;
910
911 /*
912 * This is provided for compatibility with UnixWare only.
913 * Some of the fields may be bogus.
914 * Others may have a totally different meaning.
915 */
916 typedef struct dpt_scsi_ha {
917 u_int32_t ha_state; /* Operational state */
918 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */
919 int32_t ha_base; /* Base I/O address */
920 int ha_max_jobs; /* Max number of Active Jobs */
921 int ha_cache:2; /* Cache parameters */
922 int ha_cachesize:30; /* In meg, only if cache present*/
923 int ha_nbus; /* Number Of Busses on HBA */
924 int ha_ntargets; /* Number Of Targets Supported */
925 int ha_nluns; /* Number Of LUNs Supported */
926 int ha_tshift; /* Shift value for target */
927 int ha_bshift; /* Shift value for bus */
928 int ha_npend; /* # of jobs sent to HBA */
929 int ha_active_jobs; /* Number Of Active Jobs */
930 char ha_fw_version[4]; /* Firmware Revision Level */
931 void *ha_ccb; /* Controller command blocks */
932 void *ha_cblist; /* Command block free list */
933 void *ha_dev; /* Logical unit queues */
934 void *ha_StPkt_lock; /* Status Packet Lock */
935 void *ha_ccb_lock; /* CCB Lock */
936 void *ha_LuQWaiting; /* Lu Queue Waiting List */
937 void *ha_QWait_lock; /* Device Que Waiting Lock */
938 int ha_QWait_opri; /* Saved Priority Level */
939 #ifdef DPT_TARGET_MODE
940 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */
941 #endif
942 } dpt_compat_ha_t;
943
944 /*
945 * Describe the Inquiry Data returned on Page 0 from the Adapter. The
946 * Page C1 Inquiry Data is described in the DptConfig_t structure above.
947 */
948 typedef struct {
949 u_int8_t deviceType;
950 u_int8_t rm_dtq;
951 u_int8_t otherData[6];
952 u_int8_t vendor[8];
953 u_int8_t modelNum[16];
954 u_int8_t firmware[4];
955 u_int8_t protocol[4];
956 } dpt_inq_t;
957
958 /*
959 * sp_EOC is not `safe', so I will check sp_Messages[0] instead!
960 */
961 #define DptStat_BUSY(x) ((x)->sp_ID_Message)
962 #define DptStat_Reset_BUSY(x) \
963 ((x)->msg[0] = 0xA5, (x)->EOC = 0, \
964 (x)->ccb_busaddr = ~0)
965
966 #ifdef DPT_MEASURE_PERFORMANCE
967 #define BIG_ENOUGH 0x8fffffff
968 typedef struct dpt_metrics {
969 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */
970 u_int32_t max_command_time[256];
971 u_int32_t min_command_time[256];
972
973 u_int32_t min_intr_time;
974 u_int32_t max_intr_time;
975 u_int32_t aborted_interrupts;
976 u_int32_t spurious_interrupts;
977
978 u_int32_t max_waiting_count;
979 u_int32_t max_submit_count;
980 u_int32_t max_complete_count;
981
982 u_int32_t min_waiting_time;
983 u_int32_t min_submit_time;
984 u_int32_t min_complete_time;
985
986 u_int32_t max_waiting_time;
987 u_int32_t max_submit_time;
988 u_int32_t max_complete_time;
989
990 u_int32_t command_collisions;
991 u_int32_t command_too_busy;
992 u_int32_t max_eata_tries;
993 u_int32_t min_eata_tries;
994
995 u_int32_t read_by_size_count[10];
996 u_int32_t write_by_size_count[10];
997 u_int32_t read_by_size_min_time[10];
998 u_int32_t read_by_size_max_time[10];
999 u_int32_t write_by_size_min_time[10];
1000 u_int32_t write_by_size_max_time[10];
1001
1002 #define SIZE_512 0
1003 #define SIZE_1K 1
1004 #define SIZE_2K 2
1005 #define SIZE_4K 3
1006 #define SIZE_8K 4
1007 #define SIZE_16K 5
1008 #define SIZE_32K 6
1009 #define SIZE_64K 7
1010 #define SIZE_BIGGER 8
1011 #define SIZE_OTHER 9
1012
1013 struct timeval intr_started;
1014
1015 u_int32_t warm_starts;
1016 u_int32_t cold_boots;
1017 } dpt_perf_t;
1018 #endif
1019
1020 struct sg_map_node {
1021 bus_dmamap_t sg_dmamap;
1022 bus_addr_t sg_physaddr;
1023 dpt_sg_t* sg_vaddr;
1024 SLIST_ENTRY(sg_map_node) links;
1025 };
1026
1027 /* Main state machine and interface structure */
1028 typedef struct dpt_softc {
1029 bus_space_tag_t tag;
1030 bus_space_handle_t bsh;
1031 bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */
1032 dpt_ccb_t *dpt_dccbs; /* Array of dpt ccbs */
1033 bus_addr_t dpt_ccb_busbase; /* phys base address of array */
1034 bus_addr_t dpt_ccb_busend; /* phys end address of array */
1035
1036 u_int32_t handle_interrupts :1, /* Are we ready for real work? */
1037 target_mode_enabled :1,
1038 resource_shortage :1,
1039 cache_type :2,
1040 spare :28;
1041
1042 int total_dccbs;
1043 int free_dccbs;
1044 int pending_ccbs;
1045 int completed_ccbs;
1046
1047 SLIST_HEAD(, dpt_ccb) free_dccb_list;
1048 LIST_HEAD(, ccb_hdr) pending_ccb_list;
1049
1050 bus_dma_tag_t parent_dmat;
1051 bus_dma_tag_t dccb_dmat; /* dmat for our ccb array */
1052 bus_dmamap_t dccb_dmamap;
1053 bus_dma_tag_t sg_dmat; /* dmat for our sg maps */
1054 SLIST_HEAD(, sg_map_node) sg_maps;
1055
1056 struct cam_sim *sims[MAX_CHANNELS];
1057 struct cam_path *paths[MAX_CHANNELS];
1058 u_int32_t commands_processed;
1059 u_int32_t lost_interrupts;
1060
1061 /*
1062 * These three parameters can be used to allow for wide scsi, and
1063 * for host adapters that support multiple busses. The first two
1064 * should be set to 1 more than the actual max id or lun (i.e. 8 for
1065 * normal systems).
1066 *
1067 * There is a FAT assumption here; We assume that these will never
1068 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS
1069 */
1070 u_int channels; /* # of avail scsi chan. */
1071 u_int32_t max_id;
1072 u_int32_t max_lun;
1073
1074 u_int8_t irq;
1075 u_int8_t dma_channel;
1076
1077 TAILQ_ENTRY(dpt_softc) links;
1078 int unit;
1079 int init_level;
1080
1081 /*
1082 * Every object on a unit can have a receiver, if it treats
1083 * us as a target. We do that so that separate and independant
1084 * clients can consume received buffers.
1085 */
1086
1087 #define DPT_RW_BUFFER_SIZE (8 * 1024)
1088 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1089 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1090 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS];
1091
1092 dpt_inq_t board_data;
1093 u_int8_t EATA_revision;
1094 u_int8_t bustype; /* bustype of HBA */
1095 u_int32_t state; /* state of HBA */
1096
1097 #define DPT_HA_FREE 0x00000000
1098 #define DPT_HA_OK 0x00000000
1099 #define DPT_HA_NO_TIMEOUT 0x00000000
1100 #define DPT_HA_BUSY 0x00000001
1101 #define DPT_HA_TIMEOUT 0x00000002
1102 #define DPT_HA_RESET 0x00000004
1103 #define DPT_HA_LOCKED 0x00000008
1104 #define DPT_HA_ABORTED 0x00000010
1105 #define DPT_HA_CONTROL_ACTIVE 0x00000020
1106 #define DPT_HA_SHUTDOWN_ACTIVE 0x00000040
1107 #define DPT_HA_COMMAND_ACTIVE 0x00000080
1108 #define DPT_HA_QUIET 0x00000100
1109
1110 #ifdef DPT_LOST_IRQ
1111 #define DPT_LOST_IRQ_SET 0x10000000
1112 #define DPT_LOST_IRQ_ACTIVE 0x20000000
1113 #endif
1114
1115 #ifdef DPT_HANDLE_TIMEOUTS
1116 #define DPT_HA_TIMEOUTS_SET 0x40000000
1117 #define DPT_HA_TIMEOUTS_ACTIVE 0x80000000
1118 #endif
1119
1120 u_int8_t primary; /* true if primary */
1121
1122 u_int8_t more_support :1, /* HBA supports MORE flag */
1123 immediate_support :1, /* HBA supports IMMEDIATE */
1124 broken_INQUIRY :1, /* EISA HBA w/broken INQUIRY */
1125 spare2 :5;
1126
1127 u_int8_t resetlevel[MAX_CHANNELS];
1128 u_int32_t last_ccb; /* Last used ccb */
1129 u_int32_t cplen; /* size of CP in words */
1130 u_int16_t cppadlen; /* pad length of cp */
1131 u_int16_t max_dccbs;
1132 u_int16_t sgsize; /* Entries in the SG list */
1133 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */
1134 u_int32_t cache_size;
1135
1136 volatile dpt_sp_t *sp; /* status packet */
1137 /* Copied from the status packet during interrupt handler */
1138 u_int8_t hba_stat;
1139 u_int8_t scsi_stat; /* Target SCSI status */
1140 u_int32_t residue_len; /* Number of bytes not transferred */
1141 bus_addr_t sp_physaddr; /* phys address of status packet */
1142
1143 /*
1144 * We put ALL conditional elements at the tail for the structure.
1145 * If we do not, then userland code will crash or trash based on which
1146 * kernel it is running with.
1147 * This isi most visible with usr/sbin/dpt_softc(8)
1148 */
1149
1150 #ifdef DPT_MEASURE_PERFORMANCE
1151 dpt_perf_t performance;
1152 #endif
1153
1154 #ifdef DPT_RESET_HBA
1155 struct timeval last_contact;
1156 #endif
1157 } dpt_softc_t;
1158
1159 /*
1160 * This structure is used to pass dpt_softc contents to userland via the
1161 * ioctl DPT_IOCTL_SOFTC. The reason for this maddness, is that FreeBSD
1162 * (all BSDs ?) chose to actually assign a nasty meaning to the IOCTL word,
1163 * encoding 13 bits of it as size. As dpt_softc_t is somewhere between
1164 * 8,594 and 8,600 (depends on options), we have to copy the data to
1165 * something less than 4KB long. This siliness also solves the problem of
1166 * varying definition of dpt_softc_t, As the variants are exluded from
1167 * dpt_user_softc.
1168 *
1169 * See dpt_softc_t above for enumerations, comments and such.
1170 */
1171 typedef struct dpt_user_softc {
1172 int unit;
1173 u_int32_t handle_interrupts :1, /* Are we ready for real work? */
1174 target_mode_enabled :1,
1175 spare :30;
1176
1177 int total_ccbs_count;
1178 int free_ccbs_count;
1179 int waiting_ccbs_count;
1180 int submitted_ccbs_count;
1181 int completed_ccbs_count;
1182
1183 u_int32_t queue_status;
1184 u_int32_t free_lock;
1185 u_int32_t waiting_lock;
1186 u_int32_t submitted_lock;
1187 u_int32_t completed_lock;
1188
1189 u_int32_t commands_processed;
1190 u_int32_t lost_interrupts;
1191
1192 u_int8_t channels;
1193 u_int32_t max_id;
1194 u_int32_t max_lun;
1195
1196 u_int16_t io_base;
1197 u_int8_t *v_membase;
1198 u_int8_t *p_membase;
1199
1200 u_int8_t irq;
1201 u_int8_t dma_channel;
1202
1203 dpt_inq_t board_data;
1204 u_int8_t EATA_revision;
1205 u_int8_t bustype;
1206 u_int32_t state;
1207
1208 u_int8_t primary;
1209 u_int8_t more_support :1,
1210 immediate_support :1,
1211 broken_INQUIRY :1,
1212 spare2 :5;
1213
1214 u_int8_t resetlevel[MAX_CHANNELS];
1215 u_int32_t last_ccb;
1216 u_int32_t cplen;
1217 u_int16_t cppadlen;
1218 u_int16_t queuesize;
1219 u_int16_t sgsize;
1220 u_int8_t hostid[MAX_CHANNELS];
1221 u_int32_t cache_type :2,
1222 cache_size :30;
1223 } dpt_user_softc_t;
1224
1225 /*
1226 * Externals:
1227 * These all come from dpt_scsi.c
1228 *
1229 */
1230 #ifdef _KERNEL
1231 /* This function gets the current hi-res time and returns it to the caller */
1232 static __inline struct timeval
1233 dpt_time_now(void)
1234 {
1235 struct timeval now;
1236
1237 microtime(&now);
1238 return(now);
1239 }
1240
1241 /*
1242 * Given a minor device number, get its SCSI Unit.
1243 */
1244 static __inline int
1245 dpt_minor2unit(int minor)
1246 {
1247 return(minor2hba(minor));
1248 }
1249
1250 dpt_softc_t *dpt_minor2softc(int minor_no);
1251
1252 #endif /* _KERNEL */
1253
1254 /*
1255 * This function substracts one timval structure from another,
1256 * Returning the result in usec.
1257 * It assumes that less than 4 billion usecs passed form start to end.
1258 * If times are sensless, ~0 is returned.
1259 */
1260 static __inline u_int32_t
1261 dpt_time_delta(struct timeval start,
1262 struct timeval end)
1263 {
1264 if (start.tv_sec > end.tv_sec)
1265 return(~0);
1266
1267 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) )
1268 return(~0);
1269
1270 return ( (end.tv_sec - start.tv_sec) * 1000000 +
1271 (end.tv_usec - start.tv_usec) );
1272 }
1273
1274 extern TAILQ_HEAD(dpt_softc_list, dpt_softc) dpt_softcs;
1275
1276 extern int dpt_controllers_present;
1277
1278 #ifdef _KERNEL
1279 dpt_softc_t * dpt_alloc(device_t, bus_space_tag_t, bus_space_handle_t);
1280 #endif
1281 void dpt_free(struct dpt_softc *dpt);
1282 int dpt_init(struct dpt_softc *dpt);
1283 int dpt_attach(dpt_softc_t * dpt);
1284 void dpt_intr(void *arg);
1285
1286 dpt_conf_t * dpt_pio_get_conf(u_int32_t);
1287
1288 #if 0
1289 extern void hex_dump(u_char * data, int length,
1290 char *name, int no);
1291 extern char *i2bin(unsigned int no, int length);
1292 extern char *scsi_cmd_name(u_int8_t cmd);
1293
1294 extern dpt_conf_t *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page,
1295 u_int8_t target, u_int8_t size,
1296 int extent);
1297
1298 extern int dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf);
1299 extern int dpt_attach(dpt_softc_t * dpt);
1300 extern void dpt_shutdown(int howto, dpt_softc_t *dpt);
1301 extern void dpt_detect_cache(dpt_softc_t *dpt);
1302
1303 extern int dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd,
1304 caddr_t cmdarg, int minor_no);
1305
1306 extern u_int8_t dpt_blinking_led(dpt_softc_t *dpt);
1307
1308 extern dpt_rb_t dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target,
1309 u_int8_t lun, u_int8_t mode,
1310 u_int16_t length, u_int16_t offset,
1311 dpt_rec_buff callback, dpt_rb_op_t op);
1312
1313 extern int dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target,
1314 u_int8_t lun, u_int8_t mode, u_int16_t length,
1315 u_int16_t offset, void *data,
1316 buff_wr_done callback);
1317
1318
1319
1320 void dpt_reset_performance(dpt_softc_t *dpt);
1321 #endif
1322
1323 #endif /* _DPT_H */
DragonFly BSD