sys/dev/drm/radeon/radeon_drv.c

   1 /**
   2  * \file radeon_drv.c
   3  * ATI Radeon driver
   4  *
   5  * \author Gareth Hughes <gareth@valinux.com>
   6  */
   7
   8 /*
   9  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  10  * All Rights Reserved.
  11  *
  12  * Permission is hereby granted, free of charge, to any person obtaining a
  13  * copy of this software and associated documentation files (the "Software"),
  14  * to deal in the Software without restriction, including without limitation
  15  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  16  * and/or sell copies of the Software, and to permit persons to whom the
  17  * Software is furnished to do so, subject to the following conditions:
  18  *
  19  * The above copyright notice and this permission notice (including the next
  20  * paragraph) shall be included in all copies or substantial portions of the
  21  * Software.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  24  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  25  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  26  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  27  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  28  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  29  * OTHER DEALINGS IN THE SOFTWARE.
  30  *
  31  * $FreeBSD: head/sys/dev/drm2/radeon/radeon_drv.c 254885 2013-08-25 19:37:15Z dumbbell $
  32  */
  33
  34 #include <drm/drmP.h>
  35 #include <uapi_drm/radeon_drm.h>
  36 #include "radeon_drv.h"
  37 #include "radeon_gem.h"
  38 #include "radeon_kms.h"
  39 #include "radeon_irq_kms.h"
  40
  41 #include <drm/drm_pciids.h>
  42 #include <linux/module.h>
  43 #ifdef PM_TODO
  44 #include <linux/pm_runtime.h>
  45 #include <linux/vga_switcheroo.h>
  46 #endif
  47
  48 #include <drm/drm_gem.h>
  49
  50 #include "drm/drm_crtc_helper.h"
  51 /*
  52  * KMS wrapper.
  53  * - 2.0.0 - initial interface
  54  * - 2.1.0 - add square tiling interface
  55  * - 2.2.0 - add r6xx/r7xx const buffer support
  56  * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
  57  * - 2.4.0 - add crtc id query
  58  * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
  59  * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
  60  *   2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
  61  *   2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
  62  *   2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
  63  *   2.10.0 - fusion 2D tiling
  64  *   2.11.0 - backend map, initial compute support for the CS checker
  65  *   2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
  66  *   2.13.0 - virtual memory support, streamout
  67  *   2.14.0 - add evergreen tiling informations
  68  *   2.15.0 - add max_pipes query
  69  *   2.16.0 - fix evergreen 2D tiled surface calculation
  70  *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
  71  *   2.18.0 - r600-eg: allow "invalid" DB formats
  72  *   2.19.0 - r600-eg: MSAA textures
  73  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  74  *   2.21.0 - r600-r700: FMASK and CMASK
  75  *   2.22.0 - r600 only: RESOLVE_BOX allowed
  76  *   2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
  77  *   2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
  78  *   2.25.0 - eg+: new info request for num SE and num SH
  79  *   2.26.0 - r600-eg: fix htile size computation
  80  *   2.27.0 - r600-SI: Add CS ioctl support for async DMA
  81  *   2.28.0 - r600-eg: Add MEM_WRITE packet support
  82  *   2.29.0 - R500 FP16 color clear registers
  83  *   2.30.0 - fix for FMASK texturing
  84  *   2.31.0 - Add fastfb support for rs690
  85  *   2.32.0 - new info request for rings working
  86  *   2.33.0 - Add SI tiling mode array query
  87  *   2.34.0 - Add CIK tiling mode array query
  88  *   2.35.0 - Add CIK macrotile mode array query
  89  *   2.36.0 - Fix CIK DCE tiling setup
  90  *   2.37.0 - allow GS ring setup on r6xx/r7xx
  91  *   2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN),
  92  *            CIK: 1D and linear tiling modes contain valid PIPE_CONFIG
  93  *   2.39.0 - Add INFO query for number of active CUs
  94  *   2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting
  95  *            CS to GPU on >= r600
  96  *   2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support
  97  *   2.42.0 - Add VCE/VUI (Video Usability Information) support
  98  *   2.43.0 - RADEON_INFO_GPU_RESET_COUNTER
  99  *   2.44.0 - SET_APPEND_CNT packet3 support
 100  *   2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI
 101  */
 102 #define KMS_DRIVER_MAJOR        2
 103 #define KMS_DRIVER_MINOR        45
 104 #define KMS_DRIVER_PATCHLEVEL   0
 105 int radeon_suspend_kms(struct drm_device *dev, bool suspend,
 106                        bool fbcon, bool freeze);
 107 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
 108 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe);
 109 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 110 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe);
 111 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, unsigned int pipe,
 112                                     int *max_error,
 113                                     struct timeval *vblank_time,
 114                                     unsigned flags);
 115 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc,
 116                                       unsigned int flags, int *vpos, int *hpos,
 117                                       ktime_t *stime, ktime_t *etime,
 118                                       const struct drm_display_mode *mode);
 119 extern bool radeon_is_px(struct drm_device *dev);
 120 extern const struct drm_ioctl_desc radeon_ioctls_kms[];
 121 extern int radeon_max_kms_ioctl;
 122 #ifdef DUMBBELL_WIP
 123 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
 124 #endif /* DUMBBELL_WIP */
 125 int radeon_mode_dumb_mmap(struct drm_file *filp,
 126                           struct drm_device *dev,
 127                           uint32_t handle, uint64_t *offset_p);
 128 int radeon_mode_dumb_create(struct drm_file *file_priv,
 129                             struct drm_device *dev,
 130                             struct drm_mode_create_dumb *args);
 131 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
 132 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
 133                                                         size_t size,
 134                                                         struct sg_table *sg);
 135 int radeon_gem_prime_pin(struct drm_gem_object *obj);
 136 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
 137 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
 138 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
 139
 140 #if defined(CONFIG_DEBUG_FS)
 141 int radeon_debugfs_init(struct drm_minor *minor);
 142 void radeon_debugfs_cleanup(struct drm_minor *minor);
 143 #endif
 144
 145 /* atpx handler */
 146 #if defined(CONFIG_VGA_SWITCHEROO)
 147 void radeon_register_atpx_handler(void);
 148 void radeon_unregister_atpx_handler(void);
 149 #else
 150 static inline void radeon_register_atpx_handler(void) {}
 151 static inline void radeon_unregister_atpx_handler(void) {}
 152 #endif
 153
 154 int radeon_no_wb;
 155 int radeon_modeset = 1;
 156 int radeon_dynclks = -1;
 157 int radeon_r4xx_atom = 0;
 158 int radeon_agpmode = 0;
 159 int radeon_vram_limit = 0;
 160 int radeon_gart_size = -1; /* auto */
 161 int radeon_benchmarking = 0;
 162 int radeon_testing = 0;
 163 int radeon_connector_table = 0;
 164 int radeon_tv = 1;
 165 int radeon_audio = -1;
 166 int radeon_disp_priority = 0;
 167 int radeon_hw_i2c = 0;
 168 int radeon_pcie_gen2 = -1;
 169 int radeon_msi = -1;
 170 int radeon_lockup_timeout = 10000;
 171 int radeon_fastfb = 0;
 172 int radeon_dpm = -1;
 173 int radeon_aspm = -1;
 174 int radeon_runtime_pm = -1;
 175 int radeon_hard_reset = 0;
 176 int radeon_vm_size = 8;
 177 int radeon_vm_block_size = -1;
 178 int radeon_deep_color = 0;
 179 int radeon_use_pflipirq = 2;
 180 int radeon_bapm = -1;
 181 int radeon_backlight = -1;
 182 int radeon_auxch = -1;
 183 int radeon_uvd = 1;
 184 int radeon_vce = 1;
 185
 186 TUNABLE_INT("drm.radeon.no_wb", &radeon_no_wb);
 187 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 188 module_param_named(no_wb, radeon_no_wb, int, 0444);
 189
 190 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
 191 module_param_named(modeset, radeon_modeset, int, 0400);
 192
 193 TUNABLE_INT("drm.radeon.dynclks", &radeon_dynclks);
 194 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
 195 module_param_named(dynclks, radeon_dynclks, int, 0444);
 196
 197 TUNABLE_INT("drm.radeon.r4xx_atom", &radeon_r4xx_atom);
 198 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
 199 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
 200
 201 TUNABLE_INT("drm.radeon.vram_limit", &radeon_vram_limit);
 202 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
 203 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
 204
 205 TUNABLE_INT("drm.radeon.agpmode", &radeon_agpmode);
 206 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
 207 module_param_named(agpmode, radeon_agpmode, int, 0444);
 208
 209 TUNABLE_INT("drm.radeon.gart_size", &radeon_gart_size);
 210 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
 211 module_param_named(gartsize, radeon_gart_size, int, 0600);
 212
 213 TUNABLE_INT("drm.radeon.benchmarking", &radeon_benchmarking);
 214 MODULE_PARM_DESC(benchmark, "Run benchmark");
 215 module_param_named(benchmark, radeon_benchmarking, int, 0444);
 216
 217 TUNABLE_INT("drm.radeon.testing", &radeon_testing);
 218 MODULE_PARM_DESC(test, "Run tests");
 219 module_param_named(test, radeon_testing, int, 0444);
 220
 221 TUNABLE_INT("drm.radeon.connector_table", &radeon_connector_table);
 222 MODULE_PARM_DESC(connector_table, "Force connector table");
 223 module_param_named(connector_table, radeon_connector_table, int, 0444);
 224
 225 TUNABLE_INT("drm.radeon.tv", &radeon_tv);
 226 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
 227 module_param_named(tv, radeon_tv, int, 0444);
 228
 229 TUNABLE_INT("drm.radeon.audio", &radeon_audio);
 230 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");
 231 module_param_named(audio, radeon_audio, int, 0444);
 232
 233 TUNABLE_INT("drm.radeon.disp_priority", &radeon_disp_priority);
 234 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
 235 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
 236
 237 TUNABLE_INT("drm.radeon.hw_i2c", &radeon_hw_i2c);
 238 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
 239 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
 240
 241 TUNABLE_INT("drm.radeon.pcie_gen2", &radeon_pcie_gen2);
 242 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
 243 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
 244
 245 TUNABLE_INT("drm.radeon.msi", &radeon_msi);
 246 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
 247 module_param_named(msi, radeon_msi, int, 0444);
 248
 249 TUNABLE_INT("drm.radeon.lockup_timeout", &radeon_lockup_timeout);
 250 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
 251 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
 252
 253 TUNABLE_INT("drm.radeon.fastfb", &radeon_fastfb);
 254 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
 255 module_param_named(fastfb, radeon_fastfb, int, 0444);
 256
 257 TUNABLE_INT("drm.radeon.dpm", &radeon_dpm);
 258 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
 259 module_param_named(dpm, radeon_dpm, int, 0444);
 260
 261 TUNABLE_INT("drm.radeon.aspm", &radeon_aspm);
 262 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
 263 module_param_named(aspm, radeon_aspm, int, 0444);
 264
 265 TUNABLE_INT("drm.radeon.runtime_pm", &radeon_runtime_pm);       /* careful with this */
 266 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
 267 module_param_named(runpm, radeon_runtime_pm, int, 0444);
 268
 269 TUNABLE_INT("drm.radeon.hard_reset", &radeon_hard_reset);       /* very careful with this */
 270 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))");
 271 module_param_named(hard_reset, radeon_hard_reset, int, 0444);
 272
 273 TUNABLE_INT("drm.radeon.vm_size", &radeon_vm_size);
 274 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)");
 275 module_param_named(vm_size, radeon_vm_size, int, 0444);
 276
 277 TUNABLE_INT("drm.radeon.vm_block_size", &radeon_vm_block_size);
 278 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");
 279 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444);
 280
 281 TUNABLE_INT("drm.radeon.deep_color", &radeon_deep_color);
 282 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");
 283 module_param_named(deep_color, radeon_deep_color, int, 0444);
 284
 285 TUNABLE_INT("drm.radeon.use_pflipirq", &radeon_use_pflipirq);
 286 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))");
 287 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444);
 288
 289 TUNABLE_INT("drm.radeon.bapm", &radeon_bapm);
 290 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");
 291 module_param_named(bapm, radeon_bapm, int, 0444);
 292
 293 TUNABLE_INT("drm.radeon.backlight", &radeon_backlight);
 294 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)");
 295 module_param_named(backlight, radeon_backlight, int, 0444);
 296
 297 TUNABLE_INT("drm.radeon.auxch", &radeon_auxch);
 298 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
 299 module_param_named(auxch, radeon_auxch, int, 0444);
 300
 301 TUNABLE_INT("drm.radeon.uvd", &radeon_uvd);
 302 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)");
 303 module_param_named(uvd, radeon_uvd, int, 0444);
 304
 305 TUNABLE_INT("drm.radeon.vce", &radeon_vce);
 306 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)");
 307 module_param_named(vce, radeon_vce, int, 0444);
 308
 309 static drm_pci_id_list_t pciidlist[] = {
 310         radeon_PCI_IDS
 311 };
 312
 313 static struct drm_driver kms_driver;
 314
 315 #ifdef DUMBBELL_WIP
 316 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
 317 {
 318         struct apertures_struct *ap;
 319         bool primary = false;
 320
 321         ap = alloc_apertures(1);
 322         if (!ap)
 323                 return -ENOMEM;
 324
 325         ap->ranges[0].base = pci_resource_start(pdev, 0);
 326         ap->ranges[0].size = pci_resource_len(pdev, 0);
 327
 328 #ifdef CONFIG_X86
 329         primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
 330 #endif
 331         remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
 332         kfree(ap);
 333
 334         return 0;
 335 }
 336
 337 static int radeon_pci_probe(struct pci_dev *pdev,
 338                             const struct pci_device_id *ent)
 339 {
 340         int ret;
 341
 342         /* Get rid of things like offb */
 343         ret = radeon_kick_out_firmware_fb(pdev);
 344         if (ret)
 345                 return ret;
 346
 347         return drm_get_pci_dev(pdev, ent, &kms_driver);
 348 }
 349
 350 static void
 351 radeon_pci_remove(struct pci_dev *pdev)
 352 {
 353         struct drm_device *dev = pci_get_drvdata(pdev);
 354
 355         drm_put_dev(dev);
 356 }
 357
 358 static int radeon_pmops_suspend(struct device *dev)
 359 {
 360         struct pci_dev *pdev = to_pci_dev(dev);
 361         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 362         return radeon_suspend_kms(drm_dev, true, true, false);
 363 }
 364
 365 static int radeon_pmops_resume(struct device *dev)
 366 {
 367         struct pci_dev *pdev = to_pci_dev(dev);
 368         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 369         return radeon_resume_kms(drm_dev, true, true);
 370 }
 371
 372 static int radeon_pmops_freeze(struct device *dev)
 373 {
 374         struct pci_dev *pdev = to_pci_dev(dev);
 375         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 376         return radeon_suspend_kms(drm_dev, false, true, true);
 377 }
 378
 379 static int radeon_pmops_thaw(struct device *dev)
 380 {
 381         struct pci_dev *pdev = to_pci_dev(dev);
 382         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 383         return radeon_resume_kms(drm_dev, false, true);
 384 }
 385
 386 static int radeon_pmops_runtime_suspend(struct device *dev)
 387 {
 388         struct pci_dev *pdev = to_pci_dev(dev);
 389         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 390         int ret;
 391
 392         if (!radeon_is_px(drm_dev)) {
 393 #ifdef PM_TODO
 394                 pm_runtime_forbid(dev);
 395 #endif
 396                 return -EBUSY;
 397         }
 398
 399         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 400         drm_kms_helper_poll_disable(drm_dev);
 401         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
 402
 403         ret = radeon_suspend_kms(drm_dev, false, false, false);
 404         pci_save_state(pdev);
 405         pci_disable_device(pdev);
 406         pci_set_power_state(pdev, PCI_D3cold);
 407         drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
 408
 409         return 0;
 410 }
 411
 412 static int radeon_pmops_runtime_resume(struct device *dev)
 413 {
 414         struct pci_dev *pdev = to_pci_dev(dev);
 415         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 416         int ret;
 417
 418         if (!radeon_is_px(drm_dev))
 419                 return -EINVAL;
 420
 421         drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 422
 423         pci_set_power_state(pdev, PCI_D0);
 424         pci_restore_state(pdev);
 425         ret = pci_enable_device(pdev);
 426         if (ret)
 427                 return ret;
 428         pci_set_master(pdev);
 429
 430         ret = radeon_resume_kms(drm_dev, false, false);
 431         drm_kms_helper_poll_enable(drm_dev);
 432         vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
 433         drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
 434         return 0;
 435 }
 436
 437 static int radeon_pmops_runtime_idle(struct device *dev)
 438 {
 439         struct pci_dev *pdev = to_pci_dev(dev);
 440         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 441         struct drm_crtc *crtc;
 442
 443         if (!radeon_is_px(drm_dev)) {
 444 #ifdef PM_TODO
 445                 pm_runtime_forbid(dev);
 446 #endif
 447                 return -EBUSY;
 448         }
 449
 450         list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
 451                 if (crtc->enabled) {
 452                         DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
 453                         return -EBUSY;
 454                 }
 455         }
 456
 457         pm_runtime_mark_last_busy(dev);
 458         pm_runtime_autosuspend(dev);
 459         /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
 460         return 1;
 461 }
 462
 463 long radeon_drm_ioctl(struct file *filp,
 464                       unsigned int cmd, unsigned long arg)
 465 {
 466         struct drm_file *file_priv = filp->private_data;
 467         struct drm_device *dev;
 468         long ret;
 469         dev = file_priv->minor->dev;
 470         ret = pm_runtime_get_sync(dev->dev);
 471         if (ret < 0)
 472                 return ret;
 473
 474         ret = drm_ioctl(filp, cmd, arg);
 475
 476         pm_runtime_mark_last_busy(dev->dev);
 477         pm_runtime_put_autosuspend(dev->dev);
 478         return ret;
 479 }
 480
 481 static const struct dev_pm_ops radeon_pm_ops = {
 482         .suspend = radeon_pmops_suspend,
 483         .resume = radeon_pmops_resume,
 484         .freeze = radeon_pmops_freeze,
 485         .thaw = radeon_pmops_thaw,
 486         .poweroff = radeon_pmops_freeze,
 487         .restore = radeon_pmops_resume,
 488         .runtime_suspend = radeon_pmops_runtime_suspend,
 489         .runtime_resume = radeon_pmops_runtime_resume,
 490         .runtime_idle = radeon_pmops_runtime_idle,
 491 };
 492
 493 static const struct file_operations radeon_driver_kms_fops = {
 494         .owner = THIS_MODULE,
 495         .open = drm_open,
 496         .release = drm_release,
 497         .unlocked_ioctl = radeon_drm_ioctl,
 498         .mmap = radeon_mmap,
 499         .poll = drm_poll,
 500         .read = drm_read,
 501 #ifdef CONFIG_COMPAT
 502         .compat_ioctl = radeon_kms_compat_ioctl,
 503 #endif
 504 };
 505 #endif /* DUMBBELL_WIP */
 506
 507 static int radeon_sysctl_init(struct drm_device *dev, struct sysctl_ctx_list *ctx,
 508                               struct sysctl_oid *top)
 509 {
 510         return drm_add_busid_modesetting(dev, ctx, top);
 511 }
 512
 513 static struct drm_driver kms_driver = {
 514         .driver_features =
 515             DRIVER_USE_AGP |
 516             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
 517             DRIVER_PRIME | DRIVER_RENDER,
 518         .load = radeon_driver_load_kms,
 519         .use_msi = radeon_msi_ok,
 520         .open = radeon_driver_open_kms,
 521         .preclose = radeon_driver_preclose_kms,
 522         .postclose = radeon_driver_postclose_kms,
 523         .lastclose = radeon_driver_lastclose_kms,
 524         .unload = radeon_driver_unload_kms,
 525         .get_vblank_counter = radeon_get_vblank_counter_kms,
 526         .enable_vblank = radeon_enable_vblank_kms,
 527         .disable_vblank = radeon_disable_vblank_kms,
 528         .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
 529         .get_scanout_position = radeon_get_crtc_scanoutpos,
 530         .irq_preinstall = radeon_driver_irq_preinstall_kms,
 531         .irq_postinstall = radeon_driver_irq_postinstall_kms,
 532         .irq_uninstall = radeon_driver_irq_uninstall_kms,
 533         .irq_handler = radeon_driver_irq_handler_kms,
 534         .sysctl_init = radeon_sysctl_init,
 535         .ioctls = radeon_ioctls_kms,
 536         .gem_free_object = radeon_gem_object_free,
 537         .gem_open_object = radeon_gem_object_open,
 538         .gem_close_object = radeon_gem_object_close,
 539         .dumb_create = radeon_mode_dumb_create,
 540         .dumb_map_offset = radeon_mode_dumb_mmap,
 541         .dumb_destroy = drm_gem_dumb_destroy,
 542 #ifdef DUMBBELL_WIP
 543         .fops = &radeon_driver_kms_fops,
 544 #endif /* DUMBBELL_WIP */
 545
 546 #ifdef DUMBBELL_WIP
 547         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 548         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 549         .gem_prime_export = drm_gem_prime_export,
 550         .gem_prime_import = drm_gem_prime_import,
 551         .gem_prime_pin = radeon_gem_prime_pin,
 552         .gem_prime_unpin = radeon_gem_prime_unpin,
 553         .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
 554         .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
 555         .gem_prime_vmap = radeon_gem_prime_vmap,
 556         .gem_prime_vunmap = radeon_gem_prime_vunmap,
 557 #endif /* DUMBBELL_WIP */
 558
 559         .name = DRIVER_NAME,
 560         .desc = DRIVER_DESC,
 561         .date = DRIVER_DATE,
 562         .major = KMS_DRIVER_MAJOR,
 563         .minor = KMS_DRIVER_MINOR,
 564         .patchlevel = KMS_DRIVER_PATCHLEVEL,
 565 };
 566
 567 #ifdef DUMBBELL_WIP
 568 static struct drm_driver *driver;
 569 static struct pci_driver *pdriver;
 570
 571 static struct pci_driver radeon_kms_pci_driver = {
 572         .name = DRIVER_NAME,
 573         .id_table = pciidlist,
 574         .probe = radeon_pci_probe,
 575         .remove = radeon_pci_remove,
 576         .driver.pm = &radeon_pm_ops,
 577 };
 578
 579 static int __init radeon_init(void)
 580 {
 581         if (radeon_modeset == 1) {
 582                 DRM_INFO("radeon kernel modesetting enabled.\n");
 583                 driver = &kms_driver;
 584                 pdriver = &radeon_kms_pci_driver;
 585                 driver->driver_features |= DRIVER_MODESET;
 586                 driver->num_ioctls = radeon_max_kms_ioctl;
 587                 radeon_register_atpx_handler();
 588
 589         } else {
 590                 DRM_ERROR("No UMS support in radeon module!\n");
 591                 return -EINVAL;
 592         }
 593
 594         /* let modprobe override vga console setting */
 595         return drm_pci_init(driver, pdriver);
 596 }
 597
 598 static void __exit radeon_exit(void)
 599 {
 600         drm_pci_exit(driver, pdriver);
 601         radeon_unregister_atpx_handler();
 602 }
 603 #endif /* DUMBBELL_WIP */
 604
 605 /* =================================================================== */
 606
 607 static int
 608 radeon_probe(device_t kdev)
 609 {
 610
 611         return drm_probe(kdev, pciidlist);
 612 }
 613
 614 static int
 615 radeon_attach(device_t kdev)
 616 {
 617         struct drm_device *dev;
 618
 619         dev = device_get_softc(kdev);
 620         if (radeon_modeset == 1) {
 621                 kms_driver.driver_features |= DRIVER_MODESET;
 622                 kms_driver.num_ioctls = radeon_max_kms_ioctl;
 623                 radeon_register_atpx_handler();
 624         }
 625         dev->driver = &kms_driver;
 626         return (drm_attach(kdev, pciidlist));
 627 }
 628
 629 static int
 630 radeon_suspend(device_t kdev)
 631 {
 632         struct drm_device *dev;
 633         int ret;
 634
 635         dev = device_get_softc(kdev);
 636         ret = radeon_suspend_kms(dev, true, true, false);
 637
 638         return (-ret);
 639 }
 640
 641 static int
 642 radeon_resume(device_t kdev)
 643 {
 644         struct drm_device *dev;
 645         int ret;
 646
 647         dev = device_get_softc(kdev);
 648         ret = radeon_resume_kms(dev, true, true);
 649
 650         return (-ret);
 651 }
 652
 653 static device_method_t radeon_methods[] = {
 654         /* Device interface */
 655         DEVMETHOD(device_probe,         radeon_probe),
 656         DEVMETHOD(device_attach,        radeon_attach),
 657         DEVMETHOD(device_suspend,       radeon_suspend),
 658         DEVMETHOD(device_resume,        radeon_resume),
 659         DEVMETHOD(device_detach,        drm_release),
 660         DEVMETHOD_END
 661 };
 662
 663 static driver_t radeon_driver = {
 664         "drm",
 665         radeon_methods,
 666         sizeof(struct drm_device)
 667 };
 668
 669 extern devclass_t drm_devclass;
 670 DRIVER_MODULE_ORDERED(radeonkms, vgapci, radeon_driver, drm_devclass,
 671     NULL, NULL, SI_ORDER_ANY);
 672 MODULE_DEPEND(radeonkms, drm, 1, 1, 1);
 673 MODULE_DEPEND(radeonkms, agp, 1, 1, 1);
 674 MODULE_DEPEND(radeonkms, iicbus, 1, 1, 1);
 675 MODULE_DEPEND(radeonkms, iic, 1, 1, 1);
 676 MODULE_DEPEND(radeonkms, iicbb, 1, 1, 1);
 677 #ifdef CONFIG_ACPI
 678 MODULE_DEPEND(radeonkms, acpi, 1, 1, 1);
 679 #endif