Short manpage for ubt(4). Most of it is commented out for now because sco
[dragonfly.git] / sys / dev / netif / awi / am79c930.c
blob1730ffaade765f7a308b3606f9fa5947bdf850a7
1 /* $NetBSD: am79c930.c,v 1.5 2000/03/23 13:57:58 onoe Exp $ */
2 /* $FreeBSD: src/sys/dev/awi/am79c930.c,v 1.2.2.1 2000/12/07 04:09:39 imp Exp $ */
3 /* $DragonFly: src/sys/dev/netif/awi/Attic/am79c930.c,v 1.9 2006/12/22 23:26:19 swildner Exp $ */
5 /*-
6 * Copyright (c) 1999 The NetBSD Foundation, Inc.
7 * All rights reserved.
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Bill Sommerfeld
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
42 * Am79c930 chip driver.
44 * This is used by the awi driver to use the shared
45 * memory attached to the 79c930 to communicate with the firmware running
46 * in the 930's on-board 80188 core.
48 * The 79c930 can be mapped into just I/O space, or also have a
49 * memory mapping; the mapping must be set up by the bus front-end
50 * before am79c930_init is called.
54 * operations:
56 * read_8, read_16, read_32, read_64, read_bytes
57 * write_8, write_16, write_32, write_64, write_bytes
58 * (two versions, depending on whether memory-space or i/o space is in use).
60 * interrupt E.C.
61 * start isr
62 * end isr
65 #include <sys/param.h>
66 #include <sys/systm.h>
67 #include <sys/bus.h>
69 #include <machine/cpu.h>
71 #include <dev/netif/awi/am79c930reg.h>
72 #include <dev/netif/awi/am79c930var.h>
74 #define AM930_DELAY(x) /*nothing*/
76 void am79c930_regdump (struct am79c930_softc *sc);
78 static void io_write_1 (struct am79c930_softc *, u_int32_t, u_int8_t);
79 static void io_write_2 (struct am79c930_softc *, u_int32_t, u_int16_t);
80 static void io_write_4 (struct am79c930_softc *, u_int32_t, u_int32_t);
81 static void io_write_bytes (struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
83 static u_int8_t io_read_1 (struct am79c930_softc *, u_int32_t);
84 static u_int16_t io_read_2 (struct am79c930_softc *, u_int32_t);
85 static u_int32_t io_read_4 (struct am79c930_softc *, u_int32_t);
86 static void io_read_bytes (struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
88 static void mem_write_1 (struct am79c930_softc *, u_int32_t, u_int8_t);
89 static void mem_write_2 (struct am79c930_softc *, u_int32_t, u_int16_t);
90 static void mem_write_4 (struct am79c930_softc *, u_int32_t, u_int32_t);
91 static void mem_write_bytes (struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
93 static u_int8_t mem_read_1 (struct am79c930_softc *, u_int32_t);
94 static u_int16_t mem_read_2 (struct am79c930_softc *, u_int32_t);
95 static u_int32_t mem_read_4 (struct am79c930_softc *, u_int32_t);
96 static void mem_read_bytes (struct am79c930_softc *, u_int32_t, u_int8_t *, size_t);
98 static struct am79c930_ops iospace_ops = {
99 io_write_1,
100 io_write_2,
101 io_write_4,
102 io_write_bytes,
103 io_read_1,
104 io_read_2,
105 io_read_4,
106 io_read_bytes
109 struct am79c930_ops memspace_ops = {
110 mem_write_1,
111 mem_write_2,
112 mem_write_4,
113 mem_write_bytes,
114 mem_read_1,
115 mem_read_2,
116 mem_read_4,
117 mem_read_bytes
120 static void
121 io_write_1(struct am79c930_softc *sc, u_int32_t off, u_int8_t val)
123 AM930_DELAY(1);
124 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
125 ((off>>8)& 0x7f));
126 AM930_DELAY(1);
127 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
128 AM930_DELAY(1);
129 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA, val);
130 AM930_DELAY(1);
133 static void
134 io_write_2(struct am79c930_softc *sc, u_int32_t off, u_int16_t val)
136 AM930_DELAY(1);
137 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
138 ((off>>8)& 0x7f));
139 AM930_DELAY(1);
140 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
141 AM930_DELAY(1);
142 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, val & 0xff);
143 AM930_DELAY(1);
144 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, (val>>8)&0xff);
145 AM930_DELAY(1);
148 static void
149 io_write_4(struct am79c930_softc *sc, u_int32_t off, u_int32_t val)
151 AM930_DELAY(1);
152 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
153 ((off>>8)& 0x7f));
154 AM930_DELAY(1);
155 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
156 AM930_DELAY(1);
157 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,val & 0xff);
158 AM930_DELAY(1);
159 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>8)&0xff);
160 AM930_DELAY(1);
161 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>16)&0xff);
162 AM930_DELAY(1);
163 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>24)&0xff);
164 AM930_DELAY(1);
167 static void
168 io_write_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
169 size_t len)
171 int i;
173 AM930_DELAY(1);
174 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
175 ((off>>8)& 0x7f));
176 AM930_DELAY(1);
177 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff));
178 AM930_DELAY(1);
179 for (i=0; i<len; i++)
180 bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,ptr[i]);
183 static u_int8_t
184 io_read_1(struct am79c930_softc *sc, u_int32_t off)
186 u_int8_t val;
188 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
189 ((off>>8)& 0x7f));
190 AM930_DELAY(1);
191 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
192 AM930_DELAY(1);
193 val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
194 AM930_DELAY(1);
195 return val;
198 static u_int16_t
199 io_read_2(struct am79c930_softc *sc, u_int32_t off)
201 u_int16_t val;
203 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
204 ((off>>8)& 0x7f));
205 AM930_DELAY(1);
206 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
207 AM930_DELAY(1);
208 val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
209 AM930_DELAY(1);
210 val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;
211 AM930_DELAY(1);
212 return val;
215 static u_int32_t
216 io_read_4(struct am79c930_softc *sc, u_int32_t off)
218 u_int32_t val;
220 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
221 ((off>>8)& 0x7f));
222 AM930_DELAY(1);
223 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
224 AM930_DELAY(1);
225 val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA);
226 AM930_DELAY(1);
227 val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8;
228 AM930_DELAY(1);
229 val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 16;
230 AM930_DELAY(1);
231 val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 24;
232 AM930_DELAY(1);
233 return val;
236 static void
237 io_read_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
238 size_t len)
240 int i;
242 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI,
243 ((off>>8)& 0x7f));
244 AM930_DELAY(1);
245 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff));
246 AM930_DELAY(1);
247 for (i=0; i<len; i++)
248 ptr[i] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
249 AM79C930_IODPA);
252 static void
253 mem_write_1(struct am79c930_softc *sc, u_int32_t off, u_int8_t val)
255 bus_space_write_1(sc->sc_memt, sc->sc_memh, off, val);
258 static void
259 mem_write_2(struct am79c930_softc *sc, u_int32_t off, u_int16_t val)
261 bus_space_tag_t t = sc->sc_memt;
262 bus_space_handle_t h = sc->sc_memh;
264 /* could be unaligned */
265 if ((off & 0x1) == 0)
266 bus_space_write_2(t, h, off, val);
267 else {
268 bus_space_write_1(t, h, off, val & 0xff);
269 bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);
273 static void
274 mem_write_4(struct am79c930_softc *sc, u_int32_t off, u_int32_t val)
276 bus_space_tag_t t = sc->sc_memt;
277 bus_space_handle_t h = sc->sc_memh;
279 /* could be unaligned */
280 if ((off & 0x3) == 0)
281 bus_space_write_4(t, h, off, val);
282 else {
283 bus_space_write_1(t, h, off, val & 0xff);
284 bus_space_write_1(t, h, off+1, (val >> 8) & 0xff);
285 bus_space_write_1(t, h, off+2, (val >> 16) & 0xff);
286 bus_space_write_1(t, h, off+3, (val >> 24) & 0xff);
290 static void
291 mem_write_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
292 size_t len)
294 bus_space_write_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len);
298 static u_int8_t
299 mem_read_1(struct am79c930_softc *sc, u_int32_t off)
301 return bus_space_read_1(sc->sc_memt, sc->sc_memh, off);
304 static u_int16_t
305 mem_read_2(struct am79c930_softc *sc, u_int32_t off)
307 /* could be unaligned */
308 if ((off & 0x1) == 0)
309 return bus_space_read_2(sc->sc_memt, sc->sc_memh, off);
310 else
311 return
312 bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
313 (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8);
316 static u_int32_t
317 mem_read_4(struct am79c930_softc *sc, u_int32_t off)
319 /* could be unaligned */
320 if ((off & 0x3) == 0)
321 return bus_space_read_4(sc->sc_memt, sc->sc_memh, off);
322 else
323 return
324 bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) |
325 (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8) |
326 (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+2) <<16) |
327 (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+3) <<24);
330 static void
331 mem_read_bytes(struct am79c930_softc *sc, u_int32_t off, u_int8_t *ptr,
332 size_t len)
334 bus_space_read_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len);
341 * Set bits in GCR.
344 void
345 am79c930_gcr_setbits(struct am79c930_softc *sc, u_int8_t bits)
347 u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
349 gcr |= bits;
351 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr);
355 * Clear bits in GCR.
358 void
359 am79c930_gcr_clearbits(struct am79c930_softc *sc, u_int8_t bits)
361 u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
363 gcr &= ~bits;
365 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr);
368 u_int8_t
369 am79c930_gcr_read(struct am79c930_softc *sc)
371 return bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR);
374 #if 0
375 void
376 am79c930_regdump(struct am79c930_softc *sc)
378 u_int8_t buf[8];
379 int i;
381 AM930_DELAY(5);
382 for (i=0; i<8; i++) {
383 buf[i] = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, i);
384 AM930_DELAY(5);
386 kprintf("am79c930: regdump:");
387 for (i=0; i<8; i++) {
388 kprintf(" %02x", buf[i]);
390 kprintf("\n");
392 #endif
394 void
395 am79c930_chip_init(struct am79c930_softc *sc, int how)
397 /* zero the bank select register, and leave it that way.. */
398 bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_BSS, 0);
399 if (how)
400 sc->sc_ops = &memspace_ops;
401 else
402 sc->sc_ops = &iospace_ops;