2 * Copyright (c) 2004 David O'Brien <obrien@FreeBSD.org>
3 * Copyright (c) 2003 Orlando Bassotto <orlando.bassotto@ieo-research.it>
4 * Copyright (c) 1999 Cameron Grant <cg@freebsd.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHERIN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifdef HAVE_KERNEL_OPTION_HEADERS
33 #include <dev/sound/pcm/sound.h>
34 #include <dev/sound/pcm/ac97.h>
35 #include <dev/sound/pci/emuxkireg.h>
37 #include <bus/pci/pcireg.h>
38 #include <bus/pci/pcivar.h>
39 #include <sys/queue.h>
41 #include <dev/sound/midi/mpu401.h>
42 #include "mpufoi_if.h"
44 SND_DECLARE_FILE("$FreeBSD: head/sys/dev/sound/pci/emu10k1.c 267581 2014-06-17 16:07:57Z jhb $");
46 /* -------------------------------------------------------------------- */
48 #define NUM_G 64 /* use all channels */
49 #define WAVEOUT_MAXBUFSIZE 32768
50 #define EMUPAGESIZE 4096 /* don't change */
51 #define EMUMAXPAGES (WAVEOUT_MAXBUFSIZE * NUM_G / EMUPAGESIZE)
52 #define EMU10K1_PCI_ID 0x00021102 /* 1102 => Creative Labs Vendor ID */
53 #define EMU10K2_PCI_ID 0x00041102
54 #define EMU10K3_PCI_ID 0x00081102
55 #define EMU_DEFAULT_BUFSZ 4096
56 #define EMU_MAX_CHANS 8
59 #define MAXREQVOICES 8
64 #define TMEMSIZE 256*1024
67 #define ENABLE 0xffffffff
68 #define DISABLE 0x00000000
69 #define ENV_ON EMU_CHAN_DCYSUSV_CHANNELENABLE_MASK
70 #define ENV_OFF 0x00 /* XXX: should this be 1? */
72 #define EMU_A_IOCFG_GPOUT_A 0x40
73 #define EMU_A_IOCFG_GPOUT_D 0x04
74 #define EMU_A_IOCFG_GPOUT_AD (EMU_A_IOCFG_GPOUT_A|EMU_A_IOCFG_GPOUT_D) /* EMU_A_IOCFG_GPOUT0 */
76 #define EMU_HCFG_GPOUT1 0x00000800
83 #define C_00000000 0x40
84 #define C_00000001 0x41
85 #define C_00000004 0x44
86 #define C_40000000 0x4d
87 /* Audigy constants */
88 #define A_C_00000000 0xc0
89 #define A_C_40000000 0xcd
92 #define FXBUS(x) (0x00 + (x))
93 #define EXTIN(x) (0x10 + (x))
94 #define EXTOUT(x) (0x20 + (x))
96 #define GPR(x) (EMU_FXGPREGBASE + (x))
97 #define A_EXTIN(x) (0x40 + (x))
98 #define A_FXBUS(x) (0x00 + (x))
99 #define A_EXTOUT(x) (0x60 + (x))
100 #define A_GPR(x) (EMU_A_FXGPREGBASE + (x))
103 #define FXBUS_PCM_LEFT 0x00
104 #define FXBUS_PCM_RIGHT 0x01
105 #define FXBUS_MIDI_LEFT 0x04
106 #define FXBUS_MIDI_RIGHT 0x05
107 #define FXBUS_MIDI_REVERB 0x0c
108 #define FXBUS_MIDI_CHORUS 0x0d
111 #define EXTIN_AC97_L 0x00
112 #define EXTIN_AC97_R 0x01
113 #define EXTIN_SPDIF_CD_L 0x02
114 #define EXTIN_SPDIF_CD_R 0x03
115 #define EXTIN_TOSLINK_L 0x06
116 #define EXTIN_TOSLINK_R 0x07
117 #define EXTIN_COAX_SPDIF_L 0x0a
118 #define EXTIN_COAX_SPDIF_R 0x0b
120 #define A_EXTIN_AC97_L 0x00
121 #define A_EXTIN_AC97_R 0x01
124 #define EXTOUT_AC97_L 0x00
125 #define EXTOUT_AC97_R 0x01
126 #define EXTOUT_TOSLINK_L 0x02
127 #define EXTOUT_TOSLINK_R 0x03
128 #define EXTOUT_AC97_CENTER 0x04
129 #define EXTOUT_AC97_LFE 0x05
130 #define EXTOUT_HEADPHONE_L 0x06
131 #define EXTOUT_HEADPHONE_R 0x07
132 #define EXTOUT_REAR_L 0x08
133 #define EXTOUT_REAR_R 0x09
134 #define EXTOUT_ADC_CAP_L 0x0a
135 #define EXTOUT_ADC_CAP_R 0x0b
136 #define EXTOUT_ACENTER 0x11
137 #define EXTOUT_ALFE 0x12
139 #define A_EXTOUT_FRONT_L 0x00
140 #define A_EXTOUT_FRONT_R 0x01
141 #define A_EXTOUT_CENTER 0x02
142 #define A_EXTOUT_LFE 0x03
143 #define A_EXTOUT_HEADPHONE_L 0x04
144 #define A_EXTOUT_HEADPHONE_R 0x05
145 #define A_EXTOUT_REAR_L 0x06
146 #define A_EXTOUT_REAR_R 0x07
147 #define A_EXTOUT_AFRONT_L 0x08
148 #define A_EXTOUT_AFRONT_R 0x09
149 #define A_EXTOUT_ACENTER 0x0a
150 #define A_EXTOUT_ALFE 0x0b
151 #define A_EXTOUT_AREAR_L 0x0e
152 #define A_EXTOUT_AREAR_R 0x0f
153 #define A_EXTOUT_AC97_L 0x10
154 #define A_EXTOUT_AC97_R 0x11
155 #define A_EXTOUT_ADC_CAP_L 0x16
156 #define A_EXTOUT_ADC_CAP_R 0x17
159 SLIST_ENTRY(emu_memblk
) link
;
162 u_int32_t pte_start
, pte_size
;
163 bus_dmamap_t buf_map
;
167 u_int8_t bmap
[EMUMAXPAGES
/ 8];
168 u_int32_t
*ptb_pages
;
170 bus_addr_t silent_page_addr
;
171 bus_addr_t ptb_pages_addr
;
172 bus_dmamap_t ptb_map
;
173 bus_dmamap_t silent_map
;
174 SLIST_HEAD(, emu_memblk
) blocks
;
179 unsigned int b16
:1, stereo
:1, busy
:1, running
:1, ismaster
:1;
182 int fxrt1
; /* FX routing */
183 int fxrt2
; /* FX routing (only for audigy) */
185 struct emu_voice
*slave
;
186 struct pcm_channel
*channel
;
191 /* channel registers */
193 int spd
, fmt
, blksz
, run
;
194 struct emu_voice
*master
, *slave
;
195 struct snd_dbuf
*buffer
;
196 struct pcm_channel
*channel
;
197 struct sc_info
*parent
;
201 int spd
, fmt
, run
, blksz
, num
;
202 u_int32_t idxreg
, basereg
, sizereg
, setupreg
, irqmask
;
203 struct snd_dbuf
*buffer
;
204 struct pcm_channel
*channel
;
205 struct sc_info
*parent
;
208 /* device private data */
212 u_int32_t tos_link
:1, APS
:1, audigy
:1, audigy2
:1;
213 u_int32_t addrmask
; /* wider if audigy */
216 bus_space_handle_t sh
;
217 bus_dma_tag_t parent_dmat
;
219 struct resource
*reg
, *irq
;
224 int timer
, timerinterval
;
228 struct emu_voice voice
[64];
229 struct sc_pchinfo pch
[EMU_MAX_CHANS
];
230 struct sc_rchinfo rch
[3];
232 mpu401_intr_t
*mpu_intr
;
236 /* -------------------------------------------------------------------- */
243 static int emu_init(struct sc_info
*);
244 static void emu_intr(void *);
245 static void *emu_malloc(struct sc_info
*sc
, u_int32_t sz
, bus_addr_t
*addr
, bus_dmamap_t
*map
);
246 static void *emu_memalloc(struct sc_info
*sc
, u_int32_t sz
, bus_addr_t
*addr
);
247 static int emu_memfree(struct sc_info
*sc
, void *buf
);
248 static int emu_memstart(struct sc_info
*sc
, void *buf
);
250 static void emu_vdump(struct sc_info
*sc
, struct emu_voice
*v
);
253 /* talk to the card */
254 static u_int32_t
emu_rd(struct sc_info
*, int, int);
255 static void emu_wr(struct sc_info
*, int, u_int32_t
, int);
257 /* -------------------------------------------------------------------- */
259 static u_int32_t emu_rfmt_ac97
[] = {
260 SND_FORMAT(AFMT_S16_LE
, 1, 0),
261 SND_FORMAT(AFMT_S16_LE
, 2, 0),
265 static u_int32_t emu_rfmt_mic
[] = {
266 SND_FORMAT(AFMT_U8
, 1, 0),
270 static u_int32_t emu_rfmt_efx
[] = {
271 SND_FORMAT(AFMT_S16_LE
, 2, 0),
275 static struct pcmchan_caps emu_reccaps
[3] = {
276 {8000, 48000, emu_rfmt_ac97
, 0},
277 {8000, 8000, emu_rfmt_mic
, 0},
278 {48000, 48000, emu_rfmt_efx
, 0},
281 static u_int32_t emu_pfmt
[] = {
282 SND_FORMAT(AFMT_U8
, 1, 0),
283 SND_FORMAT(AFMT_U8
, 2, 0),
284 SND_FORMAT(AFMT_S16_LE
, 1, 0),
285 SND_FORMAT(AFMT_S16_LE
, 2, 0),
289 static struct pcmchan_caps emu_playcaps
= {4000, 48000, emu_pfmt
, 0};
291 static int adcspeed
[8] = {48000, 44100, 32000, 24000, 22050, 16000, 11025, 8000};
292 /* audigy supports 12kHz. */
293 static int audigy_adcspeed
[9] = {
294 48000, 44100, 32000, 24000, 22050, 16000, 12000, 11025, 8000
297 /* -------------------------------------------------------------------- */
300 emu_rd(struct sc_info
*sc
, int regno
, int size
)
304 return bus_space_read_1(sc
->st
, sc
->sh
, regno
);
306 return bus_space_read_2(sc
->st
, sc
->sh
, regno
);
308 return bus_space_read_4(sc
->st
, sc
->sh
, regno
);
315 emu_wr(struct sc_info
*sc
, int regno
, u_int32_t data
, int size
)
319 bus_space_write_1(sc
->st
, sc
->sh
, regno
, data
);
322 bus_space_write_2(sc
->st
, sc
->sh
, regno
, data
);
325 bus_space_write_4(sc
->st
, sc
->sh
, regno
, data
);
331 emu_rdptr(struct sc_info
*sc
, int chn
, int reg
)
333 u_int32_t ptr
, val
, mask
, size
, offset
;
335 ptr
= ((reg
<< 16) & sc
->addrmask
) | (chn
& EMU_PTR_CHNO_MASK
);
336 emu_wr(sc
, EMU_PTR
, ptr
, 4);
337 val
= emu_rd(sc
, EMU_DATA
, 4);
338 if (reg
& 0xff000000) {
339 size
= (reg
>> 24) & 0x3f;
340 offset
= (reg
>> 16) & 0x1f;
341 mask
= ((1 << size
) - 1) << offset
;
349 emu_wrptr(struct sc_info
*sc
, int chn
, int reg
, u_int32_t data
)
351 u_int32_t ptr
, mask
, size
, offset
;
353 ptr
= ((reg
<< 16) & sc
->addrmask
) | (chn
& EMU_PTR_CHNO_MASK
);
354 emu_wr(sc
, EMU_PTR
, ptr
, 4);
355 if (reg
& 0xff000000) {
356 size
= (reg
>> 24) & 0x3f;
357 offset
= (reg
>> 16) & 0x1f;
358 mask
= ((1 << size
) - 1) << offset
;
361 data
|= emu_rd(sc
, EMU_DATA
, 4) & ~mask
;
363 emu_wr(sc
, EMU_DATA
, data
, 4);
367 emu_wrefx(struct sc_info
*sc
, unsigned int pc
, unsigned int data
)
369 pc
+= sc
->audigy
? EMU_A_MICROCODEBASE
: EMU_MICROCODEBASE
;
370 emu_wrptr(sc
, 0, pc
, data
);
373 /* -------------------------------------------------------------------- */
375 /* no locking needed */
378 emu_rdcd(kobj_t obj
, void *devinfo
, int regno
)
380 struct sc_info
*sc
= (struct sc_info
*)devinfo
;
382 emu_wr(sc
, EMU_AC97ADDR
, regno
, 1);
383 return emu_rd(sc
, EMU_AC97DATA
, 2);
387 emu_wrcd(kobj_t obj
, void *devinfo
, int regno
, u_int32_t data
)
389 struct sc_info
*sc
= (struct sc_info
*)devinfo
;
391 emu_wr(sc
, EMU_AC97ADDR
, regno
, 1);
392 emu_wr(sc
, EMU_AC97DATA
, data
, 2);
396 static kobj_method_t emu_ac97_methods
[] = {
397 KOBJMETHOD(ac97_read
, emu_rdcd
),
398 KOBJMETHOD(ac97_write
, emu_wrcd
),
401 AC97_DECLARE(emu_ac97
);
403 /* -------------------------------------------------------------------- */
406 emu_settimer(struct sc_info
*sc
)
408 struct sc_pchinfo
*pch
;
409 struct sc_rchinfo
*rch
;
413 for (i
= 0; i
< sc
->nchans
; i
++) {
416 tmp
= (pch
->spd
* sndbuf_getalign(pch
->buffer
))
423 for (i
= 0; i
< 3; i
++) {
426 tmp
= (rch
->spd
* sndbuf_getalign(rch
->buffer
))
432 RANGE(rate
, 48, 9600);
433 sc
->timerinterval
= 48000 / rate
;
434 emu_wr(sc
, EMU_TIMER
, sc
->timerinterval
& 0x03ff, 2);
436 return sc
->timerinterval
;
440 emu_enatimer(struct sc_info
*sc
, int go
)
444 if (sc
->timer
++ == 0) {
445 x
= emu_rd(sc
, EMU_INTE
, 4);
446 x
|= EMU_INTE_INTERTIMERENB
;
447 emu_wr(sc
, EMU_INTE
, x
, 4);
451 x
= emu_rd(sc
, EMU_INTE
, 4);
452 x
&= ~EMU_INTE_INTERTIMERENB
;
453 emu_wr(sc
, EMU_INTE
, x
, 4);
459 emu_enastop(struct sc_info
*sc
, char channel
, int enable
)
461 int reg
= (channel
& 0x20) ? EMU_SOLEH
: EMU_SOLEL
;
464 reg
|= channel
<< 16;
465 emu_wrptr(sc
, 0, reg
, enable
);
469 emu_recval(int speed
) {
473 while (val
< 7 && speed
< adcspeed
[val
])
479 audigy_recval(int speed
) {
483 while (val
< 8 && speed
< audigy_adcspeed
[val
])
489 emu_rate_to_pitch(u_int32_t rate
)
491 static u_int32_t logMagTable
[128] = {
492 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
493 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
494 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
495 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
496 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
497 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
498 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
499 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
500 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
501 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
502 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
503 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
504 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
505 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
506 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
507 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
509 static char logSlopeTable
[128] = {
510 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
511 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
512 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
513 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
514 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
515 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
516 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
517 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
518 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
519 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
520 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
521 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
522 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
523 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
524 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
525 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
530 return 0; /* Bail out if no leading "1" */
531 rate
*= 11185; /* Scale 48000 to 0x20002380 */
532 for (i
= 31; i
> 0; i
--) {
533 if (rate
& 0x80000000) { /* Detect leading "1" */
534 return (((u_int32_t
) (i
- 15) << 20) +
535 logMagTable
[0x7f & (rate
>> 24)] +
536 (0x7f & (rate
>> 17)) *
537 logSlopeTable
[0x7f & (rate
>> 24)]);
542 return 0; /* Should never reach this point */
546 emu_rate_to_linearpitch(u_int32_t rate
)
548 rate
= (rate
<< 8) / 375;
549 return (rate
>> 1) + (rate
& 1);
552 static struct emu_voice
*
553 emu_valloc(struct sc_info
*sc
)
559 for (i
= 0; i
< 64 && sc
->voice
[i
].busy
; i
++);
568 emu_vinit(struct sc_info
*sc
, struct emu_voice
*m
, struct emu_voice
*s
,
569 u_int32_t sz
, struct snd_dbuf
*b
)
574 buf
= emu_memalloc(sc
, sz
, &tmp_addr
);
578 sndbuf_setup(b
, buf
, sz
);
579 m
->start
= emu_memstart(sc
, buf
) * EMUPAGESIZE
;
580 m
->end
= m
->start
+ sz
;
591 m
->fxrt1
= FXBUS_MIDI_CHORUS
| FXBUS_PCM_RIGHT
<< 8 |
592 FXBUS_PCM_LEFT
<< 16 | FXBUS_MIDI_REVERB
<< 24;
593 m
->fxrt2
= 0x3f3f3f3f; /* No effects on second route */
595 m
->fxrt1
= FXBUS_MIDI_CHORUS
| FXBUS_PCM_RIGHT
<< 4 |
596 FXBUS_PCM_LEFT
<< 8 | FXBUS_MIDI_REVERB
<< 12;
619 emu_vsetup(struct sc_pchinfo
*ch
)
621 struct emu_voice
*v
= ch
->master
;
624 v
->b16
= (ch
->fmt
& AFMT_16BIT
) ? 1 : 0;
625 v
->stereo
= (AFMT_CHANNEL(ch
->fmt
) > 1) ? 1 : 0;
626 if (v
->slave
!= NULL
) {
627 v
->slave
->b16
= v
->b16
;
628 v
->slave
->stereo
= v
->stereo
;
633 if (v
->slave
!= NULL
)
634 v
->slave
->speed
= v
->speed
;
639 emu_vwrite(struct sc_info
*sc
, struct emu_voice
*v
)
643 u_int32_t sa
, ea
, start
, val
, silent_page
;
645 s
= (v
->stereo
? 1 : 0) + (v
->b16
? 1 : 0);
650 l
= r
= x
= y
= v
->vol
;
652 l
= v
->ismaster
? l
: 0;
653 r
= v
->ismaster
? 0 : r
;
656 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CPF
, v
->stereo
? EMU_CHAN_CPF_STEREO_MASK
: 0);
657 val
= v
->stereo
? 28 : 30;
658 val
*= v
->b16
? 1 : 2;
662 emu_wrptr(sc
, v
->vnum
, EMU_A_CHAN_FXRT1
, v
->fxrt1
);
663 emu_wrptr(sc
, v
->vnum
, EMU_A_CHAN_FXRT2
, v
->fxrt2
);
664 emu_wrptr(sc
, v
->vnum
, EMU_A_CHAN_SENDAMOUNTS
, 0);
667 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_FXRT
, v
->fxrt1
<< 16);
669 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_PTRX
, (x
<< 8) | r
);
670 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_DSL
, ea
| (y
<< 24));
671 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_PSST
, sa
| (l
<< 24));
672 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CCCA
, start
| (v
->b16
? 0 : EMU_CHAN_CCCA_8BITSELECT
));
674 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_Z1
, 0);
675 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_Z2
, 0);
677 silent_page
= ((u_int32_t
)(sc
->mem
.silent_page_addr
) << 1)
678 | EMU_CHAN_MAP_PTI_MASK
;
679 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_MAPA
, silent_page
);
680 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_MAPB
, silent_page
);
682 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CVCF
, EMU_CHAN_CVCF_CURRFILTER_MASK
);
683 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_VTFT
, EMU_CHAN_VTFT_FILTERTARGET_MASK
);
684 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_ATKHLDM
, 0);
685 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_DCYSUSM
, EMU_CHAN_DCYSUSM_DECAYTIME_MASK
);
686 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_LFOVAL1
, 0x8000);
687 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_LFOVAL2
, 0x8000);
688 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_FMMOD
, 0);
689 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_TREMFRQ
, 0);
690 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_FM2FRQ2
, 0);
691 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_ENVVAL
, 0x8000);
693 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_ATKHLDV
,
694 EMU_CHAN_ATKHLDV_HOLDTIME_MASK
| EMU_CHAN_ATKHLDV_ATTACKTIME_MASK
);
695 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_ENVVOL
, 0x8000);
697 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_PEFE_FILTERAMOUNT
, 0x7f);
698 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_PEFE_PITCHAMOUNT
, 0);
700 if (v
->slave
!= NULL
)
701 emu_vwrite(sc
, v
->slave
);
705 emu_vtrigger(struct sc_info
*sc
, struct emu_voice
*v
, int go
)
707 u_int32_t pitch_target
, initial_pitch
;
708 u_int32_t cra
, cs
, ccis
;
713 cs
= v
->stereo
? 4 : 2;
714 ccis
= v
->stereo
? 28 : 30;
715 ccis
*= v
->b16
? 1 : 2;
716 sample
= v
->b16
? 0x00000000 : 0x80808080;
718 for (i
= 0; i
< cs
; i
++)
719 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CD0
+ i
, sample
);
720 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CCR_CACHEINVALIDSIZE
, 0);
721 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CCR_READADDRESS
, cra
);
722 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CCR_CACHEINVALIDSIZE
, ccis
);
724 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_IFATN
, 0xff00);
725 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_VTFT
, 0xffffffff);
726 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CVCF
, 0xffffffff);
727 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_DCYSUSV
, 0x00007f7f);
728 emu_enastop(sc
, v
->vnum
, 0);
730 pitch_target
= emu_rate_to_linearpitch(v
->speed
);
731 initial_pitch
= emu_rate_to_pitch(v
->speed
) >> 8;
732 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_PTRX_PITCHTARGET
, pitch_target
);
733 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CPF_PITCH
, pitch_target
);
734 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_IP
, initial_pitch
);
736 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_PTRX_PITCHTARGET
, 0);
737 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CPF_PITCH
, 0);
738 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_IFATN
, 0xffff);
739 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_VTFT
, 0x0000ffff);
740 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_CVCF
, 0x0000ffff);
741 emu_wrptr(sc
, v
->vnum
, EMU_CHAN_IP
, 0);
742 emu_enastop(sc
, v
->vnum
, 1);
744 if (v
->slave
!= NULL
)
745 emu_vtrigger(sc
, v
->slave
, go
);
749 emu_vpos(struct sc_info
*sc
, struct emu_voice
*v
)
753 s
= (v
->b16
? 1 : 0) + (v
->stereo
? 1 : 0);
754 ptr
= (emu_rdptr(sc
, v
->vnum
, EMU_CHAN_CCCA_CURRADDR
) - (v
->start
>> s
)) << s
;
755 return ptr
& ~0x0000001f;
760 emu_vdump(struct sc_info
*sc
, struct emu_voice
*v
)
763 "cpf", "ptrx", "cvcf", "vtft", "z2", "z1", "psst", "dsl",
764 "ccca", "ccr", "clp", "fxrt", "mapa", "mapb", NULL
, NULL
,
765 "envvol", "atkhldv", "dcysusv", "lfoval1",
766 "envval", "atkhldm", "dcysusm", "lfoval2",
767 "ip", "ifatn", "pefe", "fmmod", "tremfrq", "fmfrq2",
771 "mudata1", "mustat1", "mudata2", "mustat2",
772 "fxwc1", "fxwc2", "spdrate", NULL
, NULL
,
773 NULL
, NULL
, NULL
, "fxrt2", "sndamnt", "fxrt1",
778 printf("voice number %d\n", v
->vnum
);
779 for (i
= 0, x
= 0; i
<= 0x1e; i
++) {
780 if (regname
[i
] == NULL
)
782 printf("%s\t[%08x]", regname
[i
], emu_rdptr(sc
, v
->vnum
, i
));
783 printf("%s", (x
== 2) ? "\n" : "\t");
789 /* Print out audigy extra registers */
791 for (i
= 0; i
<= 0xe; i
++) {
792 if (regname2
[i
] == NULL
)
794 printf("%s\t[%08x]", regname2
[i
],
795 emu_rdptr(sc
, v
->vnum
, i
+ 0x70));
796 printf("%s", (x
== 2)? "\n" : "\t");
806 /* channel interface */
808 emupchan_init(kobj_t obj
, void *devinfo
, struct snd_dbuf
*b
,
809 struct pcm_channel
*c
, int dir
)
811 struct sc_info
*sc
= devinfo
;
812 struct sc_pchinfo
*ch
;
815 KASSERT(dir
== PCMDIR_PLAY
, ("emupchan_init: bad direction"));
816 ch
= &sc
->pch
[sc
->pnum
++];
820 ch
->blksz
= sc
->bufsz
/ 2;
821 ch
->fmt
= SND_FORMAT(AFMT_U8
, 1, 0);
823 snd_mtxlock(sc
->lock
);
824 ch
->master
= emu_valloc(sc
);
825 ch
->slave
= emu_valloc(sc
);
826 snd_mtxunlock(sc
->lock
);
827 r
= (emu_vinit(sc
, ch
->master
, ch
->slave
, sc
->bufsz
, ch
->buffer
))
834 emupchan_free(kobj_t obj
, void *data
)
836 struct sc_pchinfo
*ch
= data
;
837 struct sc_info
*sc
= ch
->parent
;
840 snd_mtxlock(sc
->lock
);
841 r
= emu_memfree(sc
, sndbuf_getbuf(ch
->buffer
));
842 snd_mtxunlock(sc
->lock
);
848 emupchan_setformat(kobj_t obj
, void *data
, u_int32_t format
)
850 struct sc_pchinfo
*ch
= data
;
857 emupchan_setspeed(kobj_t obj
, void *data
, u_int32_t speed
)
859 struct sc_pchinfo
*ch
= data
;
866 emupchan_setblocksize(kobj_t obj
, void *data
, u_int32_t blocksize
)
868 struct sc_pchinfo
*ch
= data
;
869 struct sc_info
*sc
= ch
->parent
;
872 ch
->blksz
= blocksize
;
873 snd_mtxlock(sc
->lock
);
875 irqrate
= 48000 / sc
->timerinterval
;
876 snd_mtxunlock(sc
->lock
);
877 blksz
= (ch
->spd
* sndbuf_getalign(ch
->buffer
)) / irqrate
;
882 emupchan_trigger(kobj_t obj
, void *data
, int go
)
884 struct sc_pchinfo
*ch
= data
;
885 struct sc_info
*sc
= ch
->parent
;
887 if (!PCMTRIG_COMMON(go
))
890 snd_mtxlock(sc
->lock
);
891 if (go
== PCMTRIG_START
) {
893 emu_vwrite(sc
, ch
->master
);
897 printf("start [%d bit, %s, %d hz]\n",
898 ch
->master
->b16
? 16 : 8,
899 ch
->master
->stereo
? "stereo" : "mono",
901 emu_vdump(sc
, ch
->master
);
902 emu_vdump(sc
, ch
->slave
);
905 ch
->run
= (go
== PCMTRIG_START
) ? 1 : 0;
906 emu_vtrigger(sc
, ch
->master
, ch
->run
);
907 snd_mtxunlock(sc
->lock
);
912 emupchan_getptr(kobj_t obj
, void *data
)
914 struct sc_pchinfo
*ch
= data
;
915 struct sc_info
*sc
= ch
->parent
;
918 snd_mtxlock(sc
->lock
);
919 r
= emu_vpos(sc
, ch
->master
);
920 snd_mtxunlock(sc
->lock
);
925 static struct pcmchan_caps
*
926 emupchan_getcaps(kobj_t obj
, void *data
)
928 return &emu_playcaps
;
931 static kobj_method_t emupchan_methods
[] = {
932 KOBJMETHOD(channel_init
, emupchan_init
),
933 KOBJMETHOD(channel_free
, emupchan_free
),
934 KOBJMETHOD(channel_setformat
, emupchan_setformat
),
935 KOBJMETHOD(channel_setspeed
, emupchan_setspeed
),
936 KOBJMETHOD(channel_setblocksize
, emupchan_setblocksize
),
937 KOBJMETHOD(channel_trigger
, emupchan_trigger
),
938 KOBJMETHOD(channel_getptr
, emupchan_getptr
),
939 KOBJMETHOD(channel_getcaps
, emupchan_getcaps
),
942 CHANNEL_DECLARE(emupchan
);
944 /* channel interface */
946 emurchan_init(kobj_t obj
, void *devinfo
, struct snd_dbuf
*b
,
947 struct pcm_channel
*c
, int dir
)
949 struct sc_info
*sc
= devinfo
;
950 struct sc_rchinfo
*ch
;
952 KASSERT(dir
== PCMDIR_REC
, ("emurchan_init: bad direction"));
953 ch
= &sc
->rch
[sc
->rnum
];
957 ch
->blksz
= sc
->bufsz
/ 2;
958 ch
->fmt
= SND_FORMAT(AFMT_U8
, 1, 0);
963 ch
->idxreg
= sc
->audigy
? EMU_A_ADCIDX
: EMU_ADCIDX
;
964 ch
->basereg
= EMU_ADCBA
;
965 ch
->sizereg
= EMU_ADCBS
;
966 ch
->setupreg
= EMU_ADCCR
;
967 ch
->irqmask
= EMU_INTE_ADCBUFENABLE
;
971 ch
->idxreg
= EMU_FXIDX
;
972 ch
->basereg
= EMU_FXBA
;
973 ch
->sizereg
= EMU_FXBS
;
974 ch
->setupreg
= EMU_FXWC
;
975 ch
->irqmask
= EMU_INTE_EFXBUFENABLE
;
979 ch
->idxreg
= EMU_MICIDX
;
980 ch
->basereg
= EMU_MICBA
;
981 ch
->sizereg
= EMU_MICBS
;
983 ch
->irqmask
= EMU_INTE_MICBUFENABLE
;
987 if (sndbuf_alloc(ch
->buffer
, sc
->parent_dmat
, 0, sc
->bufsz
) != 0)
990 snd_mtxlock(sc
->lock
);
991 emu_wrptr(sc
, 0, ch
->basereg
, sndbuf_getbufaddr(ch
->buffer
));
992 emu_wrptr(sc
, 0, ch
->sizereg
, 0); /* off */
993 snd_mtxunlock(sc
->lock
);
999 emurchan_setformat(kobj_t obj
, void *data
, u_int32_t format
)
1001 struct sc_rchinfo
*ch
= data
;
1008 emurchan_setspeed(kobj_t obj
, void *data
, u_int32_t speed
)
1010 struct sc_rchinfo
*ch
= data
;
1013 if (ch
->parent
->audigy
)
1014 speed
= audigy_adcspeed
[audigy_recval(speed
)];
1016 speed
= adcspeed
[emu_recval(speed
)];
1027 emurchan_setblocksize(kobj_t obj
, void *data
, u_int32_t blocksize
)
1029 struct sc_rchinfo
*ch
= data
;
1030 struct sc_info
*sc
= ch
->parent
;
1033 ch
->blksz
= blocksize
;
1034 snd_mtxlock(sc
->lock
);
1036 irqrate
= 48000 / sc
->timerinterval
;
1037 snd_mtxunlock(sc
->lock
);
1038 blksz
= (ch
->spd
* sndbuf_getalign(ch
->buffer
)) / irqrate
;
1042 /* semantic note: must start at beginning of buffer */
1044 emurchan_trigger(kobj_t obj
, void *data
, int go
)
1046 struct sc_rchinfo
*ch
= data
;
1047 struct sc_info
*sc
= ch
->parent
;
1050 if (!PCMTRIG_COMMON(go
))
1055 sz
= EMU_RECBS_BUFSIZE_4096
;
1059 sz
= EMU_RECBS_BUFSIZE_8192
;
1063 sz
= EMU_RECBS_BUFSIZE_16384
;
1067 sz
= EMU_RECBS_BUFSIZE_32768
;
1071 sz
= EMU_RECBS_BUFSIZE_65536
;
1075 sz
= EMU_RECBS_BUFSIZE_4096
;
1078 snd_mtxlock(sc
->lock
);
1082 emu_wrptr(sc
, 0, ch
->sizereg
, sz
);
1085 val
= EMU_A_ADCCR_LCHANENABLE
;
1086 if (AFMT_CHANNEL(ch
->fmt
) > 1)
1087 val
|= EMU_A_ADCCR_RCHANENABLE
;
1088 val
|= audigy_recval(ch
->spd
);
1090 val
= EMU_ADCCR_LCHANENABLE
;
1091 if (AFMT_CHANNEL(ch
->fmt
) > 1)
1092 val
|= EMU_ADCCR_RCHANENABLE
;
1093 val
|= emu_recval(ch
->spd
);
1096 emu_wrptr(sc
, 0, ch
->setupreg
, 0);
1097 emu_wrptr(sc
, 0, ch
->setupreg
, val
);
1099 val
= emu_rd(sc
, EMU_INTE
, 4);
1101 emu_wr(sc
, EMU_INTE
, val
, 4);
1107 emu_wrptr(sc
, 0, ch
->sizereg
, 0);
1109 emu_wrptr(sc
, 0, ch
->setupreg
, 0);
1110 val
= emu_rd(sc
, EMU_INTE
, 4);
1111 val
&= ~ch
->irqmask
;
1112 emu_wr(sc
, EMU_INTE
, val
, 4);
1115 case PCMTRIG_EMLDMAWR
:
1116 case PCMTRIG_EMLDMARD
:
1120 snd_mtxunlock(sc
->lock
);
1126 emurchan_getptr(kobj_t obj
, void *data
)
1128 struct sc_rchinfo
*ch
= data
;
1129 struct sc_info
*sc
= ch
->parent
;
1132 snd_mtxlock(sc
->lock
);
1133 r
= emu_rdptr(sc
, 0, ch
->idxreg
) & 0x0000ffff;
1134 snd_mtxunlock(sc
->lock
);
1139 static struct pcmchan_caps
*
1140 emurchan_getcaps(kobj_t obj
, void *data
)
1142 struct sc_rchinfo
*ch
= data
;
1144 return &emu_reccaps
[ch
->num
];
1147 static kobj_method_t emurchan_methods
[] = {
1148 KOBJMETHOD(channel_init
, emurchan_init
),
1149 KOBJMETHOD(channel_setformat
, emurchan_setformat
),
1150 KOBJMETHOD(channel_setspeed
, emurchan_setspeed
),
1151 KOBJMETHOD(channel_setblocksize
, emurchan_setblocksize
),
1152 KOBJMETHOD(channel_trigger
, emurchan_trigger
),
1153 KOBJMETHOD(channel_getptr
, emurchan_getptr
),
1154 KOBJMETHOD(channel_getcaps
, emurchan_getcaps
),
1157 CHANNEL_DECLARE(emurchan
);
1159 static unsigned char
1160 emu_mread(struct mpu401
*arg
, void *sc
, int reg
)
1164 d
= emu_rd((struct sc_info
*)sc
, 0x18 + reg
, 1);
1169 emu_mwrite(struct mpu401
*arg
, void *sc
, int reg
, unsigned char b
)
1172 emu_wr((struct sc_info
*)sc
, 0x18 + reg
, b
, 1);
1176 emu_muninit(struct mpu401
*arg
, void *cookie
)
1178 struct sc_info
*sc
= cookie
;
1180 snd_mtxlock(sc
->lock
);
1182 snd_mtxunlock(sc
->lock
);
1187 static kobj_method_t emu_mpu_methods
[] = {
1188 KOBJMETHOD(mpufoi_read
, emu_mread
),
1189 KOBJMETHOD(mpufoi_write
, emu_mwrite
),
1190 KOBJMETHOD(mpufoi_uninit
, emu_muninit
),
1194 static DEFINE_CLASS(emu_mpu
, emu_mpu_methods
, 0);
1199 struct sc_info
*sc
= (struct sc_info
*)p
;
1202 (sc
->mpu_intr
)(sc
->mpu
);
1206 emu_midiattach(struct sc_info
*sc
)
1210 i
= emu_rd(sc
, EMU_INTE
, 4);
1211 i
|= EMU_INTE_MIDIRXENABLE
;
1212 emu_wr(sc
, EMU_INTE
, i
, 4);
1214 sc
->mpu
= mpu401_init(&emu_mpu_class
, sc
, emu_intr2
, &sc
->mpu_intr
);
1216 /* -------------------------------------------------------------------- */
1217 /* The interrupt handler */
1220 emu_intr(void *data
)
1222 struct sc_info
*sc
= data
;
1223 u_int32_t stat
, ack
, i
, x
;
1225 snd_mtxlock(sc
->lock
);
1227 stat
= emu_rd(sc
, EMU_IPR
, 4);
1233 if (stat
& EMU_IPR_INTERVALTIMER
)
1234 ack
|= EMU_IPR_INTERVALTIMER
;
1236 if (stat
& (EMU_IPR_ADCBUFFULL
| EMU_IPR_ADCBUFHALFFULL
))
1237 ack
|= stat
& (EMU_IPR_ADCBUFFULL
| EMU_IPR_ADCBUFHALFFULL
);
1239 if (stat
& (EMU_IPR_EFXBUFFULL
| EMU_IPR_EFXBUFHALFFULL
))
1240 ack
|= stat
& (EMU_IPR_EFXBUFFULL
| EMU_IPR_EFXBUFHALFFULL
);
1242 if (stat
& (EMU_IPR_MICBUFFULL
| EMU_IPR_MICBUFHALFFULL
))
1243 ack
|= stat
& (EMU_IPR_MICBUFFULL
| EMU_IPR_MICBUFHALFFULL
);
1245 if (stat
& EMU_PCIERROR
) {
1246 ack
|= EMU_PCIERROR
;
1247 device_printf(sc
->dev
, "pci error\n");
1248 /* we still get an nmi with ecc ram even if we ack this */
1250 if (stat
& EMU_IPR_RATETRCHANGE
) {
1251 ack
|= EMU_IPR_RATETRCHANGE
;
1253 device_printf(sc
->dev
,
1254 "sample rate tracker lock status change\n");
1258 if (stat
& EMU_IPR_MIDIRECVBUFE
) {
1260 (sc
->mpu_intr
)(sc
->mpu
);
1261 ack
|= EMU_IPR_MIDIRECVBUFE
| EMU_IPR_MIDITRANSBUFE
;
1265 device_printf(sc
->dev
, "dodgy irq: %x (harmless)\n",
1268 emu_wr(sc
, EMU_IPR
, stat
, 4);
1271 snd_mtxunlock(sc
->lock
);
1273 if (ack
& EMU_IPR_INTERVALTIMER
) {
1275 for (i
= 0; i
< sc
->nchans
; i
++) {
1276 if (sc
->pch
[i
].run
) {
1278 chn_intr(sc
->pch
[i
].channel
);
1282 emu_enatimer(sc
, 0);
1286 if (ack
& (EMU_IPR_ADCBUFFULL
| EMU_IPR_ADCBUFHALFFULL
)) {
1287 if (sc
->rch
[0].channel
)
1288 chn_intr(sc
->rch
[0].channel
);
1290 if (ack
& (EMU_IPR_EFXBUFFULL
| EMU_IPR_EFXBUFHALFFULL
)) {
1291 if (sc
->rch
[1].channel
)
1292 chn_intr(sc
->rch
[1].channel
);
1294 if (ack
& (EMU_IPR_MICBUFFULL
| EMU_IPR_MICBUFHALFFULL
)) {
1295 if (sc
->rch
[2].channel
)
1296 chn_intr(sc
->rch
[2].channel
);
1299 snd_mtxlock(sc
->lock
);
1302 snd_mtxunlock(sc
->lock
);
1305 /* -------------------------------------------------------------------- */
1308 emu_setmap(void *arg
, bus_dma_segment_t
*segs
, int nseg
, int error
)
1310 bus_addr_t
*phys
= arg
;
1312 *phys
= error
? 0 : (bus_addr_t
)segs
->ds_addr
;
1315 kprintf("emu: setmap (%lx, %lx), nseg=%d, error=%d\n",
1316 (unsigned long)segs
->ds_addr
, (unsigned long)segs
->ds_len
,
1322 emu_malloc(struct sc_info
*sc
, u_int32_t sz
, bus_addr_t
*addr
,
1328 if (bus_dmamem_alloc(sc
->parent_dmat
, &buf
, BUS_DMA_NOWAIT
, map
))
1330 if (bus_dmamap_load(sc
->parent_dmat
, *map
, buf
, sz
, emu_setmap
, addr
, 0)
1332 bus_dmamem_free(sc
->parent_dmat
, buf
, *map
);
1339 emu_free(struct sc_info
*sc
, void *buf
, bus_dmamap_t map
)
1341 bus_dmamap_unload(sc
->parent_dmat
, map
);
1342 bus_dmamem_free(sc
->parent_dmat
, buf
, map
);
1346 emu_memalloc(struct sc_info
*sc
, u_int32_t sz
, bus_addr_t
*addr
)
1348 u_int32_t blksz
, start
, idx
, ofs
, tmp
, found
;
1349 struct emu_mem
*mem
= &sc
->mem
;
1350 struct emu_memblk
*blk
;
1353 blksz
= sz
/ EMUPAGESIZE
;
1354 if (sz
> (blksz
* EMUPAGESIZE
))
1356 /* find a free block in the bitmap */
1359 while (!found
&& start
+ blksz
< EMUMAXPAGES
) {
1361 for (idx
= start
; idx
< start
+ blksz
; idx
++)
1362 if (mem
->bmap
[idx
>> 3] & (1 << (idx
& 7)))
1369 blk
= kmalloc(sizeof(*blk
), M_DEVBUF
, M_WAITOK
| M_ZERO
);
1372 buf
= emu_malloc(sc
, sz
, &blk
->buf_addr
, &blk
->buf_map
);
1373 *addr
= blk
->buf_addr
;
1375 kfree(blk
, M_DEVBUF
);
1379 blk
->pte_start
= start
;
1380 blk
->pte_size
= blksz
;
1382 printf("buf %p, pte_start %d, pte_size %d\n", blk
->buf
,
1383 blk
->pte_start
, blk
->pte_size
);
1386 for (idx
= start
; idx
< start
+ blksz
; idx
++) {
1387 mem
->bmap
[idx
>> 3] |= 1 << (idx
& 7);
1388 tmp
= (uint32_t)(blk
->buf_addr
+ ofs
);
1390 printf("pte[%d] -> %x phys, %x virt\n", idx
, tmp
,
1391 ((u_int32_t
)buf
) + ofs
);
1393 mem
->ptb_pages
[idx
] = (tmp
<< 1) | idx
;
1396 SLIST_INSERT_HEAD(&mem
->blocks
, blk
, link
);
1401 emu_memfree(struct sc_info
*sc
, void *buf
)
1404 struct emu_mem
*mem
= &sc
->mem
;
1405 struct emu_memblk
*blk
, *i
;
1408 SLIST_FOREACH(i
, &mem
->blocks
, link
) {
1414 SLIST_REMOVE(&mem
->blocks
, blk
, emu_memblk
, link
);
1415 emu_free(sc
, buf
, blk
->buf_map
);
1416 tmp
= (u_int32_t
)(sc
->mem
.silent_page_addr
) << 1;
1417 for (idx
= blk
->pte_start
; idx
< blk
->pte_start
+ blk
->pte_size
; idx
++) {
1418 mem
->bmap
[idx
>> 3] &= ~(1 << (idx
& 7));
1419 mem
->ptb_pages
[idx
] = tmp
| idx
;
1421 kfree(blk
, M_DEVBUF
);
1426 emu_memstart(struct sc_info
*sc
, void *buf
)
1428 struct emu_mem
*mem
= &sc
->mem
;
1429 struct emu_memblk
*blk
, *i
;
1432 SLIST_FOREACH(i
, &mem
->blocks
, link
) {
1438 return blk
->pte_start
;
1442 emu_addefxop(struct sc_info
*sc
, int op
, int z
, int w
, int x
, int y
,
1445 emu_wrefx(sc
, (*pc
) * 2, (x
<< 10) | y
);
1446 emu_wrefx(sc
, (*pc
) * 2 + 1, (op
<< 20) | (z
<< 10) | w
);
1451 audigy_addefxop(struct sc_info
*sc
, int op
, int z
, int w
, int x
, int y
,
1454 emu_wrefx(sc
, (*pc
) * 2, (x
<< 12) | y
);
1455 emu_wrefx(sc
, (*pc
) * 2 + 1, (op
<< 24) | (z
<< 12) | w
);
1460 audigy_initefx(struct sc_info
*sc
)
1465 /* skip 0, 0, -1, 0 - NOPs */
1466 for (i
= 0; i
< 512; i
++)
1467 audigy_addefxop(sc
, 0x0f, 0x0c0, 0x0c0, 0x0cf, 0x0c0, &pc
);
1469 for (i
= 0; i
< 512; i
++)
1470 emu_wrptr(sc
, 0, EMU_A_FXGPREGBASE
+ i
, 0x0);
1474 /* stop fx processor */
1475 emu_wrptr(sc
, 0, EMU_A_DBG
, EMU_A_DBG_SINGLE_STEP
);
1477 /* Audigy 2 (EMU10K2) DSP Registers:
1479 0x000-0x00f : 16 registers (?)
1481 0x040/0x041 : AC97 Codec (l/r)
1482 0x042/0x043 : ADC, S/PDIF (l/r)
1483 0x044/0x045 : Optical S/PDIF in (l/r)
1485 0x048/0x049 : Line/Mic 2 (l/r)
1486 0x04a/0x04b : RCA S/PDIF (l/r)
1487 0x04c/0x04d : Aux 2 (l/r)
1489 0x060/0x061 : Digital Front (l/r)
1490 0x062/0x063 : Digital Center/LFE
1491 0x064/0x065 : AudigyDrive Heaphone (l/r)
1492 0x066/0x067 : Digital Rear (l/r)
1493 0x068/0x069 : Analog Front (l/r)
1494 0x06a/0x06b : Analog Center/LFE
1496 0x06e/0x06f : Analog Rear (l/r)
1497 0x070/0x071 : AC97 Output (l/r)
1500 0x076/0x077 : ADC Recording Buffer (l/r)
1502 0x0c0 - 0x0c4 = 0 - 4
1503 0x0c5 = 0x8, 0x0c6 = 0x10, 0x0c7 = 0x20
1504 0x0c8 = 0x100, 0x0c9 = 0x10000, 0x0ca = 0x80000
1505 0x0cb = 0x10000000, 0x0cc = 0x20000000, 0x0cd = 0x40000000
1506 0x0ce = 0x80000000, 0x0cf = 0x7fffffff, 0x0d0 = 0xffffffff
1507 0x0d1 = 0xfffffffe, 0x0d2 = 0xc0000000, 0x0d3 = 0x41fbbcdc
1508 0x0d4 = 0x5a7ef9db, 0x0d5 = 0x00100000, 0x0dc = 0x00000001 (?)
1510 0x0d6 : Accumulator (?)
1511 0x0d7 : Condition Register
1512 0x0d8 : Noise source
1513 0x0d9 : Noise source
1514 Tank Memory Data Registers
1516 Tank Memory Address Registers
1518 General Purpose Registers
1522 /* AC97Output[l/r] = FXBus PCM[l/r] */
1523 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_AC97_L
), A_C_00000000
,
1524 A_C_00000000
, A_FXBUS(FXBUS_PCM_LEFT
), &pc
);
1525 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_AC97_R
), A_C_00000000
,
1526 A_C_00000000
, A_FXBUS(FXBUS_PCM_RIGHT
), &pc
);
1528 /* GPR[0/1] = RCA S/PDIF[l/r] -- Master volume */
1529 audigy_addefxop(sc
, iACC3
, A_GPR(0), A_C_00000000
,
1530 A_C_00000000
, A_EXTIN(EXTIN_COAX_SPDIF_L
), &pc
);
1531 audigy_addefxop(sc
, iACC3
, A_GPR(1), A_C_00000000
,
1532 A_C_00000000
, A_EXTIN(EXTIN_COAX_SPDIF_R
), &pc
);
1534 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1535 audigy_addefxop(sc
, iINTERP
, A_GPR(2), A_GPR(1),
1536 A_C_40000000
, A_GPR(0), &pc
);
1538 /* Headphones[l/r] = GPR[0/1] */
1539 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_HEADPHONE_L
),
1540 A_C_00000000
, A_C_00000000
, A_GPR(0), &pc
);
1541 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_HEADPHONE_R
),
1542 A_C_00000000
, A_C_00000000
, A_GPR(1), &pc
);
1544 /* Analog Front[l/r] = GPR[0/1] */
1545 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_AFRONT_L
), A_C_00000000
,
1546 A_C_00000000
, A_GPR(0), &pc
);
1547 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_AFRONT_R
), A_C_00000000
,
1548 A_C_00000000
, A_GPR(1), &pc
);
1550 /* Digital Front[l/r] = GPR[0/1] */
1551 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_FRONT_L
), A_C_00000000
,
1552 A_C_00000000
, A_GPR(0), &pc
);
1553 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_FRONT_R
), A_C_00000000
,
1554 A_C_00000000
, A_GPR(1), &pc
);
1556 /* Center and Subwoofer configuration */
1557 /* Analog Center = GPR[0] + GPR[2] */
1558 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_ACENTER
), A_C_00000000
,
1559 A_GPR(0), A_GPR(2), &pc
);
1560 /* Analog Sub = GPR[1] + GPR[2] */
1561 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_ALFE
), A_C_00000000
,
1562 A_GPR(1), A_GPR(2), &pc
);
1564 /* Digital Center = GPR[0] + GPR[2] */
1565 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_CENTER
), A_C_00000000
,
1566 A_GPR(0), A_GPR(2), &pc
);
1567 /* Digital Sub = GPR[1] + GPR[2] */
1568 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_LFE
), A_C_00000000
,
1569 A_GPR(1), A_GPR(2), &pc
);
1572 /* Analog Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1573 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1574 audigy_addefxop(sc
, iMAC0
, A_EXTOUT(A_EXTOUT_AREAR_L
), A_C_00000000
,
1575 A_GPR(16), A_GPR(0), &pc
);
1576 audigy_addefxop(sc
, iMAC0
, A_EXTOUT(A_EXTOUT_AREAR_R
), A_C_00000000
,
1577 A_GPR(17), A_GPR(1), &pc
);
1579 /* Digital Rear[l/r] = (GPR[0/1] * RearVolume[l/r]) >> 31 */
1580 /* RearVolume = GPR[0x10/0x11] (Will this ever be implemented?) */
1581 audigy_addefxop(sc
, iMAC0
, A_EXTOUT(A_EXTOUT_REAR_L
), A_C_00000000
,
1582 A_GPR(16), A_GPR(0), &pc
);
1583 audigy_addefxop(sc
, iMAC0
, A_EXTOUT(A_EXTOUT_REAR_R
), A_C_00000000
,
1584 A_GPR(17), A_GPR(1), &pc
);
1586 /* XXX This is just a copy to the channel, since we do not have
1587 * a patch manager, it is useful for have another output enabled.
1590 /* Analog Rear[l/r] = GPR[0/1] */
1591 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_AREAR_L
), A_C_00000000
,
1592 A_C_00000000
, A_GPR(0), &pc
);
1593 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_AREAR_R
), A_C_00000000
,
1594 A_C_00000000
, A_GPR(1), &pc
);
1596 /* Digital Rear[l/r] = GPR[0/1] */
1597 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_REAR_L
), A_C_00000000
,
1598 A_C_00000000
, A_GPR(0), &pc
);
1599 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_REAR_R
), A_C_00000000
,
1600 A_C_00000000
, A_GPR(1), &pc
);
1603 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1604 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_ADC_CAP_L
), A_C_00000000
,
1605 A_C_00000000
, A_EXTIN(A_EXTIN_AC97_L
), &pc
);
1606 audigy_addefxop(sc
, iACC3
, A_EXTOUT(A_EXTOUT_ADC_CAP_R
), A_C_00000000
,
1607 A_C_00000000
, A_EXTIN(A_EXTIN_AC97_R
), &pc
);
1609 /* resume normal operations */
1610 emu_wrptr(sc
, 0, EMU_A_DBG
, 0);
1614 emu_initefx(struct sc_info
*sc
)
1619 /* acc3 0,0,0,0 - NOPs */
1620 for (i
= 0; i
< 512; i
++) {
1621 emu_wrefx(sc
, i
* 2, 0x10040);
1622 emu_wrefx(sc
, i
* 2 + 1, 0x610040);
1625 for (i
= 0; i
< 256; i
++)
1626 emu_wrptr(sc
, 0, EMU_FXGPREGBASE
+ i
, 0);
1628 /* FX-8010 DSP Registers:
1630 0x000-0x00f : 16 registers
1632 0x010/0x011 : AC97 Codec (l/r)
1633 0x012/0x013 : ADC, S/PDIF (l/r)
1634 0x014/0x015 : Mic(left), Zoom (l/r)
1635 0x016/0x017 : TOS link in (l/r)
1636 0x018/0x019 : Line/Mic 1 (l/r)
1637 0x01a/0x01b : COAX S/PDIF (l/r)
1638 0x01c/0x01d : Line/Mic 2 (l/r)
1640 0x020/0x021 : AC97 Output (l/r)
1641 0x022/0x023 : TOS link out (l/r)
1642 0x024/0x025 : Center/LFE
1643 0x026/0x027 : LiveDrive Headphone (l/r)
1644 0x028/0x029 : Rear Channel (l/r)
1645 0x02a/0x02b : ADC Recording Buffer (l/r)
1646 0x02c : Mic Recording Buffer
1647 0x031/0x032 : Analog Center/LFE
1649 0x040 - 0x044 = 0 - 4
1650 0x045 = 0x8, 0x046 = 0x10, 0x047 = 0x20
1651 0x048 = 0x100, 0x049 = 0x10000, 0x04a = 0x80000
1652 0x04b = 0x10000000, 0x04c = 0x20000000, 0x04d = 0x40000000
1653 0x04e = 0x80000000, 0x04f = 0x7fffffff, 0x050 = 0xffffffff
1654 0x051 = 0xfffffffe, 0x052 = 0xc0000000, 0x053 = 0x41fbbcdc
1655 0x054 = 0x5a7ef9db, 0x055 = 0x00100000
1658 0x057 : Condition Register
1659 0x058 : Noise source
1660 0x059 : Noise source
1661 0x05a : IRQ Register
1662 0x05b : TRAM Delay Base Address Count
1663 General Purpose Registers
1665 Tank Memory Data Registers
1667 Tank Memory Address Registers
1671 /* Routing - this will be configurable in later version */
1673 /* GPR[0/1] = FX * 4 + SPDIF-in */
1674 emu_addefxop(sc
, iMACINT0
, GPR(0), EXTIN(EXTIN_SPDIF_CD_L
),
1675 FXBUS(FXBUS_PCM_LEFT
), C_00000004
, &pc
);
1676 emu_addefxop(sc
, iMACINT0
, GPR(1), EXTIN(EXTIN_SPDIF_CD_R
),
1677 FXBUS(FXBUS_PCM_RIGHT
), C_00000004
, &pc
);
1679 /* GPR[0/1] += APS-input */
1680 emu_addefxop(sc
, iACC3
, GPR(0), GPR(0), C_00000000
,
1681 sc
->APS
? EXTIN(EXTIN_TOSLINK_L
) : C_00000000
, &pc
);
1682 emu_addefxop(sc
, iACC3
, GPR(1), GPR(1), C_00000000
,
1683 sc
->APS
? EXTIN(EXTIN_TOSLINK_R
) : C_00000000
, &pc
);
1685 /* FrontOut (AC97) = GPR[0/1] */
1686 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_AC97_L
), C_00000000
,
1687 C_00000000
, GPR(0), &pc
);
1688 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_AC97_R
), C_00000000
,
1689 C_00000001
, GPR(1), &pc
);
1691 /* GPR[2] = GPR[0] (Left) / 2 + GPR[1] (Right) / 2 -- Central volume */
1692 emu_addefxop(sc
, iINTERP
, GPR(2), GPR(1), C_40000000
, GPR(0), &pc
);
1695 /* RearOut = (GPR[0/1] * RearVolume) >> 31 */
1696 /* RearVolume = GPR[0x10/0x11] */
1697 emu_addefxop(sc
, iMAC0
, EXTOUT(EXTOUT_REAR_L
), C_00000000
,
1698 GPR(16), GPR(0), &pc
);
1699 emu_addefxop(sc
, iMAC0
, EXTOUT(EXTOUT_REAR_R
), C_00000000
,
1700 GPR(17), GPR(1), &pc
);
1702 /* XXX This is just a copy to the channel, since we do not have
1703 * a patch manager, it is useful for have another output enabled.
1706 /* Rear[l/r] = GPR[0/1] */
1707 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_REAR_L
), C_00000000
,
1708 C_00000000
, GPR(0), &pc
);
1709 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_REAR_R
), C_00000000
,
1710 C_00000000
, GPR(1), &pc
);
1713 /* TOS out[l/r] = GPR[0/1] */
1714 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_TOSLINK_L
), C_00000000
,
1715 C_00000000
, GPR(0), &pc
);
1716 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_TOSLINK_R
), C_00000000
,
1717 C_00000000
, GPR(1), &pc
);
1719 /* Center and Subwoofer configuration */
1720 /* Analog Center = GPR[0] + GPR[2] */
1721 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_ACENTER
), C_00000000
,
1722 GPR(0), GPR(2), &pc
);
1723 /* Analog Sub = GPR[1] + GPR[2] */
1724 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_ALFE
), C_00000000
,
1725 GPR(1), GPR(2), &pc
);
1726 /* Digital Center = GPR[0] + GPR[2] */
1727 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_AC97_CENTER
), C_00000000
,
1728 GPR(0), GPR(2), &pc
);
1729 /* Digital Sub = GPR[1] + GPR[2] */
1730 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_AC97_LFE
), C_00000000
,
1731 GPR(1), GPR(2), &pc
);
1733 /* Headphones[l/r] = GPR[0/1] */
1734 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_HEADPHONE_L
), C_00000000
,
1735 C_00000000
, GPR(0), &pc
);
1736 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_HEADPHONE_R
), C_00000000
,
1737 C_00000000
, GPR(1), &pc
);
1739 /* ADC Recording buffer[l/r] = AC97Input[l/r] */
1740 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_ADC_CAP_L
), C_00000000
,
1741 C_00000000
, EXTIN(EXTIN_AC97_L
), &pc
);
1742 emu_addefxop(sc
, iACC3
, EXTOUT(EXTOUT_ADC_CAP_R
), C_00000000
,
1743 C_00000000
, EXTIN(EXTIN_AC97_R
), &pc
);
1745 /* resume normal operations */
1746 emu_wrptr(sc
, 0, EMU_DBG
, 0);
1749 /* Probe and attach the card */
1751 emu_init(struct sc_info
*sc
)
1753 u_int32_t spcs
, ch
, tmp
, i
;
1756 /* enable additional AC97 slots */
1757 emu_wrptr(sc
, 0, EMU_AC97SLOT
, EMU_AC97SLOT_CENTER
| EMU_AC97SLOT_LFE
);
1760 /* disable audio and lock cache */
1761 emu_wr(sc
, EMU_HCFG
,
1762 EMU_HCFG_LOCKSOUNDCACHE
| EMU_HCFG_LOCKTANKCACHE_MASK
| EMU_HCFG_MUTEBUTTONENABLE
,
1765 /* reset recording buffers */
1766 emu_wrptr(sc
, 0, EMU_MICBS
, EMU_RECBS_BUFSIZE_NONE
);
1767 emu_wrptr(sc
, 0, EMU_MICBA
, 0);
1768 emu_wrptr(sc
, 0, EMU_FXBS
, EMU_RECBS_BUFSIZE_NONE
);
1769 emu_wrptr(sc
, 0, EMU_FXBA
, 0);
1770 emu_wrptr(sc
, 0, EMU_ADCBS
, EMU_RECBS_BUFSIZE_NONE
);
1771 emu_wrptr(sc
, 0, EMU_ADCBA
, 0);
1773 /* disable channel interrupt */
1774 emu_wr(sc
, EMU_INTE
,
1775 EMU_INTE_INTERTIMERENB
| EMU_INTE_SAMPLERATER
| EMU_INTE_PCIERRENABLE
,
1777 emu_wrptr(sc
, 0, EMU_CLIEL
, 0);
1778 emu_wrptr(sc
, 0, EMU_CLIEH
, 0);
1779 emu_wrptr(sc
, 0, EMU_SOLEL
, 0);
1780 emu_wrptr(sc
, 0, EMU_SOLEH
, 0);
1782 /* wonder what these do... */
1784 emu_wrptr(sc
, 0, EMU_SPBYPASS
, 0xf00);
1785 emu_wrptr(sc
, 0, EMU_AC97SLOT
, 0x3);
1788 /* init envelope engine */
1789 for (ch
= 0; ch
< NUM_G
; ch
++) {
1790 emu_wrptr(sc
, ch
, EMU_CHAN_DCYSUSV
, ENV_OFF
);
1791 emu_wrptr(sc
, ch
, EMU_CHAN_IP
, 0);
1792 emu_wrptr(sc
, ch
, EMU_CHAN_VTFT
, 0xffff);
1793 emu_wrptr(sc
, ch
, EMU_CHAN_CVCF
, 0xffff);
1794 emu_wrptr(sc
, ch
, EMU_CHAN_PTRX
, 0);
1795 emu_wrptr(sc
, ch
, EMU_CHAN_CPF
, 0);
1796 emu_wrptr(sc
, ch
, EMU_CHAN_CCR
, 0);
1798 emu_wrptr(sc
, ch
, EMU_CHAN_PSST
, 0);
1799 emu_wrptr(sc
, ch
, EMU_CHAN_DSL
, 0x10);
1800 emu_wrptr(sc
, ch
, EMU_CHAN_CCCA
, 0);
1801 emu_wrptr(sc
, ch
, EMU_CHAN_Z1
, 0);
1802 emu_wrptr(sc
, ch
, EMU_CHAN_Z2
, 0);
1803 emu_wrptr(sc
, ch
, EMU_CHAN_FXRT
, 0xd01c0000);
1805 emu_wrptr(sc
, ch
, EMU_CHAN_ATKHLDM
, 0);
1806 emu_wrptr(sc
, ch
, EMU_CHAN_DCYSUSM
, 0);
1807 emu_wrptr(sc
, ch
, EMU_CHAN_IFATN
, 0xffff);
1808 emu_wrptr(sc
, ch
, EMU_CHAN_PEFE
, 0);
1809 emu_wrptr(sc
, ch
, EMU_CHAN_FMMOD
, 0);
1810 emu_wrptr(sc
, ch
, EMU_CHAN_TREMFRQ
, 24); /* 1 Hz */
1811 emu_wrptr(sc
, ch
, EMU_CHAN_FM2FRQ2
, 24); /* 1 Hz */
1812 emu_wrptr(sc
, ch
, EMU_CHAN_TEMPENV
, 0);
1814 /*** these are last so OFF prevents writing ***/
1815 emu_wrptr(sc
, ch
, EMU_CHAN_LFOVAL2
, 0);
1816 emu_wrptr(sc
, ch
, EMU_CHAN_LFOVAL1
, 0);
1817 emu_wrptr(sc
, ch
, EMU_CHAN_ATKHLDV
, 0);
1818 emu_wrptr(sc
, ch
, EMU_CHAN_ENVVOL
, 0);
1819 emu_wrptr(sc
, ch
, EMU_CHAN_ENVVAL
, 0);
1822 /* audigy cards need this to initialize correctly */
1823 emu_wrptr(sc
, ch
, 0x4c, 0);
1824 emu_wrptr(sc
, ch
, 0x4d, 0);
1825 emu_wrptr(sc
, ch
, 0x4e, 0);
1826 emu_wrptr(sc
, ch
, 0x4f, 0);
1827 /* set default routing */
1828 emu_wrptr(sc
, ch
, EMU_A_CHAN_FXRT1
, 0x03020100);
1829 emu_wrptr(sc
, ch
, EMU_A_CHAN_FXRT2
, 0x3f3f3f3f);
1830 emu_wrptr(sc
, ch
, EMU_A_CHAN_SENDAMOUNTS
, 0);
1833 sc
->voice
[ch
].vnum
= ch
;
1834 sc
->voice
[ch
].slave
= NULL
;
1835 sc
->voice
[ch
].busy
= 0;
1836 sc
->voice
[ch
].ismaster
= 0;
1837 sc
->voice
[ch
].running
= 0;
1838 sc
->voice
[ch
].b16
= 0;
1839 sc
->voice
[ch
].stereo
= 0;
1840 sc
->voice
[ch
].speed
= 0;
1841 sc
->voice
[ch
].start
= 0;
1842 sc
->voice
[ch
].end
= 0;
1843 sc
->voice
[ch
].channel
= NULL
;
1845 sc
->pnum
= sc
->rnum
= 0;
1848 * Init to 0x02109204 :
1849 * Clock accuracy = 0 (1000ppm)
1850 * Sample Rate = 2 (48kHz)
1851 * Audio Channel = 1 (Left of 2)
1852 * Source Number = 0 (Unspecified)
1853 * Generation Status = 1 (Original for Cat Code 12)
1854 * Cat Code = 12 (Digital Signal Mixer)
1856 * Emphasis = 0 (None)
1857 * CP = 1 (Copyright unasserted)
1858 * AN = 0 (Audio data)
1861 spcs
= EMU_SPCS_CLKACCY_1000PPM
| EMU_SPCS_SAMPLERATE_48
|
1862 EMU_SPCS_CHANNELNUM_LEFT
| EMU_SPCS_SOURCENUM_UNSPEC
|
1863 EMU_SPCS_GENERATIONSTATUS
| 0x00001200 | 0x00000000 |
1864 EMU_SPCS_EMPHASIS_NONE
| EMU_SPCS_COPYRIGHT
;
1865 emu_wrptr(sc
, 0, EMU_SPCS0
, spcs
);
1866 emu_wrptr(sc
, 0, EMU_SPCS1
, spcs
);
1867 emu_wrptr(sc
, 0, EMU_SPCS2
, spcs
);
1871 else if (sc
->audigy2
) { /* Audigy 2 */
1872 /* from ALSA initialization code: */
1874 /* Hack for Alice3 to work independent of haP16V driver */
1877 /* Setup SRCMulti_I2S SamplingRate */
1878 tmp
= emu_rdptr(sc
, 0, EMU_A_SPDIF_SAMPLERATE
) & 0xfffff1ff;
1879 emu_wrptr(sc
, 0, EMU_A_SPDIF_SAMPLERATE
, tmp
| 0x400);
1881 /* Setup SRCSel (Enable SPDIF, I2S SRCMulti) */
1882 emu_wr(sc
, 0x20, 0x00600000, 4);
1883 emu_wr(sc
, 0x24, 0x00000014, 4);
1885 /* Setup SRCMulti Input Audio Enable */
1886 emu_wr(sc
, 0x20, 0x006e0000, 4);
1887 emu_wr(sc
, 0x24, 0xff00ff00, 4);
1890 SLIST_INIT(&sc
->mem
.blocks
);
1891 sc
->mem
.ptb_pages
= emu_malloc(sc
, EMUMAXPAGES
* sizeof(u_int32_t
),
1892 &sc
->mem
.ptb_pages_addr
, &sc
->mem
.ptb_map
);
1893 if (sc
->mem
.ptb_pages
== NULL
)
1896 sc
->mem
.silent_page
= emu_malloc(sc
, EMUPAGESIZE
,
1897 &sc
->mem
.silent_page_addr
, &sc
->mem
.silent_map
);
1898 if (sc
->mem
.silent_page
== NULL
) {
1899 emu_free(sc
, sc
->mem
.ptb_pages
, sc
->mem
.ptb_map
);
1902 /* Clear page with silence & setup all pointers to this page */
1903 bzero(sc
->mem
.silent_page
, EMUPAGESIZE
);
1904 tmp
= (u_int32_t
)(sc
->mem
.silent_page_addr
) << 1;
1905 for (i
= 0; i
< EMUMAXPAGES
; i
++)
1906 sc
->mem
.ptb_pages
[i
] = tmp
| i
;
1908 emu_wrptr(sc
, 0, EMU_PTB
, (sc
->mem
.ptb_pages_addr
));
1909 emu_wrptr(sc
, 0, EMU_TCB
, 0); /* taken from original driver */
1910 emu_wrptr(sc
, 0, EMU_TCBS
, 0); /* taken from original driver */
1912 for (ch
= 0; ch
< NUM_G
; ch
++) {
1913 emu_wrptr(sc
, ch
, EMU_CHAN_MAPA
, tmp
| EMU_CHAN_MAP_PTI_MASK
);
1914 emu_wrptr(sc
, ch
, EMU_CHAN_MAPB
, tmp
| EMU_CHAN_MAP_PTI_MASK
);
1917 /* emu_memalloc(sc, EMUPAGESIZE); */
1919 * Hokay, now enable the AUD bit
1922 * Enable Audio = 0 (enabled after fx processor initialization)
1923 * Mute Disable Audio = 0
1928 * Mute Disable Audio = 0
1930 * GP S/PDIF AC3 Enable = 1
1931 * CD S/PDIF AC3 Enable = 1
1935 * Mute Disable Audio = 0
1936 * Lock Tank Memory = 1
1937 * Lock Sound Memory = 0
1942 tmp
= EMU_HCFG_AUTOMUTE
| EMU_HCFG_JOYENABLE
;
1943 if (sc
->audigy2
) /* Audigy 2 */
1944 tmp
= EMU_HCFG_AUDIOENABLE
| EMU_HCFG_AC3ENABLE_CDSPDIF
|
1945 EMU_HCFG_AC3ENABLE_GPSPDIF
;
1946 emu_wr(sc
, EMU_HCFG
, tmp
, 4);
1950 /* from ALSA initialization code: */
1952 /* enable audio and disable both audio/digital outputs */
1953 emu_wr(sc
, EMU_HCFG
, emu_rd(sc
, EMU_HCFG
, 4) | EMU_HCFG_AUDIOENABLE
, 4);
1954 emu_wr(sc
, EMU_A_IOCFG
, emu_rd(sc
, EMU_A_IOCFG
, 4) & ~EMU_A_IOCFG_GPOUT_AD
,
1956 if (sc
->audigy2
) { /* Audigy 2 */
1958 * Set GPO6 to 1 for Apollo. This has to be done after
1959 * init Alice3 I2SOut beyond 48kHz.
1960 * So, sequence is important.
1962 emu_wr(sc
, EMU_A_IOCFG
,
1963 emu_rd(sc
, EMU_A_IOCFG
, 4) | EMU_A_IOCFG_GPOUT_A
, 4);
1966 /* EMU10K1 initialization code */
1967 tmp
= EMU_HCFG_AUDIOENABLE
| EMU_HCFG_LOCKTANKCACHE_MASK
1968 | EMU_HCFG_AUTOMUTE
;
1970 tmp
|= EMU_HCFG_JOYENABLE
;
1972 emu_wr(sc
, EMU_HCFG
, tmp
, 4);
1974 /* TOSLink detection */
1976 tmp
= emu_rd(sc
, EMU_HCFG
, 4);
1977 if (tmp
& (EMU_HCFG_GPINPUT0
| EMU_HCFG_GPINPUT1
)) {
1978 emu_wr(sc
, EMU_HCFG
, tmp
| EMU_HCFG_GPOUT1
, 4);
1980 if (tmp
!= (emu_rd(sc
, EMU_HCFG
, 4) & ~EMU_HCFG_GPOUT1
)) {
1982 emu_wr(sc
, EMU_HCFG
, tmp
, 4);
1991 emu_uninit(struct sc_info
*sc
)
1995 emu_wr(sc
, EMU_INTE
, 0, 4);
1996 for (ch
= 0; ch
< NUM_G
; ch
++)
1997 emu_wrptr(sc
, ch
, EMU_CHAN_DCYSUSV
, ENV_OFF
);
1998 for (ch
= 0; ch
< NUM_G
; ch
++) {
1999 emu_wrptr(sc
, ch
, EMU_CHAN_VTFT
, 0);
2000 emu_wrptr(sc
, ch
, EMU_CHAN_CVCF
, 0);
2001 emu_wrptr(sc
, ch
, EMU_CHAN_PTRX
, 0);
2002 emu_wrptr(sc
, ch
, EMU_CHAN_CPF
, 0);
2005 if (sc
->audigy
) { /* stop fx processor */
2006 emu_wrptr(sc
, 0, EMU_A_DBG
, EMU_A_DBG_SINGLE_STEP
);
2009 /* disable audio and lock cache */
2010 emu_wr(sc
, EMU_HCFG
,
2011 EMU_HCFG_LOCKSOUNDCACHE
| EMU_HCFG_LOCKTANKCACHE_MASK
| EMU_HCFG_MUTEBUTTONENABLE
,
2014 emu_wrptr(sc
, 0, EMU_PTB
, 0);
2015 /* reset recording buffers */
2016 emu_wrptr(sc
, 0, EMU_MICBS
, EMU_RECBS_BUFSIZE_NONE
);
2017 emu_wrptr(sc
, 0, EMU_MICBA
, 0);
2018 emu_wrptr(sc
, 0, EMU_FXBS
, EMU_RECBS_BUFSIZE_NONE
);
2019 emu_wrptr(sc
, 0, EMU_FXBA
, 0);
2020 emu_wrptr(sc
, 0, EMU_FXWC
, 0);
2021 emu_wrptr(sc
, 0, EMU_ADCBS
, EMU_RECBS_BUFSIZE_NONE
);
2022 emu_wrptr(sc
, 0, EMU_ADCBA
, 0);
2023 emu_wrptr(sc
, 0, EMU_TCB
, 0);
2024 emu_wrptr(sc
, 0, EMU_TCBS
, 0);
2026 /* disable channel interrupt */
2027 emu_wrptr(sc
, 0, EMU_CLIEL
, 0);
2028 emu_wrptr(sc
, 0, EMU_CLIEH
, 0);
2029 emu_wrptr(sc
, 0, EMU_SOLEL
, 0);
2030 emu_wrptr(sc
, 0, EMU_SOLEH
, 0);
2032 /* init envelope engine */
2033 if (!SLIST_EMPTY(&sc
->mem
.blocks
))
2034 device_printf(sc
->dev
, "warning: memblock list not empty\n");
2035 emu_free(sc
, sc
->mem
.ptb_pages
, sc
->mem
.ptb_map
);
2036 emu_free(sc
, sc
->mem
.silent_page
, sc
->mem
.silent_map
);
2039 mpu401_uninit(sc
->mpu
);
2044 emu_pci_probe(device_t dev
)
2048 switch (pci_get_devid(dev
)) {
2049 case EMU10K1_PCI_ID
:
2050 s
= "Creative EMU10K1";
2053 case EMU10K2_PCI_ID
:
2054 if (pci_get_revid(dev
) == 0x04)
2055 s
= "Creative Audigy 2 (EMU10K2)";
2057 s
= "Creative Audigy (EMU10K2)";
2060 case EMU10K3_PCI_ID
:
2061 s
= "Creative Audigy 2 (EMU10K3)";
2068 device_set_desc(dev
, s
);
2069 return BUS_PROBE_LOW_PRIORITY
;
2073 emu_pci_attach(device_t dev
)
2075 struct ac97_info
*codec
= NULL
;
2078 char status
[SND_STATUSLEN
];
2080 sc
= kmalloc(sizeof(*sc
), M_DEVBUF
, M_WAITOK
| M_ZERO
);
2081 sc
->lock
= snd_mtxcreate(device_get_nameunit(dev
), "snd_emu10k1 softc");
2083 sc
->type
= pci_get_devid(dev
);
2084 sc
->rev
= pci_get_revid(dev
);
2085 sc
->audigy
= sc
->type
== EMU10K2_PCI_ID
|| sc
->type
== EMU10K3_PCI_ID
;
2086 sc
->audigy2
= (sc
->audigy
&& sc
->rev
== 0x04);
2087 sc
->nchans
= sc
->audigy
? 8 : 4;
2088 sc
->addrmask
= sc
->audigy
? EMU_A_PTR_ADDR_MASK
: EMU_PTR_ADDR_MASK
;
2090 pci_enable_busmaster(dev
);
2093 sc
->reg
= bus_alloc_resource_any(dev
, SYS_RES_IOPORT
, &i
, RF_ACTIVE
);
2094 if (sc
->reg
== NULL
) {
2095 device_printf(dev
, "unable to map register space\n");
2098 sc
->st
= rman_get_bustag(sc
->reg
);
2099 sc
->sh
= rman_get_bushandle(sc
->reg
);
2101 sc
->bufsz
= pcm_getbuffersize(dev
, 4096, EMU_DEFAULT_BUFSZ
, 65536);
2103 if (bus_dma_tag_create(/*parent*/bus_get_dma_tag(dev
), /*alignment*/2,
2105 /*lowaddr*/(1U << 31) - 1, /* can only access 0-2gb */
2106 /*highaddr*/BUS_SPACE_MAXADDR
,
2107 /*maxsize*/sc
->bufsz
, /*nsegments*/1, /*maxsegz*/0x3ffff,
2109 &sc
->parent_dmat
) != 0) {
2110 device_printf(dev
, "unable to create dma tag\n");
2114 if (emu_init(sc
) == -1) {
2115 device_printf(dev
, "unable to initialize the card\n");
2119 codec
= AC97_CREATE(dev
, sc
, emu_ac97
);
2120 if (codec
== NULL
) goto bad
;
2121 gotmic
= (ac97_getcaps(codec
) & AC97_CAP_MICCHANNEL
) ? 1 : 0;
2122 if (mixer_init(dev
, ac97_getmixerclass(), codec
) == -1) goto bad
;
2127 sc
->irq
= bus_alloc_resource_any(dev
, SYS_RES_IRQ
, &i
,
2128 RF_ACTIVE
| RF_SHAREABLE
);
2130 snd_setup_intr(dev
, sc
->irq
, INTR_MPSAFE
, emu_intr
, sc
, &sc
->ih
)) {
2131 device_printf(dev
, "unable to map interrupt\n");
2135 ksnprintf(status
, SND_STATUSLEN
, "at io 0x%lx irq %ld %s",
2136 rman_get_start(sc
->reg
), rman_get_start(sc
->irq
),
2137 PCM_KLDSTRING(snd_emu10k1
));
2139 if (pcm_register(dev
, sc
, sc
->nchans
, gotmic
? 3 : 2)) goto bad
;
2140 for (i
= 0; i
< sc
->nchans
; i
++)
2141 pcm_addchan(dev
, PCMDIR_PLAY
, &emupchan_class
, sc
);
2142 for (i
= 0; i
< (gotmic
? 3 : 2); i
++)
2143 pcm_addchan(dev
, PCMDIR_REC
, &emurchan_class
, sc
);
2145 pcm_setstatus(dev
, status
);
2150 if (codec
) ac97_destroy(codec
);
2151 if (sc
->reg
) bus_release_resource(dev
, SYS_RES_IOPORT
, PCIR_BAR(0), sc
->reg
);
2152 if (sc
->ih
) bus_teardown_intr(dev
, sc
->irq
, sc
->ih
);
2153 if (sc
->irq
) bus_release_resource(dev
, SYS_RES_IRQ
, 0, sc
->irq
);
2154 if (sc
->parent_dmat
) bus_dma_tag_destroy(sc
->parent_dmat
);
2155 if (sc
->lock
) snd_mtxfree(sc
->lock
);
2156 kfree(sc
, M_DEVBUF
);
2161 emu_pci_detach(device_t dev
)
2166 r
= pcm_unregister(dev
);
2170 sc
= pcm_getdevinfo(dev
);
2174 bus_release_resource(dev
, SYS_RES_IOPORT
, PCIR_BAR(0), sc
->reg
);
2175 bus_teardown_intr(dev
, sc
->irq
, sc
->ih
);
2176 bus_release_resource(dev
, SYS_RES_IRQ
, 0, sc
->irq
);
2177 bus_dma_tag_destroy(sc
->parent_dmat
);
2178 snd_mtxfree(sc
->lock
);
2179 kfree(sc
, M_DEVBUF
);
2184 /* add suspend, resume */
2185 static device_method_t emu_methods
[] = {
2186 /* Device interface */
2187 DEVMETHOD(device_probe
, emu_pci_probe
),
2188 DEVMETHOD(device_attach
, emu_pci_attach
),
2189 DEVMETHOD(device_detach
, emu_pci_detach
),
2194 static driver_t emu_driver
= {
2200 DRIVER_MODULE(snd_emu10k1
, pci
, emu_driver
, pcm_devclass
, NULL
, NULL
);
2201 MODULE_DEPEND(snd_emu10k1
, sound
, SOUND_MINVER
, SOUND_PREFVER
, SOUND_MAXVER
);
2202 MODULE_VERSION(snd_emu10k1
, 1);
2203 MODULE_DEPEND(snd_emu10k1
, midi
, 1, 1, 1);
2205 /* dummy driver to silence the joystick device */
2207 emujoy_pci_probe(device_t dev
)
2211 switch (pci_get_devid(dev
)) {
2213 s
= "Creative EMU10K1 Joystick";
2217 s
= "Creative EMU10K2 Joystick";
2222 if (s
) device_set_desc(dev
, s
);
2223 return s
? -1000 : ENXIO
;
2227 emujoy_pci_attach(device_t dev
)
2234 emujoy_pci_detach(device_t dev
)
2240 static device_method_t emujoy_methods
[] = {
2241 DEVMETHOD(device_probe
, emujoy_pci_probe
),
2242 DEVMETHOD(device_attach
, emujoy_pci_attach
),
2243 DEVMETHOD(device_detach
, emujoy_pci_detach
),
2248 static driver_t emujoy_driver
= {
2254 static devclass_t emujoy_devclass
;
2256 DRIVER_MODULE(emujoy
, pci
, emujoy_driver
, emujoy_devclass
, NULL
, NULL
);