sys/dev/netif/fxp/rcvbundl.h

   1 /*
   2 Copyright (c) 1999-2001, Intel Corporation
   3
   4 All rights reserved.
   5
   6 Redistribution and use in source and binary forms, with or without
   7 modification, are permitted provided that the following conditions are met:
   8
   9  1. Redistributions of source code must retain the above copyright notice,
  10     this list of conditions and the following disclaimer.
  11
  12  2. Redistributions in binary form must reproduce the above copyright notice,
  13     this list of conditions and the following disclaimer in the documentation
  14     and/or other materials provided with the distribution.
  15
  16  3. Neither the name of Intel Corporation nor the names of its contributors
  17     may be used to endorse or promote products derived from this software
  18     without specific prior written permission.
  19
  20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
  21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  23 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  24 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  25 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  26 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  27 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  28 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  29 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30 */
  31 /*
  32  * $FreeBSD: src/sys/dev/fxp/rcvbundl.h,v 1.1.2.1 2001/11/02 16:50:42 jlemon Exp $
  33  * $DragonFly: src/sys/dev/netif/fxp/rcvbundl.h,v 1.2 2003/06/17 04:28:26 dillon Exp $
  34  */
  35 /*
  36 rcvbundl.h
  37
  38 Author:  Patrick J Luhmann (PJL)
  39 Date:    05/30/2000
  40 Version: 3.28
  41
  42 This file contains the loadable micro code arrays to implement receive bundling on the
  43 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step,
  44 D102 B-step with TCO work around and D012 C-step.
  45
  46 Each controller has its own specific micro code array.  The array for one controller
  47 is totally incompatible with any other controller, and if used will most likely
  48 cause the controller to lock up and stop responding to the driver.  Each micro
  49 code array has its own parameter offsets (described below), and they each have
  50 their own version number (which should not be confused with the version of the
  51 rcvbundl.h file given above).
  52
  53 */
  54
  55 /*  Size of loadable micro code image for each supported chip.  */
  56 #ifndef D100_NUM_MICROCODE_DWORDS
  57 #define     D100_NUM_MICROCODE_DWORDS    66
  58 #endif
  59 #ifndef D101_NUM_MICROCODE_DWORDS
  60 #define     D101_NUM_MICROCODE_DWORDS    102
  61 #endif
  62 #ifndef D101M_NUM_MICROCODE_DWORDS
  63 #define     D101M_NUM_MICROCODE_DWORDS   134
  64 #endif
  65 #ifndef D101S_NUM_MICROCODE_DWORDS
  66 #define     D101S_NUM_MICROCODE_DWORDS   134
  67 #endif
  68 #ifndef D102_NUM_MICROCODE_DWORDS
  69 #define     D102_NUM_MICROCODE_DWORDS    134
  70 #endif
  71 #ifndef D102_NUM_TCO_MICROCODE_DWORDS
  72 #define     D102_NUM_TCO_MICROCODE_DWORDS    134
  73 #endif
  74
  75
  76 /*************************************************************************
  77 *  CPUSaver parameters
  78 *
  79 *  All CPUSaver parameters are 16-bit literals that are part of a
  80 *  "move immediate value" instruction.  By changing the value of
  81 *  the literal in the instruction before the code is loaded, the
  82 *  driver can change algorithm.
  83 *
  84 *  CPUSAVER_DWORD - This is the location of the instruction that loads
  85 *    the dead-man timer with its inital value.  By writing a 16-bit
  86 *    value to the low word of this instruction, the driver can change
  87 *    the timer value.  The current default is either x600 or x800;
  88 *    experiments show that the value probably should stay within the
  89 *    range of x200 - x1000.
  90 *
  91 *  CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction
  92 *    that sets the maximum number of frames that will be bundled.  In
  93 *    some situations, such as the TCP windowing algorithm, it may be
  94 *    better to limit the growth of the bundle size than let it go as
  95 *    high as it can, because that could cause too much added latency.
  96 *    The default is six, because this is the number of packets in the
  97 *    default TCP window size.  A value of 1 would make CPUSaver indicate
  98 *    an interrupt for every frame received.  If you do not want to put
  99 *    a limit on the bundle size, set this value to xFFFF.
 100 *
 101 *  CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction
 102 *    that contains a bit-mask describing the minimum size frame that
 103 *    will be bundled.  The default masks the lower 7 bits, which means
 104 *    that any frame less than 128 bytes in length will not be bundled,
 105 *    but will instead immediately generate an interrupt.  This does
 106 *    not affect the current bundle in any way.  Any frame that is 128
 107 *    bytes or large will be bundled normally.  This feature is meant
 108 *    to provide immediate indication of ACK frames in a TCP environment.
 109 *    Customers were seeing poor performance when a machine with CPUSaver
 110 *    enabled was sending but not receiving.  The delay introduced when
 111 *    the ACKs were received was enough to reduce total throughput, because
 112 *    the sender would sit idle until the ACK was finally seen.
 113 *
 114 *    The current default is 0xFF80, which masks out the lower 7 bits.
 115 *    This means that any frame which is x7F (127) bytes or smaller
 116 *    will cause an immediate interrupt.  Because this value must be a
 117 *    bit mask, there are only a few valid values that can be used.  To
 118 *    turn this feature off, the driver can write the value xFFFF to the
 119 *    lower word of this instruction (in the same way that the other
 120 *    parameters are used).  Likewise, a value of 0xF800 (2047) would
 121 *    cause an interrupt to be generated for every frame, because all
 122 *    standard Ethernet frames are <= 2047 bytes in length.
 123 *************************************************************************/
 124
 125
 126
 127 /********************************************************/
 128 /*  CPUSaver micro code for the D101A                   */
 129 /********************************************************/
 130
 131 /*  Version 2.0  */
 132
 133 /*  This value is the same for both A and B step of 558.  */
 134 #define D101_CPUSAVER_DWORD         72
 135
 136
 137 #define     D101_A_RCVBUNDLE_UCODE \
 138 {\
 139 0x03B301BB, \
 140 0x0046FFFF, \
 141 0xFFFFFFFF, \
 142 0x051DFFFF, \
 143 0xFFFFFFFF, \
 144 0xFFFFFFFF, \
 145 0x000C0001, \
 146 0x00101212, \
 147 0x000C0008, \
 148 0x003801BC, \
 149 0x00000000, \
 150 0x00124818, \
 151 0x000C1000, \
 152 0x00220809, \
 153 0x00010200, \
 154 0x00124818, \
 155 0x000CFFFC, \
 156 0x003803B5, \
 157 0x00000000, \
 158 0x00000000, \
 159 0x00000000, \
 160 0x00000000, \
 161 0x0010009C, \
 162 0x0024B81D, \
 163 0x00130836, \
 164 0x000C0001, \
 165 0x0026081C, \
 166 0x0020C81B, \
 167 0x00130824, \
 168 0x00222819, \
 169 0x00101213, \
 170 0x00041000, \
 171 0x003A03B3, \
 172 0x00010200, \
 173 0x00101B13, \
 174 0x00238081, \
 175 0x00213049, \
 176 0x0038003B, \
 177 0x00000000, \
 178 0x00000000, \
 179 0x00000000, \
 180 0x00000000, \
 181 0x00000000, \
 182 0x00000000, \
 183 0x00000000, \
 184 0x00000000, \
 185 0x00000000, \
 186 0x00000000, \
 187 0x00000000, \
 188 0x00000000, \
 189 0x00000000, \
 190 0x00000000, \
 191 0x00000000, \
 192 0x00000000, \
 193 0x0010009C, \
 194 0x0024B83E, \
 195 0x00130826, \
 196 0x000C0001, \
 197 0x0026083B, \
 198 0x00010200, \
 199 0x00134824, \
 200 0x000C0001, \
 201 0x00101213, \
 202 0x00041000, \
 203 0x0038051E, \
 204 0x00101313, \
 205 0x00010400, \
 206 0x00380521, \
 207 0x00050600, \
 208 0x00100824, \
 209 0x00101310, \
 210 0x00041000, \
 211 0x00080600, \
 212 0x00101B10, \
 213 0x0038051E, \
 214 0x00000000, \
 215 0x00000000, \
 216 0x00000000, \
 217 0x00000000, \
 218 0x00000000, \
 219 0x00000000, \
 220 0x00000000, \
 221 0x00000000, \
 222 0x00000000, \
 223 0x00000000, \
 224 0x00000000, \
 225 0x00000000, \
 226 0x00000000, \
 227 0x00000000, \
 228 0x00000000, \
 229 0x00000000, \
 230 0x00000000, \
 231 0x00000000, \
 232 0x00000000, \
 233 0x00000000, \
 234 0x00000000, \
 235 0x00000000, \
 236 0x00000000, \
 237 0x00000000, \
 238 0x00000000, \
 239 0x00000000, \
 240 0x00000000, \
 241 }
 242
 243
 244 /********************************************************/
 245 /*  CPUSaver micro code for the D101B                   */
 246 /********************************************************/
 247
 248 /*  Version 2.0  */
 249
 250 #define     D101_B0_RCVBUNDLE_UCODE \
 251 {\
 252 0x03B401BC, \
 253 0x0047FFFF, \
 254 0xFFFFFFFF, \
 255 0x051EFFFF, \
 256 0xFFFFFFFF, \
 257 0xFFFFFFFF, \
 258 0x000C0001, \
 259 0x00101B92, \
 260 0x000C0008, \
 261 0x003801BD, \
 262 0x00000000, \
 263 0x00124818, \
 264 0x000C1000, \
 265 0x00220809, \
 266 0x00010200, \
 267 0x00124818, \
 268 0x000CFFFC, \
 269 0x003803B6, \
 270 0x00000000, \
 271 0x00000000, \
 272 0x00000000, \
 273 0x00000000, \
 274 0x0010009C, \
 275 0x0024B81D, \
 276 0x0013082F, \
 277 0x000C0001, \
 278 0x0026081C, \
 279 0x0020C81B, \
 280 0x00130837, \
 281 0x00222819, \
 282 0x00101B93, \
 283 0x00041000, \
 284 0x003A03B4, \
 285 0x00010200, \
 286 0x00101793, \
 287 0x00238082, \
 288 0x0021304A, \
 289 0x0038003C, \
 290 0x00000000, \
 291 0x00000000, \
 292 0x00000000, \
 293 0x00000000, \
 294 0x00000000, \
 295 0x00000000, \
 296 0x00000000, \
 297 0x00000000, \
 298 0x00000000, \
 299 0x00000000, \
 300 0x00000000, \
 301 0x00000000, \
 302 0x00000000, \
 303 0x00000000, \
 304 0x00000000, \
 305 0x00000000, \
 306 0x0010009C, \
 307 0x0024B83E, \
 308 0x00130826, \
 309 0x000C0001, \
 310 0x0026083B, \
 311 0x00010200, \
 312 0x00134837, \
 313 0x000C0001, \
 314 0x00101B93, \
 315 0x00041000, \
 316 0x0038051F, \
 317 0x00101313, \
 318 0x00010400, \
 319 0x00380522, \
 320 0x00050600, \
 321 0x00100837, \
 322 0x00101310, \
 323 0x00041000, \
 324 0x00080600, \
 325 0x00101790, \
 326 0x0038051F, \
 327 0x00000000, \
 328 0x00000000, \
 329 0x00000000, \
 330 0x00000000, \
 331 0x00000000, \
 332 0x00000000, \
 333 0x00000000, \
 334 0x00000000, \
 335 0x00000000, \
 336 0x00000000, \
 337 0x00000000, \
 338 0x00000000, \
 339 0x00000000, \
 340 0x00000000, \
 341 0x00000000, \
 342 0x00000000, \
 343 0x00000000, \
 344 0x00000000, \
 345 0x00000000, \
 346 0x00000000, \
 347 0x00000000, \
 348 0x00000000, \
 349 0x00000000, \
 350 0x00000000, \
 351 0x00000000, \
 352 0x00000000, \
 353 0x00000000, \
 354 }
 355
 356
 357 /********************************************************/
 358 /*  CPUSaver micro code for the D101M (B-step only)     */
 359 /********************************************************/
 360
 361 /*  Version 2.10  */
 362
 363 /*  Parameter values for the D101M B-step  */
 364 #define D101M_CPUSAVER_DWORD                78
 365 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD     65
 366 #define D101M_CPUSAVER_MIN_SIZE_DWORD       126
 367
 368
 369 #define D101M_B_RCVBUNDLE_UCODE \
 370 {\
 371 0x00550215, \
 372 0xFFFF0437, \
 373 0xFFFFFFFF, \
 374 0x06A70789, \
 375 0xFFFFFFFF, \
 376 0x0558FFFF, \
 377 0x000C0001, \
 378 0x00101312, \
 379 0x000C0008, \
 380 0x00380216, \
 381 0x0010009C, \
 382 0x00204056, \
 383 0x002380CC, \
 384 0x00380056, \
 385 0x0010009C, \
 386 0x00244C0B, \
 387 0x00000800, \
 388 0x00124818, \
 389 0x00380438, \
 390 0x00000000, \
 391 0x00140000, \
 392 0x00380555, \
 393 0x00308000, \
 394 0x00100662, \
 395 0x00100561, \
 396 0x000E0408, \
 397 0x00134861, \
 398 0x000C0002, \
 399 0x00103093, \
 400 0x00308000, \
 401 0x00100624, \
 402 0x00100561, \
 403 0x000E0408, \
 404 0x00100861, \
 405 0x000C007E, \
 406 0x00222C21, \
 407 0x000C0002, \
 408 0x00103093, \
 409 0x00380C7A, \
 410 0x00080000, \
 411 0x00103090, \
 412 0x00380C7A, \
 413 0x00000000, \
 414 0x00000000, \
 415 0x00000000, \
 416 0x00000000, \
 417 0x0010009C, \
 418 0x00244C2D, \
 419 0x00010004, \
 420 0x00041000, \
 421 0x003A0437, \
 422 0x00044010, \
 423 0x0038078A, \
 424 0x00000000, \
 425 0x00100099, \
 426 0x00206C7A, \
 427 0x0010009C, \
 428 0x00244C48, \
 429 0x00130824, \
 430 0x000C0001, \
 431 0x00101213, \
 432 0x00260C75, \
 433 0x00041000, \
 434 0x00010004, \
 435 0x00130826, \
 436 0x000C0006, \
 437 0x002206A8, \
 438 0x0013C926, \
 439 0x00101313, \
 440 0x003806A8, \
 441 0x00000000, \
 442 0x00000000, \
 443 0x00000000, \
 444 0x00000000, \
 445 0x00000000, \
 446 0x00000000, \
 447 0x00000000, \
 448 0x00000000, \
 449 0x00080600, \
 450 0x00101B10, \
 451 0x00050004, \
 452 0x00100826, \
 453 0x00101210, \
 454 0x00380C34, \
 455 0x00000000, \
 456 0x00000000, \
 457 0x0021155B, \
 458 0x00100099, \
 459 0x00206559, \
 460 0x0010009C, \
 461 0x00244559, \
 462 0x00130836, \
 463 0x000C0000, \
 464 0x00220C62, \
 465 0x000C0001, \
 466 0x00101B13, \
 467 0x00229C0E, \
 468 0x00210C0E, \
 469 0x00226C0E, \
 470 0x00216C0E, \
 471 0x0022FC0E, \
 472 0x00215C0E, \
 473 0x00214C0E, \
 474 0x00380555, \
 475 0x00010004, \
 476 0x00041000, \
 477 0x00278C67, \
 478 0x00040800, \
 479 0x00018100, \
 480 0x003A0437, \
 481 0x00130826, \
 482 0x000C0001, \
 483 0x00220559, \
 484 0x00101313, \
 485 0x00380559, \
 486 0x00000000, \
 487 0x00000000, \
 488 0x00000000, \
 489 0x00000000, \
 490 0x00000000, \
 491 0x00000000, \
 492 0x00000000, \
 493 0x00000000, \
 494 0x00130831, \
 495 0x0010090B, \
 496 0x00124813, \
 497 0x000CFF80, \
 498 0x002606AB, \
 499 0x00041000, \
 500 0x003806A8, \
 501 0x00000000, \
 502 0x00000000, \
 503 0x00000000, \
 504 0x00000000, \
 505 }
 506
 507
 508 /********************************************************/
 509 /*  CPUSaver micro code for the D101S                   */
 510 /********************************************************/
 511
 512 /*  Version 1.20  */
 513
 514 /*  Parameter values for the D101S  */
 515 #define D101S_CPUSAVER_DWORD                78
 516 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD     67
 517 #define D101S_CPUSAVER_MIN_SIZE_DWORD       129
 518
 519
 520 #define D101S_RCVBUNDLE_UCODE \
 521 {\
 522 0x00550242, \
 523 0xFFFF047E, \
 524 0xFFFFFFFF, \
 525 0x06FF0818, \
 526 0xFFFFFFFF, \
 527 0x05A6FFFF, \
 528 0x000C0001, \
 529 0x00101312, \
 530 0x000C0008, \
 531 0x00380243, \
 532 0x0010009C, \
 533 0x00204056, \
 534 0x002380D0, \
 535 0x00380056, \
 536 0x0010009C, \
 537 0x00244F8B, \
 538 0x00000800, \
 539 0x00124818, \
 540 0x0038047F, \
 541 0x00000000, \
 542 0x00140000, \
 543 0x003805A3, \
 544 0x00308000, \
 545 0x00100610, \
 546 0x00100561, \
 547 0x000E0408, \
 548 0x00134861, \
 549 0x000C0002, \
 550 0x00103093, \
 551 0x00308000, \
 552 0x00100624, \
 553 0x00100561, \
 554 0x000E0408, \
 555 0x00100861, \
 556 0x000C007E, \
 557 0x00222FA1, \
 558 0x000C0002, \
 559 0x00103093, \
 560 0x00380F90, \
 561 0x00080000, \
 562 0x00103090, \
 563 0x00380F90, \
 564 0x00000000, \
 565 0x00000000, \
 566 0x00000000, \
 567 0x00000000, \
 568 0x0010009C, \
 569 0x00244FAD, \
 570 0x00010004, \
 571 0x00041000, \
 572 0x003A047E, \
 573 0x00044010, \
 574 0x00380819, \
 575 0x00000000, \
 576 0x00100099, \
 577 0x00206FFD, \
 578 0x0010009A, \
 579 0x0020AFFD, \
 580 0x0010009C, \
 581 0x00244FC8, \
 582 0x00130824, \
 583 0x000C0001, \
 584 0x00101213, \
 585 0x00260FF8, \
 586 0x00041000, \
 587 0x00010004, \
 588 0x00130826, \
 589 0x000C0006, \
 590 0x00220700, \
 591 0x0013C926, \
 592 0x00101313, \
 593 0x00380700, \
 594 0x00000000, \
 595 0x00000000, \
 596 0x00000000, \
 597 0x00000000, \
 598 0x00000000, \
 599 0x00000000, \
 600 0x00080600, \
 601 0x00101B10, \
 602 0x00050004, \
 603 0x00100826, \
 604 0x00101210, \
 605 0x00380FB6, \
 606 0x00000000, \
 607 0x00000000, \
 608 0x002115A9, \
 609 0x00100099, \
 610 0x002065A7, \
 611 0x0010009A, \
 612 0x0020A5A7, \
 613 0x0010009C, \
 614 0x002445A7, \
 615 0x00130836, \
 616 0x000C0000, \
 617 0x00220FE4, \
 618 0x000C0001, \
 619 0x00101B13, \
 620 0x00229F8E, \
 621 0x00210F8E, \
 622 0x00226F8E, \
 623 0x00216F8E, \
 624 0x0022FF8E, \
 625 0x00215F8E, \
 626 0x00214F8E, \
 627 0x003805A3, \
 628 0x00010004, \
 629 0x00041000, \
 630 0x00278FE9, \
 631 0x00040800, \
 632 0x00018100, \
 633 0x003A047E, \
 634 0x00130826, \
 635 0x000C0001, \
 636 0x002205A7, \
 637 0x00101313, \
 638 0x003805A7, \
 639 0x00000000, \
 640 0x00000000, \
 641 0x00000000, \
 642 0x00000000, \
 643 0x00000000, \
 644 0x00000000, \
 645 0x00000000, \
 646 0x00000000, \
 647 0x00000000, \
 648 0x00130831, \
 649 0x0010090B, \
 650 0x00124813, \
 651 0x000CFF80, \
 652 0x00260703, \
 653 0x00041000, \
 654 0x00380700, \
 655 0x00000000, \
 656 }
 657
 658
 659 /********************************************************/
 660 /*  CPUSaver micro code for the D102 B-step             */
 661 /********************************************************/
 662
 663 /*  Version 2.0  */
 664
 665 /*
 666     This version of CPUSaver is different from all others in
 667     a different way.  It combines the CPUSaver algorithm with
 668     fixes for bugs in the B-step hardware (specifically, bugs
 669     with Inline Receive).
 670     Thus, when CPUSaver is disabled, this micro code image will
 671     still need to be loaded.  Before this happens, the hit addresses
 672     for the CPUSaver algorithm must be set to 0x1FFFF.  The hit
 673     addresses for CPUSaver are (starting with 0, and remember that
 674
 675 */
 676
 677 /*  Parameter values for the D102 B-step  */
 678 #define D102_B_CPUSAVER_DWORD                91
 679 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD     115
 680 #define D102_B_CPUSAVER_MIN_SIZE_DWORD       70
 681
 682
 683 #define     D102_B_RCVBUNDLE_UCODE \
 684 {\
 685 0x006F0276, \
 686 0x02BF0E93, \
 687 0x1FFF0ED9, \
 688 0x0D2508FA, \
 689 0x04D21FFF, \
 690 0x0EA10892, \
 691 0x00300001, \
 692 0x0140D871, \
 693 0x00300008, \
 694 0x00E00277, \
 695 0x01406C57, \
 696 0x00816073, \
 697 0x008700FA, \
 698 0x00E00070, \
 699 0x00E00E94, \
 700 0x00200004, \
 701 0x01410000, \
 702 0x014B6F6F, \
 703 0x0030FFFF, \
 704 0x01486F72, \
 705 0x00E81F9B, \
 706 0x00E00EA3, \
 707 0x003C0040, \
 708 0x00380920, \
 709 0x00C02000, \
 710 0x0150ED38, \
 711 0x0150EE39, \
 712 0x0150EF3A, \
 713 0x003C0040, \
 714 0x01506F0D, \
 715 0x01600E72, \
 716 0x00380AE0, \
 717 0x00E002C0, \
 718 0x00300001, \
 719 0x014C0000, \
 720 0x008404DC, \
 721 0x014C6F72, \
 722 0x00E01F9D, \
 723 0x01406C51, \
 724 0x0080DFC2, \
 725 0x01406C52, \
 726 0x00815FC2, \
 727 0x01406C57, \
 728 0x00917FD5, \
 729 0x00E01FE6, \
 730 0x00000000, \
 731 0x01406C57, \
 732 0x00919FAD, \
 733 0x00038800, \
 734 0x00300000, \
 735 0x00E81FF2, \
 736 0x014D6FC4, \
 737 0x00E008FB, \
 738 0x00000000, \
 739 0x00822D30, \
 740 0x01406C51, \
 741 0x0080CD26, \
 742 0x01406C52, \
 743 0x00814D26, \
 744 0x01406C57, \
 745 0x00916D26, \
 746 0x014C6FD7, \
 747 0x00300000, \
 748 0x00841FDB, \
 749 0x00300001, \
 750 0x0140D772, \
 751 0x00E012B3, \
 752 0x014C6F91, \
 753 0x0150710B, \
 754 0x01496F72, \
 755 0x0030FF80, \
 756 0x00940EDD, \
 757 0x00102000, \
 758 0x00E00EDA, \
 759 0x01406C57, \
 760 0x00917FFD, \
 761 0x00001000, \
 762 0x00E01FFD, \
 763 0x00138800, \
 764 0x00300001, \
 765 0x00E81FF2, \
 766 0x00202500, \
 767 0x00E81F9B, \
 768 0x01600EC5, \
 769 0x00E00893, \
 770 0x00000000, \
 771 0x01406CD5, \
 772 0x0091EEA3, \
 773 0x00904EA3, \
 774 0x00901F89, \
 775 0x00E00EA3, \
 776 0x00200600, \
 777 0x0140D76F, \
 778 0x00138400, \
 779 0x01406FD8, \
 780 0x0140D96F, \
 781 0x00E01FE6, \
 782 0x00038400, \
 783 0x00102000, \
 784 0x00971FE0, \
 785 0x00101000, \
 786 0x00050200, \
 787 0x00E804D2, \
 788 0x014C6FD8, \
 789 0x00300001, \
 790 0x00840D26, \
 791 0x0140D872, \
 792 0x00E00D26, \
 793 0x014C6FD9, \
 794 0x00300001, \
 795 0x0140D972, \
 796 0x00941FBD, \
 797 0x00102000, \
 798 0x00038400, \
 799 0x014C6FD8, \
 800 0x00300006, \
 801 0x00840EDA, \
 802 0x014F71D8, \
 803 0x0140D872, \
 804 0x00E00EDA, \
 805 0x00340020, \
 806 0x014C6FED, \
 807 0x01603472, \
 808 0x016035EE, \
 809 0x016036EF, \
 810 0x00300004, \
 811 0x01611C71, \
 812 0x00300014, \
 813 0x00200A00, \
 814 0x00E810B9, \
 815 0x00600000, \
 816 0x01496F50, \
 817 0x00E004D3, \
 818 0x00000000, \
 819 }
 820
 821
 822
 823
 824 /********************************************************/
 825 /*  TCO micro code for the D102 B-step             */
 826 /********************************************************/
 827
 828 /*  Version 2.0  */
 829
 830 /*
 831     This version is a fix to TCO bug. This version can be loaded instead
 832     the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver"
 833
 834 */
 835
 836
 837 #define     D102_B_TCO_UCODE \
 838 {\
 839 0x1FFF0ED3, \
 840 0x02BF0E93, \
 841 0x1FFF1FFF, \
 842 0x1FFF08FA, \
 843 0x1FFF1FFF, \
 844 0x0EA10892, \
 845 0x00906ED8, \
 846 0x01406C55, \
 847 0x00E00ED4, \
 848 0x00000000, \
 849 0x00000000, \
 850 0x00000000, \
 851 0x00000000, \
 852 0x00000000, \
 853 0x00E00E94, \
 854 0x00200004, \
 855 0x01410000, \
 856 0x014B6F6F, \
 857 0x0030FFFF, \
 858 0x01486F72, \
 859 0x00E81F9B, \
 860 0x00E00EA3, \
 861 0x003C0040, \
 862 0x00380920, \
 863 0x00C02000, \
 864 0x0150ED38, \
 865 0x0150EE39, \
 866 0x0150EF3A, \
 867 0x003C0040, \
 868 0x01506F0D, \
 869 0x01600E72, \
 870 0x00380AE0, \
 871 0x00E002C0, \
 872 0x00300001, \
 873 0x014C0000, \
 874 0x008404DC, \
 875 0x014C6F72, \
 876 0x00E01F9D, \
 877 0x00000000, \
 878 0x00000000, \
 879 0x00000000, \
 880 0x00000000, \
 881 0x00000000, \
 882 0x00000000, \
 883 0x00000000, \
 884 0x00000000, \
 885 0x01406C57, \
 886 0x00919FAD, \
 887 0x00038800, \
 888 0x00300000, \
 889 0x00E81FD5, \
 890 0x014D6FC4, \
 891 0x00E008FB, \
 892 0x00000000, \
 893 0x00000000, \
 894 0x00000000, \
 895 0x00000000, \
 896 0x00000000, \
 897 0x00000000, \
 898 0x00000000, \
 899 0x00000000, \
 900 0x00000000, \
 901 0x00000000, \
 902 0x00000000, \
 903 0x00000000, \
 904 0x00000000, \
 905 0x00000000, \
 906 0x00000000, \
 907 0x00000000, \
 908 0x00000000, \
 909 0x00000000, \
 910 0x00000000, \
 911 0x00000000, \
 912 0x00000000, \
 913 0x00000000, \
 914 0x00000000, \
 915 0x00000000, \
 916 0x00000000, \
 917 0x00138800, \
 918 0x00300001, \
 919 0x00E81FD5, \
 920 0x00202500, \
 921 0x00E81F9B, \
 922 0x01600EC5, \
 923 0x00E00893, \
 924 0x00000000, \
 925 0x01406CD5, \
 926 0x0091EEA3, \
 927 0x00904EA3, \
 928 0x00901F89, \
 929 0x00E00EA3, \
 930 0x00340020, \
 931 0x014C6FED, \
 932 0x01603472, \
 933 0x016035EE, \
 934 0x016036EF, \
 935 0x00300004, \
 936 0x01611C71, \
 937 0x00300014, \
 938 0x00200A00, \
 939 0x00E810B9, \
 940 0x00600000, \
 941 0x00000000, \
 942 0x00000000, \
 943 0x00000000, \
 944 0x00000000, \
 945 0x00000000, \
 946 0x00000000, \
 947 0x00000000, \
 948 0x00000000, \
 949 0x00000000, \
 950 0x00000000, \
 951 0x00000000, \
 952 0x00000000, \
 953 0x00000000, \
 954 0x00000000, \
 955 0x00000000, \
 956 0x00000000, \
 957 0x00000000, \
 958 0x00000000, \
 959 0x00000000, \
 960 0x00000000, \
 961 0x00000000, \
 962 0x00000000, \
 963 0x00000000, \
 964 0x00000000, \
 965 0x00000000, \
 966 0x00000000, \
 967 0x00000000, \
 968 0x00000000, \
 969 0x00000000, \
 970 0x00000000, \
 971 0x00000000, \
 972 0x00000000, \
 973 }
 974
 975
 976
 977 /********************************************************/
 978 /*  Micro code for the D102 C-step                      */
 979 /********************************************************/
 980
 981 /*  Parameter values for the D102 C-step  */
 982 #define D102_C_CPUSAVER_DWORD                46
 983 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD     54
 984 #define D102_C_CPUSAVER_MIN_SIZE_DWORD      133 /* not implemented */
 985
 986
 987
 988
 989
 990 #if 0
 991 // this uCode include the CPU Saver and the TCO work around
 992 //for IP fregments.
 993 #endif
 994 #define     D102_C_RCVBUNDLE_UCODE \
 995 { \
 996 0x00700279, \
 997 0x0E6104E2, \
 998 0x02BF0CAE, \
 999 0x1519150C, \
1000 0x1FFF0E5B, \
1001 0x1FFF1FFF, \
1002 0x00E014D8, \
1003 0x00000000, \
1004 0x00000000, \
1005 0x00000000, \
1006 0x00E014DC, \
1007 0x00000000, \
1008 0x00000000, \
1009 0x00000000, \
1010 0x00E014F4, \
1011 0x00000000, \
1012 0x00000000, \
1013 0x00000000, \
1014 0x00000000, \
1015 0x00000000, \
1016 0x00000000, \
1017 0x00000000, \
1018 0x00E014E0, \
1019 0x00000000, \
1020 0x00000000, \
1021 0x00000000, \
1022 0x00000000, \
1023 0x00000000, \
1024 0x00000000, \
1025 0x00000000, \
1026 0x00000000, \
1027 0x00000000, \
1028 0x00000000, \
1029 0x00000000, \
1030 0x00000000, \
1031 0x00000000, \
1032 0x00000000, \
1033 0x00000000, \
1034 0x00E014E7, \
1035 0x00000000, \
1036 0x00000000, \
1037 0x00000000, \
1038 0x00141000, \
1039 0x015D6F0D, \
1040 0x00E002C0, \
1041 0x00000000, \
1042 0x00200600, \
1043 0x00E0150D, \
1044 0x00000000, \
1045 0x00000000, \
1046 0x00000000, \
1047 0x00000000, \
1048 0x00000000, \
1049 0x00000000, \
1050 0x00300006, \
1051 0x00E0151A, \
1052 0x00000000, \
1053 0x00000000, \
1054 0x00000000, \
1055 0x00000000, \
1056 0x00000000, \
1057 0x00000000, \
1058 0x00000000, \
1059 0x00000000, \
1060 0x00000000, \
1061 0x00000000, \
1062 0x00000000, \
1063 0x00000000, \
1064 0x00000000, \
1065 0x00000000, \
1066 0x00906E65, \
1067 0x00800E60, \
1068 0x00E00E5D, \
1069 0x00000000, \
1070 0x00000000, \
1071 0x00000000, \
1072 0x00000000, \
1073 0x00000000, \
1074 0x00000000, \
1075 0x00000000, \
1076 0x00000000, \
1077 0x00000000, \
1078 0x00000000, \
1079 0x00000000, \
1080 0x00000000, \
1081 0x00000000, \
1082 0x00000000, \
1083 0x00000000, \
1084 0x00000000, \
1085 0x00000000, \
1086 0x00000000, \
1087 0x00000000, \
1088 0x00000000, \
1089 0x00000000, \
1090 0x00000000, \
1091 0x00000000, \
1092 0x00000000, \
1093 0x00000000, \
1094 0x00000000, \
1095 0x00000000, \
1096 0x00000000, \
1097 0x00000000, \
1098 0x00000000, \
1099 0x00000000, \
1100 0x00000000, \
1101 0x00000000, \
1102 0x00000000, \
1103 0x00000000, \
1104 0x00000000, \
1105 0x00000000, \
1106 0x00000000, \
1107 0x00000000, \
1108 0x00000000, \
1109 0x00000000, \
1110 0x00000000, \
1111 0x00000000, \
1112 0x00000000, \
1113 0x00000000, \
1114 0x00000000, \
1115 0x00000000, \
1116 0x00000000, \
1117 0x00000000, \
1118 0x00000000, \
1119 0x00000000, \
1120 0x00000000, \
1121 0x00000000, \
1122 0x00000000, \
1123 0x00000000, \
1124 0x00000000, \
1125 0x00000000, \
1126 0x00000000, \
1127 0x00000000, \
1128 0x00000000, \
1129 0x00000000, \
1130 }