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25 #ifndef __I915_GEM_OBJECT_H__
26 #define __I915_GEM_OBJECT_H__
28 #include <linux/reservation.h>
30 #include <drm/drm_vma_manager.h>
31 #include <drm/drm_gem.h>
34 #include <drm/i915_drm.h>
36 #include "i915_gem_request.h"
37 #include "i915_selftest.h"
39 struct drm_i915_gem_object
;
42 * struct i915_lut_handle tracks the fast lookups from handle to vma used
43 * for execbuf. Although we use a radixtree for that mapping, in order to
44 * remove them as the object or context is closed, we need a secondary list
45 * and a translation entry (i915_lut_handle).
47 struct i915_lut_handle
{
48 struct list_head obj_link
;
49 struct list_head ctx_link
;
50 struct i915_gem_context
*ctx
;
54 struct drm_i915_gem_object_ops
{
56 #define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0)
57 #define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1)
59 /* Interface between the GEM object and its backing storage.
60 * get_pages() is called once prior to the use of the associated set
61 * of pages before to binding them into the GTT, and put_pages() is
62 * called after we no longer need them. As we expect there to be
63 * associated cost with migrating pages between the backing storage
64 * and making them available for the GPU (e.g. clflush), we may hold
65 * onto the pages after they are no longer referenced by the GPU
66 * in case they may be used again shortly (for example migrating the
67 * pages to a different memory domain within the GTT). put_pages()
68 * will therefore most likely be called when the object itself is
69 * being released or under memory pressure (where we attempt to
70 * reap pages for the shrinker).
72 int (*get_pages
)(struct drm_i915_gem_object
*);
73 void (*put_pages
)(struct drm_i915_gem_object
*, struct sg_table
*);
75 int (*pwrite
)(struct drm_i915_gem_object
*,
76 const struct drm_i915_gem_pwrite
*);
78 int (*dmabuf_export
)(struct drm_i915_gem_object
*);
79 void (*release
)(struct drm_i915_gem_object
*);
82 struct drm_i915_gem_object
{
83 struct drm_gem_object base
;
85 const struct drm_i915_gem_object_ops
*ops
;
88 * @vma_list: List of VMAs backed by this object
90 * The VMA on this list are ordered by type, all GGTT vma are placed
91 * at the head and all ppGTT vma are placed at the tail. The different
92 * types of GGTT vma are unordered between themselves, use the
93 * @vma_tree (which has a defined order between all VMA) to find an
96 struct list_head vma_list
;
98 * @vma_tree: Ordered tree of VMAs backed by this object
100 * All VMA created for this object are placed in the @vma_tree for
101 * fast retrieval via a binary search in i915_vma_instance().
102 * They are also added to @vma_list for easy iteration.
104 struct rb_root vma_tree
;
107 * @lut_list: List of vma lookup entries in use for this object.
109 * If this object is closed, we need to remove all of its VMA from
110 * the fast lookup index in associated contexts; @lut_list provides
111 * this translation from object to context->handles_vma.
113 struct list_head lut_list
;
115 /** Stolen memory for this object, instead of being backed by shmem. */
116 struct drm_mm_node
*stolen
;
119 struct llist_node freed
;
123 * Whether the object is currently in the GGTT mmap.
125 unsigned int userfault_count
;
126 struct list_head userfault_link
;
128 struct list_head batch_pool_link
;
129 I915_SELFTEST_DECLARE(struct list_head st_link
);
134 * Have we taken a reference for the object for incomplete GPU
137 #define I915_BO_ACTIVE_REF 0
140 * Is the object to be mapped as read-only to the GPU
141 * Only honoured if hardware has relevant pte bit
143 unsigned long gt_ro
:1;
144 unsigned int cache_level
:3;
145 unsigned int cache_coherent
:2;
146 #define I915_BO_CACHE_COHERENT_FOR_READ BIT(0)
147 #define I915_BO_CACHE_COHERENT_FOR_WRITE BIT(1)
148 unsigned int cache_dirty
:1;
150 atomic_t frontbuffer_bits
;
151 unsigned int frontbuffer_ggtt_origin
; /* write once */
152 struct i915_gem_active frontbuffer_write
;
154 /** Current tiling stride for the object, if it's tiled. */
155 unsigned int tiling_and_stride
;
156 #define FENCE_MINIMUM_STRIDE 128 /* See i915_tiling_ok() */
157 #define TILING_MASK (FENCE_MINIMUM_STRIDE-1)
158 #define STRIDE_MASK (~TILING_MASK)
160 /** Count of VMA actually bound by this object */
161 unsigned int bind_count
;
162 unsigned int active_count
;
163 /** Count of how many global VMA are currently pinned for use by HW */
164 unsigned int pin_global
;
167 struct lock lock
; /* protects the pages and their use */
168 atomic_t pages_pin_count
;
170 struct sg_table
*pages
;
173 /* TODO: whack some of this into the error state */
174 struct i915_page_sizes
{
176 * The sg mask of the pages sg_table. i.e the mask of
177 * of the lengths for each sg entry.
182 * The gtt page sizes we are allowed to use given the
183 * sg mask and the supported page sizes. This will
184 * express the smallest unit we can use for the whole
185 * object, as well as the larger sizes we may be able
186 * to use opportunistically.
191 * The actual gtt page size usage. Since we can have
192 * multiple vma associated with this object we need to
193 * prevent any trampling of state, hence a copy of this
194 * struct also lives in each vma, therefore the gtt
195 * value here should only be read/write through the vma.
200 I915_SELFTEST_DECLARE(unsigned int page_mask
);
202 struct i915_gem_object_page_iter
{
203 struct scatterlist
*sg_pos
;
204 unsigned int sg_idx
; /* in pages, but 32bit eek! */
206 struct radix_tree_root radix
;
207 struct lock lock
; /* protects this cache */
211 * Element within i915->mm.unbound_list or i915->mm.bound_list,
212 * locked by i915->mm.obj_lock.
214 struct list_head link
;
217 * Advice: are the backing pages purgeable?
222 * This is set if the object has been written to since the
223 * pages were last acquired.
228 * This is set if the object has been pinned due to unknown
234 /** Breadcrumb of last rendering to the buffer.
235 * There can only be one writer, but we allow for multiple readers.
236 * If there is a writer that necessarily implies that all other
237 * read requests are complete - but we may only be lazily clearing
238 * the read requests. A read request is naturally the most recent
239 * request on a ring, so we may have two different write and read
240 * requests on one ring where the write request is older than the
241 * read request. This allows for the CPU to read from an active
242 * buffer by only waiting for the write to complete.
244 struct reservation_object
*resv
;
246 /** References from framebuffers, locks out tiling changes. */
247 unsigned int framebuffer_references
;
249 /** Record of address bit 17 of each page at last unbind. */
250 unsigned long *bit_17
;
253 struct i915_gem_userptr
{
255 unsigned read_only
:1;
257 struct i915_mm_struct
*mm
;
258 struct i915_mmu_object
*mmu_object
;
259 struct work_struct
*work
;
262 unsigned long scratch
;
265 /** for phys allocated objects */
266 struct drm_dma_handle
*phys_handle
;
268 struct reservation_object __builtin_resv
;
271 static inline struct drm_i915_gem_object
*
272 to_intel_bo(struct drm_gem_object
*gem
)
274 /* Assert that to_intel_bo(NULL) == NULL */
275 BUILD_BUG_ON(offsetof(struct drm_i915_gem_object
, base
));
277 return container_of(gem
, struct drm_i915_gem_object
, base
);
281 * i915_gem_object_lookup_rcu - look up a temporary GEM object from its handle
282 * @filp: DRM file private date
283 * @handle: userspace handle
287 * A pointer to the object named by the handle if such exists on @filp, NULL
288 * otherwise. This object is only valid whilst under the RCU read lock, and
289 * note carefully the object may be in the process of being destroyed.
291 static inline struct drm_i915_gem_object
*
292 i915_gem_object_lookup_rcu(struct drm_file
*file
, u32 handle
)
294 #ifdef CONFIG_LOCKDEP
295 WARN_ON(debug_locks
&& !lock_is_held(&rcu_lock_map
));
297 return idr_find(&file
->object_idr
, handle
);
300 static inline struct drm_i915_gem_object
*
301 i915_gem_object_lookup(struct drm_file
*file
, u32 handle
)
303 struct drm_i915_gem_object
*obj
;
306 obj
= i915_gem_object_lookup_rcu(file
, handle
);
307 if (obj
&& !kref_get_unless_zero(&obj
->base
.refcount
))
314 __attribute__((nonnull
))
315 static inline struct drm_i915_gem_object
*
316 i915_gem_object_get(struct drm_i915_gem_object
*obj
)
318 drm_gem_object_reference(&obj
->base
);
322 __attribute__((nonnull
))
324 i915_gem_object_put(struct drm_i915_gem_object
*obj
)
326 __drm_gem_object_unreference(&obj
->base
);
329 static inline void i915_gem_object_lock(struct drm_i915_gem_object
*obj
)
331 reservation_object_lock(obj
->resv
, NULL
);
334 static inline void i915_gem_object_unlock(struct drm_i915_gem_object
*obj
)
336 reservation_object_unlock(obj
->resv
);
340 i915_gem_object_has_struct_page(const struct drm_i915_gem_object
*obj
)
342 return obj
->ops
->flags
& I915_GEM_OBJECT_HAS_STRUCT_PAGE
;
346 i915_gem_object_is_shrinkable(const struct drm_i915_gem_object
*obj
)
348 return obj
->ops
->flags
& I915_GEM_OBJECT_IS_SHRINKABLE
;
352 i915_gem_object_is_active(const struct drm_i915_gem_object
*obj
)
354 return obj
->active_count
;
358 i915_gem_object_has_active_reference(const struct drm_i915_gem_object
*obj
)
360 return test_bit(I915_BO_ACTIVE_REF
, &obj
->flags
);
364 i915_gem_object_set_active_reference(struct drm_i915_gem_object
*obj
)
366 lockdep_assert_held(&obj
->base
.dev
->struct_mutex
);
367 __set_bit(I915_BO_ACTIVE_REF
, &obj
->flags
);
371 i915_gem_object_clear_active_reference(struct drm_i915_gem_object
*obj
)
373 lockdep_assert_held(&obj
->base
.dev
->struct_mutex
);
374 __clear_bit(I915_BO_ACTIVE_REF
, &obj
->flags
);
377 void __i915_gem_object_release_unless_active(struct drm_i915_gem_object
*obj
);
380 i915_gem_object_is_framebuffer(const struct drm_i915_gem_object
*obj
)
382 return READ_ONCE(obj
->framebuffer_references
);
385 static inline unsigned int
386 i915_gem_object_get_tiling(struct drm_i915_gem_object
*obj
)
388 return obj
->tiling_and_stride
& TILING_MASK
;
392 i915_gem_object_is_tiled(struct drm_i915_gem_object
*obj
)
394 return i915_gem_object_get_tiling(obj
) != I915_TILING_NONE
;
397 static inline unsigned int
398 i915_gem_object_get_stride(struct drm_i915_gem_object
*obj
)
400 return obj
->tiling_and_stride
& STRIDE_MASK
;
403 static inline unsigned int
404 i915_gem_tile_height(unsigned int tiling
)
407 return tiling
== I915_TILING_Y
? 32 : 8;
410 static inline unsigned int
411 i915_gem_object_get_tile_height(struct drm_i915_gem_object
*obj
)
413 return i915_gem_tile_height(i915_gem_object_get_tiling(obj
));
416 static inline unsigned int
417 i915_gem_object_get_tile_row_size(struct drm_i915_gem_object
*obj
)
419 return (i915_gem_object_get_stride(obj
) *
420 i915_gem_object_get_tile_height(obj
));
423 int i915_gem_object_set_tiling(struct drm_i915_gem_object
*obj
,
424 unsigned int tiling
, unsigned int stride
);
426 static inline struct intel_engine_cs
*
427 i915_gem_object_last_write_engine(struct drm_i915_gem_object
*obj
)
429 struct intel_engine_cs
*engine
= NULL
;
430 struct dma_fence
*fence
;
433 fence
= reservation_object_get_excl_rcu(obj
->resv
);
436 if (fence
&& dma_fence_is_i915(fence
) && !dma_fence_is_signaled(fence
))
437 engine
= to_request(fence
)->engine
;
438 dma_fence_put(fence
);
443 void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object
*obj
,
444 unsigned int cache_level
);
445 void i915_gem_object_flush_if_display(struct drm_i915_gem_object
*obj
);