sys/bus/mmc/mmcreg.h

   1 /*-
   2  * Copyright (c) 2006 M. Warner Losh.  All rights reserved.
   3  * Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  20  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  21  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  * Portions of this software may have been developed with reference to
  26  * the SD Simplified Specification.  The following disclaimer may apply:
  27  *
  28  * The following conditions apply to the release of the simplified
  29  * specification ("Simplified Specification") by the SD Card Association and
  30  * the SD Group. The Simplified Specification is a subset of the complete SD
  31  * Specification which is owned by the SD Card Association and the SD
  32  * Group. This Simplified Specification is provided on a non-confidential
  33  * basis subject to the disclaimers below. Any implementation of the
  34  * Simplified Specification may require a license from the SD Card
  35  * Association, SD Group, SD-3C LLC or other third parties.
  36  *
  37  * Disclaimers:
  38  *
  39  * The information contained in the Simplified Specification is presented only
  40  * as a standard specification for SD Cards and SD Host/Ancillary products and
  41  * is provided "AS-IS" without any representations or warranties of any
  42  * kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
  43  * Card Association for any damages, any infringements of patents or other
  44  * right of the SD Group, SD-3C LLC, the SD Card Association or any third
  45  * parties, which may result from its use. No license is granted by
  46  * implication, estoppel or otherwise under any patent or other rights of the
  47  * SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
  48  * herein shall be construed as an obligation by the SD Group, the SD-3C LLC
  49  * or the SD Card Association to disclose or distribute any technical
  50  * information, know-how or other confidential information to any third party.
  51  *
  52  * $FreeBSD: src/sys/dev/mmc/mmcreg.h,v 1.8 2009/02/03 04:28:45 imp Exp $
  53  */
  54
  55 #ifndef BUS_MMC_MMCREG_H
  56 #define BUS_MMC_MMCREG_H
  57
  58 /*
  59  * This file contains the register definitions for the mmc and sd busses.
  60  * They are taken from publicly available sources.
  61  */
  62
  63 struct mmc_data;
  64 struct mmc_request;
  65
  66 struct mmc_command {
  67         uint32_t        opcode;
  68         uint32_t        arg;
  69         uint32_t        resp[4];
  70         uint32_t        flags;          /* Expected responses */
  71 #define MMC_RSP_PRESENT (1ul << 0)      /* Response */
  72 #define MMC_RSP_136     (1ul << 1)      /* 136 bit response */
  73 #define MMC_RSP_CRC     (1ul << 2)      /* Expect valid crc */
  74 #define MMC_RSP_BUSY    (1ul << 3)      /* Card may send busy */
  75 #define MMC_RSP_OPCODE  (1ul << 4)      /* Response include opcode */
  76 #define MMC_RSP_MASK    0x1ful
  77 #define MMC_CMD_AC      (0ul << 5)      /* Addressed Command, no data */
  78 #define MMC_CMD_ADTC    (1ul << 5)      /* Addressed Data transfer cmd */
  79 #define MMC_CMD_BC      (2ul << 5)      /* Broadcast command, no response */
  80 #define MMC_CMD_BCR     (3ul << 5)      /* Broadcast command with response */
  81 #define MMC_CMD_MASK    (3ul << 5)
  82
  83 /* Possible response types defined in the standard: */
  84 #define MMC_RSP_NONE    (0)
  85 #define MMC_RSP_R1      (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE)
  86 #define MMC_RSP_R1B     (MMC_RSP_PRESENT | MMC_RSP_CRC | MMC_RSP_OPCODE | MMC_RSP_BUSY)
  87 #define MMC_RSP_R2      (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC)
  88 #define MMC_RSP_R3      (MMC_RSP_PRESENT)
  89 #define MMC_RSP_R6      (MMC_RSP_PRESENT | MMC_RSP_CRC)
  90 #define MMC_RSP_R7      (MMC_RSP_PRESENT | MMC_RSP_CRC)
  91 #define MMC_RSP(x)      ((x) & MMC_RSP_MASK)
  92         uint32_t        retries;
  93         uint32_t        error;
  94 #define MMC_ERR_NONE    0
  95 #define MMC_ERR_TIMEOUT 1
  96 #define MMC_ERR_BADCRC  2
  97 #define MMC_ERR_FIFO    3
  98 #define MMC_ERR_FAILED  4
  99 #define MMC_ERR_INVALID 5
 100 #define MMC_ERR_NO_MEMORY 6
 101 #define MMC_ERR_MAX     6
 102         struct mmc_data *data;          /* Data segment with cmd */
 103         struct mmc_request *mrq;        /* backpointer to request */
 104 };
 105
 106 /*
 107  * R1 responses
 108  *
 109  * Types (per SD 2.0 standard)
 110  *      e : error bit
 111  *      s : status bit
 112  *      r : detected and set for the actual command response
 113  *      x : Detected and set during command execution.  The host can get
 114  *          the status by issuing a command with R1 response.
 115  *
 116  * Clear Condition (per SD 2.0 standard)
 117  *      a : according to the card current state.
 118  *      b : always related to the previous command.  reception of a valid
 119  *          command will clear it (with a delay of one command).
 120  *      c : clear by read
 121  */
 122 #define R1_OUT_OF_RANGE (1u << 31)              /* erx, c */
 123 #define R1_ADDRESS_ERROR (1u << 30)             /* erx, c */
 124 #define R1_BLOCK_LEN_ERROR (1u << 29)           /* erx, c */
 125 #define R1_ERASE_SEQ_ERROR (1u << 28)           /* er, c */
 126 #define R1_ERASE_PARAM (1u << 27)               /* erx, c */
 127 #define R1_WP_VIOLATION (1u << 26)              /* erx, c */
 128 #define R1_CARD_IS_LOCKED (1u << 25)            /* sx, a */
 129 #define R1_LOCK_UNLOCK_FAILED (1u << 24)        /* erx, c */
 130 #define R1_COM_CRC_ERROR (1u << 23)             /* er, b */
 131 #define R1_ILLEGAL_COMMAND (1u << 22)           /* er, b */
 132 #define R1_CARD_ECC_FAILED (1u << 21)           /* erx, c */
 133 #define R1_CC_ERROR (1u << 20)                  /* erx, c */
 134 #define R1_ERROR (1u << 19)                     /* erx, c */
 135 #define R1_CSD_OVERWRITE (1u << 16)             /* erx, c */
 136 #define R1_WP_ERASE_SKIP (1u << 15)             /* erx, c */
 137 #define R1_CARD_ECC_DISABLED (1u << 14)         /* sx, a */
 138 #define R1_ERASE_RESET (1u << 13)               /* sr, c */
 139 #define R1_CURRENT_STATE_MASK (0xfu << 9)       /* sx, b */
 140 #define R1_READY_FOR_DATA (1u << 8)             /* sx, a */
 141 #define R1_SWITCH_ERROR (1u << 7)               /* sx, c */
 142 #define R1_APP_CMD (1u << 5)                    /* sr, c */
 143 #define R1_AKE_SEQ_ERROR (1u << 3)              /* er, c */
 144 #define R1_STATUS(x)            ((x) & 0xFFFFE000)
 145 #define R1_CURRENT_STATE(x)     (((x) & R1_CURRENT_STATE_MASK) >> 9)
 146 #define R1_STATE_IDLE   0
 147 #define R1_STATE_READY  1
 148 #define R1_STATE_IDENT  2
 149 #define R1_STATE_STBY   3
 150 #define R1_STATE_TRAN   4
 151 #define R1_STATE_DATA   5
 152 #define R1_STATE_RCV    6
 153 #define R1_STATE_PRG    7
 154 #define R1_STATE_DIS    8
 155
 156 struct mmc_data {
 157         size_t len;             /* size of the data */
 158         size_t xfer_len;
 159         void *data;             /* data buffer */
 160         uint32_t        flags;
 161 #define MMC_DATA_WRITE  (1UL << 0)
 162 #define MMC_DATA_READ   (1UL << 1)
 163 #define MMC_DATA_STREAM (1UL << 2)
 164 #define MMC_DATA_MULTI  (1UL << 3)
 165         struct mmc_request *mrq;
 166 };
 167
 168 struct mmc_request {
 169         struct mmc_command *cmd;
 170         struct mmc_command *stop;
 171         void (*done)(struct mmc_request *); /* Completion function */
 172         void *done_data;                /* requestor set data */
 173         uint32_t flags;
 174 #define MMC_REQ_DONE    1
 175 };
 176
 177 /* Command definitions */
 178
 179 /* Class 0 and 1: Basic commands & read stream commands */
 180 #define MMC_GO_IDLE_STATE       0
 181 #define MMC_SEND_OP_COND        1
 182 #define MMC_ALL_SEND_CID        2
 183 #define MMC_SET_RELATIVE_ADDR   3
 184 #define SD_SEND_RELATIVE_ADDR   3
 185 #define MMC_SET_DSR             4
 186 #define MMC_SLEEP_AWAKE         5
 187 #define MMC_SWITCH_FUNC         6
 188 #define  MMC_SWITCH_FUNC_CMDS    0
 189 #define  MMC_SWITCH_FUNC_SET     1
 190 #define  MMC_SWITCH_FUNC_CLR     2
 191 #define  MMC_SWITCH_FUNC_WR      3
 192 #define MMC_SELECT_CARD         7
 193 #define MMC_DESELECT_CARD       7
 194 #define MMC_SEND_EXT_CSD        8
 195 #define SD_SEND_IF_COND         8
 196 #define MMC_SEND_CSD            9
 197 #define MMC_SEND_CID            10
 198 #define MMC_READ_DAT_UNTIL_STOP 11
 199 #define MMC_STOP_TRANSMISSION   12
 200 #define MMC_SEND_STATUS         13
 201 #define MMC_BUSTEST_R           14
 202 #define MMC_GO_INACTIVE_STATE   15
 203 #define MMC_BUSTEST_W           19
 204
 205 /* Class 2: Block oriented read commands */
 206 #define MMC_SET_BLOCKLEN        16
 207 #define MMC_READ_SINGLE_BLOCK   17
 208 #define MMC_READ_MULTIPLE_BLOCK 18
 209 #define MMC_SEND_TUNING_BLOCK   19
 210 #define MMC_SEND_TUNING_BLOCK_HS200 21
 211
 212 /* Class 3: Stream write commands */
 213 #define MMC_WRITE_DAT_UNTIL_STOP 20
 214                         /* reserved: 22 */
 215
 216 /* Class 4: Block oriented write commands */
 217 #define MMC_SET_BLOCK_COUNT     23
 218 #define MMC_WRITE_BLOCK         24
 219 #define MMC_WRITE_MULTIPLE_BLOCK 25
 220 #define MMC_PROGARM_CID         26
 221 #define MMC_PROGRAM_CSD         27
 222
 223 /* Class 6: Block oriented write protection commands */
 224 #define MMC_SET_WRITE_PROT      28
 225 #define MMC_CLR_WRITE_PROT      29
 226 #define MMC_SEND_WRITE_PROT     30
 227                         /* reserved: 31 */
 228
 229 /* Class 5: Erase commands */
 230 #define SD_ERASE_WR_BLK_START   32
 231 #define SD_ERASE_WR_BLK_END     33
 232                         /* 34 -- reserved old command */
 233 #define MMC_ERASE_GROUP_START   35
 234 #define MMC_ERASE_GROUP_END     36
 235                         /* 37 -- reserved old command */
 236 #define MMC_ERASE               38
 237
 238 /* Class 9: I/O mode commands */
 239 #define MMC_FAST_IO             39
 240 #define MMC_GO_IRQ_STATE        40
 241                         /* reserved: 41 */
 242
 243 /* Class 7: Lock card */
 244 #define MMC_LOCK_UNLOCK         42
 245                         /* reserved: 43 */
 246                         /* reserved: 44 */
 247                         /* reserved: 45 */
 248                         /* reserved: 46 */
 249                         /* reserved: 47 */
 250                         /* reserved: 48 */
 251                         /* reserved: 49 */
 252                         /* reserved: 50 */
 253                         /* reserved: 51 */
 254                         /* reserved: 54 */
 255
 256 /* Class 8: Application specific commands */
 257 #define MMC_APP_CMD             55
 258 #define MMC_GEN_CMD             56
 259                         /* reserved: 57 */
 260                         /* reserved: 58 */
 261                         /* reserved: 59 */
 262                         /* reserved for mfg: 60 */
 263                         /* reserved for mfg: 61 */
 264                         /* reserved for mfg: 62 */
 265                         /* reserved for mfg: 63 */
 266
 267 /* Class 9: I/O cards (sd) */
 268 #define SD_IO_RW_DIRECT         52
 269 #define SD_IO_RW_EXTENDED       53
 270
 271 /* Class 10: Switch function commands */
 272 #define SD_SWITCH_FUNC          6
 273                         /* reserved: 34 */
 274                         /* reserved: 35 */
 275                         /* reserved: 36 */
 276                         /* reserved: 37 */
 277                         /* reserved: 50 */
 278                         /* reserved: 57 */
 279
 280 /* Application specific commands for SD */
 281 #define ACMD_SET_BUS_WIDTH      6
 282 #define ACMD_SD_STATUS          13
 283 #define ACMD_SEND_NUM_WR_BLOCKS 22
 284 #define ACMD_SET_WR_BLK_ERASE_COUNT 23
 285 #define ACMD_SD_SEND_OP_COND    41
 286 #define ACMD_SET_CLR_CARD_DETECT 42
 287 #define ACMD_SEND_SCR           51
 288
 289 /*
 290  * EXT_CSD fields
 291  */
 292 #define EXT_CSD_EXT_PART_ATTR   52      /* R/W, 2 bytes */
 293 #define EXT_CSD_ENH_START_ADDR  136     /* R/W, 4 bytes */
 294 #define EXT_CSD_ENH_SIZE_MULT   140     /* R/W, 3 bytes */
 295 #define EXT_CSD_GP_SIZE_MULT    143     /* R/W, 12 bytes */
 296 #define EXT_CSD_PART_SET        155     /* R/W */
 297 #define EXT_CSD_PART_ATTR       156     /* R/W */
 298 #define EXT_CSD_PART_SUPPORT    160     /* RO */
 299 #define EXT_CSD_RPMB_MULT       168     /* RO */
 300 #define EXT_CSD_BOOT_WP_STATUS  174     /* RO */
 301 #define EXT_CSD_ERASE_GRP_DEF   175     /* R/W */
 302 #define EXT_CSD_PART_CONFIG     179     /* R/W */
 303 #define EXT_CSD_BUS_WIDTH       183     /* R/W */
 304 #define EXT_CSD_STROBE_SUPPORT  184     /* RO */
 305 #define EXT_CSD_HS_TIMING       185     /* R/W */
 306 #define EXT_CSD_POWER_CLASS     187     /* R/W */
 307 #define EXT_CSD_CARD_TYPE       196     /* RO */
 308 #define EXT_CSD_DRIVER_STRENGTH 197     /* RO */
 309 #define EXT_CSD_REV             192     /* RO */
 310 #define EXT_CSD_PART_SWITCH_TO  199     /* RO */
 311 #define EXT_CSD_PWR_CL_52_195   200     /* RO */
 312 #define EXT_CSD_PWR_CL_26_195   201     /* RO */
 313 #define EXT_CSD_PWR_CL_52_360   202     /* RO */
 314 #define EXT_CSD_PWR_CL_26_360   203     /* RO */
 315 #define EXT_CSD_SEC_CNT         212     /* RO, 4 bytes */
 316 #define EXT_CSD_HC_WP_GRP_SIZE  221     /* RO */
 317 #define EXT_CSD_ERASE_TO_MULT   223     /* RO */
 318 #define EXT_CSD_ERASE_GRP_SIZE  224     /* RO */
 319 #define EXT_CSD_BOOT_SIZE_MULT  226     /* RO */
 320 #define EXT_CSD_PWR_CL_200_195  236     /* RO */
 321 #define EXT_CSD_PWR_CL_200_360  237     /* RO */
 322 #define EXT_CSD_PWR_CL_52_195_DDR 238   /* RO */
 323 #define EXT_CSD_PWR_CL_52_360_DDR 239   /* RO */
 324 #define EXT_CSD_GEN_CMD6_TIME   248     /* RO */
 325 #define EXT_CSD_PWR_CL_200_360_DDR 253  /* RO */
 326
 327 /*
 328  * EXT_CSD field definitions
 329  */
 330 #define EXT_CSD_EXT_PART_ATTR_DEFAULT           0x0
 331 #define EXT_CSD_EXT_PART_ATTR_SYSTEMCODE        0x1
 332 #define EXT_CSD_EXT_PART_ATTR_NPERSISTENT       0x2
 333
 334 #define EXT_CSD_PART_SET_COMPLETED              0x01
 335
 336 #define EXT_CSD_PART_ATTR_ENH_USR               0x01
 337 #define EXT_CSD_PART_ATTR_ENH_GP0               0x02
 338 #define EXT_CSD_PART_ATTR_ENH_GP1               0x04
 339 #define EXT_CSD_PART_ATTR_ENH_GP2               0x08
 340 #define EXT_CSD_PART_ATTR_ENH_GP3               0x10
 341 #define EXT_CSD_PART_ATTR_ENH_MASK              0x1f
 342
 343 #define EXT_CSD_PART_SUPPORT_EN                 0x01
 344 #define EXT_CSD_PART_SUPPORT_ENH_ATTR_EN        0x02
 345 #define EXT_CSD_PART_SUPPORT_EXT_ATTR_EN        0x04
 346
 347 #define EXT_CSD_BOOT_WP_STATUS_BOOT0_PWR        0x01
 348 #define EXT_CSD_BOOT_WP_STATUS_BOOT0_PERM       0x02
 349 #define EXT_CSD_BOOT_WP_STATUS_BOOT0_MASK       0x03
 350 #define EXT_CSD_BOOT_WP_STATUS_BOOT1_PWR        0x04
 351 #define EXT_CSD_BOOT_WP_STATUS_BOOT1_PERM       0x08
 352 #define EXT_CSD_BOOT_WP_STATUS_BOOT1_MASK       0x0c
 353
 354 #define EXT_CSD_ERASE_GRP_DEF_EN        0x01
 355
 356 #define EXT_CSD_PART_CONFIG_ACC_DEFAULT 0x00
 357 #define EXT_CSD_PART_CONFIG_ACC_BOOT0   0x01
 358 #define EXT_CSD_PART_CONFIG_ACC_BOOT1   0x02
 359 #define EXT_CSD_PART_CONFIG_ACC_RPMB    0x03
 360 #define EXT_CSD_PART_CONFIG_ACC_GP0     0x04
 361 #define EXT_CSD_PART_CONFIG_ACC_GP1     0x05
 362 #define EXT_CSD_PART_CONFIG_ACC_GP2     0x06
 363 #define EXT_CSD_PART_CONFIG_ACC_GP3     0x07
 364 #define EXT_CSD_PART_CONFIG_ACC_MASK    0x07
 365 #define EXT_CSD_PART_CONFIG_BOOT0       0x08
 366 #define EXT_CSD_PART_CONFIG_BOOT1       0x10
 367 #define EXT_CSD_PART_CONFIG_BOOT_USR    0x38
 368 #define EXT_CSD_PART_CONFIG_BOOT_MASK   0x38
 369
 370 #define EXT_CSD_CMD_SET_NORMAL          1
 371 #define EXT_CSD_CMD_SET_SECURE          2
 372 #define EXT_CSD_CMD_SET_CPSECURE        4
 373
 374 #define EXT_CSD_HS_TIMING_BC            0
 375 #define EXT_CSD_HS_TIMING_HS            1
 376 #define EXT_CSD_HS_TIMING_DDR200                2
 377 #define EXT_CSD_HS_TIMING_DDR400                3
 378 #define EXT_CSD_HS_TIMING_DRV_STR_SHIFT 4
 379
 380 #define EXT_CSD_POWER_CLASS_8BIT_MASK   0xf0
 381 #define EXT_CSD_POWER_CLASS_8BIT_SHIFT  4
 382 #define EXT_CSD_POWER_CLASS_4BIT_MASK   0x0f
 383 #define EXT_CSD_POWER_CLASS_4BIT_SHIFT  0
 384
 385 #define EXT_CSD_CARD_TYPE_HS_26         0x0001
 386 #define EXT_CSD_CARD_TYPE_HS_52         0x0002
 387 #define EXT_CSD_CARD_TYPE_DDR_52_1_8V   0x0004
 388 #define EXT_CSD_CARD_TYPE_DDR_52_1_2V   0x0008
 389 #define EXT_CSD_CARD_TYPE_HS200_1_8V    0x0010
 390 #define EXT_CSD_CARD_TYPE_HS200_1_2V    0x0020
 391 #define EXT_CSD_CARD_TYPE_HS400_1_8V    0x0040
 392 #define EXT_CSD_CARD_TYPE_HS400_1_2V    0x0080
 393 #define EXT_CSD_CARD_TYPE_HS400ES       0x0100
 394
 395 #define EXT_CSD_BUS_WIDTH_1     0
 396 #define EXT_CSD_BUS_WIDTH_4     1
 397 #define EXT_CSD_BUS_WIDTH_8     2
 398 #define EXT_CSD_BUS_WIDTH_4_DDR 5
 399 #define EXT_CSD_BUS_WIDTH_8_DDR 6
 400 #define EXT_CSD_BUS_WIDTH_ES    0x80
 401
 402 #define MMC_TYPE_HS_26_MAX              26000000
 403 #define MMC_TYPE_HS_52_MAX              52000000
 404 #define MMC_TYPE_DDR52_MAX              52000000
 405 #define MMC_TYPE_HS200_HS400ES_MAX      200000000
 406
 407 /*
 408  * SD bus widths
 409  */
 410 #define SD_BUS_WIDTH_1          0
 411 #define SD_BUS_WIDTH_4          2
 412
 413 /*
 414  * SD Switch
 415  */
 416 #define SD_SWITCH_MODE_CHECK    0
 417 #define SD_SWITCH_MODE_SET      1
 418 #define SD_SWITCH_GROUP1        0
 419 #define SD_SWITCH_NORMAL_MODE   0
 420 #define SD_SWITCH_HS_MODE       1
 421 #define SD_SWITCH_SDR50_MODE    2
 422 #define SD_SWITCH_SDR104_MODE   3
 423 #define SD_SWITCH_DDR50         4
 424 #define SD_SWITCH_NOCHANGE      0xF
 425
 426 #define SD_CLR_CARD_DETECT      0
 427 #define SD_SET_CARD_DETECT      1
 428
 429 #define SD_HS_MAX               50000000
 430 #define SD_DDR50_MAX            50000000
 431 #define SD_SDR12_MAX            25000000
 432 #define SD_SDR25_MAX            50000000
 433 #define SD_SDR50_MAX            100000000
 434 #define SD_SDR104_MAX           208000000
 435
 436 /* Specifications require 400 kHz max. during ID phase. */
 437 #define SD_MMC_CARD_ID_FREQUENCY        400000
 438
 439 /* OCR bits */
 440
 441 /*
 442  * in SD 2.0 spec, bits 8-14 are now marked reserved
 443  * Low voltage in SD2.0 spec is bit 7, TBD voltage
 444  * Low voltage in MMC 3.31 spec is bit 7, 1.65-1.95V
 445  * Specs prior to  MMC 3.31 defined bits 0-7 as voltages down to 1.5V.
 446  * 3.31 redefined them to be reserved and also said that cards had to
 447  * support the 2.7-3.6V and fixed the OCR to be 0xfff8000 for high voltage
 448  * cards.  MMC 4.0 says that a dual voltage card responds with 0xfff8080.
 449  * Looks like the fine-grained control of the voltage tolerance ranges
 450  * was abandoned.
 451  *
 452  * The MMC_OCR_CCS appears to be valid for only SD cards.
 453  */
 454 #define MMC_OCR_VOLTAGE 0x3fffffffU     /* Vdd Voltage mask */
 455 #define MMC_OCR_MIN_VOLTAGE_SHIFT       7
 456 #define MMC_OCR_LOW_VOLTAGE (1u << 7)   /* Low Voltage Range -- tbd */
 457 #define MMC_OCR_200_210 (1U << 8)       /* Vdd voltage 2.00 ~ 2.10 */
 458 #define MMC_OCR_210_220 (1U << 9)       /* Vdd voltage 2.10 ~ 2.20 */
 459 #define MMC_OCR_220_230 (1U << 10)      /* Vdd voltage 2.20 ~ 2.30 */
 460 #define MMC_OCR_230_240 (1U << 11)      /* Vdd voltage 2.30 ~ 2.40 */
 461 #define MMC_OCR_240_250 (1U << 12)      /* Vdd voltage 2.40 ~ 2.50 */
 462 #define MMC_OCR_250_260 (1U << 13)      /* Vdd voltage 2.50 ~ 2.60 */
 463 #define MMC_OCR_260_270 (1U << 14)      /* Vdd voltage 2.60 ~ 2.70 */
 464 #define MMC_OCR_270_280 (1U << 15)      /* Vdd voltage 2.70 ~ 2.80 */
 465 #define MMC_OCR_280_290 (1U << 16)      /* Vdd voltage 2.80 ~ 2.90 */
 466 #define MMC_OCR_290_300 (1U << 17)      /* Vdd voltage 2.90 ~ 3.00 */
 467 #define MMC_OCR_300_310 (1U << 18)      /* Vdd voltage 3.00 ~ 3.10 */
 468 #define MMC_OCR_310_320 (1U << 19)      /* Vdd voltage 3.10 ~ 3.20 */
 469 #define MMC_OCR_320_330 (1U << 20)      /* Vdd voltage 3.20 ~ 3.30 */
 470 #define MMC_OCR_330_340 (1U << 21)      /* Vdd voltage 3.30 ~ 3.40 */
 471 #define MMC_OCR_340_350 (1U << 22)      /* Vdd voltage 3.40 ~ 3.50 */
 472 #define MMC_OCR_350_360 (1U << 23)      /* Vdd voltage 3.50 ~ 3.60 */
 473 #define MMC_OCR_MAX_VOLTAGE_SHIFT       23
 474 #define MMC_OCR_S18R    (1U << 24)      /* Switching to 1.8 V requested (SD) */
 475 #define MMC_OCR_S18A    MMC_OCR_S18R    /* Switching to 1.8 V accepted (SD) */
 476 #define MMC_OCR_XPC     (1U << 28)      /* SDXC Power Control */
 477 #define MMC_OCR_ACCESS_MODE_BYTE (0U << 29) /* Access Mode Byte (MMC) */
 478 #define MMC_OCR_ACCESS_MODE_SECT (1U << 29) /* Access Mode Sector (MMC) */
 479 #define MMC_OCR_ACCESS_MODE_MASK (3U << 29)
 480 #define MMC_OCR_CCS     (1u << 30)      /* Card Capacity status (SD vs SDHC) */
 481 #define MMC_OCR_CARD_BUSY (1U << 31)    /* Card Power up status */
 482
 483 /* CSD -- decoded structure */
 484 struct mmc_cid {
 485         uint32_t mid;
 486         char pnm[8];
 487         uint32_t psn;
 488         uint16_t oid;
 489         uint16_t mdt_year;
 490         uint8_t mdt_month;
 491         uint8_t prv;
 492         uint8_t fwrev;
 493 };
 494
 495 struct mmc_csd
 496 {
 497         uint8_t csd_structure;
 498         uint8_t spec_vers;
 499         uint16_t ccc;
 500         uint16_t tacc;
 501         uint32_t nsac;
 502         uint32_t r2w_factor;
 503         uint32_t tran_speed;
 504         uint32_t read_bl_len;
 505         uint32_t write_bl_len;
 506         uint32_t vdd_r_curr_min;
 507         uint32_t vdd_r_curr_max;
 508         uint32_t vdd_w_curr_min;
 509         uint32_t vdd_w_curr_max;
 510         uint32_t wp_grp_size;
 511         uint32_t erase_sector;
 512         uint64_t capacity;
 513         unsigned int read_bl_partial:1,
 514             read_blk_misalign:1,
 515             write_bl_partial:1,
 516             write_blk_misalign:1,
 517             dsr_imp:1,
 518             erase_blk_en:1,
 519             wp_grp_enable:1;
 520 };
 521
 522 struct mmc_scr
 523 {
 524         unsigned char           sda_vsn;
 525         unsigned char           bus_widths;
 526 #define SD_SCR_BUS_WIDTH_1      (1<<0)
 527 #define SD_SCR_BUS_WIDTH_4      (1<<2)
 528 };
 529
 530 struct mmc_sd_status
 531 {
 532         uint8_t                 bus_width;
 533         uint8_t                 secured_mode;
 534         uint16_t                card_type;
 535         uint16_t                prot_area;
 536         uint8_t                 speed_class;
 537         uint8_t                 perf_move;
 538         uint8_t                 au_size;
 539         uint16_t                erase_size;
 540         uint8_t                 erase_timeout;
 541         uint8_t                 erase_offset;
 542 };
 543
 544 /*
 545  * Various MMC/SD constants
 546  */
 547 #define MMC_BOOT_RPMB_BLOCK_SIZE        (128 * 1024)
 548
 549 #define MMC_EXTCSD_SIZE 512
 550
 551 #define MMC_PART_GP_MAX 4
 552 #define MMC_PART_MAX    8
 553
 554 /*
 555  * Older versions of the MMC standard had a variable sector size.  However,
 556  * I've been able to find no old MMC or SD cards that have a non 512
 557  * byte sector size anywhere, so we assume that such cards are very rare
 558  * and only note their existance in passing here...
 559  */
 560 #define MMC_SECTOR_SIZE 512
 561
 562 #endif /* BUS_MMCREG_H */