rtld - do not allow both dynamic DTV index and static TLS offset
[dragonfly.git] / contrib / binutils-2.27 / elfcpp / tilegx.h
blob7abe38b90885032130ac27c2f8b4dc3260e08d0b
1 // tilegx.h -- ELF definitions specific to EM_TILEGX -*- C++ -*-
3 // Copyright (C) 2012-2016 Free Software Foundation, Inc.
4 // Written by Jiong Wang (jiwang@tilera.com)
6 // This file is part of elfcpp.
8 // This program is free software; you can redistribute it and/or
9 // modify it under the terms of the GNU Library General Public License
10 // as published by the Free Software Foundation; either version 2, or
11 // (at your option) any later version.
13 // In addition to the permissions in the GNU Library General Public
14 // License, the Free Software Foundation gives you unlimited
15 // permission to link the compiled version of this file into
16 // combinations with other programs, and to distribute those
17 // combinations without any restriction coming from the use of this
18 // file. (The Library Public License restrictions do apply in other
19 // respects; for example, they cover modification of the file, and
20 /// distribution when not linked into a combined executable.)
22 // This program is distributed in the hope that it will be useful, but
23 // WITHOUT ANY WARRANTY; without even the implied warranty of
24 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 // Library General Public License for more details.
27 // You should have received a copy of the GNU Library General Public
28 // License along with this program; if not, write to the Free Software
29 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
30 // 02110-1301, USA.
32 #ifndef ELFCPP_TILEGX_H
33 #define ELFCPP_TILEGX_H
35 namespace elfcpp
38 // Documentation is taken from
39 // http://www.tilera.com/scm/docs/index.html
41 enum
43 R_TILEGX_NONE = 0,
44 R_TILEGX_64 = 1,
45 R_TILEGX_32 = 2,
46 R_TILEGX_16 = 3,
47 R_TILEGX_8 = 4,
48 R_TILEGX_64_PCREL = 5,
49 R_TILEGX_32_PCREL = 6,
50 R_TILEGX_16_PCREL = 7,
51 R_TILEGX_8_PCREL = 8,
52 R_TILEGX_HW0 = 9,
53 R_TILEGX_HW1 = 10,
54 R_TILEGX_HW2 = 11,
55 R_TILEGX_HW3 = 12,
56 R_TILEGX_HW0_LAST = 13,
57 R_TILEGX_HW1_LAST = 14,
58 R_TILEGX_HW2_LAST = 15,
59 R_TILEGX_COPY = 16,
60 R_TILEGX_GLOB_DAT = 17,
61 R_TILEGX_JMP_SLOT = 18,
62 R_TILEGX_RELATIVE = 19,
63 R_TILEGX_BROFF_X1 = 20,
64 R_TILEGX_JUMPOFF_X1 = 21,
65 R_TILEGX_JUMPOFF_X1_PLT = 22,
66 R_TILEGX_IMM8_X0 = 23,
67 R_TILEGX_IMM8_Y0 = 24,
68 R_TILEGX_IMM8_X1 = 25,
69 R_TILEGX_IMM8_Y1 = 26,
70 R_TILEGX_DEST_IMM8_X1 = 27,
71 R_TILEGX_MT_IMM14_X1 = 28,
72 R_TILEGX_MF_IMM14_X1 = 29,
73 R_TILEGX_MMSTART_X0 = 30,
74 R_TILEGX_MMEND_X0 = 31,
75 R_TILEGX_SHAMT_X0 = 32,
76 R_TILEGX_SHAMT_X1 = 33,
77 R_TILEGX_SHAMT_Y0 = 34,
78 R_TILEGX_SHAMT_Y1 = 35,
79 R_TILEGX_IMM16_X0_HW0 = 36,
80 R_TILEGX_IMM16_X1_HW0 = 37,
81 R_TILEGX_IMM16_X0_HW1 = 38,
82 R_TILEGX_IMM16_X1_HW1 = 39,
83 R_TILEGX_IMM16_X0_HW2 = 40,
84 R_TILEGX_IMM16_X1_HW2 = 41,
85 R_TILEGX_IMM16_X0_HW3 = 42,
86 R_TILEGX_IMM16_X1_HW3 = 43,
87 R_TILEGX_IMM16_X0_HW0_LAST = 44,
88 R_TILEGX_IMM16_X1_HW0_LAST = 45,
89 R_TILEGX_IMM16_X0_HW1_LAST = 46,
90 R_TILEGX_IMM16_X1_HW1_LAST = 47,
91 R_TILEGX_IMM16_X0_HW2_LAST = 48,
92 R_TILEGX_IMM16_X1_HW2_LAST = 49,
93 R_TILEGX_IMM16_X0_HW0_PCREL = 50,
94 R_TILEGX_IMM16_X1_HW0_PCREL = 51,
95 R_TILEGX_IMM16_X0_HW1_PCREL = 52,
96 R_TILEGX_IMM16_X1_HW1_PCREL = 53,
97 R_TILEGX_IMM16_X0_HW2_PCREL = 54,
98 R_TILEGX_IMM16_X1_HW2_PCREL = 55,
99 R_TILEGX_IMM16_X0_HW3_PCREL = 56,
100 R_TILEGX_IMM16_X1_HW3_PCREL = 57,
101 R_TILEGX_IMM16_X0_HW0_LAST_PCREL = 58,
102 R_TILEGX_IMM16_X1_HW0_LAST_PCREL = 59,
103 R_TILEGX_IMM16_X0_HW1_LAST_PCREL = 60,
104 R_TILEGX_IMM16_X1_HW1_LAST_PCREL = 61,
105 R_TILEGX_IMM16_X0_HW2_LAST_PCREL = 62,
106 R_TILEGX_IMM16_X1_HW2_LAST_PCREL = 63,
107 R_TILEGX_IMM16_X0_HW0_GOT = 64,
108 R_TILEGX_IMM16_X1_HW0_GOT = 65,
110 R_TILEGX_IMM16_X0_HW0_PLT_PCREL = 66,
111 R_TILEGX_IMM16_X1_HW0_PLT_PCREL = 67,
112 R_TILEGX_IMM16_X0_HW1_PLT_PCREL = 68,
113 R_TILEGX_IMM16_X1_HW1_PLT_PCREL = 69,
114 R_TILEGX_IMM16_X0_HW2_PLT_PCREL = 70,
115 R_TILEGX_IMM16_X1_HW2_PLT_PCREL = 71,
117 R_TILEGX_IMM16_X0_HW0_LAST_GOT = 72,
118 R_TILEGX_IMM16_X1_HW0_LAST_GOT = 73,
119 R_TILEGX_IMM16_X0_HW1_LAST_GOT = 74,
120 R_TILEGX_IMM16_X1_HW1_LAST_GOT = 75,
121 R_TILEGX_IMM16_X0_HW0_TLS_GD = 78,
122 R_TILEGX_IMM16_X1_HW0_TLS_GD = 79,
123 R_TILEGX_IMM16_X0_HW0_TLS_LE = 80,
124 R_TILEGX_IMM16_X1_HW0_TLS_LE = 81,
125 R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE = 82,
126 R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE = 83,
127 R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE = 84,
128 R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE = 85,
129 R_TILEGX_IMM16_X0_HW0_LAST_TLS_GD = 86,
130 R_TILEGX_IMM16_X1_HW0_LAST_TLS_GD = 87,
131 R_TILEGX_IMM16_X0_HW1_LAST_TLS_GD = 88,
132 R_TILEGX_IMM16_X1_HW1_LAST_TLS_GD = 89,
133 R_TILEGX_IRELATIVE = 90,
134 R_TILEGX_IMM16_X0_HW0_TLS_IE = 92,
135 R_TILEGX_IMM16_X1_HW0_TLS_IE = 93,
137 R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL = 94,
138 R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL = 95,
139 R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL = 96,
140 R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL = 97,
141 R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL = 98,
142 R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL = 99,
144 R_TILEGX_IMM16_X0_HW0_LAST_TLS_IE = 100,
145 R_TILEGX_IMM16_X1_HW0_LAST_TLS_IE = 101,
146 R_TILEGX_IMM16_X0_HW1_LAST_TLS_IE = 102,
147 R_TILEGX_IMM16_X1_HW1_LAST_TLS_IE = 103,
148 R_TILEGX_TLS_DTPMOD64 = 106,
149 R_TILEGX_TLS_DTPOFF64 = 107,
150 R_TILEGX_TLS_TPOFF64 = 108,
151 R_TILEGX_TLS_DTPMOD32 = 109,
152 R_TILEGX_TLS_DTPOFF32 = 110,
153 R_TILEGX_TLS_TPOFF32 = 111,
154 R_TILEGX_TLS_GD_CALL = 112,
155 R_TILEGX_IMM8_X0_TLS_GD_ADD = 113,
156 R_TILEGX_IMM8_X1_TLS_GD_ADD = 114,
157 R_TILEGX_IMM8_Y0_TLS_GD_ADD = 115,
158 R_TILEGX_IMM8_Y1_TLS_GD_ADD = 116,
159 R_TILEGX_TLS_IE_LOAD = 117,
160 R_TILEGX_IMM8_X0_TLS_ADD = 118,
161 R_TILEGX_IMM8_X1_TLS_ADD = 119,
162 R_TILEGX_IMM8_Y0_TLS_ADD = 120,
163 R_TILEGX_IMM8_Y1_TLS_ADD = 121,
164 R_TILEGX_GNU_VTINHERIT = 128,
165 R_TILEGX_GNU_VTENTRY = 129,
166 R_TILEGX_NUM = 130
169 } // End namespace elfcpp.
171 #endif // !defined(ELFCPP_TILEGX_H)