2 * Copyright (c) 2006 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * $NetBSD: rtw.c,v 1.72 2006/03/28 00:48:10 dyoung Exp $
35 * $DragonFly: src/sys/dev/netif/rtw/rtw.c,v 1.13 2008/05/14 11:59:21 sephe Exp $
39 * Copyright (c) 2004, 2005 David Young. All rights reserved.
41 * Programmed for NetBSD by David Young.
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. The name of David Young may not be used to endorse or promote
52 * products derived from this software without specific prior
55 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
56 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
57 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
58 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
59 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
60 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
61 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
63 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
64 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
70 * Device driver for the Realtek RTL8180 802.11 MAC/BBP.
73 #include <sys/param.h>
74 #include <sys/bitops.h>
76 #include <sys/endian.h>
77 #include <sys/kernel.h>
78 #include <sys/interrupt.h>
80 #include <sys/socket.h>
81 #include <sys/sockio.h>
82 #include <sys/serialize.h>
83 #include <sys/sysctl.h>
86 #include <net/if_arp.h>
87 #include <net/if_dl.h>
88 #include <net/if_media.h>
89 #include <net/ifq_var.h>
90 #include <net/ethernet.h>
93 #include <netproto/802_11/ieee80211_var.h>
94 #include <netproto/802_11/ieee80211_radiotap.h>
95 #include <netproto/802_11/wlan_ratectl/onoe/ieee80211_onoe_param.h>
97 #include <dev/netif/rtw/rtwreg.h>
98 #include <dev/netif/rtw/rtwvar.h>
99 #include <dev/netif/rtw/rtwphyio.h>
100 #include <dev/netif/rtw/rtwphy.h>
101 #include <dev/netif/rtw/smc93cx6var.h>
102 #include <dev/netif/rtw/sa2400reg.h>
105 #define IEEE80211_DUR_DS_LONG_PREAMBLE 144
106 #define IEEE80211_DUR_DS_SHORT_PREAMBLE 72
107 #define IEEE80211_DUR_DS_SLOW_PLCPHDR 48
108 #define IEEE80211_DUR_DS_FAST_PLCPHDR 24
109 #define IEEE80211_DUR_DS_SLOW_ACK 112
110 #define IEEE80211_DUR_DS_SLOW_CTS 112
111 #define IEEE80211_DUR_DS_SIFS 10
115 bus_dma_segment_t segs
[RTW_MAXPKTSEGS
];
118 devclass_t rtw_devclass
;
120 static const struct ieee80211_rateset rtw_rates_11b
= { 4, { 2, 4, 11, 22 } };
122 SYSCTL_NODE(_hw
, OID_AUTO
, rtw
, CTLFLAG_RD
, 0,
123 "Realtek RTL818x 802.11 controls");
125 /* [0, __SHIFTOUT(RTW_CONFIG4_RFTYPE_MASK, RTW_CONFIG4_RFTYPE_MASK)] */
126 static int rtw_rfprog_fallback
= 0;
127 SYSCTL_INT(_hw_rtw
, OID_AUTO
, rfprog_fallback
, CTLFLAG_RW
,
128 &rtw_rfprog_fallback
, 0, "fallback RF programming method");
130 static int rtw_host_rfio
= 0; /* 0/1 */
131 SYSCTL_INT(_hw_rtw
, OID_AUTO
, host_rfio
, CTLFLAG_RW
,
132 &rtw_host_rfio
, 0, "enable host control of RF I/O");
135 int rtw_debug
= 0; /* [0, RTW_DEBUG_MAX] */
136 SYSCTL_INT(_hw_rtw
, OID_AUTO
, debug
, CTLFLAG_RW
, &rtw_debug
, 0, "debug level");
138 static int rtw_rxbufs_limit
= RTW_RXQLEN
; /* [0, RTW_RXQLEN] */
139 SYSCTL_INT(_hw_rtw
, OID_AUTO
, rxbufs_limit
, CTLFLAG_RW
, &rtw_rxbufs_limit
, 0,
141 #endif /* RTW_DEBUG */
144 static int rtw_xmtr_restart
= 0;
145 SYSCTL_INT(_hw_rtw
, OID_AUTO
, xmtr_restart
, CTLFLAG_RW
, &rtw_xmtr_restart
, 0,
146 "gratuitously reset xmtr on rcvr error");
148 static int rtw_ring_reset
= 0;
149 SYSCTL_INT(_hw_rtw
, OID_AUTO
, ring_reset
, CTLFLAG_RW
, &rtw_ring_reset
, 0,
150 "reset ring pointers on rcvr error");
153 static int rtw_do_chip_reset
= 0;
154 SYSCTL_INT(_hw_rtw
, OID_AUTO
, chip_reset
, CTLFLAG_RW
, &rtw_do_chip_reset
, 0,
155 "gratuitously reset chip on rcvr error");
157 int rtw_dwelltime
= 200; /* milliseconds */
160 static struct ieee80211_cipher rtw_cipher_wep
;
162 static void rtw_led_init(struct rtw_softc
*);
163 static void rtw_led_newstate(struct rtw_softc
*, enum ieee80211_state
);
164 static void rtw_led_slowblink(void *);
165 static void rtw_led_fastblink(void *);
166 static void rtw_led_set(struct rtw_softc
*);
168 static void rtw_init(void *);
169 static void rtw_start(struct ifnet
*);
170 static int rtw_ioctl(struct ifnet
*, u_long
, caddr_t
, struct ucred
*);
171 static void rtw_watchdog(struct ifnet
*);
172 static void rtw_intr(void *);
174 static void rtw_intr_rx(struct rtw_softc
*, uint16_t);
175 static void rtw_intr_tx(struct rtw_softc
*, uint16_t);
176 static void rtw_intr_beacon(struct rtw_softc
*, uint16_t);
177 static void rtw_intr_atim(struct rtw_softc
*);
178 static void rtw_intr_ioerror(struct rtw_softc
*, uint16_t);
179 static void rtw_intr_timeout(struct rtw_softc
*);
181 static int rtw_dequeue(struct ifnet
*, struct rtw_txsoft_blk
**,
182 struct rtw_txdesc_blk
**, struct mbuf
**,
183 struct ieee80211_node
**);
184 static struct mbuf
*rtw_load_txbuf(struct rtw_softc
*, struct rtw_txsoft
*,
185 struct rtw_txsegs
*, int, struct mbuf
*);
187 static void rtw_idle(struct rtw_softc
*);
188 static void rtw_txring_fixup(struct rtw_softc
*);
189 static void rtw_rxring_fixup(struct rtw_softc
*);
190 static int rtw_txring_next(struct rtw_regs
*, struct rtw_txdesc_blk
*);
191 static void rtw_reset_oactive(struct rtw_softc
*);
193 static int rtw_enable(struct rtw_softc
*);
194 static void rtw_disable(struct rtw_softc
*);
195 static void rtw_io_enable(struct rtw_softc
*, uint8_t, int);
196 static int rtw_pwrstate(struct rtw_softc
*, enum rtw_pwrstate
);
197 static void rtw_set_access(struct rtw_softc
*, enum rtw_access
);
199 static void rtw_continuous_tx_enable(struct rtw_softc
*, int);
200 static void rtw_txdac_enable(struct rtw_softc
*, int);
201 static void rtw_anaparm_enable(struct rtw_regs
*, int);
202 static void rtw_config0123_enable(struct rtw_regs
*, int);
204 static void rtw_transmit_config(struct rtw_regs
*);
205 static void rtw_set_rfprog(struct rtw_softc
*);
206 static void rtw_enable_interrupts(struct rtw_softc
*);
207 static void rtw_pktfilt_load(struct rtw_softc
*);
208 static void rtw_wep_setkeys(struct rtw_softc
*);
209 static void rtw_resume_ticks(struct rtw_softc
*);
210 static void rtw_set_nettype(struct rtw_softc
*, enum ieee80211_opmode
);
212 static int rtw_reset(struct rtw_softc
*);
213 static int rtw_chip_reset(struct rtw_softc
*);
214 static int rtw_recall_eeprom(struct rtw_softc
*);
215 static int rtw_srom_read(struct rtw_softc
*);
216 static int rtw_srom_parse(struct rtw_softc
*);
217 static struct rtw_rf
*rtw_rf_attach(struct rtw_softc
*, enum rtw_rfchipid
, int);
219 static uint8_t rtw_check_phydelay(struct rtw_regs
*, uint32_t);
220 static void rtw_identify_country(struct rtw_softc
*);
221 static int rtw_identify_sta(struct rtw_softc
*);
223 static int rtw_swring_setup(struct rtw_softc
*);
224 static void rtw_hwring_setup(struct rtw_softc
*);
226 static int rtw_desc_blk_alloc(struct rtw_softc
*);
227 static void rtw_desc_blk_free(struct rtw_softc
*);
228 static int rtw_soft_blk_alloc(struct rtw_softc
*);
229 static void rtw_soft_blk_free(struct rtw_softc
*);
231 static void rtw_txdesc_blk_init_all(struct rtw_softc
*);
232 static void rtw_txsoft_blk_init_all(struct rtw_softc
*);
233 static void rtw_rxdesc_blk_init_all(struct rtw_softc
*);
234 static int rtw_rxsoft_blk_init_all(struct rtw_softc
*);
236 static void rtw_txdesc_blk_reset_all(struct rtw_softc
*);
238 static int rtw_rxsoft_alloc(struct rtw_softc
*, struct rtw_rxsoft
*, int);
239 static void rtw_rxdesc_init(struct rtw_softc
*, int idx
, int);
242 static void rtw_print_txdesc(struct rtw_softc
*, const char *,
243 struct rtw_txsoft
*, struct rtw_txdesc_blk
*,
245 #endif /* RTW_DEBUG */
247 static int rtw_newstate(struct ieee80211com
*, enum ieee80211_state
, int);
248 static void rtw_next_scan(void *);
250 static int rtw_key_delete(struct ieee80211com
*,
251 const struct ieee80211_key
*);
252 static int rtw_key_set(struct ieee80211com
*,
253 const struct ieee80211_key
*,
254 const u_int8_t
[IEEE80211_ADDR_LEN
]);
255 static void rtw_key_update_end(struct ieee80211com
*);
256 static void rtw_key_update_begin(struct ieee80211com
*);
257 static int rtw_wep_decap(struct ieee80211_key
*, struct mbuf
*, int);
259 static int rtw_compute_duration1(int, int, uint32_t, int,
260 struct rtw_duration
*);
261 static int rtw_compute_duration(const struct ieee80211_frame_min
*,
262 const struct ieee80211_key
*, int,
264 struct rtw_duration
*,
265 struct rtw_duration
*, int *, int);
267 static int rtw_get_rssi(struct rtw_softc
*, uint8_t, uint8_t);
268 static int rtw_maxim_getrssi(uint8_t, uint8_t);
269 static int rtw_gct_getrssi(uint8_t, uint8_t);
270 static int rtw_philips_getrssi(uint8_t, uint8_t);
272 static void *rtw_ratectl_attach(struct ieee80211com
*, u_int
);
276 rtw_print_regs(struct rtw_regs
*regs
, const char *dvname
, const char *where
)
278 #define PRINTREG32(sc, reg) \
279 RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
280 ("%s: reg[ " #reg " / %03x ] = %08x\n", \
281 dvname, reg, RTW_READ(regs, reg)))
283 #define PRINTREG16(sc, reg) \
284 RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
285 ("%s: reg[ " #reg " / %03x ] = %04x\n", \
286 dvname, reg, RTW_READ16(regs, reg)))
288 #define PRINTREG8(sc, reg) \
289 RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
290 ("%s: reg[ " #reg " / %03x ] = %02x\n", \
291 dvname, reg, RTW_READ8(regs, reg)))
293 RTW_DPRINTF(RTW_DEBUG_REGDUMP
, ("%s: %s\n", dvname
, where
));
295 PRINTREG32(regs
, RTW_IDR0
);
296 PRINTREG32(regs
, RTW_IDR1
);
297 PRINTREG32(regs
, RTW_MAR0
);
298 PRINTREG32(regs
, RTW_MAR1
);
299 PRINTREG32(regs
, RTW_TSFTRL
);
300 PRINTREG32(regs
, RTW_TSFTRH
);
301 PRINTREG32(regs
, RTW_TLPDA
);
302 PRINTREG32(regs
, RTW_TNPDA
);
303 PRINTREG32(regs
, RTW_THPDA
);
304 PRINTREG32(regs
, RTW_TCR
);
305 PRINTREG32(regs
, RTW_RCR
);
306 PRINTREG32(regs
, RTW_TINT
);
307 PRINTREG32(regs
, RTW_TBDA
);
308 PRINTREG32(regs
, RTW_ANAPARM
);
309 PRINTREG32(regs
, RTW_BB
);
310 PRINTREG32(regs
, RTW_PHYCFG
);
311 PRINTREG32(regs
, RTW_WAKEUP0L
);
312 PRINTREG32(regs
, RTW_WAKEUP0H
);
313 PRINTREG32(regs
, RTW_WAKEUP1L
);
314 PRINTREG32(regs
, RTW_WAKEUP1H
);
315 PRINTREG32(regs
, RTW_WAKEUP2LL
);
316 PRINTREG32(regs
, RTW_WAKEUP2LH
);
317 PRINTREG32(regs
, RTW_WAKEUP2HL
);
318 PRINTREG32(regs
, RTW_WAKEUP2HH
);
319 PRINTREG32(regs
, RTW_WAKEUP3LL
);
320 PRINTREG32(regs
, RTW_WAKEUP3LH
);
321 PRINTREG32(regs
, RTW_WAKEUP3HL
);
322 PRINTREG32(regs
, RTW_WAKEUP3HH
);
323 PRINTREG32(regs
, RTW_WAKEUP4LL
);
324 PRINTREG32(regs
, RTW_WAKEUP4LH
);
325 PRINTREG32(regs
, RTW_WAKEUP4HL
);
326 PRINTREG32(regs
, RTW_WAKEUP4HH
);
327 PRINTREG32(regs
, RTW_DK0
);
328 PRINTREG32(regs
, RTW_DK1
);
329 PRINTREG32(regs
, RTW_DK2
);
330 PRINTREG32(regs
, RTW_DK3
);
331 PRINTREG32(regs
, RTW_RETRYCTR
);
332 PRINTREG32(regs
, RTW_RDSAR
);
333 PRINTREG32(regs
, RTW_FER
);
334 PRINTREG32(regs
, RTW_FEMR
);
335 PRINTREG32(regs
, RTW_FPSR
);
336 PRINTREG32(regs
, RTW_FFER
);
338 /* 16-bit registers */
339 PRINTREG16(regs
, RTW_BRSR
);
340 PRINTREG16(regs
, RTW_IMR
);
341 PRINTREG16(regs
, RTW_ISR
);
342 PRINTREG16(regs
, RTW_BCNITV
);
343 PRINTREG16(regs
, RTW_ATIMWND
);
344 PRINTREG16(regs
, RTW_BINTRITV
);
345 PRINTREG16(regs
, RTW_ATIMTRITV
);
346 PRINTREG16(regs
, RTW_CRC16ERR
);
347 PRINTREG16(regs
, RTW_CRC0
);
348 PRINTREG16(regs
, RTW_CRC1
);
349 PRINTREG16(regs
, RTW_CRC2
);
350 PRINTREG16(regs
, RTW_CRC3
);
351 PRINTREG16(regs
, RTW_CRC4
);
352 PRINTREG16(regs
, RTW_CWR
);
354 /* 8-bit registers */
355 PRINTREG8(regs
, RTW_CR
);
356 PRINTREG8(regs
, RTW_9346CR
);
357 PRINTREG8(regs
, RTW_CONFIG0
);
358 PRINTREG8(regs
, RTW_CONFIG1
);
359 PRINTREG8(regs
, RTW_CONFIG2
);
360 PRINTREG8(regs
, RTW_MSR
);
361 PRINTREG8(regs
, RTW_CONFIG3
);
362 PRINTREG8(regs
, RTW_CONFIG4
);
363 PRINTREG8(regs
, RTW_TESTR
);
364 PRINTREG8(regs
, RTW_PSR
);
365 PRINTREG8(regs
, RTW_SCR
);
366 PRINTREG8(regs
, RTW_PHYDELAY
);
367 PRINTREG8(regs
, RTW_CRCOUNT
);
368 PRINTREG8(regs
, RTW_PHYADDR
);
369 PRINTREG8(regs
, RTW_PHYDATAW
);
370 PRINTREG8(regs
, RTW_PHYDATAR
);
371 PRINTREG8(regs
, RTW_CONFIG5
);
372 PRINTREG8(regs
, RTW_TPPOLL
);
374 PRINTREG16(regs
, RTW_BSSID16
);
375 PRINTREG32(regs
, RTW_BSSID32
);
380 #endif /* RTW_DEBUG */
383 rtw_continuous_tx_enable(struct rtw_softc
*sc
, int enable
)
385 struct rtw_regs
*regs
= &sc
->sc_regs
;
388 tcr
= RTW_READ(regs
, RTW_TCR
);
389 tcr
&= ~RTW_TCR_LBK_MASK
;
391 tcr
|= RTW_TCR_LBK_CONT
;
393 tcr
|= RTW_TCR_LBK_NORMAL
;
394 RTW_WRITE(regs
, RTW_TCR
, tcr
);
395 RTW_SYNC(regs
, RTW_TCR
, RTW_TCR
);
396 rtw_set_access(sc
, RTW_ACCESS_ANAPARM
);
397 rtw_txdac_enable(sc
, !enable
);
398 rtw_set_access(sc
, RTW_ACCESS_ANAPARM
);/* XXX Voodoo from Linux. */
399 rtw_set_access(sc
, RTW_ACCESS_NONE
);
404 rtw_access_string(enum rtw_access access
)
407 case RTW_ACCESS_NONE
:
409 case RTW_ACCESS_CONFIG
:
411 case RTW_ACCESS_ANAPARM
:
417 #endif /* RTW_DEBUG */
420 rtw_set_access1(struct rtw_regs
*regs
, enum rtw_access naccess
)
422 KKASSERT(naccess
>= RTW_ACCESS_NONE
&& naccess
<= RTW_ACCESS_ANAPARM
);
423 KKASSERT(regs
->r_access
>= RTW_ACCESS_NONE
&&
424 regs
->r_access
<= RTW_ACCESS_ANAPARM
);
426 if (naccess
== regs
->r_access
)
430 case RTW_ACCESS_NONE
:
431 switch (regs
->r_access
) {
432 case RTW_ACCESS_ANAPARM
:
433 rtw_anaparm_enable(regs
, 0);
435 case RTW_ACCESS_CONFIG
:
436 rtw_config0123_enable(regs
, 0);
438 case RTW_ACCESS_NONE
:
442 case RTW_ACCESS_CONFIG
:
443 switch (regs
->r_access
) {
444 case RTW_ACCESS_NONE
:
445 rtw_config0123_enable(regs
, 1);
447 case RTW_ACCESS_CONFIG
:
449 case RTW_ACCESS_ANAPARM
:
450 rtw_anaparm_enable(regs
, 0);
454 case RTW_ACCESS_ANAPARM
:
455 switch (regs
->r_access
) {
456 case RTW_ACCESS_NONE
:
457 rtw_config0123_enable(regs
, 1);
459 case RTW_ACCESS_CONFIG
:
460 rtw_anaparm_enable(regs
, 1);
462 case RTW_ACCESS_ANAPARM
:
470 rtw_set_access(struct rtw_softc
*sc
, enum rtw_access access
)
472 struct rtw_regs
*regs
= &sc
->sc_regs
;
474 rtw_set_access1(regs
, access
);
475 RTW_DPRINTF(RTW_DEBUG_ACCESS
,
476 ("%s: access %s -> %s\n", sc
->sc_ic
.ic_if
.if_xname
,
477 rtw_access_string(regs
->r_access
),
478 rtw_access_string(access
)));
479 regs
->r_access
= access
;
483 * Enable registers, switch register banks.
486 rtw_config0123_enable(struct rtw_regs
*regs
, int enable
)
490 ecr
= RTW_READ8(regs
, RTW_9346CR
);
491 ecr
&= ~(RTW_9346CR_EEM_MASK
| RTW_9346CR_EECS
| RTW_9346CR_EESK
);
493 ecr
|= RTW_9346CR_EEM_CONFIG
;
495 RTW_WBW(regs
, RTW_9346CR
, MAX(RTW_CONFIG0
, RTW_CONFIG3
));
496 ecr
|= RTW_9346CR_EEM_NORMAL
;
498 RTW_WRITE8(regs
, RTW_9346CR
, ecr
);
499 RTW_SYNC(regs
, RTW_9346CR
, RTW_9346CR
);
502 /* requires rtw_config0123_enable(, 1) */
504 rtw_anaparm_enable(struct rtw_regs
*regs
, int enable
)
508 cfg3
= RTW_READ8(regs
, RTW_CONFIG3
);
509 cfg3
|= RTW_CONFIG3_CLKRUNEN
;
511 cfg3
|= RTW_CONFIG3_PARMEN
;
513 cfg3
&= ~RTW_CONFIG3_PARMEN
;
514 RTW_WRITE8(regs
, RTW_CONFIG3
, cfg3
);
515 RTW_SYNC(regs
, RTW_CONFIG3
, RTW_CONFIG3
);
518 /* requires rtw_anaparm_enable(, 1) */
520 rtw_txdac_enable(struct rtw_softc
*sc
, int enable
)
523 struct rtw_regs
*regs
= &sc
->sc_regs
;
525 anaparm
= RTW_READ(regs
, RTW_ANAPARM
);
527 anaparm
&= ~RTW_ANAPARM_TXDACOFF
;
529 anaparm
|= RTW_ANAPARM_TXDACOFF
;
530 RTW_WRITE(regs
, RTW_ANAPARM
, anaparm
);
531 RTW_SYNC(regs
, RTW_ANAPARM
, RTW_ANAPARM
);
535 rtw_chip_reset1(struct rtw_softc
*sc
)
537 struct rtw_regs
*regs
= &sc
->sc_regs
;
541 RTW_WRITE8(regs
, RTW_CR
, RTW_CR_RST
);
543 RTW_WBR(regs
, RTW_CR
, RTW_CR
);
545 for (i
= 0; i
< 1000; i
++) {
546 if ((cr
= RTW_READ8(regs
, RTW_CR
) & RTW_CR_RST
) == 0) {
547 RTW_DPRINTF(RTW_DEBUG_RESET
,
548 ("%s: reset in %dus\n",
549 sc
->sc_ic
.ic_if
.if_xname
, i
));
552 RTW_RBR(regs
, RTW_CR
, RTW_CR
);
553 DELAY(10); /* 10us */
556 if_printf(&sc
->sc_ic
.ic_if
, "reset failed\n");
561 rtw_chip_reset(struct rtw_softc
*sc
)
563 struct rtw_regs
*regs
= &sc
->sc_regs
;
566 /* from Linux driver */
567 tcr
= RTW_TCR_CWMIN
| RTW_TCR_MXDMA_2048
|
568 __SHIFTIN(7, RTW_TCR_SRL_MASK
) | __SHIFTIN(7, RTW_TCR_LRL_MASK
);
570 RTW_WRITE(regs
, RTW_TCR
, tcr
);
572 RTW_WBW(regs
, RTW_CR
, RTW_TCR
);
574 return rtw_chip_reset1(sc
);
578 rtw_wep_decap(struct ieee80211_key
*k
, struct mbuf
*m
, int hdrlen
)
580 struct ieee80211_key keycopy
;
581 const struct ieee80211_cipher
*wep_cipher
;
583 RTW_DPRINTF(RTW_DEBUG_KEY
, ("%s:\n", __func__
));
586 keycopy
.wk_flags
&= ~IEEE80211_KEY_SWCRYPT
;
588 wep_cipher
= ieee80211_crypto_cipher(IEEE80211_CIPHER_WEP
);
589 KKASSERT(wep_cipher
!= NULL
);
591 return wep_cipher
->ic_decap(&keycopy
, m
, hdrlen
);
595 rtw_key_delete(struct ieee80211com
*ic
, const struct ieee80211_key
*k
)
597 struct rtw_softc
*sc
= ic
->ic_ifp
->if_softc
;
598 u_int keyix
= k
->wk_keyix
;
600 DPRINTF(sc
, RTW_DEBUG_KEY
, ("%s: delete key %u\n", __func__
, keyix
));
602 if (keyix
>= IEEE80211_WEP_NKID
)
604 if (k
->wk_keylen
!= 0)
605 sc
->sc_flags
&= ~RTW_F_DK_VALID
;
610 rtw_key_set(struct ieee80211com
*ic
, const struct ieee80211_key
*k
,
611 const u_int8_t mac
[IEEE80211_ADDR_LEN
])
613 struct rtw_softc
*sc
= ic
->ic_ifp
->if_softc
;
615 DPRINTF(sc
, RTW_DEBUG_KEY
, ("%s: set key %u\n", __func__
, k
->wk_keyix
));
617 if (k
->wk_keyix
>= IEEE80211_WEP_NKID
)
620 sc
->sc_flags
&= ~RTW_F_DK_VALID
;
625 rtw_key_update_begin(struct ieee80211com
*ic
)
628 struct ifnet
*ifp
= ic
->ic_ifp
;
629 struct rtw_softc
*sc
= ifp
->if_softc
;
632 DPRINTF(sc
, RTW_DEBUG_KEY
, ("%s:\n", __func__
));
636 rtw_key_update_end(struct ieee80211com
*ic
)
638 struct ifnet
*ifp
= ic
->ic_ifp
;
639 struct rtw_softc
*sc
= ifp
->if_softc
;
641 DPRINTF(sc
, RTW_DEBUG_KEY
, ("%s:\n", __func__
));
643 if ((sc
->sc_flags
& RTW_F_DK_VALID
) != 0 ||
644 (sc
->sc_flags
& RTW_F_ENABLED
) == 0 ||
645 (sc
->sc_flags
& RTW_F_INVALID
) != 0)
648 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
, 0);
650 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
,
651 (ifp
->if_flags
& IFF_RUNNING
) != 0);
655 rtw_key_hwsupp(uint32_t flags
, const struct ieee80211_key
*k
)
657 if (k
->wk_cipher
->ic_cipher
!= IEEE80211_CIPHER_WEP
)
660 return ((flags
& RTW_C_RXWEP_40
) != 0 && k
->wk_keylen
== 5) ||
661 ((flags
& RTW_C_RXWEP_104
) != 0 && k
->wk_keylen
== 13);
665 rtw_wep_setkeys(struct rtw_softc
*sc
)
667 struct ieee80211com
*ic
= &sc
->sc_ic
;
668 struct ieee80211_key
*wk
= ic
->ic_nw_keys
;
669 const struct ieee80211_cipher
*wep_cipher
;
670 struct rtw_regs
*regs
= &sc
->sc_regs
;
671 union rtw_keys
*rk
= &sc
->sc_keys
;
675 memset(rk
->rk_keys
, 0, sizeof(rk
->rk_keys
));
677 wep_cipher
= ieee80211_crypto_cipher(IEEE80211_CIPHER_WEP
);
678 KKASSERT(wep_cipher
!= NULL
);
680 /* Temporarily use software crypto for all keys. */
681 for (i
= 0; i
< IEEE80211_WEP_NKID
; i
++) {
682 if (wk
[i
].wk_cipher
== &rtw_cipher_wep
)
683 wk
[i
].wk_cipher
= wep_cipher
;
686 rtw_set_access(sc
, RTW_ACCESS_CONFIG
);
688 psr
= RTW_READ8(regs
, RTW_PSR
);
689 scr
= RTW_READ8(regs
, RTW_SCR
);
690 scr
&= ~(RTW_SCR_KM_MASK
| RTW_SCR_TXSECON
| RTW_SCR_RXSECON
);
692 if ((sc
->sc_ic
.ic_flags
& IEEE80211_F_PRIVACY
) == 0)
695 for (keylen
= i
= 0; i
< IEEE80211_WEP_NKID
; i
++) {
696 if (!rtw_key_hwsupp(sc
->sc_flags
, &wk
[i
]))
698 if (i
== ic
->ic_def_txkey
) {
699 keylen
= wk
[i
].wk_keylen
;
702 keylen
= MAX(keylen
, wk
[i
].wk_keylen
);
706 scr
|= RTW_SCR_KM_WEP40
| RTW_SCR_RXSECON
;
707 else if (keylen
== 13)
708 scr
|= RTW_SCR_KM_WEP104
| RTW_SCR_RXSECON
;
710 for (i
= 0; i
< IEEE80211_WEP_NKID
; i
++) {
711 if (wk
[i
].wk_keylen
!= keylen
||
712 wk
[i
].wk_cipher
->ic_cipher
!= IEEE80211_CIPHER_WEP
)
714 /* h/w will decrypt, s/w still strips headers */
715 wk
[i
].wk_cipher
= &rtw_cipher_wep
;
716 memcpy(rk
->rk_keys
[i
], wk
[i
].wk_key
, wk
[i
].wk_keylen
);
719 RTW_WRITE8(regs
, RTW_PSR
, psr
& ~RTW_PSR_PSEN
);
721 bus_space_write_region_4(regs
->r_bt
, regs
->r_bh
, RTW_DK0
, rk
->rk_words
,
722 sizeof(rk
->rk_words
) / sizeof(rk
->rk_words
[0]));
724 RTW_WBW(regs
, RTW_DK0
, RTW_PSR
);
725 RTW_WRITE8(regs
, RTW_PSR
, psr
);
726 RTW_WBW(regs
, RTW_PSR
, RTW_SCR
);
727 RTW_WRITE8(regs
, RTW_SCR
, scr
);
728 RTW_SYNC(regs
, RTW_SCR
, RTW_SCR
);
729 rtw_set_access(sc
, RTW_ACCESS_NONE
);
730 sc
->sc_flags
|= RTW_F_DK_VALID
;
734 rtw_recall_eeprom(struct rtw_softc
*sc
)
736 struct rtw_regs
*regs
= &sc
->sc_regs
;
740 ecr
= RTW_READ8(regs
, RTW_9346CR
);
741 ecr
= (ecr
& ~RTW_9346CR_EEM_MASK
) | RTW_9346CR_EEM_AUTOLOAD
;
742 RTW_WRITE8(regs
, RTW_9346CR
, ecr
);
744 RTW_WBR(regs
, RTW_9346CR
, RTW_9346CR
);
746 /* wait 25ms for completion */
747 for (i
= 0; i
< 250; i
++) {
748 ecr
= RTW_READ8(regs
, RTW_9346CR
);
749 if ((ecr
& RTW_9346CR_EEM_MASK
) == RTW_9346CR_EEM_NORMAL
) {
750 RTW_DPRINTF(RTW_DEBUG_RESET
,
751 ("%s: recall EEPROM in %dus\n",
752 sc
->sc_ic
.ic_if
.if_xname
, i
* 100));
755 RTW_RBR(regs
, RTW_9346CR
, RTW_9346CR
);
758 if_printf(&sc
->sc_ic
.ic_if
, "recall EEPROM failed\n");
763 rtw_reset(struct rtw_softc
*sc
)
765 struct rtw_regs
*regs
= &sc
->sc_regs
;
769 sc
->sc_flags
&= ~RTW_F_DK_VALID
;
771 rc
= rtw_chip_reset(sc
);
775 rtw_recall_eeprom(sc
); /* ignore err */
777 config1
= RTW_READ8(regs
, RTW_CONFIG1
);
778 RTW_WRITE8(regs
, RTW_CONFIG1
, config1
& ~RTW_CONFIG1_PMEN
);
779 /* TBD turn off maximum power saving? */
784 rtw_srom_parse(struct rtw_softc
*sc
)
786 struct rtw_srom
*sr
= &sc
->sc_srom
;
787 char scratch
[sizeof("unknown 0xXX")];
788 uint8_t mac
[IEEE80211_ADDR_LEN
];
789 const char *rfname
, *paname
;
790 uint16_t srom_version
;
793 sc
->sc_flags
&= ~(RTW_F_DIGPHY
| RTW_F_DFLANTB
| RTW_F_ANTDIV
);
794 sc
->sc_rcr
&= ~(RTW_RCR_ENCS1
| RTW_RCR_ENCS2
);
796 srom_version
= RTW_SR_GET16(sr
, RTW_SR_VERSION
);
797 if_printf(&sc
->sc_ic
.ic_if
, "SROM version %d.%d",
798 srom_version
>> 8, srom_version
& 0xff);
800 if (srom_version
<= 0x0101) {
801 kprintf(" is not understood, limping along with defaults\n");
804 sc
->sc_flags
|= (RTW_F_DIGPHY
| RTW_F_ANTDIV
);
805 sc
->sc_csthr
= RTW_SR_ENERGYDETTHR_DEFAULT
;
806 sc
->sc_rcr
|= RTW_RCR_ENCS1
;
807 sc
->sc_rfchipid
= RTW_RFCHIPID_PHILIPS
;
812 for (i
= 0; i
< IEEE80211_ADDR_LEN
; i
++)
813 mac
[i
] = RTW_SR_GET(sr
, RTW_SR_MAC
+ i
);
815 RTW_DPRINTF(RTW_DEBUG_ATTACH
,
816 ("%s: EEPROM MAC %6D\n", sc
->sc_ic
.ic_if
.if_xname
, mac
, ":"));
818 sc
->sc_csthr
= RTW_SR_GET(sr
, RTW_SR_ENERGYDETTHR
);
820 if ((RTW_SR_GET(sr
, RTW_SR_CONFIG2
) & RTW_CONFIG2_ANT
) != 0)
821 sc
->sc_flags
|= RTW_F_ANTDIV
;
824 * Note well: the sense of the RTW_SR_RFPARM_DIGPHY bit seems
827 if ((RTW_SR_GET(sr
, RTW_SR_RFPARM
) & RTW_SR_RFPARM_DIGPHY
) == 0)
828 sc
->sc_flags
|= RTW_F_DIGPHY
;
829 if ((RTW_SR_GET(sr
, RTW_SR_RFPARM
) & RTW_SR_RFPARM_DFLANTB
) != 0)
830 sc
->sc_flags
|= RTW_F_DFLANTB
;
832 sc
->sc_rcr
|= __SHIFTIN(__SHIFTOUT(RTW_SR_GET(sr
, RTW_SR_RFPARM
),
833 RTW_SR_RFPARM_CS_MASK
), RTW_RCR_ENCS1
);
835 if ((RTW_SR_GET(sr
, RTW_SR_CONFIG0
) & RTW_CONFIG0_WEP104
) != 0)
836 sc
->sc_flags
|= RTW_C_RXWEP_104
;
838 sc
->sc_flags
|= RTW_C_RXWEP_40
; /* XXX */
840 sc
->sc_rfchipid
= RTW_SR_GET(sr
, RTW_SR_RFCHIPID
);
841 switch (sc
->sc_rfchipid
) {
842 case RTW_RFCHIPID_GCT
: /* this combo seen in the wild */
843 rfname
= "GCT GRF5101";
844 paname
= "Winspring WS9901";
846 case RTW_RFCHIPID_MAXIM
:
847 rfname
= "Maxim MAX2820"; /* guess */
848 paname
= "Maxim MAX2422"; /* guess */
850 case RTW_RFCHIPID_INTERSIL
:
851 rfname
= "Intersil HFA3873"; /* guess */
852 paname
= "Intersil <unknown>";
854 case RTW_RFCHIPID_PHILIPS
: /* this combo seen in the wild */
855 rfname
= "Philips SA2400A";
856 paname
= "Philips SA2411";
858 case RTW_RFCHIPID_RFMD
:
859 /* this is the same front-end as an atw(4)! */
860 rfname
= "RFMD RF2948B, " /* mentioned in Realtek docs */
861 "LNA: RFMD RF2494, " /* mentioned in Realtek docs */
862 "SYN: Silicon Labs Si4126"; /* inferred from
865 paname
= "RFMD RF2189"; /* mentioned in Realtek docs */
867 case RTW_RFCHIPID_RESERVED
:
868 rfname
= paname
= "reserved";
871 ksnprintf(scratch
, sizeof(scratch
), "unknown 0x%02x",
873 rfname
= paname
= scratch
;
875 if_printf(&sc
->sc_ic
.ic_if
, "RF: %s, PA: %s\n", rfname
, paname
);
877 switch (RTW_SR_GET(sr
, RTW_SR_CONFIG0
) & RTW_CONFIG0_GL_MASK
) {
878 case RTW_CONFIG0_GL_USA
:
879 case _RTW_CONFIG0_GL_USA
:
880 sc
->sc_locale
= RTW_LOCALE_USA
;
882 case RTW_CONFIG0_GL_EUROPE
:
883 sc
->sc_locale
= RTW_LOCALE_EUROPE
;
885 case RTW_CONFIG0_GL_JAPAN
:
886 sc
->sc_locale
= RTW_LOCALE_JAPAN
;
889 sc
->sc_locale
= RTW_LOCALE_UNKNOWN
;
896 rtw_srom_read(struct rtw_softc
*sc
)
898 struct rtw_regs
*regs
= &sc
->sc_regs
;
899 struct rtw_srom
*sr
= &sc
->sc_srom
;
900 struct seeprom_descriptor sd
;
904 memset(&sd
, 0, sizeof(sd
));
906 ecr
= RTW_READ8(regs
, RTW_9346CR
);
908 if ((sc
->sc_flags
& RTW_F_9356SROM
) != 0) {
909 RTW_DPRINTF(RTW_DEBUG_ATTACH
,
910 ("%s: 93c56 SROM\n", sc
->sc_ic
.ic_if
.if_xname
));
914 RTW_DPRINTF(RTW_DEBUG_ATTACH
,
915 ("%s: 93c46 SROM\n", sc
->sc_ic
.ic_if
.if_xname
));
920 ecr
&= ~(RTW_9346CR_EEDI
| RTW_9346CR_EEDO
| RTW_9346CR_EESK
|
921 RTW_9346CR_EEM_MASK
| RTW_9346CR_EECS
);
922 ecr
|= RTW_9346CR_EEM_PROGRAM
;
924 RTW_WRITE8(regs
, RTW_9346CR
, ecr
);
926 sr
->sr_content
= kmalloc(sr
->sr_size
, M_DEVBUF
, M_WAITOK
| M_ZERO
);
929 * RTL8180 has a single 8-bit register for controlling the
930 * 93cx6 SROM. There is no "ready" bit. The RTL8180
931 * input/output sense is the reverse of read_seeprom's.
933 sd
.sd_tag
= regs
->r_bt
;
934 sd
.sd_bsh
= regs
->r_bh
;
936 sd
.sd_control_offset
= RTW_9346CR
;
937 sd
.sd_status_offset
= RTW_9346CR
;
938 sd
.sd_dataout_offset
= RTW_9346CR
;
939 sd
.sd_CK
= RTW_9346CR_EESK
;
940 sd
.sd_CS
= RTW_9346CR_EECS
;
941 sd
.sd_DI
= RTW_9346CR_EEDO
;
942 sd
.sd_DO
= RTW_9346CR_EEDI
;
943 /* make read_seeprom enter EEPROM read/write mode */
947 /* TBD bus barriers */
948 if (!read_seeprom(&sd
, sr
->sr_content
, 0, sr
->sr_size
/ 2)) {
949 if_printf(&sc
->sc_ic
.ic_if
, "could not read SROM\n");
950 kfree(sr
->sr_content
, M_DEVBUF
);
951 sr
->sr_content
= NULL
;
952 return EIO
; /* XXX */
955 /* end EEPROM read/write mode */
956 RTW_WRITE8(regs
, RTW_9346CR
,
957 (ecr
& ~RTW_9346CR_EEM_MASK
) | RTW_9346CR_EEM_NORMAL
);
958 RTW_WBRW(regs
, RTW_9346CR
, RTW_9346CR
);
960 rc
= rtw_recall_eeprom(sc
);
967 RTW_DPRINTF(RTW_DEBUG_ATTACH
,
968 ("\n%s: serial ROM:\n\t", sc
->sc_ic
.ic_if
.if_xname
));
969 for (i
= 0; i
< sr
->sr_size
/2; i
++) {
970 if (((i
% 8) == 0) && (i
!= 0))
971 RTW_DPRINTF(RTW_DEBUG_ATTACH
, ("\n\t"));
972 RTW_DPRINTF(RTW_DEBUG_ATTACH
,
973 (" %04x", sr
->sr_content
[i
]));
975 RTW_DPRINTF(RTW_DEBUG_ATTACH
, ("\n"));
977 #endif /* RTW_DEBUG */
982 rtw_set_rfprog(struct rtw_softc
*sc
)
984 struct rtw_regs
*regs
= &sc
->sc_regs
;
988 cfg4
= RTW_READ8(regs
, RTW_CONFIG4
) & ~RTW_CONFIG4_RFTYPE_MASK
;
990 switch (sc
->sc_rfchipid
) {
992 cfg4
|= __SHIFTIN(rtw_rfprog_fallback
, RTW_CONFIG4_RFTYPE_MASK
);
995 case RTW_RFCHIPID_INTERSIL
:
996 cfg4
|= RTW_CONFIG4_RFTYPE_INTERSIL
;
999 case RTW_RFCHIPID_PHILIPS
:
1000 cfg4
|= RTW_CONFIG4_RFTYPE_PHILIPS
;
1003 case RTW_RFCHIPID_GCT
: /* XXX a guess */
1004 case RTW_RFCHIPID_RFMD
:
1005 cfg4
|= RTW_CONFIG4_RFTYPE_RFMD
;
1010 RTW_WRITE8(regs
, RTW_CONFIG4
, cfg4
);
1012 RTW_WBR(regs
, RTW_CONFIG4
, RTW_CONFIG4
);
1014 RTW_DPRINTF(RTW_DEBUG_INIT
,
1015 ("%s: %s RF programming method, %#02x\n",
1016 sc
->sc_ic
.ic_if
.if_xname
, method
,
1017 RTW_READ8(regs
, RTW_CONFIG4
)));
1020 static __inline
void
1021 rtw_init_channels(struct rtw_softc
*sc
)
1023 const char *name
= NULL
;
1024 struct ieee80211_channel
*chans
= sc
->sc_ic
.ic_channels
;
1026 #define ADD_CHANNEL(_chans, _chan) do { \
1027 _chans[_chan].ic_flags = IEEE80211_CHAN_B; \
1028 _chans[_chan].ic_freq = \
1029 ieee80211_ieee2mhz(_chan, _chans[_chan].ic_flags); \
1032 switch (sc
->sc_locale
) {
1033 case RTW_LOCALE_USA
: /* 1-11 */
1035 for (i
= 1; i
<= 11; i
++)
1036 ADD_CHANNEL(chans
, i
);
1038 case RTW_LOCALE_JAPAN
: /* 1-14 */
1040 ADD_CHANNEL(chans
, 14);
1041 for (i
= 1; i
<= 14; i
++)
1042 ADD_CHANNEL(chans
, i
);
1044 case RTW_LOCALE_EUROPE
: /* 1-13 */
1046 for (i
= 1; i
<= 13; i
++)
1047 ADD_CHANNEL(chans
, i
);
1049 default: /* 10-11 allowed by most countries */
1051 for (i
= 10; i
<= 11; i
++)
1052 ADD_CHANNEL(chans
, i
);
1055 if_printf(&sc
->sc_ic
.ic_if
, "Geographic Location %s\n", name
);
1061 rtw_identify_country(struct rtw_softc
*sc
)
1065 cfg0
= RTW_READ8(&sc
->sc_regs
, RTW_CONFIG0
);
1066 switch (cfg0
& RTW_CONFIG0_GL_MASK
) {
1067 case RTW_CONFIG0_GL_USA
:
1068 case _RTW_CONFIG0_GL_USA
:
1069 sc
->sc_locale
= RTW_LOCALE_USA
;
1071 case RTW_CONFIG0_GL_JAPAN
:
1072 sc
->sc_locale
= RTW_LOCALE_JAPAN
;
1074 case RTW_CONFIG0_GL_EUROPE
:
1075 sc
->sc_locale
= RTW_LOCALE_EUROPE
;
1078 sc
->sc_locale
= RTW_LOCALE_UNKNOWN
;
1084 rtw_identify_sta(struct rtw_softc
*sc
)
1086 static const uint8_t empty_macaddr
[IEEE80211_ADDR_LEN
] = {
1087 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1089 struct rtw_regs
*regs
= &sc
->sc_regs
;
1090 uint8_t *addr
= sc
->sc_ic
.ic_myaddr
;
1091 uint32_t idr0
, idr1
;
1093 idr0
= RTW_READ(regs
, RTW_IDR0
);
1094 idr1
= RTW_READ(regs
, RTW_IDR1
);
1096 addr
[0] = __SHIFTOUT(idr0
, __BITS(0, 7));
1097 addr
[1] = __SHIFTOUT(idr0
, __BITS(8, 15));
1098 addr
[2] = __SHIFTOUT(idr0
, __BITS(16, 23));
1099 addr
[3] = __SHIFTOUT(idr0
, __BITS(24 ,31));
1101 addr
[4] = __SHIFTOUT(idr1
, __BITS(0, 7));
1102 addr
[5] = __SHIFTOUT(idr1
, __BITS(8, 15));
1104 if (IEEE80211_ADDR_EQ(addr
, empty_macaddr
)) {
1105 if_printf(&sc
->sc_ic
.ic_if
, "could not get mac address\n");
1112 rtw_chan2txpower(struct rtw_srom
*sr
, struct ieee80211com
*ic
,
1113 struct ieee80211_channel
*chan
)
1115 u_int idx
= RTW_SR_TXPOWER1
+ ieee80211_chan2ieee(ic
, chan
) - 1;
1117 KASSERT(idx
>= RTW_SR_TXPOWER1
&& idx
<= RTW_SR_TXPOWER14
,
1118 ("%s: channel %d out of range", __func__
,
1119 idx
- RTW_SR_TXPOWER1
+ 1));
1120 return RTW_SR_GET(sr
, idx
);
1124 rtw_txdesc_blk_init_all(struct rtw_softc
*sc
)
1126 /* nfree: the number of free descriptors in each ring.
1127 * The beacon ring is a special case: I do not let the
1128 * driver use all of the descriptors on the beacon ring.
1129 * The reasons are two-fold:
1131 * (1) A BEACON descriptor's OWN bit is (apparently) not
1132 * updated, so the driver cannot easily know if the descriptor
1133 * belongs to it, or if it is racing the NIC. If the NIC
1134 * does not OWN every descriptor, then the driver can safely
1135 * update the descriptors when RTW_TBDA points at tdb_next.
1137 * (2) I hope that the NIC will process more than one BEACON
1138 * descriptor in a single beacon interval, since that will
1139 * enable multiple-BSS support. Since the NIC does not
1140 * clear the OWN bit, there is no natural place for it to
1141 * stop processing BEACON desciptors. Maybe it will *not*
1142 * stop processing them! I do not want to chance the NIC
1143 * looping around and around a saturated beacon ring, so
1144 * I will leave one descriptor unOWNed at all times.
1146 int nfree
[RTW_NTXPRI
] = {
1152 struct rtw_txdesc_blk
*tdb
;
1155 for (tdb
= sc
->sc_txdesc_blk
, pri
= 0; pri
< RTW_NTXPRI
; tdb
++, pri
++) {
1156 tdb
->tdb_nfree
= nfree
[pri
];
1159 bus_dmamap_sync(tdb
->tdb_dmat
, tdb
->tdb_dmamap
,
1160 BUS_DMASYNC_PREWRITE
);
1165 rtw_txsoft_blk_init_all(struct rtw_softc
*sc
)
1167 struct rtw_txsoft_blk
*tsb
;
1170 for (tsb
= sc
->sc_txsoft_blk
, pri
= 0; pri
< RTW_NTXPRI
; tsb
++, pri
++) {
1173 STAILQ_INIT(&tsb
->tsb_dirtyq
);
1174 STAILQ_INIT(&tsb
->tsb_freeq
);
1175 for (i
= 0; i
< tsb
->tsb_ndesc
; i
++) {
1176 struct rtw_txsoft
*ts
;
1178 ts
= &tsb
->tsb_desc
[i
];
1180 STAILQ_INSERT_TAIL(&tsb
->tsb_freeq
, ts
, ts_q
);
1182 tsb
->tsb_tx_timer
= 0;
1187 rtw_rxbuf_dma_map(void *arg
, bus_dma_segment_t
*seg
, int nseg
,
1188 bus_size_t mapsize
, int error
)
1193 KASSERT(nseg
== 1, ("too many rx mbuf seg\n"));
1195 *((bus_addr_t
*)arg
) = seg
->ds_addr
;
1199 rtw_rxsoft_alloc(struct rtw_softc
*sc
, struct rtw_rxsoft
*rs
, int waitok
)
1206 m
= m_getcl(waitok
? MB_WAIT
: MB_DONTWAIT
, MT_DATA
, M_PKTHDR
);
1210 m
->m_pkthdr
.len
= m
->m_len
= MCLBYTES
;
1212 rc
= bus_dmamap_load_mbuf(sc
->sc_rxsoft_dmat
, sc
->sc_rxsoft_dmamap
, m
,
1213 rtw_rxbuf_dma_map
, &paddr
,
1214 waitok
? BUS_DMA_NOWAIT
: BUS_DMA_WAITOK
);
1216 if_printf(&sc
->sc_ic
.ic_if
, "can't load rx mbuf\n");
1221 if (rs
->rs_mbuf
!= NULL
)
1222 bus_dmamap_unload(sc
->sc_rxsoft_dmat
, rs
->rs_dmamap
);
1225 map
= rs
->rs_dmamap
;
1226 rs
->rs_dmamap
= sc
->sc_rxsoft_dmamap
;
1227 sc
->sc_rxsoft_dmamap
= map
;
1230 rs
->rs_phyaddr
= paddr
;
1232 bus_dmamap_sync(sc
->sc_rxsoft_dmat
, rs
->rs_dmamap
, BUS_DMASYNC_PREREAD
);
1237 rtw_rxsoft_blk_init_all(struct rtw_softc
*sc
)
1241 for (i
= 0; i
< RTW_RXQLEN
; i
++) {
1242 struct rtw_rxsoft
*rs
;
1244 rs
= &sc
->sc_rxsoft
[i
];
1245 /* we're in rtw_init, so there should be no mbufs allocated */
1246 KKASSERT(rs
->rs_mbuf
== NULL
);
1248 if (i
== rtw_rxbufs_limit
) {
1249 if_printf(&sc
->sc_ic
.ic_if
,
1250 "TEST hit %d-buffer limit\n", i
);
1254 #endif /* RTW_DEBUG */
1255 rc
= rtw_rxsoft_alloc(sc
, rs
, 1);
1263 rtw_rxdesc_init(struct rtw_softc
*sc
, int idx
, int kick
)
1265 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
1266 struct rtw_rxdesc
*rd
= &rdb
->rdb_desc
[idx
];
1267 struct rtw_rxsoft
*rs
= &sc
->sc_rxsoft
[idx
];
1271 uint32_t octl
, obuf
;
1275 #endif /* RTW_DEBUG */
1277 rd
->rd_buf
= htole32(rs
->rs_phyaddr
);
1279 ctl
= __SHIFTIN(rs
->rs_mbuf
->m_len
, RTW_RXCTL_LENGTH_MASK
) |
1280 RTW_RXCTL_OWN
| RTW_RXCTL_FS
| RTW_RXCTL_LS
;
1282 if (idx
== rdb
->rdb_ndesc
- 1)
1283 ctl
|= RTW_RXCTL_EOR
;
1285 rd
->rd_ctl
= htole32(ctl
);
1287 RTW_DPRINTF(kick
? (RTW_DEBUG_RECV_DESC
| RTW_DEBUG_IO_KICK
)
1288 : RTW_DEBUG_RECV_DESC
,
1289 ("%s: rd %p buf %08x -> %08x ctl %08x -> %08x\n",
1290 sc
->sc_ic
.ic_if
.if_xname
, rd
, le32toh(obuf
),
1291 le32toh(rd
->rd_buf
), le32toh(octl
), le32toh(rd
->rd_ctl
)));
1295 rtw_rxdesc_blk_init_all(struct rtw_softc
*sc
)
1297 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
1300 for (i
= 0; i
< rdb
->rdb_ndesc
; i
++)
1301 rtw_rxdesc_init(sc
, i
, 1);
1303 bus_dmamap_sync(rdb
->rdb_dmat
, rdb
->rdb_dmamap
, BUS_DMASYNC_PREWRITE
);
1307 rtw_io_enable(struct rtw_softc
*sc
, uint8_t flags
, int enable
)
1309 struct rtw_regs
*regs
= &sc
->sc_regs
;
1312 RTW_DPRINTF(RTW_DEBUG_IOSTATE
,
1313 ("%s: %s 0x%02x\n", sc
->sc_ic
.ic_if
.if_xname
,
1314 enable
? "enable" : "disable", flags
));
1316 cr
= RTW_READ8(regs
, RTW_CR
);
1318 /* XXX reference source does not enable MULRW */
1320 /* enable PCI Read/Write Multiple */
1324 RTW_RBW(regs
, RTW_CR
, RTW_CR
); /* XXX paranoia? */
1329 RTW_WRITE8(regs
, RTW_CR
, cr
);
1330 RTW_SYNC(regs
, RTW_CR
, RTW_CR
);
1334 rtw_intr_rx(struct rtw_softc
*sc
, uint16_t isr
)
1336 #define IS_BEACON(__fc0) \
1337 ((__fc0 & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==\
1338 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_BEACON))
1342 * hardware -> net80211
1344 static const int ratetbl
[4] = { 2, 4, 11, 22 };
1345 struct ifnet
*ifp
= &sc
->sc_if
;
1346 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
1347 int next
, nproc
= 0, sync
= 0;
1349 KKASSERT(rdb
->rdb_next
< rdb
->rdb_ndesc
);
1351 bus_dmamap_sync(rdb
->rdb_dmat
, rdb
->rdb_dmamap
, BUS_DMASYNC_POSTREAD
);
1353 for (next
= rdb
->rdb_next
; ; next
= (next
+ 1) % rdb
->rdb_ndesc
) {
1354 struct ieee80211_node
*ni
;
1355 struct ieee80211_frame_min
*wh
;
1356 struct rtw_rxdesc
*rd
;
1357 struct rtw_rxsoft
*rs
;
1359 int hwrate
, len
, rate
, rssi
, sq
, error
;
1360 uint32_t hrssi
, hstat
, htsfth
, htsftl
;
1362 rd
= &rdb
->rdb_desc
[next
];
1363 rs
= &sc
->sc_rxsoft
[next
];
1365 hstat
= le32toh(rd
->rd_stat
);
1366 hrssi
= le32toh(rd
->rd_rssi
);
1367 htsfth
= le32toh(rd
->rd_tsfth
);
1368 htsftl
= le32toh(rd
->rd_tsftl
);
1370 RTW_DPRINTF(RTW_DEBUG_RECV_DESC
,
1371 ("%s: rxdesc[%d] hstat %08x hrssi %08x "
1372 "htsft %08x%08x\n", ifp
->if_xname
,
1373 next
, hstat
, hrssi
, htsfth
, htsftl
));
1377 /* still belongs to NIC */
1378 if (hstat
& RTW_RXSTAT_OWN
) {
1382 /* sometimes the NIC skips to the 0th descriptor */
1383 rd
= &rdb
->rdb_desc
[0];
1384 if (rd
->rd_stat
& htole32(RTW_RXSTAT_OWN
))
1386 RTW_DPRINTF(RTW_DEBUG_BUGS
,
1387 ("%s: NIC skipped from rxdesc[%u] "
1388 "to rxdesc[0]\n", ifp
->if_xname
, next
));
1389 next
= rdb
->rdb_ndesc
- 1;
1394 #define PRINTSTAT(flag) do { \
1395 if ((hstat & flag) != 0) { \
1396 kprintf("%s" #flag, delim); \
1400 if (rtw_debug
& RTW_DEBUG_RECV_DESC
) {
1401 const char *delim
= "<";
1403 if_printf(ifp
, "%s", "");
1404 if ((hstat
& RTW_RXSTAT_DEBUG
) != 0) {
1405 kprintf("status %08x", hstat
);
1406 PRINTSTAT(RTW_RXSTAT_SPLCP
);
1407 PRINTSTAT(RTW_RXSTAT_MAR
);
1408 PRINTSTAT(RTW_RXSTAT_PAR
);
1409 PRINTSTAT(RTW_RXSTAT_BAR
);
1410 PRINTSTAT(RTW_RXSTAT_PWRMGT
);
1411 PRINTSTAT(RTW_RXSTAT_CRC32
);
1412 PRINTSTAT(RTW_RXSTAT_ICV
);
1416 #endif /* RTW_DEBUG */
1418 if (hstat
& RTW_RXSTAT_IOERROR
) {
1419 if_printf(ifp
, "DMA error/FIFO overflow %08x, "
1420 "rx descriptor %d\n",
1421 hstat
& RTW_RXSTAT_IOERROR
, next
);
1426 len
= __SHIFTOUT(hstat
, RTW_RXSTAT_LENGTH_MASK
);
1427 if (len
< IEEE80211_MIN_LEN
) {
1428 sc
->sc_ic
.ic_stats
.is_rx_tooshort
++;
1432 /* CRC is included with the packet; trim it off. */
1433 len
-= IEEE80211_CRC_LEN
;
1435 hwrate
= __SHIFTOUT(hstat
, RTW_RXSTAT_RATE_MASK
);
1436 if (hwrate
>= sizeof(ratetbl
) / sizeof(ratetbl
[0])) {
1437 if_printf(ifp
, "unknown rate #%d\n",
1438 __SHIFTOUT(hstat
, RTW_RXSTAT_RATE_MASK
));
1442 rate
= ratetbl
[hwrate
];
1445 RTW_DPRINTF(RTW_DEBUG_RECV_DESC
,
1446 ("%s rate %d.%d Mb/s, time %08x%08x\n",
1447 ifp
->if_xname
, (rate
* 5) / 10,
1448 (rate
* 5) % 10, htsfth
, htsftl
));
1449 #endif /* RTW_DEBUG */
1451 if ((hstat
& RTW_RXSTAT_RES
) &&
1452 sc
->sc_ic
.ic_opmode
!= IEEE80211_M_MONITOR
)
1455 /* if bad flags, skip descriptor */
1456 if ((hstat
& RTW_RXSTAT_ONESEG
) != RTW_RXSTAT_ONESEG
) {
1457 if_printf(ifp
, "too many rx segments\n");
1461 bus_dmamap_sync(sc
->sc_rxsoft_dmat
, rs
->rs_dmamap
,
1462 BUS_DMASYNC_POSTREAD
);
1466 /* if temporarily out of memory, re-use mbuf */
1467 error
= rtw_rxsoft_alloc(sc
, rs
, 0);
1469 if_printf(ifp
, "%s: rtw_rxsoft_alloc(, %d) failed, "
1470 "dropping packet\n", ifp
->if_xname
, next
);
1474 rssi
= __SHIFTOUT(hrssi
, RTW_RXRSSI_RSSI
);
1475 sq
= __SHIFTOUT(hrssi
, RTW_RXRSSI_SQ
);
1477 rssi
= rtw_get_rssi(sc
, rssi
, sq
);
1480 * Note well: now we cannot recycle the rs_mbuf unless
1481 * we restore its original length.
1483 m
->m_pkthdr
.rcvif
= ifp
;
1484 m
->m_pkthdr
.len
= m
->m_len
= len
;
1486 wh
= mtod(m
, struct ieee80211_frame_min
*);
1488 if (!IS_BEACON(wh
->i_fc
[0]))
1489 sc
->sc_led_state
.ls_event
|= RTW_LED_S_RX
;
1491 /* TBD use _MAR, _BAR, _PAR flags as hints to _find_rxnode? */
1492 ni
= ieee80211_find_rxnode(&sc
->sc_ic
, wh
);
1494 sc
->sc_tsfth
= htsfth
;
1497 if ((ifp
->if_flags
& (IFF_DEBUG
| IFF_LINK2
)) ==
1498 (IFF_DEBUG
| IFF_LINK2
)) {
1499 ieee80211_dump_pkt(mtod(m
, uint8_t *), m
->m_pkthdr
.len
,
1502 #endif /* RTW_DEBUG */
1504 if (sc
->sc_radiobpf
!= NULL
) {
1505 struct rtw_rx_radiotap_header
*rr
= &sc
->sc_rxtap
;
1508 htole64(((uint64_t)htsfth
<< 32) | htsftl
);
1510 if ((hstat
& RTW_RXSTAT_SPLCP
) != 0)
1511 rr
->rr_flags
= IEEE80211_RADIOTAP_F_SHORTPRE
;
1515 rr
->rr_antsignal
= rssi
;
1516 rr
->rr_barker_lock
= htole16(sq
);
1518 bpf_ptap(sc
->sc_radiobpf
, m
, rr
, sizeof(sc
->sc_rxtapu
));
1521 ieee80211_input(&sc
->sc_ic
, m
, ni
, rssi
, htsftl
);
1522 ieee80211_free_node(ni
);
1524 rtw_rxdesc_init(sc
, next
, 0);
1529 bus_dmamap_sync(rdb
->rdb_dmat
, rdb
->rdb_dmamap
,
1530 BUS_DMASYNC_PREWRITE
);
1533 rdb
->rdb_next
= next
;
1534 KKASSERT(rdb
->rdb_next
< rdb
->rdb_ndesc
);
1538 static __inline
void
1539 rtw_txsoft_release(bus_dma_tag_t dmat
, struct rtw_txsoft
*ts
,
1540 int data_retry
, int rts_retry
, int error
, int ratectl
)
1543 struct ieee80211_node
*ni
;
1545 if (!ts
->ts_ratectl
)
1550 KKASSERT(m
!= NULL
);
1551 KKASSERT(ni
!= NULL
);
1556 struct ieee80211_ratectl_res rc_res
;
1558 rc_res
.rc_res_rateidx
= ts
->ts_rateidx
;
1559 rc_res
.rc_res_tries
= data_retry
+ 1;
1561 ieee80211_ratectl_tx_complete(ni
, m
->m_pkthdr
.len
,
1563 data_retry
, rts_retry
,
1567 bus_dmamap_sync(dmat
, ts
->ts_dmamap
, BUS_DMASYNC_POSTWRITE
);
1568 bus_dmamap_unload(dmat
, ts
->ts_dmamap
);
1570 ieee80211_free_node(ni
);
1573 static __inline
void
1574 rtw_collect_txpkt(struct rtw_softc
*sc
, struct rtw_txdesc_blk
*tdb
,
1575 struct rtw_txsoft
*ts
, int ndesc
)
1578 int data_retry
, rts_retry
, error
;
1579 struct rtw_txdesc
*tdn
;
1580 const char *condstring
;
1581 struct ifnet
*ifp
= &sc
->sc_if
;
1583 tdb
->tdb_nfree
+= ndesc
;
1585 tdn
= &tdb
->tdb_desc
[ts
->ts_last
];
1587 hstat
= le32toh(tdn
->td_stat
);
1588 rts_retry
= __SHIFTOUT(hstat
, RTW_TXSTAT_RTSRETRY_MASK
);
1589 data_retry
= __SHIFTOUT(hstat
, RTW_TXSTAT_DRC_MASK
);
1591 ifp
->if_collisions
+= rts_retry
+ data_retry
;
1593 if ((hstat
& RTW_TXSTAT_TOK
) != 0) {
1598 condstring
= "error";
1602 rtw_txsoft_release(sc
->sc_txsoft_dmat
, ts
, data_retry
, rts_retry
,
1605 DPRINTF(sc
, RTW_DEBUG_XMIT_DESC
,
1606 ("%s: ts %p txdesc[%d, %d] %s tries rts %u data %u\n",
1607 ifp
->if_xname
, ts
, ts
->ts_first
, ts
->ts_last
,
1608 condstring
, rts_retry
, data_retry
));
1612 rtw_reset_oactive(struct rtw_softc
*sc
)
1616 short oflags
= sc
->sc_if
.if_flags
;
1619 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
1620 struct rtw_txsoft_blk
*tsb
= &sc
->sc_txsoft_blk
[pri
];
1621 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[pri
];
1623 if (!STAILQ_EMPTY(&tsb
->tsb_freeq
) && tdb
->tdb_nfree
> 0)
1624 sc
->sc_if
.if_flags
&= ~IFF_OACTIVE
;
1628 if (oflags
!= sc
->sc_if
.if_flags
) {
1629 DPRINTF(sc
, RTW_DEBUG_OACTIVE
,
1630 ("%s: reset OACTIVE\n", sc
->sc_ic
.ic_if
.if_xname
));
1635 /* Collect transmitted packets. */
1636 static __inline
void
1637 rtw_collect_txring(struct rtw_softc
*sc
, struct rtw_txsoft_blk
*tsb
,
1638 struct rtw_txdesc_blk
*tdb
, int force
)
1640 struct rtw_txsoft
*ts
;
1643 while ((ts
= STAILQ_FIRST(&tsb
->tsb_dirtyq
)) != NULL
) {
1644 ndesc
= 1 + ts
->ts_last
- ts
->ts_first
;
1645 if (ts
->ts_last
< ts
->ts_first
)
1646 ndesc
+= tdb
->tdb_ndesc
;
1648 KKASSERT(ndesc
> 0);
1650 bus_dmamap_sync(tdb
->tdb_dmat
, tdb
->tdb_dmamap
,
1651 BUS_DMASYNC_POSTREAD
);
1656 for (i
= ts
->ts_first
; ; i
= RTW_NEXT_IDX(tdb
, i
)) {
1657 tdb
->tdb_desc
[i
].td_stat
&=
1658 ~htole32(RTW_TXSTAT_OWN
);
1659 if (i
== ts
->ts_last
)
1662 bus_dmamap_sync(tdb
->tdb_dmat
, tdb
->tdb_dmamap
,
1663 BUS_DMASYNC_PREWRITE
);
1664 } else if ((tdb
->tdb_desc
[ts
->ts_last
].td_stat
&
1665 htole32(RTW_TXSTAT_OWN
)) != 0) {
1669 rtw_collect_txpkt(sc
, tdb
, ts
, ndesc
);
1670 STAILQ_REMOVE_HEAD(&tsb
->tsb_dirtyq
, ts_q
);
1671 STAILQ_INSERT_TAIL(&tsb
->tsb_freeq
, ts
, ts_q
);
1673 /* no more pending transmissions, cancel watchdog */
1675 tsb
->tsb_tx_timer
= 0;
1676 rtw_reset_oactive(sc
);
1680 rtw_intr_tx(struct rtw_softc
*sc
, uint16_t isr
)
1684 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
1685 rtw_collect_txring(sc
, &sc
->sc_txsoft_blk
[pri
],
1686 &sc
->sc_txdesc_blk
[pri
], 0);
1689 rtw_start(&sc
->sc_ic
.ic_if
);
1692 static __inline
struct mbuf
*
1693 rtw_beacon_alloc(struct rtw_softc
*sc
, struct ieee80211_node
*ni
)
1695 struct ieee80211com
*ic
= &sc
->sc_ic
;
1696 struct ieee80211_beacon_offsets boff
;
1699 m
= ieee80211_beacon_alloc(ic
, ni
, &boff
);
1701 RTW_DPRINTF(RTW_DEBUG_BEACON
,
1702 ("%s: m %p len %u\n", ic
->ic_if
.if_xname
, m
,
1709 rtw_intr_beacon(struct rtw_softc
*sc
, uint16_t isr
)
1711 struct ieee80211com
*ic
= &sc
->sc_ic
;
1712 struct rtw_regs
*regs
= &sc
->sc_regs
;
1713 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[RTW_TXPRIBCN
];
1714 struct rtw_txsoft_blk
*tsb
= &sc
->sc_txsoft_blk
[RTW_TXPRIBCN
];
1717 uint32_t tsfth
, tsftl
;
1719 tsfth
= RTW_READ(regs
, RTW_TSFTRH
);
1720 tsftl
= RTW_READ(regs
, RTW_TSFTRL
);
1723 if (isr
& (RTW_INTR_TBDOK
| RTW_INTR_TBDER
)) {
1725 int next
= rtw_txring_next(regs
, tdb
);
1728 RTW_DPRINTF(RTW_DEBUG_BEACON
,
1729 ("%s: beacon ring %sprocessed, "
1730 "isr = %#04x, next %d expected %d, %llu\n",
1732 (next
== tdb
->tdb_next
) ? "" : "un",
1733 isr
, next
, tdb
->tdb_next
,
1734 (uint64_t)tsfth
<< 32 | tsftl
));
1736 if ((RTW_READ8(regs
, RTW_TPPOLL
) & RTW_TPPOLL_BQ
) == 0){
1737 rtw_collect_txring(sc
, tsb
, tdb
, 1);
1741 /* Start beacon transmission. */
1743 if ((isr
& RTW_INTR_BCNINT
) && ic
->ic_state
== IEEE80211_S_RUN
&&
1744 STAILQ_EMPTY(&tsb
->tsb_dirtyq
)) {
1747 RTW_DPRINTF(RTW_DEBUG_BEACON
,
1748 ("%s: beacon prep. time, isr = %#04x, %llu\n",
1749 ic
->ic_if
.if_xname
, isr
,
1750 (uint64_t)tsfth
<< 32 | tsftl
));
1752 m
= rtw_beacon_alloc(sc
, ic
->ic_bss
);
1754 if_printf(&ic
->ic_if
, "could not allocate beacon\n");
1758 m
->m_pkthdr
.rcvif
= (void *)ieee80211_ref_node(ic
->ic_bss
);
1760 IF_ENQUEUE(&sc
->sc_beaconq
, m
);
1762 rtw_start(&ic
->ic_if
);
1767 rtw_intr_atim(struct rtw_softc
*sc
)
1775 rtw_dump_rings(struct rtw_softc
*sc
)
1777 struct rtw_rxdesc_blk
*rdb
;
1780 if ((rtw_debug
& RTW_DEBUG_IO_KICK
) == 0)
1783 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
1784 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[pri
];
1786 if_printf(&sc
->sc_ic
.ic_if
, "txpri %d ndesc %d nfree %d\n",
1787 pri
, tdb
->tdb_ndesc
, tdb
->tdb_nfree
);
1788 for (desc
= 0; desc
< tdb
->tdb_ndesc
; desc
++)
1789 rtw_print_txdesc(sc
, ".", NULL
, tdb
, desc
);
1792 rdb
= &sc
->sc_rxdesc_blk
;
1794 for (desc
= 0; desc
< RTW_RXQLEN
; desc
++) {
1795 struct rtw_rxdesc
*rd
= &rdb
->rdb_desc
[desc
];
1797 if_printf(&sc
->sc_ic
.ic_if
,
1798 "%sctl %08x rsvd0/rssi %08x buf/tsftl %08x "
1799 "rsvd1/tsfth %08x\n",
1800 (desc
>= rdb
->rdb_ndesc
) ? "UNUSED " : "",
1801 le32toh(rd
->rd_ctl
), le32toh(rd
->rd_rssi
),
1802 le32toh(rd
->rd_buf
), le32toh(rd
->rd_tsfth
));
1805 #endif /* RTW_DEBUG */
1808 rtw_hwring_setup(struct rtw_softc
*sc
)
1810 struct rtw_regs
*regs
= &sc
->sc_regs
;
1811 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
1814 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
1815 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[pri
];
1817 RTW_WRITE(regs
, tdb
->tdb_basereg
, tdb
->tdb_base
);
1818 RTW_DPRINTF(RTW_DEBUG_XMIT_DESC
,
1819 ("%s: reg[tdb->tdb_basereg] <- %u\n",
1820 sc
->sc_ic
.ic_if
.if_xname
, tdb
->tdb_base
));
1823 RTW_WRITE(regs
, RTW_RDSAR
, rdb
->rdb_base
);
1824 RTW_DPRINTF(RTW_DEBUG_RECV_DESC
,
1825 ("%s: reg[RDSAR] <- %u\n", sc
->sc_ic
.ic_if
.if_xname
,
1828 RTW_SYNC(regs
, RTW_TLPDA
, RTW_RDSAR
);
1832 rtw_swring_setup(struct rtw_softc
*sc
)
1836 rtw_txdesc_blk_init_all(sc
);
1837 rtw_txsoft_blk_init_all(sc
);
1839 rc
= rtw_rxsoft_blk_init_all(sc
);
1841 if_printf(&sc
->sc_ic
.ic_if
, "could not allocate rx buffers\n");
1845 rtw_rxdesc_blk_init_all(sc
);
1846 sc
->sc_rxdesc_blk
.rdb_next
= 0;
1851 rtw_txring_next(struct rtw_regs
*regs
, struct rtw_txdesc_blk
*tdb
)
1853 return (le32toh(RTW_READ(regs
, tdb
->tdb_basereg
)) - tdb
->tdb_base
) /
1854 sizeof(struct rtw_txdesc
);
1858 rtw_txring_fixup(struct rtw_softc
*sc
)
1860 struct rtw_regs
*regs
= &sc
->sc_regs
;
1863 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
1864 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[pri
];
1867 next
= rtw_txring_next(regs
, tdb
);
1868 if (tdb
->tdb_next
== next
)
1870 if_printf(&sc
->sc_ic
.ic_if
,
1871 "tx-ring %d expected next %d, read %d\n",
1872 pri
, tdb
->tdb_next
, next
);
1873 tdb
->tdb_next
= MIN(next
, tdb
->tdb_ndesc
- 1);
1878 rtw_rxring_fixup(struct rtw_softc
*sc
)
1880 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
1884 rdsar
= le32toh(RTW_READ(&sc
->sc_regs
, RTW_RDSAR
));
1885 next
= (rdsar
- rdb
->rdb_base
) / sizeof(struct rtw_rxdesc
);
1887 if (rdb
->rdb_next
!= next
) {
1888 if_printf(&sc
->sc_ic
.ic_if
,
1889 "rx-ring expected next %d, read %d\n",
1890 rdb
->rdb_next
, next
);
1891 rdb
->rdb_next
= MIN(next
, rdb
->rdb_ndesc
- 1);
1896 rtw_txdesc_blk_reset_all(struct rtw_softc
*sc
)
1900 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
1901 rtw_collect_txring(sc
, &sc
->sc_txsoft_blk
[pri
],
1902 &sc
->sc_txdesc_blk
[pri
], 1);
1907 rtw_intr_ioerror(struct rtw_softc
*sc
, uint16_t isr
)
1909 struct rtw_regs
*regs
= &sc
->sc_regs
;
1910 int xmtr
= 0, rcvr
= 0;
1913 if (isr
& RTW_INTR_TXFOVW
) {
1914 if_printf(&sc
->sc_ic
.ic_if
, "tx fifo underflow\n");
1916 cr
|= RTW_CR_TE
| RTW_CR_RE
;
1919 if (isr
& (RTW_INTR_RDU
| RTW_INTR_RXFOVW
)) {
1924 RTW_DPRINTF(RTW_DEBUG_BUGS
,
1925 ("%s: restarting xmit/recv, isr %04x\n",
1926 sc
->sc_ic
.ic_if
.if_xname
, isr
));
1930 #endif /* RTW_DEBUG */
1932 rtw_io_enable(sc
, cr
, 0);
1934 /* Collect rx'd packets. Refresh rx buffers. */
1939 * Collect tx'd packets.
1940 * XXX let's hope this stops the transmit timeouts.
1943 rtw_txdesc_blk_reset_all(sc
);
1945 RTW_WRITE16(regs
, RTW_IMR
, 0);
1946 RTW_SYNC(regs
, RTW_IMR
, RTW_IMR
);
1948 if (rtw_do_chip_reset
) {
1949 rtw_chip_reset1(sc
);
1950 rtw_wep_setkeys(sc
);
1953 rtw_rxdesc_blk_init_all(sc
);
1957 #endif /* RTW_DEBUG */
1959 RTW_WRITE16(regs
, RTW_IMR
, sc
->sc_inten
);
1960 RTW_SYNC(regs
, RTW_IMR
, RTW_IMR
);
1963 rtw_rxring_fixup(sc
);
1965 rtw_io_enable(sc
, cr
, 1);
1968 rtw_txring_fixup(sc
);
1971 static __inline
void
1972 rtw_suspend_ticks(struct rtw_softc
*sc
)
1974 RTW_DPRINTF(RTW_DEBUG_TIMEOUT
,
1975 ("%s: suspending ticks\n", sc
->sc_ic
.ic_if
.if_xname
));
1980 rtw_resume_ticks(struct rtw_softc
*sc
)
1982 uint32_t tsftrl0
, tsftrl1
, next_tick
;
1983 struct rtw_regs
*regs
= &sc
->sc_regs
;
1985 tsftrl0
= RTW_READ(regs
, RTW_TSFTRL
);
1987 tsftrl1
= RTW_READ(regs
, RTW_TSFTRL
);
1988 next_tick
= tsftrl1
+ 1000000;
1989 RTW_WRITE(regs
, RTW_TINT
, next_tick
);
1993 RTW_DPRINTF(RTW_DEBUG_TIMEOUT
,
1994 ("%s: resume ticks delta %#08x now %#08x next %#08x\n",
1995 sc
->sc_ic
.ic_if
.if_xname
, tsftrl1
- tsftrl0
, tsftrl1
,
2000 rtw_intr_timeout(struct rtw_softc
*sc
)
2002 RTW_DPRINTF(RTW_DEBUG_TIMEOUT
,
2003 ("%s: timeout\n", sc
->sc_ic
.ic_if
.if_xname
));
2005 rtw_resume_ticks(sc
);
2011 struct rtw_softc
*sc
= arg
;
2012 struct rtw_regs
*regs
= &sc
->sc_regs
;
2013 struct ifnet
*ifp
= &sc
->sc_if
;
2017 * If the interface isn't running, the interrupt couldn't
2018 * possibly have come from us.
2020 if ((sc
->sc_flags
& RTW_F_ENABLED
) == 0 ||
2021 (ifp
->if_flags
& IFF_RUNNING
) == 0) {
2022 RTW_DPRINTF(RTW_DEBUG_INTR
,
2023 ("%s: stray interrupt\n", ifp
->if_xname
));
2027 for (i
= 0; i
< 10; i
++) {
2030 isr
= RTW_READ16(regs
, RTW_ISR
);
2032 RTW_WRITE16(regs
, RTW_ISR
, isr
);
2033 RTW_WBR(regs
, RTW_ISR
, RTW_ISR
);
2035 if (sc
->sc_intr_ack
!= NULL
)
2036 sc
->sc_intr_ack(regs
);
2042 #define PRINTINTR(flag) do { \
2043 if ((isr & flag) != 0) { \
2044 kprintf("%s" #flag, delim); \
2049 if ((rtw_debug
& RTW_DEBUG_INTR
) != 0 && isr
!= 0) {
2050 const char *delim
= "<";
2052 if_printf(ifp
, "reg[ISR] = %x", isr
);
2054 PRINTINTR(RTW_INTR_TXFOVW
);
2055 PRINTINTR(RTW_INTR_TIMEOUT
);
2056 PRINTINTR(RTW_INTR_BCNINT
);
2057 PRINTINTR(RTW_INTR_ATIMINT
);
2058 PRINTINTR(RTW_INTR_TBDER
);
2059 PRINTINTR(RTW_INTR_TBDOK
);
2060 PRINTINTR(RTW_INTR_THPDER
);
2061 PRINTINTR(RTW_INTR_THPDOK
);
2062 PRINTINTR(RTW_INTR_TNPDER
);
2063 PRINTINTR(RTW_INTR_TNPDOK
);
2064 PRINTINTR(RTW_INTR_RXFOVW
);
2065 PRINTINTR(RTW_INTR_RDU
);
2066 PRINTINTR(RTW_INTR_TLPDER
);
2067 PRINTINTR(RTW_INTR_TLPDOK
);
2068 PRINTINTR(RTW_INTR_RER
);
2069 PRINTINTR(RTW_INTR_ROK
);
2074 #endif /* RTW_DEBUG */
2076 if (isr
& RTW_INTR_RX
)
2077 rtw_intr_rx(sc
, isr
& RTW_INTR_RX
);
2078 if (isr
& RTW_INTR_TX
)
2079 rtw_intr_tx(sc
, isr
& RTW_INTR_TX
);
2080 if (isr
& RTW_INTR_BEACON
)
2081 rtw_intr_beacon(sc
, isr
& RTW_INTR_BEACON
);
2082 if (isr
& RTW_INTR_ATIMINT
)
2084 if (isr
& RTW_INTR_IOERROR
)
2085 rtw_intr_ioerror(sc
, isr
& RTW_INTR_IOERROR
);
2086 if (isr
& RTW_INTR_TIMEOUT
)
2087 rtw_intr_timeout(sc
);
2091 /* Must be called at splnet. */
2093 rtw_stop(struct rtw_softc
*sc
, int disable
)
2095 struct ieee80211com
*ic
= &sc
->sc_ic
;
2096 struct ifnet
*ifp
= &ic
->ic_if
;
2097 struct rtw_regs
*regs
= &sc
->sc_regs
;
2100 if ((sc
->sc_flags
& RTW_F_ENABLED
) == 0)
2103 rtw_suspend_ticks(sc
);
2105 ieee80211_new_state(ic
, IEEE80211_S_INIT
, -1);
2107 if ((sc
->sc_flags
& RTW_F_INVALID
) == 0) {
2108 /* Disable interrupts. */
2109 RTW_WRITE16(regs
, RTW_IMR
, 0);
2111 RTW_WBW(regs
, RTW_TPPOLL
, RTW_IMR
);
2114 * Stop the transmit and receive processes. First stop DMA,
2115 * then disable receiver and transmitter.
2117 RTW_WRITE8(regs
, RTW_TPPOLL
, RTW_TPPOLL_SALL
);
2119 RTW_SYNC(regs
, RTW_TPPOLL
, RTW_IMR
);
2121 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
, 0);
2124 /* Free pending TX mbufs */
2125 for (i
= 0; i
< RTW_NTXPRI
; ++i
) {
2126 struct rtw_txsoft_blk
*tsb
= &sc
->sc_txsoft_blk
[i
];
2127 struct rtw_txsoft
*ts
;
2129 while ((ts
= STAILQ_FIRST(&tsb
->tsb_dirtyq
)) != NULL
) {
2130 rtw_txsoft_release(sc
->sc_txsoft_dmat
, ts
, 0, 0, 0, 0);
2131 STAILQ_REMOVE_HEAD(&tsb
->tsb_dirtyq
, ts_q
);
2132 STAILQ_INSERT_TAIL(&tsb
->tsb_freeq
, ts
, ts_q
);
2134 tsb
->tsb_tx_timer
= 0;
2137 /* Free pending RX mbufs */
2138 for (i
= 0; i
< RTW_RXQLEN
; i
++) {
2139 struct rtw_rxsoft
*rs
= &sc
->sc_rxsoft
[i
];
2141 if (rs
->rs_mbuf
!= NULL
) {
2142 bus_dmamap_sync(sc
->sc_rxsoft_dmat
, rs
->rs_dmamap
,
2143 BUS_DMASYNC_POSTREAD
);
2144 bus_dmamap_unload(sc
->sc_rxsoft_dmat
, rs
->rs_dmamap
);
2145 m_freem(rs
->rs_mbuf
);
2153 /* Mark the interface as not running. Cancel the watchdog timer. */
2154 ifp
->if_flags
&= ~(IFF_RUNNING
| IFF_OACTIVE
);
2160 rtw_pwrstate_string(enum rtw_pwrstate power
)
2173 #endif /* RTW_DEBUG */
2176 * XXX For Maxim, I am using the RFMD settings gleaned from the
2177 * reference driver, plus a magic Maxim "ON" value that comes from
2178 * the Realtek document "Windows PG for Rtl8180."
2181 rtw_maxim_pwrstate(struct rtw_regs
*regs
, enum rtw_pwrstate power
,
2182 int before_rf
, int digphy
)
2186 anaparm
= RTW_READ(regs
, RTW_ANAPARM
);
2187 anaparm
&= ~(RTW_ANAPARM_RFPOW_MASK
| RTW_ANAPARM_TXDACOFF
);
2193 anaparm
|= RTW_ANAPARM_RFPOW_MAXIM_OFF
;
2194 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2199 anaparm
|= RTW_ANAPARM_RFPOW_MAXIM_SLEEP
;
2200 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2205 anaparm
|= RTW_ANAPARM_RFPOW_MAXIM_ON
;
2208 RTW_DPRINTF(RTW_DEBUG_PWR
,
2209 ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2210 __func__
, rtw_pwrstate_string(power
),
2211 (before_rf
) ? "before" : "after", anaparm
));
2213 RTW_WRITE(regs
, RTW_ANAPARM
, anaparm
);
2214 RTW_SYNC(regs
, RTW_ANAPARM
, RTW_ANAPARM
);
2217 /* XXX I am using the RFMD settings gleaned from the reference
2218 * driver. They agree
2221 rtw_rfmd_pwrstate(struct rtw_regs
*regs
, enum rtw_pwrstate power
,
2222 int before_rf
, int digphy
)
2226 anaparm
= RTW_READ(regs
, RTW_ANAPARM
);
2227 anaparm
&= ~(RTW_ANAPARM_RFPOW_MASK
| RTW_ANAPARM_TXDACOFF
);
2233 anaparm
|= RTW_ANAPARM_RFPOW_RFMD_OFF
;
2234 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2239 anaparm
|= RTW_ANAPARM_RFPOW_RFMD_SLEEP
;
2240 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2245 anaparm
|= RTW_ANAPARM_RFPOW_RFMD_ON
;
2248 RTW_DPRINTF(RTW_DEBUG_PWR
,
2249 ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2250 __func__
, rtw_pwrstate_string(power
),
2251 (before_rf
) ? "before" : "after", anaparm
));
2253 RTW_WRITE(regs
, RTW_ANAPARM
, anaparm
);
2254 RTW_SYNC(regs
, RTW_ANAPARM
, RTW_ANAPARM
);
2258 rtw_philips_pwrstate(struct rtw_regs
*regs
, enum rtw_pwrstate power
,
2259 int before_rf
, int digphy
)
2263 anaparm
= RTW_READ(regs
, RTW_ANAPARM
);
2264 anaparm
&= ~(RTW_ANAPARM_RFPOW_MASK
| RTW_ANAPARM_TXDACOFF
);
2270 anaparm
|= RTW_ANAPARM_RFPOW_PHILIPS_OFF
;
2271 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2276 anaparm
|= RTW_ANAPARM_RFPOW_PHILIPS_SLEEP
;
2277 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2283 anaparm
|= RTW_ANAPARM_RFPOW_DIG_PHILIPS_ON
;
2285 anaparm
|= RTW_ANAPARM_TXDACOFF
;
2287 anaparm
|= RTW_ANAPARM_RFPOW_ANA_PHILIPS_ON
;
2290 RTW_DPRINTF(RTW_DEBUG_PWR
,
2291 ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2292 __func__
, rtw_pwrstate_string(power
),
2293 (before_rf
) ? "before" : "after", anaparm
));
2295 RTW_WRITE(regs
, RTW_ANAPARM
, anaparm
);
2296 RTW_SYNC(regs
, RTW_ANAPARM
, RTW_ANAPARM
);
2299 static __inline
void
2300 rtw_pwrstate0(struct rtw_softc
*sc
, enum rtw_pwrstate power
, int before_rf
,
2303 rtw_set_access(sc
, RTW_ACCESS_ANAPARM
);
2304 sc
->sc_pwrstate_cb(&sc
->sc_regs
, power
, before_rf
, digphy
);
2305 rtw_set_access(sc
, RTW_ACCESS_NONE
);
2309 rtw_pwrstate(struct rtw_softc
*sc
, enum rtw_pwrstate power
)
2313 RTW_DPRINTF(RTW_DEBUG_PWR
,
2314 ("%s: %s->%s\n", sc
->sc_ic
.ic_if
.if_xname
,
2315 rtw_pwrstate_string(sc
->sc_pwrstate
),
2316 rtw_pwrstate_string(power
)));
2318 if (sc
->sc_pwrstate
== power
)
2321 rtw_pwrstate0(sc
, power
, 1, sc
->sc_flags
& RTW_F_DIGPHY
);
2322 rc
= rtw_rf_pwrstate(sc
->sc_rf
, power
);
2323 rtw_pwrstate0(sc
, power
, 0, sc
->sc_flags
& RTW_F_DIGPHY
);
2337 sc
->sc_pwrstate
= power
;
2339 sc
->sc_pwrstate
= RTW_OFF
;
2344 rtw_tune(struct rtw_softc
*sc
)
2346 struct ieee80211com
*ic
= &sc
->sc_ic
;
2347 struct rtw_tx_radiotap_header
*rt
= &sc
->sc_txtap
;
2348 struct rtw_rx_radiotap_header
*rr
= &sc
->sc_rxtap
;
2350 int rc
, antdiv
, dflantb
;
2352 antdiv
= sc
->sc_flags
& RTW_F_ANTDIV
;
2353 dflantb
= sc
->sc_flags
& RTW_F_DFLANTB
;
2355 chan
= ieee80211_chan2ieee(ic
, ic
->ic_curchan
);
2356 if (chan
== IEEE80211_CHAN_ANY
)
2357 panic("%s: chan == IEEE80211_CHAN_ANY\n", ic
->ic_if
.if_xname
);
2359 rt
->rt_chan_freq
= htole16(ic
->ic_curchan
->ic_freq
);
2360 rt
->rt_chan_flags
= htole16(ic
->ic_curchan
->ic_flags
);
2362 rr
->rr_chan_freq
= htole16(ic
->ic_curchan
->ic_freq
);
2363 rr
->rr_chan_flags
= htole16(ic
->ic_curchan
->ic_flags
);
2365 if (chan
== sc
->sc_cur_chan
) {
2366 RTW_DPRINTF(RTW_DEBUG_TUNE
,
2367 ("%s: already tuned chan #%d\n",
2368 ic
->ic_if
.if_xname
, chan
));
2372 rtw_suspend_ticks(sc
);
2374 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
, 0);
2376 /* TBD wait for Tx to complete */
2378 KKASSERT((sc
->sc_flags
& RTW_F_ENABLED
) != 0);
2380 rc
= rtw_phy_init(&sc
->sc_regs
, sc
->sc_rf
,
2381 rtw_chan2txpower(&sc
->sc_srom
, ic
, ic
->ic_curchan
),
2382 sc
->sc_csthr
, ic
->ic_curchan
->ic_freq
, antdiv
,
2385 /* XXX condition on powersaving */
2386 kprintf("%s: phy init failed\n", ic
->ic_if
.if_xname
);
2389 sc
->sc_cur_chan
= chan
;
2391 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
, 1);
2393 rtw_resume_ticks(sc
);
2399 rtw_disable(struct rtw_softc
*sc
)
2403 if ((sc
->sc_flags
& RTW_F_ENABLED
) == 0)
2407 if ((sc
->sc_flags
& RTW_F_INVALID
) == 0 &&
2408 (rc
= rtw_pwrstate(sc
, RTW_OFF
)) != 0)
2409 if_printf(&sc
->sc_ic
.ic_if
, "failed to turn off PHY\n");
2411 sc
->sc_flags
&= ~RTW_F_ENABLED
;
2415 rtw_enable(struct rtw_softc
*sc
)
2417 if ((sc
->sc_flags
& RTW_F_ENABLED
) == 0) {
2418 sc
->sc_flags
|= RTW_F_ENABLED
;
2420 * Power may have been removed, and WEP keys thus reset.
2422 sc
->sc_flags
&= ~RTW_F_DK_VALID
;
2428 rtw_transmit_config(struct rtw_regs
*regs
)
2432 tcr
= RTW_READ(regs
, RTW_TCR
);
2434 tcr
|= RTW_TCR_CWMIN
;
2435 tcr
&= ~RTW_TCR_MXDMA_MASK
;
2436 tcr
|= RTW_TCR_MXDMA_256
;
2437 tcr
|= RTW_TCR_SAT
; /* send ACK as fast as possible */
2438 tcr
&= ~RTW_TCR_LBK_MASK
;
2439 tcr
|= RTW_TCR_LBK_NORMAL
; /* normal operating mode */
2441 /* set short/long retry limits */
2442 tcr
&= ~(RTW_TCR_SRL_MASK
|RTW_TCR_LRL_MASK
);
2443 tcr
|= __SHIFTIN(4, RTW_TCR_SRL_MASK
) | __SHIFTIN(4, RTW_TCR_LRL_MASK
);
2445 tcr
&= ~RTW_TCR_CRC
; /* NIC appends CRC32 */
2447 RTW_WRITE(regs
, RTW_TCR
, tcr
);
2448 RTW_SYNC(regs
, RTW_TCR
, RTW_TCR
);
2452 rtw_enable_interrupts(struct rtw_softc
*sc
)
2454 struct rtw_regs
*regs
= &sc
->sc_regs
;
2456 sc
->sc_inten
= RTW_INTR_RX
|RTW_INTR_TX
|RTW_INTR_BEACON
|RTW_INTR_ATIMINT
;
2457 sc
->sc_inten
|= RTW_INTR_IOERROR
|RTW_INTR_TIMEOUT
;
2459 RTW_WRITE16(regs
, RTW_IMR
, sc
->sc_inten
);
2460 RTW_WBW(regs
, RTW_IMR
, RTW_ISR
);
2461 RTW_WRITE16(regs
, RTW_ISR
, 0xffff);
2462 RTW_SYNC(regs
, RTW_IMR
, RTW_ISR
);
2464 /* XXX necessary? */
2465 if (sc
->sc_intr_ack
!= NULL
)
2466 sc
->sc_intr_ack(regs
);
2470 rtw_set_nettype(struct rtw_softc
*sc
, enum ieee80211_opmode opmode
)
2472 struct rtw_regs
*regs
= &sc
->sc_regs
;
2475 /* I'm guessing that MSR is protected as CONFIG[0123] are. */
2476 rtw_set_access(sc
, RTW_ACCESS_CONFIG
);
2478 msr
= RTW_READ8(regs
, RTW_MSR
) & ~RTW_MSR_NETYPE_MASK
;
2481 case IEEE80211_M_AHDEMO
:
2482 case IEEE80211_M_IBSS
:
2483 msr
|= RTW_MSR_NETYPE_ADHOC_OK
;
2485 case IEEE80211_M_HOSTAP
:
2486 msr
|= RTW_MSR_NETYPE_AP_OK
;
2488 case IEEE80211_M_MONITOR
:
2490 msr
|= RTW_MSR_NETYPE_NOLINK
;
2492 case IEEE80211_M_STA
:
2493 msr
|= RTW_MSR_NETYPE_INFRA_OK
;
2496 RTW_WRITE8(regs
, RTW_MSR
, msr
);
2498 rtw_set_access(sc
, RTW_ACCESS_NONE
);
2501 #define rtw_calchash(addr) \
2502 (ether_crc32_be((addr), IEEE80211_ADDR_LEN) >> 26)
2505 rtw_pktfilt_load(struct rtw_softc
*sc
)
2507 struct rtw_regs
*regs
= &sc
->sc_regs
;
2508 struct ieee80211com
*ic
= &sc
->sc_ic
;
2509 struct ifnet
*ifp
= &ic
->ic_if
;
2510 struct ifmultiaddr
*ifma
;
2511 uint32_t hashes
[2] = { 0, 0 };
2514 /* XXX might be necessary to stop Rx/Tx engines while setting filters */
2516 sc
->sc_rcr
&= ~RTW_RCR_PKTFILTER_MASK
;
2517 sc
->sc_rcr
&= ~(RTW_RCR_MXDMA_MASK
| RTW_RCR_RXFTH_MASK
);
2519 sc
->sc_rcr
|= RTW_RCR_PKTFILTER_DEFAULT
;
2520 /* MAC auto-reset PHY (huh?) */
2521 sc
->sc_rcr
|= RTW_RCR_ENMARP
;
2522 /* DMA whole Rx packets, only. Set Tx DMA burst size to 1024 bytes. */
2523 sc
->sc_rcr
|= RTW_RCR_MXDMA_1024
| RTW_RCR_RXFTH_WHOLE
;
2525 switch (ic
->ic_opmode
) {
2526 case IEEE80211_M_MONITOR
:
2527 sc
->sc_rcr
|= RTW_RCR_MONITOR
;
2529 case IEEE80211_M_AHDEMO
:
2530 case IEEE80211_M_IBSS
:
2531 /* receive broadcasts in our BSS */
2532 sc
->sc_rcr
|= RTW_RCR_ADD3
;
2538 ifp
->if_flags
&= ~IFF_ALLMULTI
;
2540 /* XXX accept all broadcast if scanning */
2541 if ((ifp
->if_flags
& IFF_BROADCAST
) != 0)
2542 sc
->sc_rcr
|= RTW_RCR_AB
; /* accept all broadcast */
2544 if (ifp
->if_flags
& IFF_PROMISC
) {
2545 sc
->sc_rcr
|= RTW_RCR_AB
; /* accept all broadcast */
2547 ifp
->if_flags
|= IFF_ALLMULTI
;
2552 * Program the 64-bit multicast hash filter.
2554 LIST_FOREACH(ifma
, &ifp
->if_multiaddrs
, ifma_link
) {
2555 if (ifma
->ifma_addr
->sa_family
!= AF_LINK
)
2558 hash
= rtw_calchash(
2559 LLADDR((struct sockaddr_dl
*)ifma
->ifma_addr
));
2560 hashes
[hash
>> 5] |= (1 << (hash
& 0x1f));
2561 sc
->sc_rcr
|= RTW_RCR_AM
;
2564 /* all bits set => hash is useless */
2565 if (~(hashes
[0] & hashes
[1]) == 0)
2569 if (ifp
->if_flags
& IFF_ALLMULTI
) {
2570 sc
->sc_rcr
|= RTW_RCR_AM
; /* accept all multicast */
2571 hashes
[0] = hashes
[1] = 0xffffffff;
2574 RTW_WRITE(regs
, RTW_MAR0
, hashes
[0]);
2575 RTW_WRITE(regs
, RTW_MAR1
, hashes
[1]);
2576 RTW_WRITE(regs
, RTW_RCR
, sc
->sc_rcr
);
2577 RTW_SYNC(regs
, RTW_MAR0
, RTW_RCR
); /* RTW_MAR0 < RTW_MAR1 < RTW_RCR */
2579 DPRINTF(sc
, RTW_DEBUG_PKTFILT
,
2580 ("%s: RTW_MAR0 %08x RTW_MAR1 %08x RTW_RCR %08x\n",
2581 ifp
->if_xname
, RTW_READ(regs
, RTW_MAR0
),
2582 RTW_READ(regs
, RTW_MAR1
), RTW_READ(regs
, RTW_RCR
)));
2585 /* Must be called at splnet. */
2589 struct rtw_softc
*sc
= xsc
;
2590 struct ieee80211com
*ic
= &sc
->sc_ic
;
2591 struct ifnet
*ifp
= &ic
->ic_if
;
2592 struct rtw_regs
*regs
= &sc
->sc_regs
;
2595 rc
= rtw_enable(sc
);
2599 /* Cancel pending I/O and reset. */
2602 DPRINTF(sc
, RTW_DEBUG_TUNE
,
2603 ("%s: channel %d freq %d flags 0x%04x\n", ifp
->if_xname
,
2604 ieee80211_chan2ieee(ic
, ic
->ic_curchan
),
2605 ic
->ic_curchan
->ic_freq
, ic
->ic_curchan
->ic_flags
));
2607 rc
= rtw_pwrstate(sc
, RTW_OFF
);
2611 rc
= rtw_swring_setup(sc
);
2615 rtw_transmit_config(regs
);
2617 rtw_set_access(sc
, RTW_ACCESS_CONFIG
);
2619 RTW_WRITE8(regs
, RTW_MSR
, 0x0); /* no link */
2620 RTW_WBW(regs
, RTW_MSR
, RTW_BRSR
);
2622 /* long PLCP header, 1Mb/2Mb basic rate */
2623 RTW_WRITE16(regs
, RTW_BRSR
, RTW_BRSR_MBR8180_2MBPS
);
2624 RTW_SYNC(regs
, RTW_BRSR
, RTW_BRSR
);
2626 rtw_set_access(sc
, RTW_ACCESS_ANAPARM
);
2627 rtw_set_access(sc
, RTW_ACCESS_NONE
);
2629 /* XXX from reference sources */
2630 RTW_WRITE(regs
, RTW_FEMR
, 0xffff);
2631 RTW_SYNC(regs
, RTW_FEMR
, RTW_FEMR
);
2635 RTW_WRITE8(regs
, RTW_PHYDELAY
, sc
->sc_phydelay
);
2636 /* from Linux driver */
2637 RTW_WRITE8(regs
, RTW_CRCOUNT
, RTW_CRCOUNT_MAGIC
);
2639 RTW_SYNC(regs
, RTW_PHYDELAY
, RTW_CRCOUNT
);
2641 rtw_enable_interrupts(sc
);
2643 rtw_pktfilt_load(sc
);
2645 rtw_hwring_setup(sc
);
2647 rtw_wep_setkeys(sc
);
2649 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
, 1);
2651 ifp
->if_flags
|= IFF_RUNNING
;
2652 ic
->ic_state
= IEEE80211_S_INIT
;
2654 RTW_WRITE16(regs
, RTW_BSSID16
, 0x0);
2655 RTW_WRITE(regs
, RTW_BSSID32
, 0x0);
2657 rtw_resume_ticks(sc
);
2659 rtw_set_nettype(sc
, IEEE80211_M_MONITOR
);
2661 if (ic
->ic_opmode
== IEEE80211_M_MONITOR
)
2662 ieee80211_new_state(ic
, IEEE80211_S_RUN
, -1);
2664 ieee80211_new_state(ic
, IEEE80211_S_SCAN
, -1);
2668 if_printf(ifp
, "interface not running\n");
2672 rtw_led_init(struct rtw_softc
*sc
)
2674 struct rtw_regs
*regs
= &sc
->sc_regs
;
2677 rtw_set_access(sc
, RTW_ACCESS_CONFIG
);
2679 cfg0
= RTW_READ8(regs
, RTW_CONFIG0
);
2680 cfg0
|= RTW_CONFIG0_LEDGPOEN
;
2681 RTW_WRITE8(regs
, RTW_CONFIG0
, cfg0
);
2683 cfg1
= RTW_READ8(regs
, RTW_CONFIG1
);
2684 RTW_DPRINTF(RTW_DEBUG_LED
,
2685 ("%s: read %02x from reg[CONFIG1]\n",
2686 sc
->sc_ic
.ic_if
.if_xname
, cfg1
));
2688 cfg1
&= ~RTW_CONFIG1_LEDS_MASK
;
2689 cfg1
|= RTW_CONFIG1_LEDS_TX_RX
;
2690 RTW_WRITE8(regs
, RTW_CONFIG1
, cfg1
);
2692 rtw_set_access(sc
, RTW_ACCESS_NONE
);
2696 * IEEE80211_S_INIT: LED1 off
2699 * IEEE80211_S_ASSOC,
2700 * IEEE80211_S_SCAN: LED1 blinks @ 1 Hz, blinks at 5Hz for tx/rx
2702 * IEEE80211_S_RUN: LED1 on, blinks @ 5Hz for tx/rx
2705 rtw_led_newstate(struct rtw_softc
*sc
, enum ieee80211_state nstate
)
2707 struct rtw_led_state
*ls
= &sc
->sc_led_state
;
2710 case IEEE80211_S_INIT
:
2712 callout_stop(&ls
->ls_slow_ch
);
2713 callout_stop(&ls
->ls_fast_ch
);
2714 ls
->ls_slowblink
= 0;
2715 ls
->ls_actblink
= 0;
2718 case IEEE80211_S_SCAN
:
2719 callout_reset(&ls
->ls_slow_ch
, RTW_LED_SLOW_TICKS
,
2720 rtw_led_slowblink
, sc
);
2721 callout_reset(&ls
->ls_fast_ch
, RTW_LED_FAST_TICKS
,
2722 rtw_led_fastblink
, sc
);
2724 case IEEE80211_S_AUTH
:
2725 case IEEE80211_S_ASSOC
:
2726 ls
->ls_default
= RTW_LED1
;
2727 ls
->ls_actblink
= RTW_LED1
;
2728 ls
->ls_slowblink
= RTW_LED1
;
2730 case IEEE80211_S_RUN
:
2731 ls
->ls_slowblink
= 0;
2738 rtw_led_set(struct rtw_softc
*sc
)
2740 struct rtw_led_state
*ls
= &sc
->sc_led_state
;
2741 struct rtw_regs
*regs
= &sc
->sc_regs
;
2742 uint8_t led_condition
, mask
, newval
, val
;
2745 led_condition
= ls
->ls_default
;
2747 if (ls
->ls_state
& RTW_LED_S_SLOW
)
2748 led_condition
^= ls
->ls_slowblink
;
2749 if (ls
->ls_state
& (RTW_LED_S_RX
|RTW_LED_S_TX
))
2750 led_condition
^= ls
->ls_actblink
;
2752 RTW_DPRINTF(RTW_DEBUG_LED
,
2753 ("%s: LED condition %02x\n", sc
->sc_ic
.ic_if
.if_xname
,
2756 switch (sc
->sc_hwverid
) {
2760 newval
= mask
= RTW_PSR_LEDGPO0
| RTW_PSR_LEDGPO1
;
2761 if (led_condition
& RTW_LED0
)
2762 newval
&= ~RTW_PSR_LEDGPO0
;
2763 if (led_condition
& RTW_LED1
)
2764 newval
&= ~RTW_PSR_LEDGPO1
;
2768 mask
= RTW_9346CR_EEM_MASK
| RTW_9346CR_EEDI
| RTW_9346CR_EECS
;
2769 newval
= RTW_9346CR_EEM_PROGRAM
;
2770 if (led_condition
& RTW_LED0
)
2771 newval
|= RTW_9346CR_EEDI
;
2772 if (led_condition
& RTW_LED1
)
2773 newval
|= RTW_9346CR_EECS
;
2776 val
= RTW_READ8(regs
, ofs
);
2777 RTW_DPRINTF(RTW_DEBUG_LED
,
2778 ("%s: read %02x from reg[%02x]\n",
2779 sc
->sc_ic
.ic_if
.if_xname
, val
, ofs
));
2782 RTW_WRITE8(regs
, ofs
, val
);
2783 RTW_DPRINTF(RTW_DEBUG_LED
,
2784 ("%s: wrote %02x to reg[%02x]\n",
2785 sc
->sc_ic
.ic_if
.if_xname
, val
, ofs
));
2786 RTW_SYNC(regs
, ofs
, ofs
);
2790 rtw_led_fastblink(void *arg
)
2792 struct rtw_softc
*sc
= arg
;
2793 struct ifnet
*ifp
= &sc
->sc_ic
.ic_if
;
2794 struct rtw_led_state
*ls
= &sc
->sc_led_state
;
2797 lwkt_serialize_enter(ifp
->if_serializer
);
2799 ostate
= ls
->ls_state
;
2800 ls
->ls_state
^= ls
->ls_event
;
2802 if ((ls
->ls_event
& RTW_LED_S_TX
) == 0)
2803 ls
->ls_state
&= ~RTW_LED_S_TX
;
2805 if ((ls
->ls_event
& RTW_LED_S_RX
) == 0)
2806 ls
->ls_state
&= ~RTW_LED_S_RX
;
2810 if (ostate
!= ls
->ls_state
)
2813 callout_reset(&ls
->ls_fast_ch
, RTW_LED_FAST_TICKS
,
2814 rtw_led_fastblink
, sc
);
2816 lwkt_serialize_exit(ifp
->if_serializer
);
2820 rtw_led_slowblink(void *arg
)
2822 struct rtw_softc
*sc
= arg
;
2823 struct ifnet
*ifp
= &sc
->sc_ic
.ic_if
;
2824 struct rtw_led_state
*ls
= &sc
->sc_led_state
;
2826 lwkt_serialize_enter(ifp
->if_serializer
);
2828 ls
->ls_state
^= RTW_LED_S_SLOW
;
2830 callout_reset(&ls
->ls_slow_ch
, RTW_LED_SLOW_TICKS
,
2831 rtw_led_slowblink
, sc
);
2833 lwkt_serialize_exit(ifp
->if_serializer
);
2837 rtw_ioctl(struct ifnet
*ifp
, u_long cmd
, caddr_t data
, struct ucred
*cr
)
2839 struct rtw_softc
*sc
= ifp
->if_softc
;
2844 if (ifp
->if_flags
& IFF_UP
) {
2845 if ((ifp
->if_flags
& IFF_RUNNING
) == 0)
2847 RTW_PRINT_REGS(&sc
->sc_regs
, ifp
->if_xname
, __func__
);
2848 } else if (sc
->sc_flags
& RTW_F_ENABLED
) {
2849 RTW_PRINT_REGS(&sc
->sc_regs
, ifp
->if_xname
, __func__
);
2855 if (ifp
->if_flags
& IFF_RUNNING
)
2856 rtw_pktfilt_load(sc
);
2859 rc
= ieee80211_ioctl(&sc
->sc_ic
, cmd
, data
, cr
);
2860 if (rc
== ENETRESET
) {
2861 if (sc
->sc_flags
& RTW_F_ENABLED
)
2871 * Select a transmit ring with at least one h/w and s/w descriptor free.
2872 * Return 0 on success, -1 on failure.
2875 rtw_txring_choose(struct rtw_softc
*sc
, struct rtw_txsoft_blk
**tsbp
,
2876 struct rtw_txdesc_blk
**tdbp
, int pri
)
2878 struct rtw_txsoft_blk
*tsb
;
2879 struct rtw_txdesc_blk
*tdb
;
2881 KKASSERT(pri
>= 0 && pri
< RTW_NTXPRI
);
2883 tsb
= &sc
->sc_txsoft_blk
[pri
];
2884 tdb
= &sc
->sc_txdesc_blk
[pri
];
2886 if (STAILQ_EMPTY(&tsb
->tsb_freeq
) || tdb
->tdb_nfree
== 0) {
2887 if (tsb
->tsb_tx_timer
== 0)
2888 tsb
->tsb_tx_timer
= 5;
2898 static __inline
struct mbuf
*
2899 rtw_80211_dequeue(struct rtw_softc
*sc
, struct ifqueue
*ifq
, int pri
,
2900 struct rtw_txsoft_blk
**tsbp
, struct rtw_txdesc_blk
**tdbp
,
2901 struct ieee80211_node
**nip
, int *if_flagsp
)
2904 struct ifnet
*ifp
= &sc
->sc_if
;
2908 if (rtw_txring_choose(sc
, tsbp
, tdbp
, pri
) == -1) {
2909 DPRINTF(sc
, RTW_DEBUG_XMIT_RSRC
,
2910 ("%s: no ring %d descriptor\n", ifp
->if_xname
, pri
));
2911 *if_flagsp
|= IFF_OACTIVE
;
2916 *nip
= (struct ieee80211_node
*)m
->m_pkthdr
.rcvif
;
2917 m
->m_pkthdr
.rcvif
= NULL
;
2918 KKASSERT(*nip
!= NULL
);
2923 * Point *mp at the next 802.11 frame to transmit. Point *tsbp
2924 * at the driver's selection of transmit control block for the packet.
2927 rtw_dequeue(struct ifnet
*ifp
, struct rtw_txsoft_blk
**tsbp
,
2928 struct rtw_txdesc_blk
**tdbp
, struct mbuf
**mp
,
2929 struct ieee80211_node
**nip
)
2931 struct rtw_softc
*sc
= ifp
->if_softc
;
2932 int *if_flagsp
= &ifp
->if_flags
;
2933 struct ether_header
*eh
;
2937 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2938 ("%s: enter %s\n", ifp
->if_xname
, __func__
));
2940 if (sc
->sc_ic
.ic_state
== IEEE80211_S_RUN
&&
2941 (*mp
= rtw_80211_dequeue(sc
, &sc
->sc_beaconq
, RTW_TXPRIBCN
, tsbp
,
2942 tdbp
, nip
, if_flagsp
)) != NULL
) {
2943 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2944 ("%s: dequeue beacon frame\n", ifp
->if_xname
));
2948 if ((*mp
= rtw_80211_dequeue(sc
, &sc
->sc_ic
.ic_mgtq
, RTW_TXPRIMD
, tsbp
,
2949 tdbp
, nip
, if_flagsp
)) != NULL
) {
2950 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2951 ("%s: dequeue mgt frame\n", ifp
->if_xname
));
2957 if (sc
->sc_ic
.ic_state
!= IEEE80211_S_RUN
) {
2958 ifq_purge(&ifp
->if_snd
);
2959 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2960 ("%s: not running\n", ifp
->if_xname
));
2964 m0
= ifq_dequeue(&ifp
->if_snd
, NULL
);
2966 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2967 ("%s: no frame ready\n", ifp
->if_xname
));
2970 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2971 ("%s: dequeue data frame\n", ifp
->if_xname
));
2973 pri
= ((m0
->m_flags
& M_PWR_SAV
) != 0) ? RTW_TXPRIHI
: RTW_TXPRIMD
;
2975 if (rtw_txring_choose(sc
, tsbp
, tdbp
, pri
) == -1) {
2976 DPRINTF(sc
, RTW_DEBUG_XMIT_RSRC
,
2977 ("%s: no ring %d descriptor\n", ifp
->if_xname
, pri
));
2978 *if_flagsp
|= IFF_OACTIVE
;
2979 ifq_prepend(&ifp
->if_snd
, m0
);
2980 sc
->sc_if
.if_timer
= 1;
2986 eh
= mtod(m0
, struct ether_header
*);
2987 *nip
= ieee80211_find_txnode(&sc
->sc_ic
, eh
->ether_dhost
);
2989 /* NB: ieee80211_find_txnode does stat+msg */
2994 if ((m0
= ieee80211_encap(&sc
->sc_ic
, m0
, *nip
)) == NULL
) {
2995 DPRINTF(sc
, RTW_DEBUG_XMIT
,
2996 ("%s: encap error\n", ifp
->if_xname
));
2997 ieee80211_free_node(*nip
);
3003 DPRINTF(sc
, RTW_DEBUG_XMIT
,
3004 ("%s: leave %s\n", ifp
->if_xname
, __func__
));
3010 rtw_txsegs_too_short(struct rtw_txsegs
*segs
)
3014 for (i
= 0; i
< segs
->nseg
; i
++) {
3015 if (segs
->segs
[i
].ds_len
< 4)
3022 rtw_txsegs_too_long(struct rtw_txsegs
*segs
)
3026 for (i
= 0; i
< segs
->nseg
; i
++) {
3027 if (segs
->segs
[i
].ds_len
> RTW_TXLEN_LENGTH_MASK
)
3034 rtw_txbuf_dma_map(void *arg
, bus_dma_segment_t
*seg
, int nseg
,
3035 bus_size_t mapsize
, int error
)
3037 struct rtw_txsegs
*s
= arg
;
3042 KASSERT(nseg
<= RTW_MAXPKTSEGS
, ("too many tx mbuf seg\n"));
3045 bcopy(seg
, s
->segs
, sizeof(*seg
) * nseg
);
3048 static struct mbuf
*
3049 rtw_load_txbuf(struct rtw_softc
*sc
, struct rtw_txsoft
*ts
,
3050 struct rtw_txsegs
*segs
, int ndesc_free
, struct mbuf
*m
)
3052 int unload
= 0, error
;
3054 error
= bus_dmamap_load_mbuf(sc
->sc_txsoft_dmat
, ts
->ts_dmamap
, m
,
3055 rtw_txbuf_dma_map
, segs
, BUS_DMA_NOWAIT
);
3056 if (error
&& error
!= EFBIG
) {
3057 if_printf(&sc
->sc_ic
.ic_if
, "can't load tx mbuf1\n");
3061 if (error
|| segs
->nseg
> ndesc_free
|| rtw_txsegs_too_short(segs
)) {
3065 bus_dmamap_unload(sc
->sc_txsoft_dmat
, ts
->ts_dmamap
);
3067 m_new
= m_defrag(m
, MB_DONTWAIT
);
3068 if (m_new
== NULL
) {
3069 if_printf(&sc
->sc_ic
.ic_if
, "can't defrag tx mbuf\n");
3075 error
= bus_dmamap_load_mbuf(sc
->sc_txsoft_dmat
, ts
->ts_dmamap
,
3076 m
, rtw_txbuf_dma_map
, segs
,
3079 if_printf(&sc
->sc_ic
.ic_if
, "can't load tx mbuf2\n");
3085 if (segs
->nseg
> ndesc_free
) {
3086 if_printf(&sc
->sc_ic
.ic_if
, "not enough free txdesc\n");
3089 if (rtw_txsegs_too_short(segs
)) {
3090 if_printf(&sc
->sc_ic
.ic_if
, "segment too short\n");
3096 if (rtw_txsegs_too_long(segs
)) {
3097 if_printf(&sc
->sc_ic
.ic_if
, "segment too long\n");
3105 bus_dmamap_unload(sc
->sc_txsoft_dmat
, ts
->ts_dmamap
);
3109 bus_dmamap_sync(sc
->sc_txsoft_dmat
, ts
->ts_dmamap
,
3110 BUS_DMASYNC_PREWRITE
);
3117 rtw_print_txdesc(struct rtw_softc
*sc
, const char *action
,
3118 struct rtw_txsoft
*ts
, struct rtw_txdesc_blk
*tdb
, int desc
)
3120 struct rtw_txdesc
*td
= &tdb
->tdb_desc
[desc
];
3122 DPRINTF(sc
, RTW_DEBUG_XMIT_DESC
,
3123 ("%s: %p %s txdesc[%d] "
3124 "next %#08x buf %#08x "
3125 "ctl0 %#08x ctl1 %#08x len %#08x\n",
3126 sc
->sc_ic
.ic_if
.if_xname
, ts
, action
,
3127 desc
, le32toh(td
->td_buf
), le32toh(td
->td_next
),
3128 le32toh(td
->td_ctl0
), le32toh(td
->td_ctl1
),
3129 le32toh(td
->td_len
)));
3131 #endif /* RTW_DEBUG */
3134 rtw_start(struct ifnet
*ifp
)
3136 struct rtw_softc
*sc
= ifp
->if_softc
;
3137 struct ieee80211com
*ic
= &sc
->sc_ic
;
3138 struct ieee80211_node
*ni
;
3139 struct rtw_txsoft
*ts
;
3141 uint32_t proto_ctl0
;
3143 DPRINTF(sc
, RTW_DEBUG_XMIT
,
3144 ("%s: enter %s\n", ifp
->if_xname
, __func__
));
3146 if ((ifp
->if_flags
& (IFF_RUNNING
| IFF_OACTIVE
)) != IFF_RUNNING
)
3149 /* XXX do real rate control */
3150 proto_ctl0
= RTW_TXCTL0_RTSRATE_1MBPS
;
3152 if (ic
->ic_flags
& IEEE80211_F_SHPREAMBLE
)
3153 proto_ctl0
|= RTW_TXCTL0_SPLCP
;
3156 struct rtw_txsegs segs
;
3157 struct rtw_duration
*d0
;
3158 struct ieee80211_frame_min
*wh
;
3159 struct rtw_txsoft_blk
*tsb
;
3160 struct rtw_txdesc_blk
*tdb
;
3161 struct rtw_txdesc
*td
;
3162 struct ieee80211_key
*k
;
3163 uint32_t ctl0
, ctl1
;
3165 int desc
, i
, lastdesc
, npkt
, rate
, rateidx
, ratectl
;
3167 if (rtw_dequeue(ifp
, &tsb
, &tdb
, &m0
, &ni
) == -1)
3172 wh
= mtod(m0
, struct ieee80211_frame_min
*);
3174 if ((wh
->i_fc
[1] & IEEE80211_FC1_WEP
) != 0 &&
3175 (k
= ieee80211_crypto_encap(ic
, ni
, m0
)) == NULL
) {
3176 ieee80211_free_node(ni
);
3183 ts
= STAILQ_FIRST(&tsb
->tsb_freeq
);
3185 m0
= rtw_load_txbuf(sc
, ts
, &segs
, tdb
->tdb_nfree
, m0
);
3186 if (m0
== NULL
|| segs
.nseg
== 0) {
3187 DPRINTF(sc
, RTW_DEBUG_XMIT
,
3188 ("%s: %s failed\n", ifp
->if_xname
, __func__
));
3189 goto post_dequeue_err
;
3193 * Note well: rtw_load_txbuf may have created a new chain,
3194 * so we must find the header once more.
3196 wh
= mtod(m0
, struct ieee80211_frame_min
*);
3198 if ((wh
->i_fc
[0] & IEEE80211_FC0_TYPE_MASK
) ==
3199 IEEE80211_FC0_TYPE_MGT
) {
3201 rate
= 2; /* 1Mbit/s */
3204 ieee80211_ratectl_findrate(ni
, m0
->m_pkthdr
.len
,
3206 rate
= IEEE80211_RS_RATE(&ni
->ni_rates
, rateidx
);
3210 if_printf(ifp
, "incorrect rate\n");
3212 rate
= 2; /* 1Mbit/s */
3218 if ((ifp
->if_flags
& (IFF_DEBUG
| IFF_LINK2
)) ==
3219 (IFF_DEBUG
| IFF_LINK2
)) {
3220 ieee80211_dump_pkt(mtod(m0
, uint8_t *),
3221 (segs
.nseg
== 1) ? m0
->m_pkthdr
.len
3225 #endif /* RTW_DEBUG */
3227 __SHIFTIN(m0
->m_pkthdr
.len
, RTW_TXCTL0_TPKTSIZE_MASK
);
3232 ctl0
|= RTW_TXCTL0_RATE_1MBPS
;
3235 ctl0
|= RTW_TXCTL0_RATE_2MBPS
;
3238 ctl0
|= RTW_TXCTL0_RATE_5MBPS
;
3241 ctl0
|= RTW_TXCTL0_RATE_11MBPS
;
3244 /* XXX >= ? Compare after fragmentation? */
3245 if (m0
->m_pkthdr
.len
> ic
->ic_rtsthreshold
)
3246 ctl0
|= RTW_TXCTL0_RTSEN
;
3249 * XXX Sometimes writes a bogus keyid; h/w doesn't
3250 * seem to care, since we don't activate h/w Tx
3254 ctl0
|= __SHIFTIN(k
->wk_keyix
, RTW_TXCTL0_KEYID_MASK
) &
3255 RTW_TXCTL0_KEYID_MASK
;
3258 if ((wh
->i_fc
[0] & IEEE80211_FC0_TYPE_MASK
) ==
3259 IEEE80211_FC0_TYPE_MGT
) {
3260 ctl0
&= ~(RTW_TXCTL0_SPLCP
| RTW_TXCTL0_RTSEN
);
3261 if ((wh
->i_fc
[0] & IEEE80211_FC0_SUBTYPE_MASK
) ==
3262 IEEE80211_FC0_SUBTYPE_BEACON
)
3263 ctl0
|= RTW_TXCTL0_BEACON
;
3266 if (rtw_compute_duration(wh
, k
, m0
->m_pkthdr
.len
,
3267 ic
->ic_flags
, ic
->ic_fragthreshold
,
3268 rate
, &ts
->ts_d0
, &ts
->ts_dn
, &npkt
,
3269 (ifp
->if_flags
& (IFF_DEBUG
|IFF_LINK2
)) ==
3270 (IFF_DEBUG
|IFF_LINK2
)) == -1) {
3271 DPRINTF(sc
, RTW_DEBUG_XMIT
,
3272 ("%s: fail compute duration\n", __func__
));
3278 *(uint16_t*)wh
->i_dur
= htole16(d0
->d_data_dur
);
3280 ctl1
= __SHIFTIN(d0
->d_plcp_len
, RTW_TXCTL1_LENGTH_MASK
) |
3281 __SHIFTIN(d0
->d_rts_dur
, RTW_TXCTL1_RTSDUR_MASK
);
3284 ctl1
|= RTW_TXCTL1_LENGEXT
;
3286 /* TBD fragmentation */
3288 ts
->ts_first
= tdb
->tdb_next
;
3289 KKASSERT(ts
->ts_first
< tdb
->tdb_ndesc
);
3291 if (ic
->ic_rawbpf
!= NULL
)
3292 bpf_mtap(ic
->ic_rawbpf
, m0
);
3294 if (sc
->sc_radiobpf
!= NULL
) {
3295 struct rtw_tx_radiotap_header
*rt
= &sc
->sc_txtap
;
3300 bpf_ptap(sc
->sc_radiobpf
, m0
, rt
,
3301 sizeof(sc
->sc_txtapu
));
3304 for (i
= 0, lastdesc
= desc
= ts
->ts_first
; i
< segs
.nseg
;
3305 i
++, desc
= RTW_NEXT_IDX(tdb
, desc
)) {
3306 td
= &tdb
->tdb_desc
[desc
];
3307 td
->td_ctl0
= htole32(ctl0
);
3309 td
->td_ctl0
|= htole32(RTW_TXCTL0_OWN
);
3310 td
->td_ctl1
= htole32(ctl1
);
3311 td
->td_buf
= htole32(segs
.segs
[i
].ds_addr
);
3312 td
->td_len
= htole32(segs
.segs
[i
].ds_len
);
3315 rtw_print_txdesc(sc
, "load", ts
, tdb
, desc
);
3316 #endif /* RTW_DEBUG */
3319 KKASSERT(desc
< tdb
->tdb_ndesc
);
3322 KKASSERT(ni
!= NULL
);
3324 ts
->ts_rateidx
= rateidx
;
3325 ts
->ts_ratectl
= ratectl
;
3326 ts
->ts_last
= lastdesc
;
3327 tdb
->tdb_desc
[ts
->ts_last
].td_ctl0
|= htole32(RTW_TXCTL0_LS
);
3328 tdb
->tdb_desc
[ts
->ts_first
].td_ctl0
|= htole32(RTW_TXCTL0_FS
);
3331 rtw_print_txdesc(sc
, "FS on", ts
, tdb
, ts
->ts_first
);
3332 rtw_print_txdesc(sc
, "LS on", ts
, tdb
, ts
->ts_last
);
3333 #endif /* RTW_DEBUG */
3335 tdb
->tdb_nfree
-= segs
.nseg
;
3336 tdb
->tdb_next
= desc
;
3338 tdb
->tdb_desc
[ts
->ts_first
].td_ctl0
|= htole32(RTW_TXCTL0_OWN
);
3341 rtw_print_txdesc(sc
, "OWN on", ts
, tdb
, ts
->ts_first
);
3342 #endif /* RTW_DEBUG */
3344 STAILQ_REMOVE_HEAD(&tsb
->tsb_freeq
, ts_q
);
3345 STAILQ_INSERT_TAIL(&tsb
->tsb_dirtyq
, ts
, ts_q
);
3347 if (tsb
!= &sc
->sc_txsoft_blk
[RTW_TXPRIBCN
])
3348 sc
->sc_led_state
.ls_event
|= RTW_LED_S_TX
;
3349 tsb
->tsb_tx_timer
= 5;
3351 tppoll
= RTW_READ8(&sc
->sc_regs
, RTW_TPPOLL
);
3352 tppoll
&= ~RTW_TPPOLL_SALL
;
3353 tppoll
|= tsb
->tsb_poll
& RTW_TPPOLL_ALL
;
3354 RTW_WRITE8(&sc
->sc_regs
, RTW_TPPOLL
, tppoll
);
3355 RTW_SYNC(&sc
->sc_regs
, RTW_TPPOLL
, RTW_TPPOLL
);
3357 bus_dmamap_sync(tdb
->tdb_dmat
, tdb
->tdb_dmamap
,
3358 BUS_DMASYNC_PREWRITE
);
3361 DPRINTF(sc
, RTW_DEBUG_XMIT
,
3362 ("%s: leave %s\n", ifp
->if_xname
, __func__
));
3366 bus_dmamap_unload(sc
->sc_txsoft_dmat
, ts
->ts_dmamap
);
3369 ieee80211_free_node(ni
);
3371 DPRINTF(sc
, RTW_DEBUG_XMIT
,
3372 ("%s: leave %s\n", ifp
->if_xname
, __func__
));
3376 rtw_idle(struct rtw_softc
*sc
)
3378 struct rtw_regs
*regs
= &sc
->sc_regs
;
3381 /* request stop DMA; wait for packets to stop transmitting. */
3383 RTW_WRITE8(regs
, RTW_TPPOLL
, RTW_TPPOLL_SALL
);
3384 RTW_WBR(regs
, RTW_TPPOLL
, RTW_TPPOLL
);
3388 (RTW_READ8(regs
, RTW_TPPOLL
) & RTW_TPPOLL_ACTIVE
) != 0;
3391 if_printf(&sc
->sc_ic
.ic_if
, "transmit DMA idle in %dus\n", active
* 10);
3395 rtw_watchdog(struct ifnet
*ifp
)
3397 int pri
, tx_timeouts
= 0;
3398 struct rtw_softc
*sc
= ifp
->if_softc
;
3402 if ((sc
->sc_flags
& RTW_F_ENABLED
) == 0)
3405 for (pri
= 0; pri
< RTW_NTXPRI
; pri
++) {
3406 struct rtw_txsoft_blk
*tsb
= &sc
->sc_txsoft_blk
[pri
];
3408 if (tsb
->tsb_tx_timer
== 0)
3410 else if (--tsb
->tsb_tx_timer
== 0) {
3411 if (STAILQ_EMPTY(&tsb
->tsb_dirtyq
))
3413 if_printf(ifp
, "transmit timeout, priority %d\n", pri
);
3421 if (tx_timeouts
> 0) {
3423 * Stop Tx DMA, disable xmtr, flush Tx rings, enable xmtr,
3424 * reset s/w tx-ring pointers, and start transmission.
3426 * TBD Stop/restart just the broken rings?
3429 rtw_io_enable(sc
, RTW_CR_TE
, 0);
3430 rtw_txdesc_blk_reset_all(sc
);
3431 rtw_io_enable(sc
, RTW_CR_TE
, 1);
3432 rtw_txring_fixup(sc
);
3435 ieee80211_watchdog(&sc
->sc_ic
);
3439 rtw_next_scan(void *arg
)
3441 struct ieee80211com
*ic
= arg
;
3442 struct ifnet
*ifp
= &ic
->ic_if
;
3444 lwkt_serialize_enter(ifp
->if_serializer
);
3446 /* don't call rtw_start w/o network interrupts blocked */
3447 if (ic
->ic_state
== IEEE80211_S_SCAN
)
3448 ieee80211_next_scan(ic
);
3450 lwkt_serialize_exit(ifp
->if_serializer
);
3454 rtw_join_bss(struct rtw_softc
*sc
, uint8_t *bssid
, uint16_t intval0
)
3456 uint16_t bcnitv
, bintritv
, intval
;
3458 struct rtw_regs
*regs
= &sc
->sc_regs
;
3460 for (i
= 0; i
< IEEE80211_ADDR_LEN
; i
++)
3461 RTW_WRITE8(regs
, RTW_BSSID
+ i
, bssid
[i
]);
3463 RTW_SYNC(regs
, RTW_BSSID16
, RTW_BSSID32
);
3465 rtw_set_access(sc
, RTW_ACCESS_CONFIG
);
3467 intval
= MIN(intval0
, __SHIFTOUT_MASK(RTW_BCNITV_BCNITV_MASK
));
3469 bcnitv
= RTW_READ16(regs
, RTW_BCNITV
) & ~RTW_BCNITV_BCNITV_MASK
;
3470 bcnitv
|= __SHIFTIN(intval
, RTW_BCNITV_BCNITV_MASK
);
3471 RTW_WRITE16(regs
, RTW_BCNITV
, bcnitv
);
3472 /* interrupt host 1ms before the TBTT */
3473 bintritv
= RTW_READ16(regs
, RTW_BINTRITV
) & ~RTW_BINTRITV_BINTRITV
;
3474 bintritv
|= __SHIFTIN(1000, RTW_BINTRITV_BINTRITV
);
3475 RTW_WRITE16(regs
, RTW_BINTRITV
, bintritv
);
3476 /* magic from Linux */
3477 RTW_WRITE16(regs
, RTW_ATIMWND
, __SHIFTIN(1, RTW_ATIMWND_ATIMWND
));
3478 RTW_WRITE16(regs
, RTW_ATIMTRITV
, __SHIFTIN(2, RTW_ATIMTRITV_ATIMTRITV
));
3479 rtw_set_access(sc
, RTW_ACCESS_NONE
);
3481 rtw_io_enable(sc
, RTW_CR_RE
| RTW_CR_TE
, 1);
3484 /* Synchronize the hardware state with the software state. */
3486 rtw_newstate(struct ieee80211com
*ic
, enum ieee80211_state nstate
, int arg
)
3488 struct ifnet
*ifp
= ic
->ic_ifp
;
3489 struct rtw_softc
*sc
= ifp
->if_softc
;
3490 enum ieee80211_state ostate
;
3493 ostate
= ic
->ic_state
;
3495 ieee80211_ratectl_newstate(ic
, nstate
);
3496 rtw_led_newstate(sc
, nstate
);
3498 if (nstate
== IEEE80211_S_INIT
) {
3499 callout_stop(&sc
->sc_scan_ch
);
3500 sc
->sc_cur_chan
= IEEE80211_CHAN_ANY
;
3501 return sc
->sc_mtbl
.mt_newstate(ic
, nstate
, arg
);
3504 if (ostate
== IEEE80211_S_INIT
&& nstate
!= IEEE80211_S_INIT
)
3505 rtw_pwrstate(sc
, RTW_ON
);
3507 error
= rtw_tune(sc
);
3512 case IEEE80211_S_INIT
:
3513 panic("%s: unexpected state IEEE80211_S_INIT\n", __func__
);
3515 case IEEE80211_S_SCAN
:
3516 if (ostate
!= IEEE80211_S_SCAN
) {
3517 memset(ic
->ic_bss
->ni_bssid
, 0, IEEE80211_ADDR_LEN
);
3518 rtw_set_nettype(sc
, IEEE80211_M_MONITOR
);
3521 callout_reset(&sc
->sc_scan_ch
, rtw_dwelltime
* hz
/ 1000,
3525 case IEEE80211_S_RUN
:
3526 switch (ic
->ic_opmode
) {
3527 case IEEE80211_M_HOSTAP
:
3528 case IEEE80211_M_IBSS
:
3529 rtw_set_nettype(sc
, IEEE80211_M_MONITOR
);
3531 case IEEE80211_M_AHDEMO
:
3532 case IEEE80211_M_STA
:
3533 rtw_join_bss(sc
, ic
->ic_bss
->ni_bssid
,
3534 ic
->ic_bss
->ni_intval
);
3536 case IEEE80211_M_MONITOR
:
3539 rtw_set_nettype(sc
, ic
->ic_opmode
);
3541 case IEEE80211_S_ASSOC
:
3542 case IEEE80211_S_AUTH
:
3546 if (nstate
!= IEEE80211_S_SCAN
)
3547 callout_stop(&sc
->sc_scan_ch
);
3549 return sc
->sc_mtbl
.mt_newstate(ic
, nstate
, arg
);
3552 /* Extend a 32-bit TSF timestamp to a 64-bit timestamp. */
3554 rtw_tsf_extend(struct rtw_regs
*regs
, uint32_t rstamp
)
3556 uint32_t tsftl
, tsfth
;
3558 tsfth
= RTW_READ(regs
, RTW_TSFTRH
);
3559 tsftl
= RTW_READ(regs
, RTW_TSFTRL
);
3560 if (tsftl
< rstamp
) /* Compensate for rollover. */
3562 return ((uint64_t)tsfth
<< 32) | rstamp
;
3566 rtw_recv_mgmt(struct ieee80211com
*ic
, struct mbuf
*m
,
3567 struct ieee80211_node
*ni
, int subtype
, int rssi
, uint32_t rstamp
)
3569 struct ifnet
*ifp
= &ic
->ic_if
;
3570 struct rtw_softc
*sc
= ifp
->if_softc
;
3572 sc
->sc_mtbl
.mt_recv_mgmt(ic
, m
, ni
, subtype
, rssi
, rstamp
);
3575 case IEEE80211_FC0_SUBTYPE_PROBE_RESP
:
3576 case IEEE80211_FC0_SUBTYPE_BEACON
:
3577 if (ic
->ic_opmode
== IEEE80211_M_IBSS
&&
3578 ic
->ic_state
== IEEE80211_S_RUN
) {
3579 uint64_t tsf
= rtw_tsf_extend(&sc
->sc_regs
, rstamp
);
3581 if (le64toh(ni
->ni_tstamp
.tsf
) >= tsf
)
3582 ieee80211_ibss_merge(ni
);
3591 static struct ieee80211_node
*
3592 rtw_node_alloc(struct ieee80211_node_table
*nt
)
3594 struct ifnet
*ifp
= nt
->nt_ic
->ic_ifp
;
3595 struct rtw_softc
*sc
= (struct rtw_softc
*)ifp
->if_softc
;
3596 struct ieee80211_node
*ni
= (*sc
->sc_mtbl
.mt_node_alloc
)(nt
);
3598 DPRINTF(sc
, RTW_DEBUG_NODE
,
3599 ("%s: alloc node %p\n", sc
->sc_dev
.dv_xname
, ni
));
3604 rtw_node_free(struct ieee80211_node
*ni
)
3606 struct ieee80211com
*ic
= ni
->ni_ic
;
3607 struct ifnet
*ifp
= ic
->ic_ifp
;
3608 struct rtw_softc
*sc
= (struct rtw_softc
*)ifp
->if_softc
;
3610 DPRINTF(sc
, RTW_DEBUG_NODE
,
3611 ("%s: freeing node %p %s\n", sc
->sc_dev
.dv_xname
, ni
,
3612 ether_sprintf(ni
->ni_bssid
)));
3613 sc
->sc_mtbl
.mt_node_free(ni
);
3618 rtw_media_change(struct ifnet
*ifp
)
3622 error
= ieee80211_media_change(ifp
);
3623 if (error
== ENETRESET
) {
3624 if ((ifp
->if_flags
& (IFF_RUNNING
|IFF_UP
)) ==
3625 (IFF_RUNNING
|IFF_UP
))
3626 rtw_init(ifp
); /* XXX lose error */
3633 rtw_media_status(struct ifnet
*ifp
, struct ifmediareq
*imr
)
3635 struct rtw_softc
*sc
= ifp
->if_softc
;
3637 if ((sc
->sc_flags
& RTW_F_ENABLED
) == 0) {
3638 imr
->ifm_active
= IFM_IEEE80211
| IFM_NONE
;
3639 imr
->ifm_status
= 0;
3642 ieee80211_media_status(ifp
, imr
);
3645 static __inline
void
3646 rtw_set80211methods(struct rtw_mtbl
*mtbl
, struct ieee80211com
*ic
)
3648 mtbl
->mt_newstate
= ic
->ic_newstate
;
3649 ic
->ic_newstate
= rtw_newstate
;
3651 mtbl
->mt_recv_mgmt
= ic
->ic_recv_mgmt
;
3652 ic
->ic_recv_mgmt
= rtw_recv_mgmt
;
3655 mtbl
->mt_node_free
= ic
->ic_node_free
;
3656 ic
->ic_node_free
= rtw_node_free
;
3658 mtbl
->mt_node_alloc
= ic
->ic_node_alloc
;
3659 ic
->ic_node_alloc
= rtw_node_alloc
;
3662 ic
->ic_crypto
.cs_key_delete
= rtw_key_delete
;
3663 ic
->ic_crypto
.cs_key_set
= rtw_key_set
;
3664 ic
->ic_crypto
.cs_key_update_begin
= rtw_key_update_begin
;
3665 ic
->ic_crypto
.cs_key_update_end
= rtw_key_update_end
;
3668 static __inline
void
3669 rtw_init_radiotap(struct rtw_softc
*sc
)
3671 sc
->sc_rxtap
.rr_ihdr
.it_len
= htole16(sizeof(sc
->sc_rxtapu
));
3672 sc
->sc_rxtap
.rr_ihdr
.it_present
= htole32(RTW_RX_RADIOTAP_PRESENT
);
3674 sc
->sc_txtap
.rt_ihdr
.it_len
= htole16(sizeof(sc
->sc_txtapu
));
3675 sc
->sc_txtap
.rt_ihdr
.it_present
= htole32(RTW_TX_RADIOTAP_PRESENT
);
3678 static struct rtw_rf
*
3679 rtw_rf_attach(struct rtw_softc
*sc
, enum rtw_rfchipid rfchipid
, int digphy
)
3681 rtw_rf_write_t rf_write
;
3686 rf_write
= rtw_rf_hostwrite
;
3688 case RTW_RFCHIPID_INTERSIL
:
3689 case RTW_RFCHIPID_PHILIPS
:
3690 case RTW_RFCHIPID_GCT
: /* XXX a guess */
3691 case RTW_RFCHIPID_RFMD
:
3692 rf_write
= (rtw_host_rfio
) ? rtw_rf_hostwrite
: rtw_rf_macwrite
;
3697 case RTW_RFCHIPID_GCT
:
3698 rf
= rtw_grf5101_create(&sc
->sc_regs
, rf_write
, 0);
3699 sc
->sc_pwrstate_cb
= rtw_maxim_pwrstate
;
3700 sc
->sc_getrssi
= rtw_gct_getrssi
;
3702 case RTW_RFCHIPID_MAXIM
:
3703 rf
= rtw_max2820_create(&sc
->sc_regs
, rf_write
, 0);
3704 sc
->sc_pwrstate_cb
= rtw_maxim_pwrstate
;
3705 sc
->sc_getrssi
= rtw_maxim_getrssi
;
3707 case RTW_RFCHIPID_PHILIPS
:
3708 rf
= rtw_sa2400_create(&sc
->sc_regs
, rf_write
, digphy
);
3709 sc
->sc_pwrstate_cb
= rtw_philips_pwrstate
;
3710 sc
->sc_getrssi
= rtw_philips_getrssi
;
3712 case RTW_RFCHIPID_RFMD
:
3713 /* XXX RFMD has no RF constructor */
3714 sc
->sc_pwrstate_cb
= rtw_rfmd_pwrstate
;
3719 rf
->rf_continuous_tx_cb
=
3720 (rtw_continuous_tx_cb_t
)rtw_continuous_tx_enable
;
3721 rf
->rf_continuous_tx_arg
= sc
;
3725 /* Revision C and later use a different PHY delay setting than
3726 * revisions A and B.
3729 rtw_check_phydelay(struct rtw_regs
*regs
, uint32_t old_rcr
)
3731 #define REVAB (RTW_RCR_MXDMA_UNLIMITED | RTW_RCR_AICV)
3732 #define REVC (REVAB | RTW_RCR_RXFTH_WHOLE)
3734 uint8_t phydelay
= __SHIFTIN(0x6, RTW_PHYDELAY_PHYDELAY
);
3736 RTW_WRITE(regs
, RTW_RCR
, REVAB
);
3737 RTW_WBW(regs
, RTW_RCR
, RTW_RCR
);
3738 RTW_WRITE(regs
, RTW_RCR
, REVC
);
3740 RTW_WBR(regs
, RTW_RCR
, RTW_RCR
);
3741 if ((RTW_READ(regs
, RTW_RCR
) & REVC
) == REVC
)
3742 phydelay
|= RTW_PHYDELAY_REVC_MAGIC
;
3744 RTW_WRITE(regs
, RTW_RCR
, old_rcr
); /* restore RCR */
3745 RTW_SYNC(regs
, RTW_RCR
, RTW_RCR
);
3753 rtw_attach(device_t dev
)
3755 struct rtw_softc
*sc
= device_get_softc(dev
);
3756 struct ieee80211com
*ic
= &sc
->sc_ic
;
3757 const struct ieee80211_cipher
*wep_cipher
;
3758 struct ifnet
*ifp
= &ic
->ic_if
;
3761 wep_cipher
= ieee80211_crypto_cipher(IEEE80211_CIPHER_WEP
);
3762 KKASSERT(wep_cipher
!= NULL
);
3764 memcpy(&rtw_cipher_wep
, wep_cipher
, sizeof(rtw_cipher_wep
));
3765 rtw_cipher_wep
.ic_decap
= rtw_wep_decap
;
3767 if_initname(ifp
, device_get_name(dev
), device_get_unit(dev
));
3769 switch (RTW_READ(&sc
->sc_regs
, RTW_TCR
) & RTW_TCR_HWVERID_MASK
) {
3770 case RTW_TCR_HWVERID_F
:
3771 sc
->sc_hwverid
= 'F';
3773 case RTW_TCR_HWVERID_D
:
3774 sc
->sc_hwverid
= 'D';
3777 sc
->sc_hwverid
= '?';
3781 sc
->sc_irq_res
= bus_alloc_resource_any(dev
, SYS_RES_IRQ
,
3783 RF_ACTIVE
| RF_SHAREABLE
);
3784 if (sc
->sc_irq_res
== NULL
) {
3785 device_printf(dev
, "could not alloc irq res\n");
3789 /* Allocate h/w desc blocks */
3790 rc
= rtw_desc_blk_alloc(sc
);
3794 /* Allocate s/w desc blocks */
3795 rc
= rtw_soft_blk_alloc(sc
);
3799 /* Reset the chip to a known state. */
3802 device_printf(dev
, "could not reset\n");
3806 sc
->sc_rcr
= RTW_READ(&sc
->sc_regs
, RTW_RCR
);
3808 if ((sc
->sc_rcr
& RTW_RCR_9356SEL
) != 0)
3809 sc
->sc_flags
|= RTW_F_9356SROM
;
3811 rc
= rtw_srom_read(sc
);
3815 rc
= rtw_srom_parse(sc
);
3817 device_printf(dev
, "malformed serial ROM\n");
3821 device_printf(dev
, "%s PHY\n",
3822 ((sc
->sc_flags
& RTW_F_DIGPHY
) != 0) ? "digital"
3825 device_printf(dev
, "CS threshold %u\n", sc
->sc_csthr
);
3827 sc
->sc_rf
= rtw_rf_attach(sc
, sc
->sc_rfchipid
,
3828 sc
->sc_flags
& RTW_F_DIGPHY
);
3829 if (sc
->sc_rf
== NULL
) {
3830 device_printf(dev
, "could not attach RF\n");
3835 sc
->sc_phydelay
= rtw_check_phydelay(&sc
->sc_regs
, sc
->sc_rcr
);
3837 RTW_DPRINTF(RTW_DEBUG_ATTACH
,
3838 ("%s: PHY delay %d\n", ifp
->if_xname
, sc
->sc_phydelay
));
3840 if (sc
->sc_locale
== RTW_LOCALE_UNKNOWN
)
3841 rtw_identify_country(sc
);
3843 rtw_init_channels(sc
);
3845 rc
= rtw_identify_sta(sc
);
3850 ifp
->if_flags
= IFF_SIMPLEX
| IFF_BROADCAST
| IFF_MULTICAST
;
3851 ifp
->if_init
= rtw_init
;
3852 ifp
->if_ioctl
= rtw_ioctl
;
3853 ifp
->if_start
= rtw_start
;
3854 ifp
->if_watchdog
= rtw_watchdog
;
3855 ifq_set_maxlen(&ifp
->if_snd
, IFQ_MAXLEN
);
3856 ifq_set_ready(&ifp
->if_snd
);
3858 ic
->ic_phytype
= IEEE80211_T_DS
;
3859 ic
->ic_opmode
= IEEE80211_M_STA
;
3860 ic
->ic_caps
= IEEE80211_C_PMGT
|
3862 IEEE80211_C_HOSTAP
|
3863 IEEE80211_C_MONITOR
;
3864 ic
->ic_sup_rates
[IEEE80211_MODE_11B
] = rtw_rates_11b
;
3866 /* initialize led callout */
3867 callout_init(&sc
->sc_led_state
.ls_fast_ch
);
3868 callout_init(&sc
->sc_led_state
.ls_slow_ch
);
3870 IEEE80211_ONOE_PARAM_SETUP(&sc
->sc_onoe_param
);
3871 ic
->ic_ratectl
.rc_st_ratectl_cap
= IEEE80211_RATECTL_CAP_ONOE
;
3872 ic
->ic_ratectl
.rc_st_ratectl
= IEEE80211_RATECTL_ONOE
;
3873 ic
->ic_ratectl
.rc_st_attach
= rtw_ratectl_attach
;
3876 * Call MI attach routines.
3878 ieee80211_ifattach(&sc
->sc_ic
);
3880 /* Override some ieee80211 methods */
3881 rtw_set80211methods(&sc
->sc_mtbl
, &sc
->sc_ic
);
3884 * possibly we should fill in our own sc_send_prresp, since
3885 * the RTL8180 is probably sending probe responses in ad hoc
3889 /* complete initialization */
3890 ieee80211_media_init(&sc
->sc_ic
, rtw_media_change
, rtw_media_status
);
3891 callout_init(&sc
->sc_scan_ch
);
3893 rtw_init_radiotap(sc
);
3895 bpfattach_dlt(ifp
, DLT_IEEE802_11_RADIO
,
3896 sizeof(struct ieee80211_frame
) + 64, &sc
->sc_radiobpf
);
3898 rc
= bus_setup_intr(dev
, sc
->sc_irq_res
, INTR_MPSAFE
, rtw_intr
, sc
,
3899 &sc
->sc_irq_handle
, ifp
->if_serializer
);
3901 device_printf(dev
, "can't set up interrupt\n");
3903 ieee80211_ifdetach(ic
);
3907 ifp
->if_cpuid
= ithread_cpuid(rman_get_start(sc
->sc_irq_res
));
3908 KKASSERT(ifp
->if_cpuid
>= 0 && ifp
->if_cpuid
< ncpus
);
3910 device_printf(dev
, "hardware version %c\n", sc
->sc_hwverid
);
3912 ieee80211_announce(ic
);
3920 rtw_detach(device_t dev
)
3922 struct rtw_softc
*sc
= device_get_softc(dev
);
3923 struct ifnet
*ifp
= &sc
->sc_ic
.ic_if
;
3925 if (device_is_attached(dev
)) {
3926 lwkt_serialize_enter(ifp
->if_serializer
);
3929 sc
->sc_flags
|= RTW_F_INVALID
;
3931 callout_stop(&sc
->sc_scan_ch
);
3932 bus_teardown_intr(dev
, sc
->sc_irq_res
, sc
->sc_irq_handle
);
3934 lwkt_serialize_exit(ifp
->if_serializer
);
3936 ieee80211_ifdetach(&sc
->sc_ic
);
3939 if (sc
->sc_rf
!= NULL
)
3940 rtw_rf_destroy(sc
->sc_rf
);
3942 if (sc
->sc_srom
.sr_content
!= NULL
)
3943 kfree(sc
->sc_srom
.sr_content
, M_DEVBUF
);
3945 if (sc
->sc_irq_res
!= NULL
) {
3946 bus_release_resource(dev
, SYS_RES_IRQ
, sc
->sc_irq_rid
,
3950 rtw_soft_blk_free(sc
);
3951 rtw_desc_blk_free(sc
);
3956 rtw_desc_dma_addr(void *arg
, bus_dma_segment_t
*seg
, int nseg
, int error
)
3961 KASSERT(nseg
== 1, ("too many desc segments\n"));
3962 *((uint32_t *)arg
) = seg
->ds_addr
; /* XXX bus_addr_t */
3966 rtw_dma_alloc(struct rtw_softc
*sc
, bus_dma_tag_t
*dmat
, int len
,
3967 void **desc
, uint32_t *phyaddr
, bus_dmamap_t
*dmamap
)
3971 error
= bus_dma_tag_create(NULL
, RTW_DESC_ALIGNMENT
, 0,
3972 BUS_SPACE_MAXADDR_32BIT
, BUS_SPACE_MAXADDR
,
3973 NULL
, NULL
, len
, 1, len
, 0, dmat
);
3975 if_printf(&sc
->sc_ic
.ic_if
, "could not alloc desc DMA tag");
3979 error
= bus_dmamem_alloc(*dmat
, desc
, BUS_DMA_WAITOK
| BUS_DMA_ZERO
,
3982 if_printf(&sc
->sc_ic
.ic_if
, "could not alloc desc DMA mem");
3986 error
= bus_dmamap_load(*dmat
, *dmamap
, *desc
, len
,
3987 rtw_desc_dma_addr
, phyaddr
, BUS_DMA_WAITOK
);
3989 if_printf(&sc
->sc_ic
.ic_if
, "could not load desc DMA mem");
3990 bus_dmamem_free(*dmat
, *desc
, *dmamap
);
3998 rtw_dma_free(struct rtw_softc
*sc __unused
, bus_dma_tag_t
*dmat
, void **desc
,
3999 bus_dmamap_t
*dmamap
)
4001 if (*desc
!= NULL
) {
4002 bus_dmamap_unload(*dmat
, *dmamap
);
4003 bus_dmamem_free(*dmat
, *desc
, *dmamap
);
4007 if (*dmat
!= NULL
) {
4008 bus_dma_tag_destroy(*dmat
);
4014 rtw_txdesc_blk_free(struct rtw_softc
*sc
, int q_no
)
4016 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[q_no
];
4018 rtw_dma_free(sc
, &tdb
->tdb_dmat
, (void **)&tdb
->tdb_desc
,
4023 rtw_txdesc_blk_alloc(struct rtw_softc
*sc
, int q_len
, int q_no
,
4024 bus_size_t q_basereg
)
4026 struct rtw_txdesc_blk
*tdb
= &sc
->sc_txdesc_blk
[q_no
];
4032 error
= rtw_dma_alloc(sc
, &tdb
->tdb_dmat
,
4033 q_len
* sizeof(*tdb
->tdb_desc
),
4034 (void **)&tdb
->tdb_desc
, &tdb
->tdb_base
,
4037 kprintf("%dth tx\n", q_no
);
4040 tdb
->tdb_basereg
= q_basereg
;
4042 tdb
->tdb_ndesc
= q_len
;
4043 for (i
= 0; i
< tdb
->tdb_ndesc
; ++i
)
4044 tdb
->tdb_desc
[i
].td_next
= htole32(RTW_NEXT_DESC(tdb
, i
));
4050 rtw_rxdesc_blk_free(struct rtw_softc
*sc
)
4052 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
4054 rtw_dma_free(sc
, &rdb
->rdb_dmat
, (void **)&rdb
->rdb_desc
,
4059 rtw_rxdesc_blk_alloc(struct rtw_softc
*sc
, int q_len
)
4061 struct rtw_rxdesc_blk
*rdb
= &sc
->sc_rxdesc_blk
;
4067 error
= rtw_dma_alloc(sc
, &rdb
->rdb_dmat
,
4068 q_len
* sizeof(*rdb
->rdb_desc
),
4069 (void **)&rdb
->rdb_desc
, &rdb
->rdb_base
,
4074 rdb
->rdb_ndesc
= q_len
;
4081 rtw_txsoft_blk_free(struct rtw_softc
*sc
, int n_sd
, int q_no
)
4083 struct rtw_txsoft_blk
*tsb
= &sc
->sc_txsoft_blk
[q_no
];
4085 if (tsb
->tsb_desc
!= NULL
) {
4088 for (i
= 0; i
< n_sd
; ++i
) {
4089 bus_dmamap_destroy(sc
->sc_txsoft_dmat
,
4090 tsb
->tsb_desc
[i
].ts_dmamap
);
4092 kfree(tsb
->tsb_desc
, M_DEVBUF
);
4093 tsb
->tsb_desc
= NULL
;
4098 rtw_txsoft_blk_alloc(struct rtw_softc
*sc
, int q_len
, int q_no
, uint8_t q_poll
)
4100 struct rtw_txsoft_blk
*tsb
= &sc
->sc_txsoft_blk
[q_no
];
4103 STAILQ_INIT(&tsb
->tsb_dirtyq
);
4104 STAILQ_INIT(&tsb
->tsb_freeq
);
4105 tsb
->tsb_ndesc
= q_len
;
4106 tsb
->tsb_desc
= kmalloc(q_len
* sizeof(*tsb
->tsb_desc
), M_DEVBUF
,
4108 tsb
->tsb_poll
= q_poll
;
4110 for (i
= 0; i
< tsb
->tsb_ndesc
; ++i
) {
4111 error
= bus_dmamap_create(sc
->sc_txsoft_dmat
, 0,
4112 &tsb
->tsb_desc
[i
].ts_dmamap
);
4114 if_printf(&sc
->sc_ic
.ic_if
, "could not create DMA map "
4115 "for soft tx desc\n");
4116 rtw_txsoft_blk_free(sc
, i
, q_no
);
4124 rtw_rxsoft_blk_free(struct rtw_softc
*sc
, int n_sd
)
4126 if (sc
->sc_rxsoft_free
) {
4129 for (i
= 0; i
< n_sd
; ++i
) {
4130 bus_dmamap_destroy(sc
->sc_rxsoft_dmat
,
4131 sc
->sc_rxsoft
[i
].rs_dmamap
);
4133 sc
->sc_rxsoft_free
= 0;
4138 rtw_rxsoft_blk_alloc(struct rtw_softc
*sc
, int q_len
)
4142 sc
->sc_rxsoft_free
= 1;
4147 for (i
= 0; i
< q_len
; ++i
) {
4148 error
= bus_dmamap_create(sc
->sc_rxsoft_dmat
, 0,
4149 &sc
->sc_rxsoft
[i
].rs_dmamap
);
4151 if_printf(&sc
->sc_ic
.ic_if
, "could not create DMA map "
4152 "for soft rx desc\n");
4153 rtw_rxsoft_blk_free(sc
, i
);
4160 #define TXQ_PARAM(q, poll, breg) \
4161 [RTW_TXPRI ## q] = { \
4162 .txq_len = RTW_TXQLEN ## q, \
4164 .txq_basereg = breg \
4166 static const struct {
4169 bus_size_t txq_basereg
;
4170 } txq_params
[RTW_NTXPRI
] = {
4171 TXQ_PARAM(LO
, RTW_TPPOLL_LPQ
| RTW_TPPOLL_SLPQ
, RTW_TLPDA
),
4172 TXQ_PARAM(MD
, RTW_TPPOLL_NPQ
| RTW_TPPOLL_SNPQ
, RTW_TNPDA
),
4173 TXQ_PARAM(HI
, RTW_TPPOLL_HPQ
| RTW_TPPOLL_SHPQ
, RTW_THPDA
),
4174 TXQ_PARAM(BCN
, RTW_TPPOLL_BQ
| RTW_TPPOLL_SBQ
, RTW_TBDA
)
4179 rtw_desc_blk_alloc(struct rtw_softc
*sc
)
4183 /* Create h/w TX desc */
4184 for (i
= 0; i
< RTW_NTXPRI
; ++i
) {
4185 error
= rtw_txdesc_blk_alloc(sc
, txq_params
[i
].txq_len
, i
,
4186 txq_params
[i
].txq_basereg
);
4191 /* Create h/w RX desc */
4192 return rtw_rxdesc_blk_alloc(sc
, RTW_RXQLEN
);
4196 rtw_desc_blk_free(struct rtw_softc
*sc
)
4200 for (i
= 0; i
< RTW_NTXPRI
; ++i
)
4201 rtw_txdesc_blk_free(sc
, i
);
4202 rtw_rxdesc_blk_free(sc
);
4206 rtw_soft_blk_alloc(struct rtw_softc
*sc
)
4210 /* Create DMA tag for TX mbuf */
4211 error
= bus_dma_tag_create(NULL
, 1, 0,
4212 BUS_SPACE_MAXADDR_32BIT
, BUS_SPACE_MAXADDR
,
4214 MCLBYTES
, RTW_MAXPKTSEGS
, MCLBYTES
,
4215 0, &sc
->sc_txsoft_dmat
);
4217 if_printf(&sc
->sc_ic
.ic_if
, "could not alloc txsoft DMA tag\n");
4221 /* Create DMA tag for RX mbuf */
4222 error
= bus_dma_tag_create(NULL
, 1, 0,
4223 BUS_SPACE_MAXADDR_32BIT
, BUS_SPACE_MAXADDR
,
4225 MCLBYTES
, 1, MCLBYTES
,
4226 0, &sc
->sc_rxsoft_dmat
);
4228 if_printf(&sc
->sc_ic
.ic_if
, "could not alloc rxsoft DMA tag\n");
4232 /* Create a spare DMA map for RX mbuf */
4233 error
= bus_dmamap_create(sc
->sc_rxsoft_dmat
, 0, &sc
->sc_rxsoft_dmamap
);
4235 if_printf(&sc
->sc_ic
.ic_if
, "could not alloc spare rxsoft "
4237 bus_dma_tag_destroy(sc
->sc_rxsoft_dmat
);
4238 sc
->sc_rxsoft_dmat
= NULL
;
4242 /* Create s/w TX desc */
4243 for (i
= 0; i
< RTW_NTXPRI
; ++i
) {
4244 error
= rtw_txsoft_blk_alloc(sc
, txq_params
[i
].txq_len
, i
,
4245 txq_params
[i
].txq_poll
);
4250 /* Create s/w RX desc */
4251 return rtw_rxsoft_blk_alloc(sc
, RTW_RXQLEN
);
4255 rtw_soft_blk_free(struct rtw_softc
*sc
)
4259 for (i
= 0; i
< RTW_NTXPRI
; ++i
)
4260 rtw_txsoft_blk_free(sc
, txq_params
[i
].txq_len
, i
);
4262 rtw_rxsoft_blk_free(sc
, RTW_RXQLEN
);
4264 if (sc
->sc_txsoft_dmat
!= NULL
) {
4265 bus_dma_tag_destroy(sc
->sc_txsoft_dmat
);
4266 sc
->sc_txsoft_dmat
= NULL
;
4269 if (sc
->sc_rxsoft_dmat
!= NULL
) {
4270 bus_dmamap_destroy(sc
->sc_rxsoft_dmat
, sc
->sc_rxsoft_dmamap
);
4271 bus_dma_tag_destroy(sc
->sc_rxsoft_dmat
);
4272 sc
->sc_rxsoft_dmat
= NULL
;
4279 * paylen: payload length (no FCS, no WEP header)
4281 * hdrlen: header length
4283 * rate: MSDU speed, units 500kb/s
4285 * flags: IEEE80211_F_SHPREAMBLE (use short preamble),
4286 * IEEE80211_F_SHSLOT (use short slot length)
4290 * d: 802.11 Duration field for RTS,
4291 * 802.11 Duration field for data frame,
4292 * PLCP Length for data frame,
4293 * residual octets at end of data slot
4296 rtw_compute_duration1(int len
, int use_ack
, uint32_t icflags
, int rate
,
4297 struct rtw_duration
*d
)
4300 int ack
, bitlen
, data_dur
, remainder
;
4303 * RTS reserves medium for SIFS | CTS | SIFS | (DATA) | SIFS | ACK
4304 * DATA reserves medium for SIFS | ACK
4306 * XXXMYC: no ACK on multicast/broadcast or control packets
4311 pre
= IEEE80211_DUR_DS_SIFS
;
4312 if (icflags
& IEEE80211_F_SHPREAMBLE
) {
4313 pre
+= IEEE80211_DUR_DS_SHORT_PREAMBLE
+
4314 IEEE80211_DUR_DS_FAST_PLCPHDR
;
4316 pre
+= IEEE80211_DUR_DS_LONG_PREAMBLE
+
4317 IEEE80211_DUR_DS_SLOW_PLCPHDR
;
4321 data_dur
= (bitlen
* 2) / rate
;
4322 remainder
= (bitlen
* 2) % rate
;
4323 if (remainder
!= 0) {
4324 d
->d_residue
= (rate
- remainder
) / 16;
4329 case 2: /* 1 Mb/s */
4330 case 4: /* 2 Mb/s */
4331 /* 1 - 2 Mb/s WLAN: send ACK/CTS at 1 Mb/s */
4334 case 11: /* 5.5 Mb/s */
4335 case 22: /* 11 Mb/s */
4336 case 44: /* 22 Mb/s */
4337 /* 5.5 - 11 Mb/s WLAN: send ACK/CTS at 2 Mb/s */
4345 d
->d_plcp_len
= data_dur
;
4347 ack
= (use_ack
) ? pre
+ (IEEE80211_DUR_DS_SLOW_ACK
* 2) / ctsrate
: 0;
4349 d
->d_rts_dur
= pre
+ (IEEE80211_DUR_DS_SLOW_CTS
* 2) / ctsrate
+
4353 d
->d_data_dur
= ack
;
4362 * paylen: payload length (no FCS, no WEP header)
4364 * rate: MSDU speed, units 500kb/s
4366 * fraglen: fragment length, set to maximum (or higher) for no
4369 * flags: IEEE80211_F_PRIVACY (hardware adds WEP),
4370 * IEEE80211_F_SHPREAMBLE (use short preamble),
4371 * IEEE80211_F_SHSLOT (use short slot length)
4375 * d0: 802.11 Duration fields (RTS/Data), PLCP Length, Service fields
4376 * of first/only fragment
4378 * dn: 802.11 Duration fields (RTS/Data), PLCP Length, Service fields
4381 * rtw_compute_duration assumes crypto-encapsulation, if any,
4382 * has already taken place.
4385 rtw_compute_duration(const struct ieee80211_frame_min
*wh
,
4386 const struct ieee80211_key
*wk
, int len
,
4387 uint32_t icflags
, int fraglen
, int rate
,
4388 struct rtw_duration
*d0
, struct rtw_duration
*dn
,
4389 int *npktp
, int debug
)
4392 int cryptolen
, /* crypto overhead: header+trailer */
4393 firstlen
, /* first fragment's payload + overhead length */
4394 hdrlen
, /* header length w/o driver padding */
4395 lastlen
, /* last fragment's payload length w/ overhead */
4396 lastlen0
, /* last fragment's payload length w/o overhead */
4397 npkt
, /* number of fragments */
4398 overlen
, /* non-802.11 header overhead per fragment */
4399 paylen
; /* payload length w/o overhead */
4401 hdrlen
= ieee80211_anyhdrsize((const void *)wh
);
4403 /* Account for padding required by the driver. */
4404 if (icflags
& IEEE80211_F_DATAPAD
)
4405 paylen
= len
- roundup(hdrlen
, sizeof(u_int32_t
));
4407 paylen
= len
- hdrlen
;
4409 overlen
= IEEE80211_CRC_LEN
;
4412 cryptolen
= wk
->wk_cipher
->ic_header
+
4413 wk
->wk_cipher
->ic_trailer
;
4414 paylen
-= cryptolen
;
4415 overlen
+= cryptolen
;
4418 npkt
= paylen
/ fraglen
;
4419 lastlen0
= paylen
% fraglen
;
4421 if (npkt
== 0) { /* no fragments */
4422 lastlen
= paylen
+ overlen
;
4423 } else if (lastlen0
!= 0) { /* a short "tail" fragment */
4424 lastlen
= lastlen0
+ overlen
;
4426 } else { /* full-length "tail" fragment */
4427 lastlen
= fraglen
+ overlen
;
4434 firstlen
= fraglen
+ overlen
;
4436 firstlen
= paylen
+ overlen
;
4439 kprintf("%s: npkt %d firstlen %d lastlen0 %d lastlen %d "
4440 "fraglen %d overlen %d len %d rate %d icflags %08x\n",
4441 __func__
, npkt
, firstlen
, lastlen0
, lastlen
, fraglen
,
4442 overlen
, len
, rate
, icflags
);
4445 ack
= (!IEEE80211_IS_MULTICAST(wh
->i_addr1
) &&
4446 (wh
->i_fc
[1] & IEEE80211_FC0_TYPE_MASK
) !=
4447 IEEE80211_FC0_TYPE_CTL
);
4449 rc
= rtw_compute_duration1(firstlen
+ hdrlen
, ack
, icflags
, rate
, d0
);
4457 return rtw_compute_duration1(lastlen
+ hdrlen
, ack
, icflags
, rate
, dn
);
4461 rtw_get_rssi(struct rtw_softc
*sc
, uint8_t raw
, uint8_t sq
)
4465 rssi
= sc
->sc_getrssi(raw
, sq
);
4469 else if (rssi
> 100)
4472 if (rssi
> (RTW_NOISE_FLOOR
+ RTW_RSSI_CORR
))
4473 rssi
-= (RTW_NOISE_FLOOR
+ RTW_RSSI_CORR
);
4481 rtw_maxim_getrssi(uint8_t raw
, uint8_t sq __unused
)
4496 rtw_gct_getrssi(uint8_t raw
, uint8_t sq __unused
)
4501 if ((raw
& 0x1) == 0 || rssi
> 0x3c)
4504 rssi
= (100 * rssi
) / 0x3c;
4511 rtw_philips_getrssi(uint8_t raw
, uint8_t sq
)
4513 static const uint8_t sq_rssi_map
[SA2400_SQ_RSSI_MAP_MAX
] =
4514 { SA2400_SQ_RSSI_MAP
};
4516 if (sq
< SA2400_SQ_RSSI_MAP_MAX
- 1) /* NB: -1 is intended */
4517 return sq_rssi_map
[sq
];
4526 rtw_ratectl_attach(struct ieee80211com
*ic
, u_int rc
)
4528 struct rtw_softc
*sc
= ic
->ic_if
.if_softc
;
4531 case IEEE80211_RATECTL_ONOE
:
4532 return &sc
->sc_onoe_param
;
4533 case IEEE80211_RATECTL_NONE
:
4534 /* This could only happen during detaching */
4537 panic("unknown rate control algo %u\n", rc
);