2 * Copyright (c) 2005 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * $DragonFly: src/sys/sys/machintr.h,v 1.7 2007/04/30 16:46:01 dillon Exp $
37 * This module defines the ABI for the machine-independant cpu interrupt
38 * vector and masking layer.
42 #include <sys/queue.h>
45 enum machintr_type
{ MACHINTR_GENERIC
, MACHINTR_ICU
, MACHINTR_APIC
};
47 #define MACHINTR_VAR_SIZEMASK 0xFFFF
49 #define MACHINTR_VAR_IMCR_PRESENT (0x00010000|sizeof(int))
51 #define MACHINTR_VECTOR_SETUP 1
52 #define MACHINTR_VECTOR_TEARDOWN 2
53 #define MACHINTR_VECTOR_SETDEFAULT 3
56 * Machine interrupt ABIs - registered at boot-time
59 enum machintr_type type
;
60 void (*intrdis
)(int); /* hardware disable irq */
61 void (*intren
)(int); /* hardware enable irq */
62 int (*vectorctl
)(int, int, int); /* hardware intr vector ctl */
63 int (*setvar
)(int, const void *); /* set miscellanious info */
64 int (*getvar
)(int, void *); /* get miscellanious info */
65 void (*finalize
)(void); /* final before ints enabled */
66 void (*cleanup
)(void); /* cleanup */
69 #define machintr_intren(intr) MachIntrABI.intren(intr)
70 #define machintr_intrdis(intr) MachIntrABI.intrdis(intr)
71 #define machintr_vector_setup(intr, flags) \
72 MachIntrABI.vectorctl(MACHINTR_VECTOR_SETUP, intr, flags)
73 #define machintr_vector_teardown(intr) \
74 MachIntrABI.vectorctl(MACHINTR_VECTOR_TEARDOWN, intr, 0)
75 #define machintr_vector_setdefault(intr) \
76 MachIntrABI.vectorctl(MACHINTR_VECTOR_SETDEFAULT, intr, 0)
80 extern struct machintr_abi MachIntrABI
;
81 extern int machintr_setvar_simple(int, int);