kernel - Handle spinlock indefinite wait edge case
[dragonfly.git] / contrib / gcc-4.7 / gcc / regs.h
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1 /* Define per-register tables for data flow info and register allocation.
2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software
4 Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #ifndef GCC_REGS_H
23 #define GCC_REGS_H
25 #include "machmode.h"
26 #include "hard-reg-set.h"
28 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
30 /* When you only have the mode of a pseudo register before it has a hard
31 register chosen for it, this reports the size of each hard register
32 a pseudo in such a mode would get allocated to. A target may
33 override this. */
35 #ifndef REGMODE_NATURAL_SIZE
36 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
37 #endif
39 /* Maximum register number used in this function, plus one. */
41 extern int max_regno;
43 /* REG_N_REFS and REG_N_SETS are initialized by a call to
44 regstat_init_n_sets_and_refs from the current values of
45 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
46 should only be used if a pass need to change these values in some
47 magical way or the pass needs to have accurate values for these
48 and is not using incremental df scanning.
50 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
51 should be made to regstat_free_n_sets_and_refs.
53 Local alloc seems to play pretty loose with these values.
54 REG_N_REFS is set to 0 if the register is used in an asm.
55 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
56 REG_N_SETS for three address insns. Other passes seem to have
57 other special values. */
61 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
63 struct regstat_n_sets_and_refs_t
65 int sets; /* # of times (REG n) is set */
66 int refs; /* # of times (REG n) is used or set */
69 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
71 /* Indexed by n, gives number of times (REG n) is used or set. */
72 static inline int
73 REG_N_REFS(int regno)
75 return regstat_n_sets_and_refs[regno].refs;
78 /* Indexed by n, gives number of times (REG n) is used or set. */
79 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
80 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
82 /* Indexed by n, gives number of times (REG n) is set. */
83 static inline int
84 REG_N_SETS (int regno)
86 return regstat_n_sets_and_refs[regno].sets;
89 /* Indexed by n, gives number of times (REG n) is set. */
90 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
91 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
94 /* Functions defined in reg-stat.c. */
95 extern void regstat_init_n_sets_and_refs (void);
96 extern void regstat_free_n_sets_and_refs (void);
97 extern void regstat_compute_ri (void);
98 extern void regstat_free_ri (void);
99 extern bitmap regstat_get_setjmp_crosses (void);
100 extern void regstat_compute_calls_crossed (void);
101 extern void regstat_free_calls_crossed (void);
104 /* Register information indexed by register number. This structure is
105 initialized by calling regstat_compute_ri and is destroyed by
106 calling regstat_free_ri. */
107 struct reg_info_t
109 int freq; /* # estimated frequency (REG n) is used or set */
110 int deaths; /* # of times (REG n) dies */
111 int live_length; /* # of instructions (REG n) is live */
112 int calls_crossed; /* # of calls (REG n) is live across */
113 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */
114 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
115 int basic_block; /* # of basic blocks (REG n) is used in */
118 extern struct reg_info_t *reg_info_p;
120 /* The number allocated elements of reg_info_p. */
121 extern size_t reg_info_p_size;
123 /* Estimate frequency of references to register N. */
125 #define REG_FREQ(N) (reg_info_p[N].freq)
127 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
128 This constant does not need to be high, as in infrequently executed
129 regions we want to count instructions equivalently to optimize for
130 size instead of speed. */
131 #define REG_FREQ_MAX 1000
133 /* Compute register frequency from the BB frequency. When optimizing for size,
134 or profile driven feedback is available and the function is never executed,
135 frequency is always equivalent. Otherwise rescale the basic block
136 frequency. */
137 #define REG_FREQ_FROM_BB(bb) (optimize_size \
138 || (flag_branch_probabilities \
139 && !ENTRY_BLOCK_PTR->count) \
140 ? REG_FREQ_MAX \
141 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
142 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
143 : 1)
145 /* Indexed by N, gives number of insns in which register N dies.
146 Note that if register N is live around loops, it can die
147 in transitions between basic blocks, and that is not counted here.
148 So this is only a reliable indicator of how many regions of life there are
149 for registers that are contained in one basic block. */
151 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
153 /* Get the number of consecutive words required to hold pseudo-reg N. */
155 #define PSEUDO_REGNO_SIZE(N) \
156 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
157 / UNITS_PER_WORD)
159 /* Get the number of bytes required to hold pseudo-reg N. */
161 #define PSEUDO_REGNO_BYTES(N) \
162 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
164 /* Get the machine mode of pseudo-reg N. */
166 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
168 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
170 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
171 #define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed)
173 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
174 (REG n) is live. */
176 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
178 /* Total number of instructions at which (REG n) is live. The larger
179 this is, the less priority (REG n) gets for allocation in a hard
180 register (in global-alloc). This is set in df-problems.c whenever
181 register info is requested and remains valid for the rest of the
182 compilation of the function; it is used to control register
183 allocation.
185 local-alloc.c may alter this number to change the priority.
187 Negative values are special.
188 -1 is used to mark a pseudo reg which has a constant or memory equivalent
189 and is used infrequently enough that it should not get a hard register.
190 -2 is used to mark a pseudo reg for a parameter, when a frame pointer
191 is not required. global.c makes an allocno for this but does
192 not try to assign a hard register to it. */
194 #define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length)
196 /* Indexed by n, gives number of basic block that (REG n) is used in.
197 If the value is REG_BLOCK_GLOBAL (-1),
198 it means (REG n) is used in more than one basic block.
199 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
200 This information remains valid for the rest of the compilation
201 of the current function; it is used to control register allocation. */
203 #define REG_BLOCK_UNKNOWN 0
204 #define REG_BLOCK_GLOBAL -1
206 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
208 /* Vector of substitutions of register numbers,
209 used to map pseudo regs into hardware regs.
211 This can't be folded into reg_n_info without changing all of the
212 machine dependent directories, since the reload functions
213 in the machine dependent files access it. */
215 extern short *reg_renumber;
217 /* Flag set by local-alloc or global-alloc if they decide to allocate
218 something in a call-clobbered register. */
220 extern int caller_save_needed;
222 /* Predicate to decide whether to give a hard reg to a pseudo which
223 is referenced REFS times and would need to be saved and restored
224 around a call CALLS times. */
226 #ifndef CALLER_SAVE_PROFITABLE
227 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
228 #endif
230 /* Select a register mode required for caller save of hard regno REGNO. */
231 #ifndef HARD_REGNO_CALLER_SAVE_MODE
232 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
233 choose_hard_reg_mode (REGNO, NREGS, false)
234 #endif
236 /* Registers that get partially clobbered by a call in a given mode.
237 These must not be call used registers. */
238 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
239 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
240 #endif
242 typedef unsigned short move_table[N_REG_CLASSES];
244 /* Target-dependent globals. */
245 struct target_regs {
246 /* For each starting hard register, the number of consecutive hard
247 registers that a given machine mode occupies. */
248 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
250 /* For each hard register, the widest mode object that it can contain.
251 This will be a MODE_INT mode if the register can hold integers. Otherwise
252 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
253 register. */
254 enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
256 /* Vector indexed by machine mode saying whether there are regs of
257 that mode. */
258 bool x_have_regs_of_mode[MAX_MACHINE_MODE];
260 /* 1 if the corresponding class contains a register of the given mode. */
261 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
263 /* Maximum cost of moving from a register in one class to a register
264 in another class. Based on TARGET_REGISTER_MOVE_COST. */
265 move_table *x_move_cost[MAX_MACHINE_MODE];
267 /* Similar, but here we don't have to move if the first index is a
268 subset of the second so in that case the cost is zero. */
269 move_table *x_may_move_in_cost[MAX_MACHINE_MODE];
271 /* Similar, but here we don't have to move if the first index is a
272 superset of the second so in that case the cost is zero. */
273 move_table *x_may_move_out_cost[MAX_MACHINE_MODE];
275 /* Keep track of the last mode we initialized move costs for. */
276 int x_last_mode_for_init_move_cost;
278 /* Record for each mode whether we can move a register directly to or
279 from an object of that mode in memory. If we can't, we won't try
280 to use that mode directly when accessing a field of that mode. */
281 char x_direct_load[NUM_MACHINE_MODES];
282 char x_direct_store[NUM_MACHINE_MODES];
284 /* Record for each mode whether we can float-extend from memory. */
285 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
288 extern struct target_regs default_target_regs;
289 #if SWITCHABLE_TARGET
290 extern struct target_regs *this_target_regs;
291 #else
292 #define this_target_regs (&default_target_regs)
293 #endif
295 #define hard_regno_nregs \
296 (this_target_regs->x_hard_regno_nregs)
297 #define reg_raw_mode \
298 (this_target_regs->x_reg_raw_mode)
299 #define have_regs_of_mode \
300 (this_target_regs->x_have_regs_of_mode)
301 #define contains_reg_of_mode \
302 (this_target_regs->x_contains_reg_of_mode)
303 #define move_cost \
304 (this_target_regs->x_move_cost)
305 #define may_move_in_cost \
306 (this_target_regs->x_may_move_in_cost)
307 #define may_move_out_cost \
308 (this_target_regs->x_may_move_out_cost)
309 #define direct_load \
310 (this_target_regs->x_direct_load)
311 #define direct_store \
312 (this_target_regs->x_direct_store)
313 #define float_extend_from_mem \
314 (this_target_regs->x_float_extend_from_mem)
316 /* Return an exclusive upper bound on the registers occupied by hard
317 register (reg:MODE REGNO). */
319 static inline unsigned int
320 end_hard_regno (enum machine_mode mode, unsigned int regno)
322 return regno + hard_regno_nregs[regno][(int) mode];
325 /* Likewise for hard register X. */
327 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
329 /* Likewise for hard or pseudo register X. */
331 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
333 /* Add to REGS all the registers required to store a value of mode MODE
334 in register REGNO. */
336 static inline void
337 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
338 unsigned int regno)
340 unsigned int end_regno;
342 end_regno = end_hard_regno (mode, regno);
344 SET_HARD_REG_BIT (*regs, regno);
345 while (++regno < end_regno);
348 /* Likewise, but remove the registers. */
350 static inline void
351 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
352 unsigned int regno)
354 unsigned int end_regno;
356 end_regno = end_hard_regno (mode, regno);
358 CLEAR_HARD_REG_BIT (*regs, regno);
359 while (++regno < end_regno);
362 /* Return true if REGS contains the whole of (reg:MODE REGNO). */
364 static inline bool
365 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
366 unsigned int regno)
368 unsigned int end_regno;
370 if (!TEST_HARD_REG_BIT (regs, regno))
371 return false;
373 end_regno = end_hard_regno (mode, regno);
374 while (++regno < end_regno)
375 if (!TEST_HARD_REG_BIT (regs, regno))
376 return false;
378 return true;
381 /* Return true if (reg:MODE REGNO) includes an element of REGS. */
383 static inline bool
384 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
385 unsigned int regno)
387 unsigned int end_regno;
389 if (TEST_HARD_REG_BIT (regs, regno))
390 return true;
392 end_regno = end_hard_regno (mode, regno);
393 while (++regno < end_regno)
394 if (TEST_HARD_REG_BIT (regs, regno))
395 return true;
397 return false;
400 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
401 REGNO and MODE. */
403 static inline void
404 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
405 int nregs)
407 while (nregs-- > 0)
408 SET_HARD_REG_BIT (*regs, regno + nregs);
411 /* Likewise, but remove the registers. */
413 static inline void
414 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
415 int nregs)
417 while (nregs-- > 0)
418 CLEAR_HARD_REG_BIT (*regs, regno + nregs);
421 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
422 REGNO and MODE. */
423 static inline bool
424 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
425 int nregs)
427 while (nregs-- > 0)
428 if (TEST_HARD_REG_BIT (set, regno + nregs))
429 return true;
430 return false;
433 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
434 REGNO and MODE. */
435 static inline bool
436 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
438 while (nregs-- > 0)
439 if (!TEST_HARD_REG_BIT (set, regno + nregs))
440 return false;
441 return true;
444 #endif /* GCC_REGS_H */