2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement:
15 * This product includes software developed by the University of
16 * California, Berkeley and its contributors.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * $FreeBSD: src/sys/isa/sio.c,v 1.291.2.35 2003/05/18 08:51:15 murray Exp $
34 * $DragonFly: src/sys/dev/serial/sio/sio.c,v 1.44 2008/07/23 16:39:33 dillon Exp $
35 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
36 * from: i386/isa sio.c,v 1.234
39 #include "opt_comconsole.h"
40 #include "opt_compat.h"
50 * Serial driver, based on 386BSD-0.1 com driver.
51 * Mostly rewritten to use pseudo-DMA.
52 * Works for National Semiconductor NS8250-NS16550AF UARTs.
53 * COM driver, based on HP dca driver.
55 * Changes for PC-Card integration:
56 * - Added PC-Card driver table and handlers
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/reboot.h>
61 #include <sys/malloc.h>
65 #include <sys/module.h>
67 #include <sys/dkstat.h>
68 #include <sys/fcntl.h>
69 #include <sys/interrupt.h>
70 #include <sys/kernel.h>
71 #include <sys/syslog.h>
72 #include <sys/sysctl.h>
75 #include <sys/timepps.h>
76 #include <sys/thread2.h>
78 #include <machine/limits.h>
80 #include <bus/isa/isareg.h>
81 #include <bus/isa/isavar.h>
83 #include <bus/pci/pcireg.h>
84 #include <bus/pci/pcivar.h>
87 #include <dev/misc/puc/pucvar.h>
89 #include <machine/lock.h>
91 #include <machine/clock.h>
93 #include <machine/lock.h>
97 #include "sio_private.h"
100 #include "../ic_layer/esp.h"
103 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
105 #define CALLOUT_MASK 0x80
106 #define CONTROL_MASK 0x60
107 #define CONTROL_INIT_STATE 0x20
108 #define CONTROL_LOCK_STATE 0x40
109 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
110 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
112 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
115 #define com_scr 7 /* scratch register for 16450-16550 (R/W) */
117 #define sio_getreg(com, off) \
118 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
119 #define sio_setreg(com, off, value) \
120 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
124 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
125 * than the other bits so that they can be tested as a group without masking
128 * The following com and tty flags correspond closely:
129 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
131 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
132 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
133 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
134 * TS_FLUSH is not used.
135 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
136 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
138 #define CS_BUSY 0x80 /* output in progress */
139 #define CS_TTGO 0x40 /* output not stopped by XOFF */
140 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
141 #define CS_CHECKMSR 1 /* check of MSR scheduled */
142 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
143 #define CS_DTR_OFF 0x10 /* DTR held off */
144 #define CS_ODONE 4 /* output completed */
145 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
146 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
148 static char const * const error_desc
[] = {
151 #define CE_INTERRUPT_BUF_OVERFLOW 1
152 "interrupt-level buffer overflow",
153 #define CE_TTY_BUF_OVERFLOW 2
154 "tty-level buffer overflow",
158 static int espattach (struct com_s
*com
, Port_t esp_port
);
160 static int sio_isa_attach (device_t dev
);
162 static timeout_t siobusycheck
;
163 static u_int
siodivisor (u_long rclk
, speed_t speed
);
164 static timeout_t siodtrwakeup
;
165 static void comhardclose (struct com_s
*com
);
166 static void sioinput (struct com_s
*com
);
167 static void siointr1 (struct com_s
*com
);
168 static void siointr (void *arg
);
169 static int commctl (struct com_s
*com
, int bits
, int how
);
170 static int comparam (struct tty
*tp
, struct termios
*t
);
171 static inthand2_t siopoll
;
172 static int sio_isa_probe (device_t dev
);
173 static void siosettimeout (void);
174 static int siosetwater (struct com_s
*com
, speed_t speed
);
175 static void comstart (struct tty
*tp
);
176 static void comstop (struct tty
*tp
, int rw
);
177 static timeout_t comwakeup
;
178 static void disc_optim (struct tty
*tp
, struct termios
*t
,
182 static int sio_pci_attach (device_t dev
);
183 static void sio_pci_kludge_unit (device_t dev
);
184 static int sio_pci_probe (device_t dev
);
185 #endif /* NPCI > 0 */
188 static int sio_puc_attach (device_t dev
);
189 static int sio_puc_probe (device_t dev
);
190 #endif /* NPUC > 0 */
192 static char driver_name
[] = "sio";
194 /* table and macro for fast conversion from a unit number to its com struct */
195 devclass_t sio_devclass
;
196 #define com_addr(unit) ((struct com_s *) \
197 devclass_get_softc(sio_devclass, unit))
199 static device_method_t sio_isa_methods
[] = {
200 /* Device interface */
201 DEVMETHOD(device_probe
, sio_isa_probe
),
202 DEVMETHOD(device_attach
, sio_isa_attach
),
207 static driver_t sio_isa_driver
= {
210 sizeof(struct com_s
),
214 static device_method_t sio_pci_methods
[] = {
215 /* Device interface */
216 DEVMETHOD(device_probe
, sio_pci_probe
),
217 DEVMETHOD(device_attach
, sio_pci_attach
),
222 static driver_t sio_pci_driver
= {
225 sizeof(struct com_s
),
227 #endif /* NPCI > 0 */
230 static device_method_t sio_puc_methods
[] = {
231 /* Device interface */
232 DEVMETHOD(device_probe
, sio_puc_probe
),
233 DEVMETHOD(device_attach
, sio_puc_attach
),
238 static driver_t sio_puc_driver
= {
241 sizeof(struct com_s
),
243 #endif /* NPUC > 0 */
245 static d_open_t sioopen
;
246 static d_close_t sioclose
;
247 static d_read_t sioread
;
248 static d_write_t siowrite
;
249 static d_ioctl_t sioioctl
;
251 #define CDEV_MAJOR 28
252 static struct dev_ops sio_ops
= {
253 { driver_name
, CDEV_MAJOR
, D_TTY
| D_KQFILTER
},
260 .d_kqfilter
= ttykqfilter
264 static volatile speed_t comdefaultrate
= CONSPEED
;
265 static u_long comdefaultrclk
= DEFAULT_RCLK
;
266 SYSCTL_ULONG(_machdep
, OID_AUTO
, conrclk
, CTLFLAG_RW
, &comdefaultrclk
, 0, "");
267 static u_int com_events
; /* input chars + weighted output completions */
268 static Port_t siocniobase
;
269 static int siocnunit
;
270 static Port_t siogdbiobase
;
271 static int siogdbunit
= -1;
272 static bool_t sio_registered
;
273 static int sio_timeout
;
274 static int sio_timeouts_until_log
;
275 static struct callout sio_timeout_handle
;
276 static int sio_numunits
;
279 /* XXX configure this properly. */
280 static Port_t likely_com_ports
[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
281 static Port_t likely_esp_ports
[] = { 0x140, 0x180, 0x280, 0 };
285 * handle sysctl read/write requests for console speed
287 * In addition to setting comdefaultrate for I/O through /dev/console,
288 * also set the initial and lock values for the /dev/ttyXX device
289 * if there is one associated with the console. Finally, if the /dev/tty
290 * device has already been open, change the speed on the open running port
295 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS
)
302 newspeed
= comdefaultrate
;
304 error
= sysctl_handle_opaque(oidp
, &newspeed
, sizeof newspeed
, req
);
305 if (error
|| !req
->newptr
)
308 comdefaultrate
= newspeed
;
310 if (comconsole
< 0) /* serial console not selected? */
313 com
= com_addr(comconsole
);
318 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
319 * (note, the lock rates really are boolean -- if non-zero, disallow
322 com
->it_in
.c_ispeed
= com
->it_in
.c_ospeed
=
323 com
->lt_in
.c_ispeed
= com
->lt_in
.c_ospeed
=
324 com
->it_out
.c_ispeed
= com
->it_out
.c_ospeed
=
325 com
->lt_out
.c_ispeed
= com
->lt_out
.c_ospeed
= comdefaultrate
;
328 * if we're open, change the running rate too
331 if (tp
&& (tp
->t_state
& TS_ISOPEN
)) {
332 tp
->t_termios
.c_ispeed
=
333 tp
->t_termios
.c_ospeed
= comdefaultrate
;
335 error
= comparam(tp
, &tp
->t_termios
);
341 SYSCTL_PROC(_machdep
, OID_AUTO
, conspeed
, CTLTYPE_INT
| CTLFLAG_RW
,
342 0, 0, sysctl_machdep_comdefaultrate
, "I", "");
351 static struct pci_ids pci_ids
[] = {
352 { 0x100812b9, "3COM PCI FaxModem", 0x10 },
353 { 0x2000131f, "CyberSerial (1-port) 16550", 0x10 },
354 { 0x01101407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
355 { 0x01111407, "Koutech IOFLEX-2S PCI Dual Port Serial", 0x10 },
356 { 0x048011c1, "Lucent kermit based PCI Modem", 0x14 },
357 { 0x95211415, "Oxford Semiconductor PCI Dual Port Serial", 0x10 },
358 { 0x7101135e, "SeaLevel Ultra 530.PCI Single Port Serial", 0x18 },
359 { 0x0000151f, "SmartLink 5634PCV SurfRider", 0x10 },
360 { 0x98459710, "Netmos Nm9845 PCI Bridge with Dual UART", 0x10 },
361 { 0x00000000, NULL
, 0 }
365 sio_pci_attach(device_t dev
)
370 type
= pci_get_devid(dev
);
372 while (id
->type
&& id
->type
!= type
)
374 if (id
->desc
== NULL
)
376 sio_pci_kludge_unit(dev
);
377 return (sioattach(dev
, id
->rid
, 0UL));
381 * Don't cut and paste this to other drivers. It is a horrible kludge
382 * which will fail to work and also be unnecessary in future versions.
385 sio_pci_kludge_unit(device_t dev
)
394 while (resource_int_value("sio", unit
, "port", &start
) == 0 &&
397 if (device_get_unit(dev
) < unit
) {
398 dc
= device_get_devclass(dev
);
399 while (devclass_get_device(dc
, unit
))
401 device_printf(dev
, "moving to sio%d\n", unit
);
402 err
= device_set_unit(dev
, unit
); /* EVIL DO NOT COPY */
404 device_printf(dev
, "error moving device %d\n", err
);
409 sio_pci_probe(device_t dev
)
414 type
= pci_get_devid(dev
);
416 while (id
->type
&& id
->type
!= type
)
418 if (id
->desc
== NULL
)
420 device_set_desc(dev
, id
->desc
);
421 return (sioprobe(dev
, id
->rid
, 0UL));
423 #endif /* NPCI > 0 */
427 sio_puc_attach(device_t dev
)
431 if (BUS_READ_IVAR(device_get_parent(dev
), dev
, PUC_IVAR_FREQ
,
434 return (sioattach(dev
, 0, rclk
));
438 sio_puc_probe(device_t dev
)
442 if (BUS_READ_IVAR(device_get_parent(dev
), dev
, PUC_IVAR_FREQ
,
445 return (sioprobe(dev
, 0, rclk
));
449 static struct isa_pnp_id sio_ids
[] = {
450 {0x0005d041, "Standard PC COM port"}, /* PNP0500 */
451 {0x0105d041, "16550A-compatible COM port"}, /* PNP0501 */
452 {0x0205d041, "Multiport serial device (non-intelligent 16550)"}, /* PNP0502 */
453 {0x1005d041, "Generic IRDA-compatible device"}, /* PNP0510 */
454 {0x1105d041, "Generic IRDA-compatible device"}, /* PNP0511 */
455 /* Devices that do not have a compatid */
456 {0x12206804, NULL
}, /* ACH2012 - 5634BTS 56K Video Ready Modem */
457 {0x7602a904, NULL
}, /* AEI0276 - 56K v.90 Fax Modem (LKT) */
458 {0x00007905, NULL
}, /* AKY0000 - 56K Plug&Play Modem */
459 {0x21107905, NULL
}, /* AKY1021 - 56K Plug&Play Modem */
460 {0x01405407, NULL
}, /* AZT4001 - AZT3000 PnP SOUND DEVICE, MODEM */
461 {0x56039008, NULL
}, /* BDP0356 - Best Data 56x2 */
462 {0x56159008, NULL
}, /* BDP1556 - B.D. Smart One 56SPS,Voice Modem*/
463 {0x36339008, NULL
}, /* BDP3336 - Best Data Prods. 336F */
464 {0x0014490a, NULL
}, /* BRI1400 - Boca 33.6 PnP */
465 {0x0015490a, NULL
}, /* BRI1500 - Internal Fax Data */
466 {0x0034490a, NULL
}, /* BRI3400 - Internal ACF Modem */
467 {0x0094490a, NULL
}, /* BRI9400 - Boca K56Flex PnP */
468 {0x00b4490a, NULL
}, /* BRIB400 - Boca 56k PnP */
469 {0x0030320d, NULL
}, /* CIR3000 - Cirrus Logic V43 */
470 {0x0100440e, NULL
}, /* CRD0001 - Cardinal MVP288IV ? */
471 {0x01308c0e, NULL
}, /* CTL3001 - Creative Labs Phoneblaster */
472 {0x36033610, NULL
}, /* DAV0336 - DAVICOM 336PNP MODEM */
473 {0x01009416, NULL
}, /* ETT0001 - E-Tech Bullet 33k6 PnP */
474 {0x0000aa1a, NULL
}, /* FUJ0000 - FUJITSU Modem 33600 PNP/I2 */
475 {0x1200c31e, NULL
}, /* GVC0012 - VF1128HV-R9 (win modem?) */
476 {0x0303c31e, NULL
}, /* GVC0303 - MaxTech 33.6 PnP D/F/V */
477 {0x0505c31e, NULL
}, /* GVC0505 - GVC 56k Faxmodem */
478 {0x0116c31e, NULL
}, /* GVC1601 - Rockwell V.34 Plug & Play Modem */
479 {0x0050c31e, NULL
}, /* GVC5000 - some GVC modem */
480 {0x3800f91e, NULL
}, /* GWY0038 - Telepath with v.90 */
481 {0x9062f91e, NULL
}, /* GWY6290 - Telepath with x2 Technology */
482 {0x8100e425, NULL
}, /* IOD0081 - I-O DATA DEVICE,INC. IFML-560 */
483 {0x21002534, NULL
}, /* MAE0021 - Jetstream Int V.90 56k Voice Series 2*/
484 {0x0000f435, NULL
}, /* MOT0000 - Motorola ModemSURFR 33.6 Intern */
485 {0x5015f435, NULL
}, /* MOT1550 - Motorola ModemSURFR 56K Modem */
486 {0xf015f435, NULL
}, /* MOT15F0 - Motorola VoiceSURFR 56K Modem */
487 {0x6045f435, NULL
}, /* MOT4560 - Motorola ? */
488 {0x61e7a338, NULL
}, /* NECE761 - 33.6Modem */
489 {0x08804f3f, NULL
}, /* OZO8008 - Zoom (33.6k Modem) */
490 {0x0f804f3f, NULL
}, /* OZO800f - Zoom 2812 (56k Modem) */
491 {0x39804f3f, NULL
}, /* OZO8039 - Zoom 56k flex */
492 {0x00914f3f, NULL
}, /* OZO9100 - Zoom 2919 (K56 Faxmodem) */
493 {0x3024a341, NULL
}, /* PMC2430 - Pace 56 Voice Internal Modem */
494 {0x1000eb49, NULL
}, /* ROK0010 - Rockwell ? */
495 {0x1200b23d, NULL
}, /* RSS0012 - OMRON ME5614ISA */
496 {0x5002734a, NULL
}, /* RSS0250 - 5614Jx3(G) Internal Modem */
497 {0x6202734a, NULL
}, /* RSS0262 - 5614Jx3[G] V90+K56Flex Modem */
498 {0x1010104d, NULL
}, /* SHP1010 - Rockwell 33600bps Modem */
499 {0xc100ad4d, NULL
}, /* SMM00C1 - Leopard 56k PnP */
500 {0x9012b04e, NULL
}, /* SUP1290 - Supra ? */
501 {0x1013b04e, NULL
}, /* SUP1310 - SupraExpress 336i PnP */
502 {0x8013b04e, NULL
}, /* SUP1380 - SupraExpress 288i PnP Voice */
503 {0x8113b04e, NULL
}, /* SUP1381 - SupraExpress 336i PnP Voice */
504 {0x5016b04e, NULL
}, /* SUP1650 - Supra 336i Sp Intl */
505 {0x7016b04e, NULL
}, /* SUP1670 - Supra 336i V+ Intl */
506 {0x7420b04e, NULL
}, /* SUP2070 - Supra ? */
507 {0x8020b04e, NULL
}, /* SUP2080 - Supra ? */
508 {0x8420b04e, NULL
}, /* SUP2084 - SupraExpress 56i PnP */
509 {0x7121b04e, NULL
}, /* SUP2171 - SupraExpress 56i Sp? */
510 {0x8024b04e, NULL
}, /* SUP2480 - Supra ? */
511 {0x01007256, NULL
}, /* USR0001 - U.S. Robotics Inc., Sportster W */
512 {0x02007256, NULL
}, /* USR0002 - U.S. Robotics Inc. Sportster 33. */
513 {0x04007256, NULL
}, /* USR0004 - USR Sportster 14.4k */
514 {0x06007256, NULL
}, /* USR0006 - USR Sportster 33.6k */
515 {0x11007256, NULL
}, /* USR0011 - USR ? */
516 {0x01017256, NULL
}, /* USR0101 - USR ? */
517 {0x30207256, NULL
}, /* USR2030 - U.S.Robotics Inc. Sportster 560 */
518 {0x50207256, NULL
}, /* USR2050 - U.S.Robotics Inc. Sportster 33. */
519 {0x70207256, NULL
}, /* USR2070 - U.S.Robotics Inc. Sportster 560 */
520 {0x30307256, NULL
}, /* USR3030 - U.S. Robotics 56K FAX INT */
521 {0x31307256, NULL
}, /* USR3031 - U.S. Robotics 56K FAX INT */
522 {0x50307256, NULL
}, /* USR3050 - U.S. Robotics 56K FAX INT */
523 {0x70307256, NULL
}, /* USR3070 - U.S. Robotics 56K Voice INT */
524 {0x90307256, NULL
}, /* USR3090 - USR ? */
525 {0x70917256, NULL
}, /* USR9170 - U.S. Robotics 56K FAX INT */
526 {0x90917256, NULL
}, /* USR9190 - USR 56k Voice INT */
527 {0x0300695c, NULL
}, /* WCI0003 - Fax/Voice/Modem/Speakphone/Asvd */
528 {0x01a0896a, NULL
}, /* ZTIA001 - Zoom Internal V90 Faxmodem */
529 {0x61f7896a, NULL
}, /* ZTIF761 - Zoom ComStar 33.6 */
536 sio_isa_probe(device_t dev
)
538 /* Check isapnp ids */
539 if (ISA_PNP_PROBE(device_get_parent(dev
), dev
, sio_ids
) == ENXIO
)
541 return (sioprobe(dev
, 0, 0UL));
545 sioprobe(device_t dev
, int xrid
, u_long rclk
)
548 static bool_t already_init
;
557 intrmask_t irqmap
[4];
562 u_int flags
= device_get_flags(dev
);
564 struct resource
*port
;
567 port
= bus_alloc_resource(dev
, SYS_RES_IOPORT
, &rid
,
568 0, ~0, IO_COMSIZE
, RF_ACTIVE
);
572 com
= device_get_softc(dev
);
573 com
->bst
= rman_get_bustag(port
);
574 com
->bsh
= rman_get_bushandle(port
);
581 * XXX this is broken - when we are first called, there are no
582 * previously configured IO ports. We could hard code
583 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
584 * This code has been doing nothing since the conversion since
585 * "count" is zero the first time around.
589 * Turn off MCR_IENABLE for all likely serial ports. An unused
590 * port with its MCR_IENABLE gate open will inhibit interrupts
591 * from any used port that shares the interrupt vector.
592 * XXX the gate enable is elsewhere for some multiports.
595 int count
, i
, xioport
;
597 devclass_get_devices(sio_devclass
, &devs
, &count
);
598 for (i
= 0; i
< count
; i
++) {
600 if (device_is_enabled(xdev
) &&
601 bus_get_resource(xdev
, SYS_RES_IOPORT
, 0, &xioport
,
603 outb(xioport
+ com_mcr
, 0);
610 if (COM_LLCONSOLE(flags
)) {
611 kprintf("sio%d: reserved for low-level i/o\n",
612 device_get_unit(dev
));
613 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
618 * If the device is on a multiport card and has an AST/4
619 * compatible interrupt control register, initialize this
620 * register and prepare to leave MCR_IENABLE clear in the mcr.
621 * Otherwise, prepare to set MCR_IENABLE in the mcr.
622 * Point idev to the device struct giving the correct id_irq.
623 * This is the struct for the master device if there is one.
626 mcr_image
= MCR_IENABLE
;
628 if (COM_ISMULTIPORT(flags
)) {
632 idev
= devclass_get_device(sio_devclass
, COM_MPMASTER(flags
));
634 kprintf("sio%d: master device %d not configured\n",
635 device_get_unit(dev
), COM_MPMASTER(flags
));
638 if (!COM_NOTAST4(flags
)) {
639 if (bus_get_resource(idev
, SYS_RES_IOPORT
, 0, &io
,
642 if (bus_get_resource(idev
, SYS_RES_IRQ
, 0,
644 outb(xiobase
+ com_scr
, 0x80);
646 outb(xiobase
+ com_scr
, 0);
651 #endif /* COM_MULTIPORT */
652 if (bus_get_resource(idev
, SYS_RES_IRQ
, 0, NULL
, NULL
) != 0)
655 bzero(failures
, sizeof failures
);
656 iobase
= rman_get_start(port
);
659 * We don't want to get actual interrupts, just masked ones.
660 * Interrupts from this line should already be masked in the ICU,
661 * but mask them in the processor as well in case there are some
662 * (misconfigured) shared interrupts.
668 * For the TI16754 chips, set prescaler to 1 (4 is often the
669 * default after-reset value) as otherwise it's impossible to
670 * get highest baudrates.
672 if (COM_TI16754(flags
)) {
675 cfcr
= sio_getreg(com
, com_cfcr
);
676 sio_setreg(com
, com_cfcr
, CFCR_EFR_ENABLE
);
677 efr
= sio_getreg(com
, com_efr
);
678 /* Unlock extended features to turn off prescaler. */
679 sio_setreg(com
, com_efr
, efr
| EFR_EFE
);
681 sio_setreg(com
, com_cfcr
, (cfcr
!= CFCR_EFR_ENABLE
) ? cfcr
: 0);
682 /* Turn off prescaler. */
683 sio_setreg(com
, com_mcr
,
684 sio_getreg(com
, com_mcr
) & ~MCR_PRESCALE
);
685 sio_setreg(com
, com_cfcr
, CFCR_EFR_ENABLE
);
686 sio_setreg(com
, com_efr
, efr
);
687 sio_setreg(com
, com_cfcr
, cfcr
);
691 * Initialize the speed and the word size and wait long enough to
692 * drain the maximum of 16 bytes of junk in device output queues.
693 * The speed is undefined after a master reset and must be set
694 * before relying on anything related to output. There may be
695 * junk after a (very fast) soft reboot and (apparently) after
697 * XXX what about the UART bug avoided by waiting in comparam()?
698 * We don't want to to wait long enough to drain at 2 bps.
700 if (iobase
== siocniobase
) {
701 DELAY((16 + 1) * 1000000 / (comdefaultrate
/ 10));
703 sio_setreg(com
, com_cfcr
, CFCR_DLAB
| CFCR_8BITS
);
704 divisor
= siodivisor(rclk
, SIO_TEST_SPEED
);
705 sio_setreg(com
, com_dlbl
, divisor
& 0xff);
706 sio_setreg(com
, com_dlbh
, divisor
>> 8);
707 sio_setreg(com
, com_cfcr
, CFCR_8BITS
);
708 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED
/ 10));
712 * Make sure we can drain the receiver. If we can't, the serial
713 * port may not exist.
715 for (fn
= 0; fn
< 256; ++fn
) {
716 if ((sio_getreg(com
, com_lsr
) & LSR_RXRDY
) == 0)
718 (void)sio_getreg(com
, com_data
);
721 kprintf("sio%d: can't drain, serial port might "
722 "not exist, disabling\n", device_get_unit(dev
));
728 * Enable the interrupt gate and disable device interupts. This
729 * should leave the device driving the interrupt line low and
730 * guarantee an edge trigger if an interrupt can be generated.
733 sio_setreg(com
, com_mcr
, mcr_image
);
734 sio_setreg(com
, com_ier
, 0);
735 DELAY(1000); /* XXX */
736 irqmap
[0] = isa_irq_pending();
739 * Attempt to set loopback mode so that we can send a null byte
740 * without annoying any external device.
743 sio_setreg(com
, com_mcr
, mcr_image
| MCR_LOOPBACK
);
746 * Attempt to generate an output interrupt. On 8250's, setting
747 * IER_ETXRDY generates an interrupt independent of the current
748 * setting and independent of whether the THR is empty. On 16450's,
749 * setting IER_ETXRDY generates an interrupt independent of the
750 * current setting. On 16550A's, setting IER_ETXRDY only
751 * generates an interrupt when IER_ETXRDY is not already set.
753 sio_setreg(com
, com_ier
, IER_ETXRDY
);
756 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
757 * an interrupt. They'd better generate one for actually doing
758 * output. Loopback may be broken on the same incompatibles but
759 * it's unlikely to do more than allow the null byte out.
761 sio_setreg(com
, com_data
, 0);
762 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED
/ 10));
765 * Turn off loopback mode so that the interrupt gate works again
766 * (MCR_IENABLE was hidden). This should leave the device driving
767 * an interrupt line high. It doesn't matter if the interrupt
768 * line oscillates while we are not looking at it, since interrupts
772 sio_setreg(com
, com_mcr
, mcr_image
);
775 * Some pcmcia cards have the "TXRDY bug", so we check everyone
776 * for IIR_TXRDY implementation ( Palido 321s, DC-1S... )
778 if (COM_NOPROBE(flags
)) {
779 /* Reading IIR register twice */
780 for (fn
= 0; fn
< 2; fn
++) {
782 failures
[6] = sio_getreg(com
, com_iir
);
784 /* Check IIR_TXRDY clear ? */
786 if (failures
[6] & IIR_TXRDY
) {
787 /* Nop, Double check with clearing IER */
788 sio_setreg(com
, com_ier
, 0);
789 if (sio_getreg(com
, com_iir
) & IIR_NOPEND
) {
790 /* Ok. we're familia this gang */
791 SET_FLAG(dev
, COM_C_IIR_TXRDYBUG
);
793 /* Unknown, Just omit this chip.. XXX */
795 sio_setreg(com
, com_mcr
, 0);
798 /* OK. this is well-known guys */
799 CLR_FLAG(dev
, COM_C_IIR_TXRDYBUG
);
801 sio_setreg(com
, com_ier
, 0);
802 sio_setreg(com
, com_cfcr
, CFCR_8BITS
);
804 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
805 return (iobase
== siocniobase
? 0 : result
);
810 * o the CFCR, IER and MCR in UART hold the values written to them
811 * (the values happen to be all distinct - this is good for
812 * avoiding false positive tests from bus echoes).
813 * o an output interrupt is generated and its vector is correct.
814 * o the interrupt goes away when the IIR in the UART is read.
817 failures
[0] = sio_getreg(com
, com_cfcr
) - CFCR_8BITS
;
818 failures
[1] = sio_getreg(com
, com_ier
) - IER_ETXRDY
;
819 failures
[2] = sio_getreg(com
, com_mcr
) - mcr_image
;
820 DELAY(10000); /* Some internal modems need this time */
821 irqmap
[1] = isa_irq_pending();
822 failures
[4] = (sio_getreg(com
, com_iir
) & IIR_IMASK
) - IIR_TXRDY
;
823 DELAY(1000); /* XXX */
824 irqmap
[2] = isa_irq_pending();
825 failures
[6] = (sio_getreg(com
, com_iir
) & IIR_IMASK
) - IIR_NOPEND
;
828 * Turn off all device interrupts and check that they go off properly.
829 * Leave MCR_IENABLE alone. For ports without a master port, it gates
830 * the OUT2 output of the UART to
831 * the ICU input. Closing the gate would give a floating ICU input
832 * (unless there is another device driving it) and spurious interrupts.
833 * (On the system that this was first tested on, the input floats high
834 * and gives a (masked) interrupt as soon as the gate is closed.)
836 sio_setreg(com
, com_ier
, 0);
837 sio_setreg(com
, com_cfcr
, CFCR_8BITS
); /* dummy to avoid bus echo */
838 failures
[7] = sio_getreg(com
, com_ier
);
839 DELAY(1000); /* XXX */
840 irqmap
[3] = isa_irq_pending();
841 failures
[9] = (sio_getreg(com
, com_iir
) & IIR_IMASK
) - IIR_NOPEND
;
845 irqs
= irqmap
[1] & ~irqmap
[0];
846 if (bus_get_resource(idev
, SYS_RES_IRQ
, 0, &xirq
, NULL
) == 0 &&
847 ((1 << xirq
) & irqs
) == 0)
849 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
850 device_get_unit(dev
), xirq
, irqs
);
852 kprintf("sio%d: irq maps: %#x %#x %#x %#x\n",
853 device_get_unit(dev
),
854 irqmap
[0], irqmap
[1], irqmap
[2], irqmap
[3]);
857 for (fn
= 0; fn
< sizeof failures
; ++fn
)
859 sio_setreg(com
, com_mcr
, 0);
862 kprintf("sio%d: probe failed test(s):",
863 device_get_unit(dev
));
864 for (fn
= 0; fn
< sizeof failures
; ++fn
)
871 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
872 return (iobase
== siocniobase
? 0 : result
);
877 espattach(struct com_s
*com
, Port_t esp_port
)
883 * Check the ESP-specific I/O port to see if we're an ESP
884 * card. If not, return failure immediately.
886 if ((inb(esp_port
) & 0xf3) == 0) {
887 kprintf(" port 0x%x is not an ESP board?\n", esp_port
);
892 * We've got something that claims to be a Hayes ESP card.
896 /* Get the dip-switch configuration */
897 outb(esp_port
+ ESP_CMD1
, ESP_GETDIPS
);
898 dips
= inb(esp_port
+ ESP_STATUS1
);
901 * Bits 0,1 of dips say which COM port we are.
903 if (rman_get_start(com
->ioportres
) == likely_com_ports
[dips
& 0x03])
906 kprintf(" esp_port has com %d\n", dips
& 0x03);
911 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
913 outb(esp_port
+ ESP_CMD1
, ESP_GETTEST
);
914 val
= inb(esp_port
+ ESP_STATUS1
); /* clear reg 1 */
915 val
= inb(esp_port
+ ESP_STATUS2
);
916 if ((val
& 0x70) < 0x20) {
917 kprintf("-old (%o)", val
& 0x70);
922 * Check for ability to emulate 16550: bit 7 == 1
924 if ((dips
& 0x80) == 0) {
930 * Okay, we seem to be a Hayes ESP card. Whee.
933 com
->esp_port
= esp_port
;
939 sio_isa_attach(device_t dev
)
941 return (sioattach(dev
, 0, 0UL));
945 sioattach(device_t dev
, int xrid
, u_long rclk
)
956 struct resource
*port
;
962 callout_init(&sio_timeout_handle
);
966 port
= bus_alloc_resource(dev
, SYS_RES_IOPORT
, &rid
,
967 0, ~0, IO_COMSIZE
, RF_ACTIVE
);
971 iobase
= rman_get_start(port
);
972 unit
= device_get_unit(dev
);
973 com
= device_get_softc(dev
);
974 flags
= device_get_flags(dev
);
976 if (unit
>= sio_numunits
)
977 sio_numunits
= unit
+ 1;
979 * sioprobe() has initialized the device registers as follows:
980 * o cfcr = CFCR_8BITS.
981 * It is most important that CFCR_DLAB is off, so that the
982 * data port is not hidden when we enable interrupts.
984 * Interrupts are only enabled when the line is open.
985 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
986 * interrupt control register or the config specifies no irq.
987 * Keeping MCR_DTR and MCR_RTS off might stop the external
988 * device from sending before we are ready.
990 bzero(com
, sizeof *com
);
992 com
->ioportres
= port
;
993 com
->bst
= rman_get_bustag(port
);
994 com
->bsh
= rman_get_bushandle(port
);
995 com
->cfcr_image
= CFCR_8BITS
;
996 com
->dtr_wait
= 3 * hz
;
997 callout_init(&com
->dtr_ch
);
998 callout_init(&com
->busy_ch
);
999 com
->loses_outints
= COM_LOSESOUTINTS(flags
) != 0;
1000 com
->no_irq
= bus_get_resource(dev
, SYS_RES_IRQ
, 0, NULL
, NULL
) != 0;
1001 com
->tx_fifo_size
= 1;
1002 com
->obufs
[0].l_head
= com
->obuf1
;
1003 com
->obufs
[1].l_head
= com
->obuf2
;
1005 com
->data_port
= iobase
+ com_data
;
1006 com
->int_id_port
= iobase
+ com_iir
;
1007 com
->modem_ctl_port
= iobase
+ com_mcr
;
1008 com
->mcr_image
= inb(com
->modem_ctl_port
);
1009 com
->line_status_port
= iobase
+ com_lsr
;
1010 com
->modem_status_port
= iobase
+ com_msr
;
1011 com
->intr_ctl_port
= iobase
+ com_ier
;
1014 rclk
= DEFAULT_RCLK
;
1018 * We don't use all the flags from <sys/ttydefaults.h> since they
1019 * are only relevant for logins. It's important to have echo off
1020 * initially so that the line doesn't start blathering before the
1021 * echo flag can be turned off.
1023 com
->it_in
.c_iflag
= 0;
1024 com
->it_in
.c_oflag
= 0;
1025 com
->it_in
.c_cflag
= TTYDEF_CFLAG
;
1026 com
->it_in
.c_lflag
= 0;
1027 if (unit
== comconsole
) {
1028 com
->it_in
.c_iflag
= TTYDEF_IFLAG
;
1029 com
->it_in
.c_oflag
= TTYDEF_OFLAG
;
1030 com
->it_in
.c_cflag
= TTYDEF_CFLAG
| CLOCAL
;
1031 com
->it_in
.c_lflag
= TTYDEF_LFLAG
;
1032 com
->lt_out
.c_cflag
= com
->lt_in
.c_cflag
= CLOCAL
;
1033 com
->lt_out
.c_ispeed
= com
->lt_out
.c_ospeed
=
1034 com
->lt_in
.c_ispeed
= com
->lt_in
.c_ospeed
=
1035 com
->it_in
.c_ispeed
= com
->it_in
.c_ospeed
= comdefaultrate
;
1037 com
->it_in
.c_ispeed
= com
->it_in
.c_ospeed
= TTYDEF_SPEED
;
1038 if (siosetwater(com
, com
->it_in
.c_ispeed
) != 0) {
1041 * Leave i/o resources allocated if this is a `cn'-level
1042 * console, so that other devices can't snarf them.
1044 if (iobase
!= siocniobase
)
1045 bus_release_resource(dev
, SYS_RES_IOPORT
, rid
, port
);
1049 termioschars(&com
->it_in
);
1050 com
->it_out
= com
->it_in
;
1052 /* attempt to determine UART type */
1053 kprintf("sio%d: type", unit
);
1056 #ifdef COM_MULTIPORT
1057 if (!COM_ISMULTIPORT(flags
) && !COM_IIR_TXRDYBUG(flags
))
1059 if (!COM_IIR_TXRDYBUG(flags
))
1066 scr
= sio_getreg(com
, com_scr
);
1067 sio_setreg(com
, com_scr
, 0xa5);
1068 scr1
= sio_getreg(com
, com_scr
);
1069 sio_setreg(com
, com_scr
, 0x5a);
1070 scr2
= sio_getreg(com
, com_scr
);
1071 sio_setreg(com
, com_scr
, scr
);
1072 if (scr1
!= 0xa5 || scr2
!= 0x5a) {
1074 goto determined_type
;
1077 sio_setreg(com
, com_fifo
, FIFO_ENABLE
| FIFO_RX_HIGH
);
1080 switch (inb(com
->int_id_port
) & IIR_FIFO_MASK
) {
1091 if (COM_NOFIFO(flags
)) {
1092 kprintf(" 16550A fifo disabled");
1094 com
->hasfifo
= TRUE
;
1095 if (COM_ST16650A(flags
)) {
1097 com
->tx_fifo_size
= 32;
1098 kprintf(" ST16650A");
1099 } else if (COM_TI16754(flags
)) {
1100 com
->tx_fifo_size
= 64;
1101 kprintf(" TI16754");
1103 com
->tx_fifo_size
= COM_FIFOSIZE(flags
);
1108 for (espp
= likely_esp_ports
; *espp
!= 0; espp
++)
1109 if (espattach(com
, *espp
)) {
1110 com
->tx_fifo_size
= 1024;
1114 if (!com
->st16650a
&& !COM_TI16754(flags
)) {
1115 if (!com
->tx_fifo_size
)
1116 com
->tx_fifo_size
= 16;
1118 kprintf(" lookalike with %d bytes FIFO",
1128 * Set 16550 compatibility mode.
1129 * We don't use the ESP_MODE_SCALE bit to increase the
1130 * fifo trigger levels because we can't handle large
1132 * XXX flow control should be set in comparam(), not here.
1134 outb(com
->esp_port
+ ESP_CMD1
, ESP_SETMODE
);
1135 outb(com
->esp_port
+ ESP_CMD2
, ESP_MODE_RTS
| ESP_MODE_FIFO
);
1137 /* Set RTS/CTS flow control. */
1138 outb(com
->esp_port
+ ESP_CMD1
, ESP_SETFLOWTYPE
);
1139 outb(com
->esp_port
+ ESP_CMD2
, ESP_FLOW_RTS
);
1140 outb(com
->esp_port
+ ESP_CMD2
, ESP_FLOW_CTS
);
1142 /* Set flow-control levels. */
1143 outb(com
->esp_port
+ ESP_CMD1
, ESP_SETRXFLOW
);
1144 outb(com
->esp_port
+ ESP_CMD2
, HIBYTE(768));
1145 outb(com
->esp_port
+ ESP_CMD2
, LOBYTE(768));
1146 outb(com
->esp_port
+ ESP_CMD2
, HIBYTE(512));
1147 outb(com
->esp_port
+ ESP_CMD2
, LOBYTE(512));
1149 #endif /* COM_ESP */
1150 sio_setreg(com
, com_fifo
, 0);
1153 #ifdef COM_MULTIPORT
1154 if (COM_ISMULTIPORT(flags
)) {
1157 com
->multiport
= TRUE
;
1158 kprintf(" (multiport");
1159 if (unit
== COM_MPMASTER(flags
))
1162 masterdev
= devclass_get_device(sio_devclass
,
1163 COM_MPMASTER(flags
));
1164 com
->no_irq
= (masterdev
== NULL
|| bus_get_resource(masterdev
,
1165 SYS_RES_IRQ
, 0, NULL
, NULL
) != 0);
1167 #endif /* COM_MULTIPORT */
1168 if (unit
== comconsole
)
1169 kprintf(", console");
1170 if (COM_IIR_TXRDYBUG(flags
))
1171 kprintf(" with a bogus IIR_TXRDY register");
1174 if (!sio_registered
) {
1175 register_swi(SWI_TTY
, siopoll
, NULL
,"swi_siopoll", NULL
);
1176 sio_registered
= TRUE
;
1178 minorbase
= UNIT_TO_MINOR(unit
);
1179 dev_ops_add(&sio_ops
, UNIT_TO_MINOR(-1), minorbase
);
1180 make_dev(&sio_ops
, minorbase
,
1181 UID_ROOT
, GID_WHEEL
, 0600, "ttyd%r", unit
);
1182 make_dev(&sio_ops
, minorbase
| CONTROL_INIT_STATE
,
1183 UID_ROOT
, GID_WHEEL
, 0600, "ttyid%r", unit
);
1184 make_dev(&sio_ops
, minorbase
| CONTROL_LOCK_STATE
,
1185 UID_ROOT
, GID_WHEEL
, 0600, "ttyld%r", unit
);
1186 make_dev(&sio_ops
, minorbase
| CALLOUT_MASK
,
1187 UID_UUCP
, GID_DIALER
, 0660, "cuaa%r", unit
);
1188 make_dev(&sio_ops
, minorbase
| CALLOUT_MASK
| CONTROL_INIT_STATE
,
1189 UID_UUCP
, GID_DIALER
, 0660, "cuaia%r", unit
);
1190 make_dev(&sio_ops
, minorbase
| CALLOUT_MASK
| CONTROL_LOCK_STATE
,
1191 UID_UUCP
, GID_DIALER
, 0660, "cuala%r", unit
);
1193 com
->pps
.ppscap
= PPS_CAPTUREASSERT
| PPS_CAPTURECLEAR
;
1194 pps_init(&com
->pps
);
1197 com
->irqres
= bus_alloc_resource(dev
, SYS_RES_IRQ
, &rid
, 0ul, ~0ul, 1,
1200 ret
= BUS_SETUP_INTR(device_get_parent(dev
), dev
, com
->irqres
,
1201 INTR_FAST
, siointr
, com
,
1202 &com
->cookie
, NULL
);
1204 ret
= BUS_SETUP_INTR(device_get_parent(dev
), dev
,
1205 com
->irqres
, 0, siointr
, com
,
1206 &com
->cookie
, NULL
);
1208 device_printf(dev
, "unable to activate interrupt in fast mode - using normal mode\n");
1211 device_printf(dev
, "could not activate interrupt\n");
1212 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1213 defined(ALT_BREAK_TO_DEBUGGER))
1215 * Enable interrupts for early break-to-debugger support
1218 if (ret
== 0 && unit
== comconsole
)
1219 outb(siocniobase
+ com_ier
, IER_ERXRDY
| IER_ERLS
|
1228 sioopen(struct dev_open_args
*ap
)
1230 cdev_t dev
= ap
->a_head
.a_dev
;
1238 unit
= MINOR_TO_UNIT(mynor
);
1239 com
= com_addr(unit
);
1244 if (mynor
& CONTROL_MASK
)
1246 tp
= dev
->si_tty
= com
->tp
= ttymalloc(com
->tp
);
1249 * We jump to this label after all non-interrupted sleeps to pick
1250 * up any changes of the device state.
1253 while (com
->state
& CS_DTR_OFF
) {
1254 error
= tsleep(&com
->dtr_wait
, PCATCH
, "siodtr", 0);
1255 if (com_addr(unit
) == NULL
) {
1259 if (error
!= 0 || com
->gone
)
1262 if (tp
->t_state
& TS_ISOPEN
) {
1264 * The device is open, so everything has been initialized.
1267 if (mynor
& CALLOUT_MASK
) {
1268 if (!com
->active_out
) {
1273 if (com
->active_out
) {
1274 if (ap
->a_oflags
& O_NONBLOCK
) {
1278 error
= tsleep(&com
->active_out
,
1279 PCATCH
, "siobi", 0);
1280 if (com_addr(unit
) == NULL
) {
1284 if (error
!= 0 || com
->gone
)
1289 if (tp
->t_state
& TS_XCLUDE
&& priv_check_cred(ap
->a_cred
, PRIV_ROOT
, 0)) {
1295 * The device isn't open, so there are no conflicts.
1296 * Initialize it. Initialization is done twice in many
1297 * cases: to preempt sleeping callin opens if we are
1298 * callout, and to complete a callin open after DCD rises.
1300 tp
->t_oproc
= comstart
;
1301 tp
->t_param
= comparam
;
1302 tp
->t_stop
= comstop
;
1304 tp
->t_termios
= mynor
& CALLOUT_MASK
1305 ? com
->it_out
: com
->it_in
;
1306 (void)commctl(com
, TIOCM_DTR
| TIOCM_RTS
, DMSET
);
1307 com
->poll
= com
->no_irq
;
1308 com
->poll_output
= com
->loses_outints
;
1310 error
= comparam(tp
, &tp
->t_termios
);
1315 * XXX we should goto open_top if comparam() slept.
1319 * (Re)enable and drain fifos.
1321 * Certain SMC chips cause problems if the fifos
1322 * are enabled while input is ready. Turn off the
1323 * fifo if necessary to clear the input. We test
1324 * the input ready bit after enabling the fifos
1325 * since we've already enabled them in comparam()
1326 * and to handle races between enabling and fresh
1330 sio_setreg(com
, com_fifo
,
1331 FIFO_RCV_RST
| FIFO_XMT_RST
1334 * XXX the delays are for superstitious
1335 * historical reasons. It must be less than
1336 * the character time at the maximum
1337 * supported speed (87 usec at 115200 bps
1338 * 8N1). Otherwise we might loop endlessly
1339 * if data is streaming in. We used to use
1340 * delays of 100. That usually worked
1341 * because DELAY(100) used to usually delay
1342 * for about 85 usec instead of 100.
1345 if (!(inb(com
->line_status_port
) & LSR_RXRDY
))
1347 sio_setreg(com
, com_fifo
, 0);
1349 (void) inb(com
->data_port
);
1354 (void) inb(com
->line_status_port
);
1355 (void) inb(com
->data_port
);
1356 com
->prev_modem_status
= com
->last_modem_status
1357 = inb(com
->modem_status_port
);
1358 if (COM_IIR_TXRDYBUG(com
->flags
)) {
1359 outb(com
->intr_ctl_port
, IER_ERXRDY
| IER_ERLS
1362 outb(com
->intr_ctl_port
, IER_ERXRDY
| IER_ETXRDY
1363 | IER_ERLS
| IER_EMSC
);
1367 * Handle initial DCD. Callout devices get a fake initial
1368 * DCD (trapdoor DCD). If we are callout, then any sleeping
1369 * callin opens get woken up and resume sleeping on "siobi"
1370 * instead of "siodcd".
1373 * XXX `mynor & CALLOUT_MASK' should be
1374 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1375 * TRAPDOOR_CARRIER is the default initial state for callout
1376 * devices and SOFT_CARRIER is like CLOCAL except it hides
1379 if (com
->prev_modem_status
& MSR_DCD
|| mynor
& CALLOUT_MASK
)
1380 (*linesw
[tp
->t_line
].l_modem
)(tp
, 1);
1383 * Wait for DCD if necessary.
1385 if (!(tp
->t_state
& TS_CARR_ON
) && !(mynor
& CALLOUT_MASK
)
1386 && !(tp
->t_cflag
& CLOCAL
) && !(ap
->a_oflags
& O_NONBLOCK
)) {
1388 error
= tsleep(TSA_CARR_ON(tp
), PCATCH
, "siodcd", 0);
1389 if (com_addr(unit
) == NULL
) {
1394 if (error
!= 0 || com
->gone
)
1398 error
= (*linesw
[tp
->t_line
].l_open
)(dev
, tp
);
1399 disc_optim(tp
, &tp
->t_termios
, com
);
1400 if (tp
->t_state
& TS_ISOPEN
&& mynor
& CALLOUT_MASK
)
1401 com
->active_out
= TRUE
;
1405 if (!(tp
->t_state
& TS_ISOPEN
) && com
->wopeners
== 0)
1411 sioclose(struct dev_close_args
*ap
)
1413 cdev_t dev
= ap
->a_head
.a_dev
;
1419 if (mynor
& CONTROL_MASK
)
1421 com
= com_addr(MINOR_TO_UNIT(mynor
));
1426 (*linesw
[tp
->t_line
].l_close
)(tp
, ap
->a_fflag
);
1427 disc_optim(tp
, &tp
->t_termios
, com
);
1428 comstop(tp
, FREAD
| FWRITE
);
1434 kprintf("sio%d: gone\n", com
->unit
);
1436 if (com
->ibuf
!= NULL
)
1437 kfree(com
->ibuf
, M_DEVBUF
);
1438 bzero(tp
, sizeof *tp
);
1445 comhardclose(struct com_s
*com
)
1453 com
->poll_output
= FALSE
;
1454 com
->do_timestamp
= FALSE
;
1455 com
->do_dcd_timestamp
= FALSE
;
1456 com
->pps
.ppsparam
.mode
= 0;
1457 sio_setreg(com
, com_cfcr
, com
->cfcr_image
&= ~CFCR_SBREAK
);
1460 #if defined(DDB) && (defined(BREAK_TO_DEBUGGER) || \
1461 defined(ALT_BREAK_TO_DEBUGGER))
1463 * Leave interrupts enabled and don't clear DTR if this is the
1464 * console. This allows us to detect break-to-debugger events
1465 * while the console device is closed.
1467 if (com
->unit
!= comconsole
)
1470 sio_setreg(com
, com_ier
, 0);
1471 if (tp
->t_cflag
& HUPCL
1473 * XXX we will miss any carrier drop between here and the
1474 * next open. Perhaps we should watch DCD even when the
1475 * port is closed; it is not sufficient to check it at
1476 * the next open because it might go up and down while
1477 * we're not watching.
1479 || (!com
->active_out
1480 && !(com
->prev_modem_status
& MSR_DCD
)
1481 && !(com
->it_in
.c_cflag
& CLOCAL
))
1482 || !(tp
->t_state
& TS_ISOPEN
)) {
1483 (void)commctl(com
, TIOCM_DTR
, DMBIC
);
1484 if (com
->dtr_wait
!= 0 && !(com
->state
& CS_DTR_OFF
)) {
1485 callout_reset(&com
->dtr_ch
, com
->dtr_wait
,
1487 com
->state
|= CS_DTR_OFF
;
1493 * Disable fifos so that they are off after controlled
1494 * reboots. Some BIOSes fail to detect 16550s when the
1495 * fifos are enabled.
1497 sio_setreg(com
, com_fifo
, 0);
1499 com
->active_out
= FALSE
;
1500 wakeup(&com
->active_out
);
1501 wakeup(TSA_CARR_ON(tp
)); /* restart any wopeners */
1506 sioread(struct dev_read_args
*ap
)
1508 cdev_t dev
= ap
->a_head
.a_dev
;
1513 if (mynor
& CONTROL_MASK
)
1515 com
= com_addr(MINOR_TO_UNIT(mynor
));
1516 if (com
== NULL
|| com
->gone
)
1518 return ((*linesw
[com
->tp
->t_line
].l_read
)(com
->tp
, ap
->a_uio
, ap
->a_ioflag
));
1522 siowrite(struct dev_write_args
*ap
)
1524 cdev_t dev
= ap
->a_head
.a_dev
;
1530 if (mynor
& CONTROL_MASK
)
1533 unit
= MINOR_TO_UNIT(mynor
);
1534 com
= com_addr(unit
);
1535 if (com
== NULL
|| com
->gone
)
1538 * (XXX) We disallow virtual consoles if the physical console is
1539 * a serial port. This is in case there is a display attached that
1540 * is not the console. In that situation we don't need/want the X
1541 * server taking over the console.
1543 if (constty
!= NULL
&& unit
== comconsole
)
1545 return ((*linesw
[com
->tp
->t_line
].l_write
)(com
->tp
, ap
->a_uio
, ap
->a_ioflag
));
1549 siobusycheck(void *chan
)
1553 com
= (struct com_s
*)chan
;
1556 * Clear TS_BUSY if low-level output is complete.
1557 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1558 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1559 * called again. Reading the line status port outside of siointr1()
1560 * is safe because CS_BUSY is clear so there are no output interrupts
1564 if (com
->state
& CS_BUSY
)
1565 com
->extra_state
&= ~CSE_BUSYCHECK
; /* False alarm. */
1566 else if ((inb(com
->line_status_port
) & (LSR_TSRE
| LSR_TXRDY
))
1567 == (LSR_TSRE
| LSR_TXRDY
)) {
1568 com
->tp
->t_state
&= ~TS_BUSY
;
1570 com
->extra_state
&= ~CSE_BUSYCHECK
;
1572 callout_reset(&com
->busy_ch
, hz
/ 100, siobusycheck
, com
);
1578 siodivisor(u_long rclk
, speed_t speed
)
1584 if (speed
== 0 || speed
> (ULONG_MAX
- 1) / 8)
1586 divisor
= (rclk
/ (8UL * speed
) + 1) / 2;
1587 if (divisor
== 0 || divisor
>= 65536)
1589 actual_speed
= rclk
/ (16UL * divisor
);
1591 /* 10 times error in percent: */
1592 error
= ((actual_speed
- (long)speed
) * 2000 / (long)speed
+ 1) / 2;
1594 /* 3.0% maximum error tolerance: */
1595 if (error
< -30 || error
> 30)
1602 siodtrwakeup(void *chan
)
1606 com
= (struct com_s
*)chan
;
1607 com
->state
&= ~CS_DTR_OFF
;
1608 wakeup(&com
->dtr_wait
);
1612 sioinput(struct com_s
*com
)
1622 if (!(tp
->t_state
& TS_ISOPEN
) || !(tp
->t_cflag
& CREAD
)) {
1623 com_events
-= (com
->iptr
- com
->ibuf
);
1624 com
->iptr
= com
->ibuf
;
1627 if (tp
->t_state
& TS_CAN_BYPASS_L_RINT
) {
1629 * Avoid the grotesquely inefficient lineswitch routine
1630 * (ttyinput) in "raw" mode. It usually takes about 450
1631 * instructions (that's without canonical processing or echo!).
1632 * slinput is reasonably fast (usually 40 instructions plus
1637 incc
= com
->iptr
- buf
;
1638 if (tp
->t_rawq
.c_cc
+ incc
> tp
->t_ihiwat
1639 && (com
->state
& CS_RTS_IFLOW
1640 || tp
->t_iflag
& IXOFF
)
1641 && !(tp
->t_state
& TS_TBLOCK
))
1643 com
->delta_error_counts
[CE_TTY_BUF_OVERFLOW
]
1644 += b_to_q((char *)buf
, incc
, &tp
->t_rawq
);
1648 tp
->t_rawcc
+= incc
;
1650 if (tp
->t_state
& TS_TTSTOP
1651 && (tp
->t_iflag
& IXANY
1652 || tp
->t_cc
[VSTART
] == tp
->t_cc
[VSTOP
])) {
1653 tp
->t_state
&= ~TS_TTSTOP
;
1654 tp
->t_lflag
&= ~FLUSHO
;
1658 } while (buf
< com
->iptr
);
1662 line_status
= buf
[com
->ierroff
];
1665 & (LSR_BI
| LSR_FE
| LSR_OE
| LSR_PE
)) {
1666 if (line_status
& LSR_BI
)
1667 recv_data
|= TTY_BI
;
1668 if (line_status
& LSR_FE
)
1669 recv_data
|= TTY_FE
;
1670 if (line_status
& LSR_OE
)
1671 recv_data
|= TTY_OE
;
1672 if (line_status
& LSR_PE
)
1673 recv_data
|= TTY_PE
;
1675 (*linesw
[tp
->t_line
].l_rint
)(recv_data
, tp
);
1677 } while (buf
< com
->iptr
);
1679 com_events
-= (com
->iptr
- com
->ibuf
);
1680 com
->iptr
= com
->ibuf
;
1683 * There is now room for another low-level buffer full of input,
1684 * so enable RTS if it is now disabled and there is room in the
1685 * high-level buffer.
1687 if ((com
->state
& CS_RTS_IFLOW
) && !(com
->mcr_image
& MCR_RTS
) &&
1688 !(tp
->t_state
& TS_TBLOCK
))
1689 outb(com
->modem_ctl_port
, com
->mcr_image
|= MCR_RTS
);
1695 #ifndef COM_MULTIPORT
1697 siointr1((struct com_s
*) arg
);
1699 #else /* COM_MULTIPORT */
1700 bool_t possibly_more_intrs
;
1705 * Loop until there is no activity on any port. This is necessary
1706 * to get an interrupt edge more than to avoid another interrupt.
1707 * If the IRQ signal is just an OR of the IRQ signals from several
1708 * devices, then the edge from one may be lost because another is
1713 possibly_more_intrs
= FALSE
;
1714 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
1715 com
= com_addr(unit
);
1718 * would it work here, or be counter-productive?
1722 && (inb(com
->int_id_port
) & IIR_IMASK
)
1725 possibly_more_intrs
= TRUE
;
1727 /* XXX com_unlock(); */
1729 } while (possibly_more_intrs
);
1731 #endif /* COM_MULTIPORT */
1735 siointr1(struct com_s
*com
)
1738 u_char modem_status
;
1745 int_ctl
= inb(com
->intr_ctl_port
);
1746 int_ctl_new
= int_ctl
;
1748 while (!com
->gone
) {
1749 if (com
->pps
.ppsparam
.mode
& PPS_CAPTUREBOTH
) {
1750 modem_status
= inb(com
->modem_status_port
);
1751 if ((modem_status
^ com
->last_modem_status
) & MSR_DCD
) {
1752 count
= sys_cputimer
->count();
1753 pps_event(&com
->pps
, count
,
1754 (modem_status
& MSR_DCD
) ?
1755 PPS_CAPTUREASSERT
: PPS_CAPTURECLEAR
);
1758 line_status
= inb(com
->line_status_port
);
1760 /* input event? (check first to help avoid overruns) */
1761 while (line_status
& LSR_RCV_MASK
) {
1762 /* break/unnattached error bits or real input? */
1763 if (!(line_status
& LSR_RXRDY
))
1766 recv_data
= inb(com
->data_port
);
1767 #if defined(DDB) && defined(ALT_BREAK_TO_DEBUGGER)
1769 * Solaris implements a new BREAK which is initiated
1770 * by a character sequence CR ~ ^b which is similar
1771 * to a familiar pattern used on Sun servers by the
1774 #define KEY_CRTLB 2 /* ^B */
1775 #define KEY_CR 13 /* CR '\r' */
1776 #define KEY_TILDE 126 /* ~ */
1778 if (com
->unit
== comconsole
) {
1779 static int brk_state1
= 0, brk_state2
= 0;
1780 if (recv_data
== KEY_CR
) {
1781 brk_state1
= recv_data
;
1783 } else if (brk_state1
== KEY_CR
&& (recv_data
== KEY_TILDE
|| recv_data
== KEY_CRTLB
)) {
1784 if (recv_data
== KEY_TILDE
)
1785 brk_state2
= recv_data
;
1786 else if (brk_state2
== KEY_TILDE
&& recv_data
== KEY_CRTLB
) {
1788 brk_state1
= brk_state2
= 0;
1796 if (line_status
& (LSR_BI
| LSR_FE
| LSR_PE
)) {
1798 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1799 * Otherwise, push the work to a higher level
1800 * (to handle PARMRK) if we're bypassing.
1801 * Otherwise, convert BI/FE and PE+INPCK to 0.
1803 * This makes bypassing work right in the
1804 * usual "raw" case (IGNBRK set, and IGNPAR
1807 * Note: BI together with FE/PE means just BI.
1809 if (line_status
& LSR_BI
) {
1810 #if defined(DDB) && defined(BREAK_TO_DEBUGGER)
1811 if (com
->unit
== comconsole
) {
1817 || com
->tp
->t_iflag
& IGNBRK
)
1821 || com
->tp
->t_iflag
& IGNPAR
)
1824 if (com
->tp
->t_state
& TS_CAN_BYPASS_L_RINT
1825 && (line_status
& (LSR_BI
| LSR_FE
)
1826 || com
->tp
->t_iflag
& INPCK
))
1830 if (com
->hotchar
!= 0 && recv_data
== com
->hotchar
)
1833 if (ioptr
>= com
->ibufend
)
1834 CE_RECORD(com
, CE_INTERRUPT_BUF_OVERFLOW
);
1836 if (com
->do_timestamp
)
1837 microtime(&com
->timestamp
);
1840 #if 0 /* for testing input latency vs efficiency */
1841 if (com
->iptr
- com
->ibuf
== 8)
1844 ioptr
[0] = recv_data
;
1845 ioptr
[com
->ierroff
] = line_status
;
1846 com
->iptr
= ++ioptr
;
1847 if (ioptr
== com
->ihighwater
1848 && com
->state
& CS_RTS_IFLOW
)
1849 outb(com
->modem_ctl_port
,
1850 com
->mcr_image
&= ~MCR_RTS
);
1851 if (line_status
& LSR_OE
)
1852 CE_RECORD(com
, CE_OVERRUN
);
1856 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1857 * jump from the top of the loop to here
1859 line_status
= inb(com
->line_status_port
) & 0x7F;
1862 /* modem status change? (always check before doing output) */
1863 modem_status
= inb(com
->modem_status_port
);
1864 if (modem_status
!= com
->last_modem_status
) {
1865 if (com
->do_dcd_timestamp
1866 && !(com
->last_modem_status
& MSR_DCD
)
1867 && modem_status
& MSR_DCD
)
1868 microtime(&com
->dcd_timestamp
);
1871 * Schedule high level to handle DCD changes. Note
1872 * that we don't use the delta bits anywhere. Some
1873 * UARTs mess them up, and it's easy to remember the
1874 * previous bits and calculate the delta.
1876 com
->last_modem_status
= modem_status
;
1877 if (!(com
->state
& CS_CHECKMSR
)) {
1878 com_events
+= LOTS_OF_EVENTS
;
1879 com
->state
|= CS_CHECKMSR
;
1883 /* handle CTS change immediately for crisp flow ctl */
1884 if (com
->state
& CS_CTS_OFLOW
) {
1885 if (modem_status
& MSR_CTS
)
1886 com
->state
|= CS_ODEVREADY
;
1888 com
->state
&= ~CS_ODEVREADY
;
1892 /* output queued and everything ready? */
1893 if (line_status
& LSR_TXRDY
1894 && com
->state
>= (CS_BUSY
| CS_TTGO
| CS_ODEVREADY
)) {
1895 ioptr
= com
->obufq
.l_head
;
1896 if (com
->tx_fifo_size
> 1) {
1899 ocount
= com
->obufq
.l_tail
- ioptr
;
1900 if (ocount
> com
->tx_fifo_size
)
1901 ocount
= com
->tx_fifo_size
;
1902 com
->bytes_out
+= ocount
;
1904 outb(com
->data_port
, *ioptr
++);
1905 while (--ocount
!= 0);
1907 outb(com
->data_port
, *ioptr
++);
1910 com
->obufq
.l_head
= ioptr
;
1911 if (COM_IIR_TXRDYBUG(com
->flags
)) {
1912 int_ctl_new
= int_ctl
| IER_ETXRDY
;
1914 if (ioptr
>= com
->obufq
.l_tail
) {
1917 qp
= com
->obufq
.l_next
;
1918 qp
->l_queued
= FALSE
;
1921 com
->obufq
.l_head
= qp
->l_head
;
1922 com
->obufq
.l_tail
= qp
->l_tail
;
1923 com
->obufq
.l_next
= qp
;
1925 /* output just completed */
1926 if (COM_IIR_TXRDYBUG(com
->flags
)) {
1927 int_ctl_new
= int_ctl
& ~IER_ETXRDY
;
1929 com
->state
&= ~CS_BUSY
;
1931 if (!(com
->state
& CS_ODONE
)) {
1932 com_events
+= LOTS_OF_EVENTS
;
1933 com
->state
|= CS_ODONE
;
1934 setsofttty(); /* handle at high level ASAP */
1937 if (COM_IIR_TXRDYBUG(com
->flags
) && (int_ctl
!= int_ctl_new
)) {
1938 outb(com
->intr_ctl_port
, int_ctl_new
);
1943 #ifndef COM_MULTIPORT
1944 if ((inb(com
->int_id_port
) & IIR_IMASK
) == IIR_NOPEND
)
1945 #endif /* COM_MULTIPORT */
1951 sioioctl(struct dev_ioctl_args
*ap
)
1953 cdev_t dev
= ap
->a_head
.a_dev
;
1954 caddr_t data
= ap
->a_data
;
1959 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1961 struct termios term
;
1965 com
= com_addr(MINOR_TO_UNIT(mynor
));
1966 if (com
== NULL
|| com
->gone
)
1968 if (mynor
& CONTROL_MASK
) {
1971 switch (mynor
& CONTROL_MASK
) {
1972 case CONTROL_INIT_STATE
:
1973 ct
= mynor
& CALLOUT_MASK
? &com
->it_out
: &com
->it_in
;
1975 case CONTROL_LOCK_STATE
:
1976 ct
= mynor
& CALLOUT_MASK
? &com
->lt_out
: &com
->lt_in
;
1979 return (ENODEV
); /* /dev/nodev */
1981 switch (ap
->a_cmd
) {
1983 error
= priv_check_cred(ap
->a_cred
, PRIV_ROOT
, 0);
1986 *ct
= *(struct termios
*)data
;
1989 *(struct termios
*)data
= *ct
;
1992 *(int *)data
= TTYDISC
;
1995 bzero(data
, sizeof(struct winsize
));
2002 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
2003 term
= tp
->t_termios
;
2005 error
= ttsetcompat(tp
, &ap
->a_cmd
, data
, &term
);
2008 if (ap
->a_cmd
!= oldcmd
)
2009 data
= (caddr_t
)&term
;
2011 if (ap
->a_cmd
== TIOCSETA
|| ap
->a_cmd
== TIOCSETAW
||
2012 ap
->a_cmd
== TIOCSETAF
) {
2014 struct termios
*dt
= (struct termios
*)data
;
2015 struct termios
*lt
= mynor
& CALLOUT_MASK
2016 ? &com
->lt_out
: &com
->lt_in
;
2018 dt
->c_iflag
= (tp
->t_iflag
& lt
->c_iflag
)
2019 | (dt
->c_iflag
& ~lt
->c_iflag
);
2020 dt
->c_oflag
= (tp
->t_oflag
& lt
->c_oflag
)
2021 | (dt
->c_oflag
& ~lt
->c_oflag
);
2022 dt
->c_cflag
= (tp
->t_cflag
& lt
->c_cflag
)
2023 | (dt
->c_cflag
& ~lt
->c_cflag
);
2024 dt
->c_lflag
= (tp
->t_lflag
& lt
->c_lflag
)
2025 | (dt
->c_lflag
& ~lt
->c_lflag
);
2026 for (cc
= 0; cc
< NCCS
; ++cc
)
2027 if (lt
->c_cc
[cc
] != 0)
2028 dt
->c_cc
[cc
] = tp
->t_cc
[cc
];
2029 if (lt
->c_ispeed
!= 0)
2030 dt
->c_ispeed
= tp
->t_ispeed
;
2031 if (lt
->c_ospeed
!= 0)
2032 dt
->c_ospeed
= tp
->t_ospeed
;
2034 error
= (*linesw
[tp
->t_line
].l_ioctl
)(tp
, ap
->a_cmd
, data
, ap
->a_fflag
, ap
->a_cred
);
2035 if (error
!= ENOIOCTL
)
2038 error
= ttioctl(tp
, ap
->a_cmd
, data
, ap
->a_fflag
);
2039 disc_optim(tp
, &tp
->t_termios
, com
);
2040 if (error
!= ENOIOCTL
) {
2044 switch (ap
->a_cmd
) {
2046 sio_setreg(com
, com_cfcr
, com
->cfcr_image
|= CFCR_SBREAK
);
2049 sio_setreg(com
, com_cfcr
, com
->cfcr_image
&= ~CFCR_SBREAK
);
2052 (void)commctl(com
, TIOCM_DTR
, DMBIS
);
2055 (void)commctl(com
, TIOCM_DTR
, DMBIC
);
2058 * XXX should disallow changing MCR_RTS if CS_RTS_IFLOW is set. The
2059 * changes get undone on the next call to comparam().
2062 (void)commctl(com
, *(int *)data
, DMSET
);
2065 (void)commctl(com
, *(int *)data
, DMBIS
);
2068 (void)commctl(com
, *(int *)data
, DMBIC
);
2071 *(int *)data
= commctl(com
, 0, DMGET
);
2074 /* must be root since the wait applies to following logins */
2075 error
= priv_check_cred(ap
->a_cred
, PRIV_ROOT
, 0);
2080 com
->dtr_wait
= *(int *)data
* hz
/ 100;
2083 *(int *)data
= com
->dtr_wait
* 100 / hz
;
2086 com
->do_timestamp
= TRUE
;
2087 *(struct timeval
*)data
= com
->timestamp
;
2089 case TIOCDCDTIMESTAMP
:
2090 com
->do_dcd_timestamp
= TRUE
;
2091 *(struct timeval
*)data
= com
->dcd_timestamp
;
2095 error
= pps_ioctl(ap
->a_cmd
, data
, &com
->pps
);
2096 if (error
== ENODEV
)
2105 siopoll(void *dummy
, void *frame
)
2109 if (com_events
== 0)
2112 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2117 com
= com_addr(unit
);
2121 if (tp
== NULL
|| com
->gone
) {
2123 * Discard any events related to never-opened or
2124 * going-away devices.
2127 incc
= com
->iptr
- com
->ibuf
;
2128 com
->iptr
= com
->ibuf
;
2129 if (com
->state
& CS_CHECKMSR
) {
2130 incc
+= LOTS_OF_EVENTS
;
2131 com
->state
&= ~CS_CHECKMSR
;
2137 if (com
->iptr
!= com
->ibuf
) {
2142 if (com
->state
& CS_CHECKMSR
) {
2143 u_char delta_modem_status
;
2146 delta_modem_status
= com
->last_modem_status
2147 ^ com
->prev_modem_status
;
2148 com
->prev_modem_status
= com
->last_modem_status
;
2149 com_events
-= LOTS_OF_EVENTS
;
2150 com
->state
&= ~CS_CHECKMSR
;
2152 if (delta_modem_status
& MSR_DCD
)
2153 (*linesw
[tp
->t_line
].l_modem
)
2154 (tp
, com
->prev_modem_status
& MSR_DCD
);
2156 if (com
->state
& CS_ODONE
) {
2158 com_events
-= LOTS_OF_EVENTS
;
2159 com
->state
&= ~CS_ODONE
;
2161 if (!(com
->state
& CS_BUSY
)
2162 && !(com
->extra_state
& CSE_BUSYCHECK
)) {
2163 callout_reset(&com
->busy_ch
, hz
/ 100,
2165 com
->extra_state
|= CSE_BUSYCHECK
;
2167 (*linesw
[tp
->t_line
].l_start
)(tp
);
2169 if (com_events
== 0)
2172 if (com_events
>= LOTS_OF_EVENTS
)
2177 comparam(struct tty
*tp
, struct termios
*t
)
2187 unit
= DEV_TO_UNIT(tp
->t_dev
);
2188 com
= com_addr(unit
);
2192 /* do historical conversions */
2193 if (t
->c_ispeed
== 0)
2194 t
->c_ispeed
= t
->c_ospeed
;
2196 /* check requested parameters */
2197 if (t
->c_ospeed
== 0)
2200 if (t
->c_ispeed
!= t
->c_ospeed
)
2202 divisor
= siodivisor(com
->rclk
, t
->c_ispeed
);
2207 /* parameters are OK, convert them to the com struct and the device */
2210 (void)commctl(com
, TIOCM_DTR
, DMBIC
); /* hang up line */
2212 (void)commctl(com
, TIOCM_DTR
, DMBIS
);
2214 switch (cflag
& CSIZE
) {
2228 if (cflag
& PARENB
) {
2230 if (!(cflag
& PARODD
))
2236 if (com
->hasfifo
&& divisor
!= 0) {
2238 * Use a fifo trigger level low enough so that the input
2239 * latency from the fifo is less than about 16 msec and
2240 * the total latency is less than about 30 msec. These
2241 * latencies are reasonable for humans. Serial comms
2242 * protocols shouldn't expect anything better since modem
2243 * latencies are larger.
2245 * Interrupts can be held up for long periods of time
2246 * due to inefficiencies in other parts of the kernel,
2247 * certain video cards, etc. Setting the FIFO trigger
2248 * point to MEDH instead of HIGH gives us 694uS of slop
2249 * (8 character times) instead of 173uS (2 character times)
2252 com
->fifo_image
= t
->c_ospeed
<= 4800
2253 ? FIFO_ENABLE
: FIFO_ENABLE
| FIFO_RX_MEDH
;
2256 * The Hayes ESP card needs the fifo DMA mode bit set
2257 * in compatibility mode. If not, it will interrupt
2258 * for each character received.
2261 com
->fifo_image
|= FIFO_DMA_MODE
;
2263 sio_setreg(com
, com_fifo
, com
->fifo_image
);
2267 * This returns with interrupts disabled so that we can complete
2268 * the speed change atomically. Keeping interrupts disabled is
2269 * especially important while com_data is hidden.
2271 (void) siosetwater(com
, t
->c_ispeed
);
2274 sio_setreg(com
, com_cfcr
, cfcr
| CFCR_DLAB
);
2276 * Only set the divisor registers if they would change,
2277 * since on some 16550 incompatibles (UMC8669F), setting
2278 * them while input is arriving them loses sync until
2279 * data stops arriving.
2281 dlbl
= divisor
& 0xFF;
2282 if (sio_getreg(com
, com_dlbl
) != dlbl
)
2283 sio_setreg(com
, com_dlbl
, dlbl
);
2284 dlbh
= divisor
>> 8;
2285 if (sio_getreg(com
, com_dlbh
) != dlbh
)
2286 sio_setreg(com
, com_dlbh
, dlbh
);
2289 sio_setreg(com
, com_cfcr
, com
->cfcr_image
= cfcr
);
2291 if (!(tp
->t_state
& TS_TTSTOP
))
2292 com
->state
|= CS_TTGO
;
2294 if (cflag
& CRTS_IFLOW
) {
2295 if (com
->st16650a
) {
2296 sio_setreg(com
, com_cfcr
, 0xbf);
2297 sio_setreg(com
, com_fifo
,
2298 sio_getreg(com
, com_fifo
) | 0x40);
2300 com
->state
|= CS_RTS_IFLOW
;
2302 * If CS_RTS_IFLOW just changed from off to on, the change
2303 * needs to be propagated to MCR_RTS. This isn't urgent,
2304 * so do it later by calling comstart() instead of repeating
2305 * a lot of code from comstart() here.
2307 } else if (com
->state
& CS_RTS_IFLOW
) {
2308 com
->state
&= ~CS_RTS_IFLOW
;
2310 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2311 * on here, since comstart() won't do it later.
2313 outb(com
->modem_ctl_port
, com
->mcr_image
|= MCR_RTS
);
2314 if (com
->st16650a
) {
2315 sio_setreg(com
, com_cfcr
, 0xbf);
2316 sio_setreg(com
, com_fifo
,
2317 sio_getreg(com
, com_fifo
) & ~0x40);
2323 * Set up state to handle output flow control.
2324 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2325 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2327 com
->state
|= CS_ODEVREADY
;
2328 com
->state
&= ~CS_CTS_OFLOW
;
2329 if (cflag
& CCTS_OFLOW
) {
2330 com
->state
|= CS_CTS_OFLOW
;
2331 if (!(com
->last_modem_status
& MSR_CTS
))
2332 com
->state
&= ~CS_ODEVREADY
;
2333 if (com
->st16650a
) {
2334 sio_setreg(com
, com_cfcr
, 0xbf);
2335 sio_setreg(com
, com_fifo
,
2336 sio_getreg(com
, com_fifo
) | 0x80);
2339 if (com
->st16650a
) {
2340 sio_setreg(com
, com_cfcr
, 0xbf);
2341 sio_setreg(com
, com_fifo
,
2342 sio_getreg(com
, com_fifo
) & ~0x80);
2346 sio_setreg(com
, com_cfcr
, com
->cfcr_image
);
2348 /* XXX shouldn't call functions while intrs are disabled. */
2349 disc_optim(tp
, t
, com
);
2351 * Recover from fiddling with CS_TTGO. We used to call siointr1()
2352 * unconditionally, but that defeated the careful discarding of
2353 * stale input in sioopen().
2355 if (com
->state
>= (CS_BUSY
| CS_TTGO
))
2361 if (com
->ibufold
!= NULL
) {
2362 kfree(com
->ibufold
, M_DEVBUF
);
2363 com
->ibufold
= NULL
;
2369 siosetwater(struct com_s
*com
, speed_t speed
)
2377 * Make the buffer size large enough to handle a softtty interrupt
2378 * latency of about 2 ticks without loss of throughput or data
2379 * (about 3 ticks if input flow control is not used or not honoured,
2380 * but a bit less for CS5-CS7 modes).
2382 cp4ticks
= speed
/ 10 / hz
* 4;
2383 for (ibufsize
= 128; ibufsize
< cp4ticks
;)
2385 if (ibufsize
== com
->ibufsize
) {
2391 * Allocate input buffer. The extra factor of 2 in the size is
2392 * to allow for an error byte for each input byte.
2394 ibuf
= kmalloc(2 * ibufsize
, M_DEVBUF
, M_WAITOK
| M_ZERO
);
2396 /* Initialize non-critical variables. */
2397 com
->ibufold
= com
->ibuf
;
2398 com
->ibufsize
= ibufsize
;
2401 tp
->t_ififosize
= 2 * ibufsize
;
2402 tp
->t_ispeedwat
= (speed_t
)-1;
2403 tp
->t_ospeedwat
= (speed_t
)-1;
2407 * Read current input buffer, if any. Continue with interrupts
2411 if (com
->iptr
!= com
->ibuf
)
2415 * Initialize critical variables, including input buffer watermarks.
2416 * The external device is asked to stop sending when the buffer
2417 * exactly reaches high water, or when the high level requests it.
2418 * The high level is notified immediately (rather than at a later
2419 * clock tick) when this watermark is reached.
2420 * The buffer size is chosen so the watermark should almost never
2422 * The low watermark is invisibly 0 since the buffer is always
2423 * emptied all at once.
2425 com
->iptr
= com
->ibuf
= ibuf
;
2426 com
->ibufend
= ibuf
+ ibufsize
;
2427 com
->ierroff
= ibufsize
;
2428 com
->ihighwater
= ibuf
+ 3 * ibufsize
/ 4;
2433 comstart(struct tty
*tp
)
2438 unit
= DEV_TO_UNIT(tp
->t_dev
);
2439 com
= com_addr(unit
);
2444 if (tp
->t_state
& TS_TTSTOP
)
2445 com
->state
&= ~CS_TTGO
;
2447 com
->state
|= CS_TTGO
;
2448 if (tp
->t_state
& TS_TBLOCK
) {
2449 if (com
->mcr_image
& MCR_RTS
&& com
->state
& CS_RTS_IFLOW
)
2450 outb(com
->modem_ctl_port
, com
->mcr_image
&= ~MCR_RTS
);
2452 if (!(com
->mcr_image
& MCR_RTS
) && com
->iptr
< com
->ihighwater
2453 && com
->state
& CS_RTS_IFLOW
)
2454 outb(com
->modem_ctl_port
, com
->mcr_image
|= MCR_RTS
);
2457 if (tp
->t_state
& (TS_TIMEOUT
| TS_TTSTOP
)) {
2462 if (tp
->t_outq
.c_cc
!= 0) {
2466 if (!com
->obufs
[0].l_queued
) {
2467 com
->obufs
[0].l_tail
2468 = com
->obuf1
+ q_to_b(&tp
->t_outq
, com
->obuf1
,
2470 com
->obufs
[0].l_next
= NULL
;
2471 com
->obufs
[0].l_queued
= TRUE
;
2473 if (com
->state
& CS_BUSY
) {
2474 qp
= com
->obufq
.l_next
;
2475 while ((next
= qp
->l_next
) != NULL
)
2477 qp
->l_next
= &com
->obufs
[0];
2479 com
->obufq
.l_head
= com
->obufs
[0].l_head
;
2480 com
->obufq
.l_tail
= com
->obufs
[0].l_tail
;
2481 com
->obufq
.l_next
= &com
->obufs
[0];
2482 com
->state
|= CS_BUSY
;
2486 if (tp
->t_outq
.c_cc
!= 0 && !com
->obufs
[1].l_queued
) {
2487 com
->obufs
[1].l_tail
2488 = com
->obuf2
+ q_to_b(&tp
->t_outq
, com
->obuf2
,
2490 com
->obufs
[1].l_next
= NULL
;
2491 com
->obufs
[1].l_queued
= TRUE
;
2493 if (com
->state
& CS_BUSY
) {
2494 qp
= com
->obufq
.l_next
;
2495 while ((next
= qp
->l_next
) != NULL
)
2497 qp
->l_next
= &com
->obufs
[1];
2499 com
->obufq
.l_head
= com
->obufs
[1].l_head
;
2500 com
->obufq
.l_tail
= com
->obufs
[1].l_tail
;
2501 com
->obufq
.l_next
= &com
->obufs
[1];
2502 com
->state
|= CS_BUSY
;
2506 tp
->t_state
|= TS_BUSY
;
2509 if (com
->state
>= (CS_BUSY
| CS_TTGO
))
2510 siointr1(com
); /* fake interrupt to start output */
2517 comstop(struct tty
*tp
, int rw
)
2521 com
= com_addr(DEV_TO_UNIT(tp
->t_dev
));
2522 if (com
== NULL
|| com
->gone
)
2528 /* XXX avoid h/w bug. */
2531 sio_setreg(com
, com_fifo
,
2532 FIFO_XMT_RST
| com
->fifo_image
);
2533 com
->obufs
[0].l_queued
= FALSE
;
2534 com
->obufs
[1].l_queued
= FALSE
;
2535 if (com
->state
& CS_ODONE
)
2536 com_events
-= LOTS_OF_EVENTS
;
2537 com
->state
&= ~(CS_ODONE
| CS_BUSY
);
2538 com
->tp
->t_state
&= ~TS_BUSY
;
2543 /* XXX avoid h/w bug. */
2546 sio_setreg(com
, com_fifo
,
2547 FIFO_RCV_RST
| com
->fifo_image
);
2548 com_events
-= (com
->iptr
- com
->ibuf
);
2549 com
->iptr
= com
->ibuf
;
2556 commctl(struct com_s
*com
, int bits
, int how
)
2562 bits
= TIOCM_LE
; /* XXX - always enabled while open */
2563 mcr
= com
->mcr_image
;
2568 msr
= com
->prev_modem_status
;
2576 * XXX - MSR_RI is naturally volatile, and we make MSR_TERI
2577 * more volatile by reading the modem status a lot. Perhaps
2578 * we should latch both bits until the status is read here.
2580 if (msr
& (MSR_RI
| MSR_TERI
))
2585 if (bits
& TIOCM_DTR
)
2587 if (bits
& TIOCM_RTS
)
2594 outb(com
->modem_ctl_port
,
2595 com
->mcr_image
= mcr
| (com
->mcr_image
& MCR_IENABLE
));
2598 outb(com
->modem_ctl_port
, com
->mcr_image
|= mcr
);
2601 outb(com
->modem_ctl_port
, com
->mcr_image
&= ~mcr
);
2616 * Set our timeout period to 1 second if no polled devices are open.
2617 * Otherwise set it to max(1/200, 1/hz).
2618 * Enable timeouts iff some device is open.
2620 callout_stop(&sio_timeout_handle
);
2623 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2624 com
= com_addr(unit
);
2625 if (com
!= NULL
&& com
->tp
!= NULL
2626 && com
->tp
->t_state
& TS_ISOPEN
&& !com
->gone
) {
2628 if (com
->poll
|| com
->poll_output
) {
2629 sio_timeout
= hz
> 200 ? hz
/ 200 : 1;
2635 sio_timeouts_until_log
= hz
/ sio_timeout
;
2636 callout_reset(&sio_timeout_handle
, sio_timeout
,
2639 /* Flush error messages, if any. */
2640 sio_timeouts_until_log
= 1;
2642 callout_stop(&sio_timeout_handle
);
2647 comwakeup(void *chan
)
2652 callout_reset(&sio_timeout_handle
, sio_timeout
, comwakeup
, NULL
);
2655 * Recover from lost output interrupts.
2656 * Poll any lines that don't use interrupts.
2658 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2659 com
= com_addr(unit
);
2660 if (com
!= NULL
&& !com
->gone
2661 && (com
->state
>= (CS_BUSY
| CS_TTGO
) || com
->poll
)) {
2669 * Check for and log errors, but not too often.
2671 if (--sio_timeouts_until_log
> 0)
2673 sio_timeouts_until_log
= hz
/ sio_timeout
;
2674 for (unit
= 0; unit
< sio_numunits
; ++unit
) {
2677 com
= com_addr(unit
);
2682 for (errnum
= 0; errnum
< CE_NTYPES
; ++errnum
) {
2687 delta
= com
->delta_error_counts
[errnum
];
2688 com
->delta_error_counts
[errnum
] = 0;
2692 total
= com
->error_counts
[errnum
] += delta
;
2693 log(LOG_ERR
, "sio%d: %u more %s%s (total %lu)\n",
2694 unit
, delta
, error_desc
[errnum
],
2695 delta
== 1 ? "" : "s", total
);
2701 disc_optim(struct tty
*tp
, struct termios
*t
, struct com_s
*com
)
2703 if (!(t
->c_iflag
& (ICRNL
| IGNCR
| IMAXBEL
| INLCR
| ISTRIP
| IXON
))
2704 && (!(t
->c_iflag
& BRKINT
) || (t
->c_iflag
& IGNBRK
))
2705 && (!(t
->c_iflag
& PARMRK
)
2706 || (t
->c_iflag
& (IGNPAR
| IGNBRK
)) == (IGNPAR
| IGNBRK
))
2707 && !(t
->c_lflag
& (ECHO
| ICANON
| IEXTEN
| ISIG
| PENDIN
))
2708 && linesw
[tp
->t_line
].l_rint
== ttyinput
)
2709 tp
->t_state
|= TS_CAN_BYPASS_L_RINT
;
2711 tp
->t_state
&= ~TS_CAN_BYPASS_L_RINT
;
2712 com
->hotchar
= linesw
[tp
->t_line
].l_hotchar
;
2716 * Following are all routines needed for SIO to act as console
2718 #include <sys/cons.h>
2728 static speed_t
siocngetspeed (Port_t
, u_long rclk
);
2729 static void siocnclose (struct siocnstate
*sp
, Port_t iobase
);
2730 static void siocnopen (struct siocnstate
*sp
, Port_t iobase
, int speed
);
2731 static void siocntxwait (Port_t iobase
);
2733 static cn_probe_t siocnprobe
;
2734 static cn_init_t siocninit
;
2735 static cn_init_fini_t siocninit_fini
;
2736 static cn_checkc_t siocncheckc
;
2737 static cn_getc_t siocngetc
;
2738 static cn_putc_t siocnputc
;
2740 #if defined(__i386__) || defined(__amd64__)
2741 CONS_DRIVER(sio
, siocnprobe
, siocninit
, siocninit_fini
,
2742 NULL
, siocngetc
, siocncheckc
, siocnputc
, NULL
);
2745 /* To get the GDB related variables */
2747 #include <ddb/ddb.h>
2751 siocntxwait(Port_t iobase
)
2756 * Wait for any pending transmission to finish. Required to avoid
2757 * the UART lockup bug when the speed is changed, and for normal
2761 while ((inb(iobase
+ com_lsr
) & (LSR_TSRE
| LSR_TXRDY
))
2762 != (LSR_TSRE
| LSR_TXRDY
) && --timo
!= 0)
2767 * Read the serial port specified and try to figure out what speed
2768 * it's currently running at. We're assuming the serial port has
2769 * been initialized and is basicly idle. This routine is only intended
2770 * to be run at system startup.
2772 * If the value read from the serial port doesn't make sense, return 0.
2776 siocngetspeed(Port_t iobase
, u_long rclk
)
2783 cfcr
= inb(iobase
+ com_cfcr
);
2784 outb(iobase
+ com_cfcr
, CFCR_DLAB
| cfcr
);
2786 dlbl
= inb(iobase
+ com_dlbl
);
2787 dlbh
= inb(iobase
+ com_dlbh
);
2789 outb(iobase
+ com_cfcr
, cfcr
);
2791 divisor
= dlbh
<< 8 | dlbl
;
2793 /* XXX there should be more sanity checking. */
2796 return (rclk
/ (16UL * divisor
));
2800 siocnopen(struct siocnstate
*sp
, Port_t iobase
, int speed
)
2807 * Save all the device control registers except the fifo register
2808 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2809 * We can't save the fifo register since it is read-only.
2811 sp
->ier
= inb(iobase
+ com_ier
);
2812 outb(iobase
+ com_ier
, 0); /* spltty() doesn't stop siointr() */
2813 siocntxwait(iobase
);
2814 sp
->cfcr
= inb(iobase
+ com_cfcr
);
2815 outb(iobase
+ com_cfcr
, CFCR_DLAB
| CFCR_8BITS
);
2816 sp
->dlbl
= inb(iobase
+ com_dlbl
);
2817 sp
->dlbh
= inb(iobase
+ com_dlbh
);
2819 * Only set the divisor registers if they would change, since on
2820 * some 16550 incompatibles (Startech), setting them clears the
2821 * data input register. This also reduces the effects of the
2824 divisor
= siodivisor(comdefaultrclk
, speed
);
2825 dlbl
= divisor
& 0xFF;
2826 if (sp
->dlbl
!= dlbl
)
2827 outb(iobase
+ com_dlbl
, dlbl
);
2828 dlbh
= divisor
>> 8;
2829 if (sp
->dlbh
!= dlbh
)
2830 outb(iobase
+ com_dlbh
, dlbh
);
2831 outb(iobase
+ com_cfcr
, CFCR_8BITS
);
2832 sp
->mcr
= inb(iobase
+ com_mcr
);
2834 * We don't want interrupts, but must be careful not to "disable"
2835 * them by clearing the MCR_IENABLE bit, since that might cause
2836 * an interrupt by floating the IRQ line.
2838 outb(iobase
+ com_mcr
, (sp
->mcr
& MCR_IENABLE
) | MCR_DTR
| MCR_RTS
);
2842 siocnclose(struct siocnstate
*sp
, Port_t iobase
)
2845 * Restore the device control registers.
2847 siocntxwait(iobase
);
2848 outb(iobase
+ com_cfcr
, CFCR_DLAB
| CFCR_8BITS
);
2849 if (sp
->dlbl
!= inb(iobase
+ com_dlbl
))
2850 outb(iobase
+ com_dlbl
, sp
->dlbl
);
2851 if (sp
->dlbh
!= inb(iobase
+ com_dlbh
))
2852 outb(iobase
+ com_dlbh
, sp
->dlbh
);
2853 outb(iobase
+ com_cfcr
, sp
->cfcr
);
2855 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2857 outb(iobase
+ com_mcr
, sp
->mcr
| MCR_DTR
| MCR_RTS
);
2858 outb(iobase
+ com_ier
, sp
->ier
);
2862 siocnprobe(struct consdev
*cp
)
2868 struct siocnstate sp
;
2871 * Find our first enabled console, if any. If it is a high-level
2872 * console device, then initialize it and return successfully.
2873 * If it is a low-level console device, then initialize it and
2874 * return unsuccessfully. It must be initialized in both cases
2875 * for early use by console drivers and debuggers. Initializing
2876 * the hardware is not necessary in all cases, since the i/o
2877 * routines initialize it on the fly, but it is necessary if
2878 * input might arrive while the hardware is switched back to an
2879 * uninitialized state. We can't handle multiple console devices
2880 * yet because our low-level routines don't take a device arg.
2881 * We trust the user to set the console flags properly so that we
2882 * don't need to probe.
2884 cp
->cn_pri
= CN_DEAD
;
2886 for (unit
= 0; unit
< 16; unit
++) { /* XXX need to know how many */
2889 if (resource_int_value("sio", unit
, "disabled", &disabled
) == 0) {
2893 if (resource_int_value("sio", unit
, "flags", &flags
))
2895 if (COM_CONSOLE(flags
) || COM_DEBUGGER(flags
)) {
2899 if (resource_int_value("sio", unit
, "port", &port
))
2903 if (boothowto
& RB_SERIAL
) {
2905 siocngetspeed(iobase
, comdefaultrclk
);
2907 comdefaultrate
= boot_speed
;
2911 * Initialize the divisor latch. We can't rely on
2912 * siocnopen() to do this the first time, since it
2913 * avoids writing to the latch if the latch appears
2914 * to have the correct value. Also, if we didn't
2915 * just read the speed from the hardware, then we
2916 * need to set the speed in hardware so that
2917 * switching it later is null.
2919 cfcr
= inb(iobase
+ com_cfcr
);
2920 outb(iobase
+ com_cfcr
, CFCR_DLAB
| cfcr
);
2921 divisor
= siodivisor(comdefaultrclk
, comdefaultrate
);
2922 outb(iobase
+ com_dlbl
, divisor
& 0xff);
2923 outb(iobase
+ com_dlbh
, divisor
>> 8);
2924 outb(iobase
+ com_cfcr
, cfcr
);
2926 siocnopen(&sp
, iobase
, comdefaultrate
);
2929 if (COM_CONSOLE(flags
) && !COM_LLCONSOLE(flags
)) {
2930 cp
->cn_probegood
= 1;
2931 cp
->cn_private
= (void *)(intptr_t)unit
;
2932 cp
->cn_pri
= COM_FORCECONSOLE(flags
)
2933 || boothowto
& RB_SERIAL
2934 ? CN_REMOTE
: CN_NORMAL
;
2935 siocniobase
= iobase
;
2938 if (COM_DEBUGGER(flags
) && gdb_tab
== NULL
) {
2939 kprintf("sio%d: gdb debugging port\n", unit
);
2940 siogdbiobase
= iobase
;
2943 cp
->cn_gdbprivate
= (void *)(intptr_t)unit
;
2949 #if defined(__i386__) || defined(__amd64__)
2952 * XXX Ugly Compatability.
2953 * If no gdb port has been specified, set it to be the console
2954 * as some configuration files don't specify the gdb port.
2956 if (gdb_tab
== NULL
&& (boothowto
& RB_GDB
)) {
2957 kprintf("Warning: no GDB port specified. Defaulting to sio%d.\n",
2959 kprintf("Set flag 0x80 on desired GDB port in your\n");
2960 kprintf("configuration file (currently sio only).\n");
2961 siogdbiobase
= siocniobase
;
2962 siogdbunit
= siocnunit
;
2963 cp
->cn_gdbprivate
= (void *)(intptr_t)siocnunit
;
2971 siocninit(struct consdev
*cp
)
2973 comconsole
= (int)(intptr_t)cp
->cn_private
;
2977 siocninit_fini(struct consdev
*cp
)
2981 if (cp
->cn_probegood
) {
2982 unit
= (int)(intptr_t)cp
->cn_private
;
2983 cp
->cn_dev
= make_dev(&sio_ops
, unit
,
2984 UID_ROOT
, GID_WHEEL
, 0600,
2990 siocncheckc(void *private)
2993 int unit
= (int)(intptr_t)private;
2995 struct siocnstate sp
;
2997 if (unit
== siogdbunit
)
2998 iobase
= siogdbiobase
;
3000 iobase
= siocniobase
;
3002 siocnopen(&sp
, iobase
, comdefaultrate
);
3003 if (inb(iobase
+ com_lsr
) & LSR_RXRDY
)
3004 c
= inb(iobase
+ com_data
);
3007 siocnclose(&sp
, iobase
);
3014 siocngetc(void *private)
3017 int unit
= (int)(intptr_t)private;
3019 struct siocnstate sp
;
3021 if (unit
== siogdbunit
)
3022 iobase
= siogdbiobase
;
3024 iobase
= siocniobase
;
3026 siocnopen(&sp
, iobase
, comdefaultrate
);
3027 while (!(inb(iobase
+ com_lsr
) & LSR_RXRDY
))
3029 c
= inb(iobase
+ com_data
);
3030 siocnclose(&sp
, iobase
);
3036 siocnputc(void *private, int c
)
3038 int unit
= (int)(intptr_t)private;
3039 struct siocnstate sp
;
3042 if (unit
== siogdbunit
)
3043 iobase
= siogdbiobase
;
3045 iobase
= siocniobase
;
3047 siocnopen(&sp
, iobase
, comdefaultrate
);
3048 siocntxwait(iobase
);
3049 outb(iobase
+ com_data
, c
);
3050 siocnclose(&sp
, iobase
);
3054 DRIVER_MODULE(sio
, isa
, sio_isa_driver
, sio_devclass
, 0, 0);
3055 DRIVER_MODULE(sio
, acpi
, sio_isa_driver
, sio_devclass
, 0, 0);
3057 DRIVER_MODULE(sio
, pci
, sio_pci_driver
, sio_devclass
, 0, 0);
3060 DRIVER_MODULE(sio
, puc
, sio_puc_driver
, sio_devclass
, 0, 0);