sys/bus/usb/uhci_pci.c

   1 /*
   2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   3  * All rights reserved.
   4  *
   5  * This code is derived from software contributed to The NetBSD Foundation
   6  * by Lennart Augustsson (augustss@carlstedt.se) at
   7  * Carlstedt Research & Technology.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *        This product includes software developed by the NetBSD
  20  *        Foundation, Inc. and its contributors.
  21  * 4. Neither the name of The NetBSD Foundation nor the names of its
  22  *    contributors may be used to endorse or promote products derived
  23  *    from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * $FreeBSD: src/sys/dev/usb/uhci_pci.c,v 1.57 2005/03/01 07:50:11 imp Exp $
  38  * $DragonFly: src/sys/bus/usb/uhci_pci.c,v 1.12 2008/05/25 17:48:33 mneumann Exp $
  39  */
  40
  41 /* Universal Host Controller Interface
  42  *
  43  * UHCI spec: http://www.intel.com/
  44  */
  45
  46 /* The low level controller code for UHCI has been split into
  47  * PCI probes and UHCI specific code. This was done to facilitate the
  48  * sharing of code between *BSD's
  49  */
  50
  51 #include "opt_bus.h"
  52
  53 #include <sys/param.h>
  54 #include <sys/systm.h>
  55 #include <sys/kernel.h>
  56 #include <sys/module.h>
  57 #include <sys/bus.h>
  58 #include <sys/queue.h>
  59 #include <sys/rman.h>
  60
  61 #include <bus/pci/pcivar.h>
  62 #include <bus/pci/pcireg.h>
  63
  64 #include <bus/usb/usb.h>
  65 #include <bus/usb/usbdi.h>
  66 #include <bus/usb/usbdivar.h>
  67 #include <bus/usb/usb_mem.h>
  68
  69 #include <bus/usb/uhcireg.h>
  70 #include <bus/usb/uhcivar.h>
  71
  72 #define PCI_UHCI_VENDORID_INTEL         0x8086
  73 #define PCI_UHCI_VENDORID_VIA           0x1106
  74
  75 #define PCI_UHCI_DEVICEID_PIIX3         0x70208086
  76 static const char *uhci_device_piix3 = "Intel 82371SB (PIIX3) USB controller";
  77
  78 #define PCI_UHCI_DEVICEID_PIIX4         0x71128086
  79 #define PCI_UHCI_DEVICEID_PIIX4E        0x71128086      /* no separate stepping */
  80 static const char *uhci_device_piix4 = "Intel 82371AB/EB (PIIX4) USB controller";
  81
  82 #define PCI_UHCI_DEVICEID_ICH           0x24128086
  83 static const char *uhci_device_ich = "Intel 82801AA (ICH) USB controller";
  84
  85 #define PCI_UHCI_DEVICEID_ICH0          0x24228086
  86 static const char *uhci_device_ich0 = "Intel 82801AB (ICH0) USB controller";
  87
  88 #define PCI_UHCI_DEVICEID_ICH2_A        0x24428086
  89 static const char *uhci_device_ich2_a = "Intel 82801BA/BAM (ICH2) USB controller USB-A";
  90
  91 #define PCI_UHCI_DEVICEID_ICH2_B        0x24448086
  92 static const char *uhci_device_ich2_b = "Intel 82801BA/BAM (ICH2) USB controller USB-B";
  93
  94 #define PCI_UHCI_DEVICEID_ICH3_A        0x24828086
  95 static const char *uhci_device_ich3_a = "Intel 82801CA/CAM (ICH3) USB controller USB-A";
  96
  97 #define PCI_UHCI_DEVICEID_ICH3_B        0x24848086
  98 static const char *uhci_device_ich3_b = "Intel 82801CA/CAM (ICH3) USB controller USB-B";
  99
 100 #define PCI_UHCI_DEVICEID_ICH3_C        0x24878086
 101 static const char *uhci_device_ich3_c = "Intel 82801CA/CAM (ICH3) USB controller USB-C";
 102
 103 #define PCI_UHCI_DEVICEID_ICH4_A        0x24c28086
 104 static const char *uhci_device_ich4_a = "Intel 82801DB (ICH4) USB controller USB-A";
 105
 106 #define PCI_UHCI_DEVICEID_ICH4_B        0x24c48086
 107 static const char *uhci_device_ich4_b = "Intel 82801DB (ICH4) USB controller USB-B";
 108
 109 #define PCI_UHCI_DEVICEID_ICH4_C        0x24c78086
 110 static const char *uhci_device_ich4_c = "Intel 82801DB (ICH4) USB controller USB-C";
 111
 112 #define PCI_UHCI_DEVICEID_ICH5_A        0x24d28086
 113 static const char *uhci_device_ich5_a = "Intel 82801EB (ICH5) USB controller USB-A";
 114
 115 #define PCI_UHCI_DEVICEID_ICH5_B        0x24d48086
 116 static const char *uhci_device_ich5_b = "Intel 82801EB (ICH5) USB controller USB-B";
 117
 118 #define PCI_UHCI_DEVICEID_ICH5_C        0x24d78086
 119 static const char *uhci_device_ich5_c = "Intel 82801EB (ICH5) USB controller USB-C";
 120
 121 #define PCI_UHCI_DEVICEID_ICH5_D        0x24de8086
 122 static const char *uhci_device_ich5_d = "Intel 82801EB (ICH5) USB controller USB-D";
 123
 124 #define PCI_UHCI_DEVICEID_ICH6_A        0x26588086
 125 static const char *uhci_device_ich6_a = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-A";
 126
 127 #define PCI_UHCI_DEVICEID_ICH6_B        0x26598086
 128 static const char *uhci_device_ich6_b = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-B";
 129
 130 #define PCI_UHCI_DEVICEID_ICH6_C        0x265a8086
 131 static const char *uhci_device_ich6_c = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-C";
 132
 133 #define PCI_UHCI_DEVICEID_ICH6_D        0x265b8086
 134 static const char *uhci_device_ich6_d = "Intel 82801FB/FR/FW/FRW (ICH6) USB controller USB-D";
 135
 136 #define PCI_UHCI_DEVICEID_440MX         0x719a8086
 137 static const char *uhci_device_440mx = "Intel 82443MX USB controller";
 138
 139 #define PCI_UHCI_DEVICEID_460GX         0x76028086
 140 static const char *uhci_device_460gx = "Intel 82372FB/82468GX USB controller";
 141
 142 #define PCI_UHCI_DEVICEID_VT83C572      0x30381106
 143 static const char *uhci_device_vt83c572 = "VIA 83C572 USB controller";
 144
 145 static const char *uhci_device_generic = "UHCI (generic) USB controller";
 146
 147 #define PCI_UHCI_BASE_REG               0x20
 148
 149
 150 static int uhci_pci_attach(device_t self);
 151 static int uhci_pci_detach(device_t self);
 152 static int uhci_pci_suspend(device_t self);
 153 static int uhci_pci_resume(device_t self);
 154
 155
 156 static int
 157 uhci_pci_suspend(device_t self)
 158 {
 159         uhci_softc_t *sc = device_get_softc(self);
 160         int err;
 161
 162         err = bus_generic_suspend(self);
 163         if (err)
 164                 return err;
 165         uhci_power(PWR_SUSPEND, sc);
 166
 167         return 0;
 168 }
 169
 170 static int
 171 uhci_pci_resume(device_t self)
 172 {
 173         uhci_softc_t *sc = device_get_softc(self);
 174
 175         pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
 176
 177         uhci_power(PWR_RESUME, sc);
 178         bus_generic_resume(self);
 179
 180         return 0;
 181 }
 182
 183 static const char *
 184 uhci_pci_match(device_t self)
 185 {
 186         u_int32_t device_id = pci_get_devid(self);
 187
 188         if (device_id == PCI_UHCI_DEVICEID_PIIX3) {
 189                 return (uhci_device_piix3);
 190         } else if (device_id == PCI_UHCI_DEVICEID_PIIX4) {
 191                 return (uhci_device_piix4);
 192         } else if (device_id == PCI_UHCI_DEVICEID_ICH) {
 193                 return (uhci_device_ich);
 194         } else if (device_id == PCI_UHCI_DEVICEID_ICH0) {
 195                 return (uhci_device_ich0);
 196         } else if (device_id == PCI_UHCI_DEVICEID_ICH2_A) {
 197                 return (uhci_device_ich2_a);
 198         } else if (device_id == PCI_UHCI_DEVICEID_ICH2_B) {
 199                 return (uhci_device_ich2_b);
 200         } else if (device_id == PCI_UHCI_DEVICEID_ICH3_A) {
 201                 return (uhci_device_ich3_a);
 202         } else if (device_id == PCI_UHCI_DEVICEID_ICH3_B) {
 203                 return (uhci_device_ich3_b);
 204         } else if (device_id == PCI_UHCI_DEVICEID_ICH3_C) {
 205                 return (uhci_device_ich3_c);
 206         } else if (device_id == PCI_UHCI_DEVICEID_ICH4_A) {
 207                 return (uhci_device_ich4_a);
 208         } else if (device_id == PCI_UHCI_DEVICEID_ICH4_B) {
 209                 return (uhci_device_ich4_b);
 210         } else if (device_id == PCI_UHCI_DEVICEID_ICH4_C) {
 211                 return (uhci_device_ich4_c);
 212         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_A) {
 213                 return (uhci_device_ich5_a);
 214         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_B) {
 215                 return (uhci_device_ich5_b);
 216         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_C) {
 217                 return (uhci_device_ich5_c);
 218         } else if (device_id == PCI_UHCI_DEVICEID_ICH5_D) {
 219                 return (uhci_device_ich5_d);
 220         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_A) {
 221                 return (uhci_device_ich6_a);
 222         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_B) {
 223                 return (uhci_device_ich6_b);
 224         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_C) {
 225                 return (uhci_device_ich6_c);
 226         } else if (device_id == PCI_UHCI_DEVICEID_ICH6_D) {
 227                 return (uhci_device_ich6_d);
 228         } else if (device_id == PCI_UHCI_DEVICEID_440MX) {
 229                 return (uhci_device_440mx);
 230         } else if (device_id == PCI_UHCI_DEVICEID_460GX) {
 231                 return (uhci_device_460gx);
 232         } else if (device_id == PCI_UHCI_DEVICEID_VT83C572) {
 233                 return (uhci_device_vt83c572);
 234         } else {
 235                 if (pci_get_class(self) == PCIC_SERIALBUS
 236                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
 237                     && pci_get_progif(self) == PCI_INTERFACE_UHCI) {
 238                         return (uhci_device_generic);
 239                 }
 240         }
 241
 242         return NULL;            /* dunno... */
 243 }
 244
 245 static int
 246 uhci_pci_probe(device_t self)
 247 {
 248         const char *desc = uhci_pci_match(self);
 249
 250         if (desc) {
 251                 device_set_desc(self, desc);
 252                 return 0;
 253         } else {
 254                 return ENXIO;
 255         }
 256 }
 257
 258 static int
 259 uhci_pci_attach(device_t self)
 260 {
 261         uhci_softc_t *sc = device_get_softc(self);
 262         int rid;
 263         int err;
 264
 265         pci_enable_busmaster(self);
 266
 267         rid = PCI_UHCI_BASE_REG;
 268         sc->io_res = bus_alloc_resource_any(self, SYS_RES_IOPORT, &rid,
 269             RF_ACTIVE);
 270         if (!sc->io_res) {
 271                 device_printf(self, "Could not map ports\n");
 272                 return ENXIO;
 273         }
 274         sc->iot = rman_get_bustag(sc->io_res);
 275         sc->ioh = rman_get_bushandle(sc->io_res);
 276
 277         /* disable interrupts */
 278         bus_space_write_2(sc->iot, sc->ioh, UHCI_INTR, 0);
 279
 280         rid = 0;
 281         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
 282             RF_SHAREABLE | RF_ACTIVE);
 283         if (sc->irq_res == NULL) {
 284                 device_printf(self, "Could not allocate irq\n");
 285                 uhci_pci_detach(self);
 286                 return ENXIO;
 287         }
 288         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
 289         if (!sc->sc_bus.bdev) {
 290                 device_printf(self, "Could not add USB device\n");
 291                 uhci_pci_detach(self);
 292                 return ENOMEM;
 293         }
 294         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
 295
 296         /* uhci_pci_match must never return NULL if uhci_pci_probe succeeded */
 297         device_set_desc(sc->sc_bus.bdev, uhci_pci_match(self));
 298         switch (pci_get_vendor(self)) {
 299         case PCI_UHCI_VENDORID_INTEL:
 300                 ksprintf(sc->sc_vendor, "Intel");
 301                 break;
 302         case PCI_UHCI_VENDORID_VIA:
 303                 ksprintf(sc->sc_vendor, "VIA");
 304                 break;
 305         default:
 306                 if (bootverbose)
 307                         device_printf(self, "(New UHCI DeviceId=0x%08x)\n",
 308                             pci_get_devid(self));
 309                 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
 310         }
 311
 312         switch (pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
 313         case PCI_USBREV_PRE_1_0:
 314                 sc->sc_bus.usbrev = USBREV_PRE_1_0;
 315                 break;
 316         case PCI_USBREV_1_0:
 317                 sc->sc_bus.usbrev = USBREV_1_0;
 318                 break;
 319         default:
 320                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 321                 break;
 322         }
 323
 324         err = bus_setup_intr(self, sc->irq_res, 0,
 325             (driver_intr_t *) uhci_intr, sc, &sc->ih, NULL);
 326         if (err) {
 327                 device_printf(self, "Could not setup irq, %d\n", err);
 328                 sc->ih = NULL;
 329                 uhci_pci_detach(self);
 330                 return ENXIO;
 331         }
 332         /*
 333          * Set the PIRQD enable bit and switch off all the others. We don't
 334          * want legacy support to interfere with us XXX Does this also mean
 335          * that the BIOS won't touch the keyboard anymore if it is connected
 336          * to the ports of the root hub?
 337          */
 338 #ifdef USB_DEBUG
 339         if (pci_read_config(self, PCI_LEGSUP, 2) != PCI_LEGSUP_USBPIRQDEN)
 340                 device_printf(self, "LegSup = 0x%04x\n",
 341                     pci_read_config(self, PCI_LEGSUP, 2));
 342 #endif
 343         pci_write_config(self, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN, 2);
 344
 345         err = uhci_init(sc);
 346         if (!err) {
 347                 sc->sc_flags |= UHCI_SCFLG_DONEINIT;
 348                 err = device_probe_and_attach(sc->sc_bus.bdev);
 349         }
 350
 351         if (err) {
 352                 device_printf(self, "USB init failed\n");
 353                 uhci_pci_detach(self);
 354                 return EIO;
 355         }
 356         return 0;               /* success */
 357 }
 358
 359 int
 360 uhci_pci_detach(device_t self)
 361 {
 362         uhci_softc_t *sc = device_get_softc(self);
 363
 364         if (sc->sc_flags & UHCI_SCFLG_DONEINIT) {
 365                 uhci_detach(sc, 0);
 366                 sc->sc_flags &= ~UHCI_SCFLG_DONEINIT;
 367         }
 368
 369
 370         if (sc->irq_res && sc->ih) {
 371                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
 372
 373                 if (err)
 374                         /* XXX or should we panic? */
 375                         device_printf(self, "Could not tear down irq, %d\n",
 376                             err);
 377                 sc->ih = NULL;
 378         }
 379         if (sc->sc_bus.bdev) {
 380                 device_delete_child(self, sc->sc_bus.bdev);
 381                 sc->sc_bus.bdev = NULL;
 382         }
 383         if (sc->irq_res) {
 384                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
 385                 sc->irq_res = NULL;
 386         }
 387         if (sc->io_res) {
 388                 bus_release_resource(self, SYS_RES_IOPORT, PCI_UHCI_BASE_REG,
 389                     sc->io_res);
 390                 sc->io_res = NULL;
 391                 sc->iot = 0;
 392                 sc->ioh = 0;
 393         }
 394         return 0;
 395 }
 396
 397
 398 static device_method_t uhci_methods[] = {
 399         /* Device interface */
 400         DEVMETHOD(device_probe, uhci_pci_probe),
 401         DEVMETHOD(device_attach, uhci_pci_attach),
 402         DEVMETHOD(device_detach, uhci_pci_detach),
 403         DEVMETHOD(device_suspend, uhci_pci_suspend),
 404         DEVMETHOD(device_resume, uhci_pci_resume),
 405         DEVMETHOD(device_shutdown, bus_generic_shutdown),
 406
 407         /* Bus interface */
 408         DEVMETHOD(bus_print_child, bus_generic_print_child),
 409
 410         {0, 0}
 411 };
 412
 413 static driver_t uhci_driver = {
 414         "uhci",
 415         uhci_methods,
 416         sizeof(uhci_softc_t),
 417 };
 418
 419 static devclass_t uhci_devclass;
 420
 421 DRIVER_MODULE(uhci, pci, uhci_driver, uhci_devclass, 0, 0);
 422 DRIVER_MODULE(uhci, cardbus, uhci_driver, uhci_devclass, 0, 0);