sys/bus/usb/ehci_pci.c

   1 /*
   2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
   3  * All rights reserved.
   4  *
   5  * This code is derived from software contributed to The NetBSD Foundation
   6  * by Lennart Augustsson (augustss@carlstedt.se) at
   7  * Carlstedt Research & Technology.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *        This product includes software developed by the NetBSD
  20  *        Foundation, Inc. and its contributors.
  21  * 4. Neither the name of The NetBSD Foundation nor the names of its
  22  *    contributors may be used to endorse or promote products derived
  23  *    from this software without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  35  * POSSIBILITY OF SUCH DAMAGE.
  36  *
  37  * $FreeBSD: src/sys/dev/usb/ehci_pci.c,v 1.18.2.1 2006/01/26 01:43:13 iedowse Exp $
  38  * $DragonFly: src/sys/bus/usb/ehci_pci.c,v 1.19 2008/05/21 19:56:46 mneumann Exp $
  39  */
  40
  41 /*
  42  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
  43  *
  44  * The EHCI 1.0 spec can be found at
  45  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
  46  * and the USB 2.0 spec at
  47  * http://www.usb.org/developers/docs/usb_20.zip
  48  */
  49
  50 /* The low level controller code for EHCI has been split into
  51  * PCI probes and EHCI specific code. This was done to facilitate the
  52  * sharing of code between *BSD's
  53  */
  54
  55 #include "opt_bus.h"
  56
  57 #include <sys/param.h>
  58 #include <sys/systm.h>
  59 #include <sys/kernel.h>
  60 #include <sys/module.h>
  61 #include <sys/bus.h>
  62 #include <sys/queue.h>
  63 #include <sys/lock.h>
  64 #include <sys/rman.h>
  65
  66 #include <bus/pci/pcivar.h>
  67 #include <bus/pci/pcireg.h>
  68
  69 #include <bus/usb/usb.h>
  70 #include <bus/usb/usbdi.h>
  71 #include <bus/usb/usbdivar.h>
  72 #include <bus/usb/usb_mem.h>
  73
  74 #include <bus/usb/ehcireg.h>
  75 #include <bus/usb/ehcivar.h>
  76
  77 #define PCI_EHCI_VENDORID_ACERLABS      0x10b9
  78 #define PCI_EHCI_VENDORID_AMD           0x1022
  79 #define PCI_EHCI_VENDORID_APPLE         0x106b
  80 #define PCI_EHCI_VENDORID_ATI           0x1002
  81 #define PCI_EHCI_VENDORID_CMDTECH       0x1095
  82 #define PCI_EHCI_VENDORID_INTEL         0x8086
  83 #define PCI_EHCI_VENDORID_NEC           0x1033
  84 #define PCI_EHCI_VENDORID_OPTI          0x1045
  85 #define PCI_EHCI_VENDORID_PHILIPS       0x1131
  86 #define PCI_EHCI_VENDORID_SIS           0x1039
  87 #define PCI_EHCI_VENDORID_NVIDIA        0x12D2
  88 #define PCI_EHCI_VENDORID_NVIDIA2       0x10DE
  89 #define PCI_EHCI_VENDORID_VIA           0x1106
  90
  91 /* AcerLabs/ALi */
  92 #define PCI_EHCI_DEVICEID_M5239         0x523910b9
  93 static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
  94
  95 /* AMD */
  96 #define PCI_EHCI_DEVICEID_8111          0x74631022
  97 #define PCI_EHCI_DEVICEID_CS5536        0x20951022
  98 static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
  99 static const char *ehci_device_CS5536 = "AMD CS5536 USB 2.0 controller";
 100
 101 /* ATI */
 102 #define PCI_EHCI_DEVICEID_SB200         0x43451002
 103 static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
 104 #define PCI_EHCI_DEVICEID_SB400         0x43731002
 105 static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
 106
 107 /* Intel */
 108 #define PCI_EHCI_DEVICEID_6300          0x25ad8086
 109 static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
 110 #define PCI_EHCI_DEVICEID_ICH4          0x24cd8086
 111 static const char *ehci_device_ich4 = "Intel 82801DB/L/M USB 2.0 controller";
 112 #define PCI_EHCI_DEVICEID_ICH5          0x24dd8086
 113 static const char *ehci_device_ich5 = "Intel 82801EB/R USB 2.0 controller";
 114 #define PCI_EHCI_DEVICEID_ICH6          0x265c8086
 115 static const char *ehci_device_ich6 = "Intel 82801FB USB 2.0 controller";
 116 #define PCI_EHCI_DEVICEID_ICH7          0x27cc8086
 117 static const char *ehci_device_ich7 = "Intel 82801GB/R USB 2.0 controller";
 118
 119 /* NEC */
 120 #define PCI_EHCI_DEVICEID_NEC           0x00e01033
 121 static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
 122
 123 /* NVIDIA */
 124 #define PCI_EHCI_DEVICEID_NF2           0x006810de
 125 static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
 126 #define PCI_EHCI_DEVICEID_NF2_400       0x008810de
 127 static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
 128 #define PCI_EHCI_DEVICEID_NF3           0x00d810de
 129 static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
 130 #define PCI_EHCI_DEVICEID_NF3_250       0x00e810de
 131 static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
 132 #define PCI_EHCI_DEVICEID_NF4           0x005b10de
 133 static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
 134
 135 /* Philips */
 136 #define PCI_EHCI_DEVICEID_ISP156X       0x15621131
 137 static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
 138
 139 /* VIA */
 140 #define PCI_EHCI_DEVICEID_VIA           0x31041106
 141 static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
 142
 143 /* Generic */
 144 static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
 145
 146 #define PCI_EHCI_BASE_REG       0x10
 147
 148 #ifdef USB_DEBUG
 149 #define EHCI_DEBUG USB_DEBUG
 150 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
 151 extern int ehcidebug;
 152 #else
 153 #define DPRINTF(x)
 154 #endif
 155
 156 static int ehci_pci_attach(device_t self);
 157 static int ehci_pci_detach(device_t self);
 158 static int ehci_pci_shutdown(device_t self);
 159 static int ehci_pci_suspend(device_t self);
 160 static int ehci_pci_resume(device_t self);
 161 static void ehci_pci_givecontroller(device_t self);
 162 static void ehci_pci_takecontroller(device_t self);
 163
 164 static int
 165 ehci_pci_suspend(device_t self)
 166 {
 167         ehci_softc_t *sc = device_get_softc(self);
 168         int err;
 169
 170         err = bus_generic_suspend(self);
 171         if (err)
 172                 return (err);
 173         ehci_power(PWR_SUSPEND, sc);
 174
 175         return 0;
 176 }
 177
 178 static int
 179 ehci_pci_resume(device_t self)
 180 {
 181         ehci_softc_t *sc = device_get_softc(self);
 182
 183         ehci_pci_takecontroller(self);
 184         ehci_power(PWR_RESUME, sc);
 185         bus_generic_resume(self);
 186
 187         return 0;
 188 }
 189
 190 static int
 191 ehci_pci_shutdown(device_t self)
 192 {
 193         ehci_softc_t *sc = device_get_softc(self);
 194         int err;
 195
 196         err = bus_generic_shutdown(self);
 197         if (err)
 198                 return (err);
 199         ehci_shutdown(sc);
 200         ehci_pci_givecontroller(self);
 201
 202         return 0;
 203 }
 204
 205 static const char *
 206 ehci_pci_match(device_t self)
 207 {
 208         u_int32_t device_id = pci_get_devid(self);
 209
 210         switch (device_id) {
 211         case PCI_EHCI_DEVICEID_M5239:
 212                 return (ehci_device_m5239);
 213         case PCI_EHCI_DEVICEID_8111:
 214                 return (ehci_device_8111);
 215         case PCI_EHCI_DEVICEID_CS5536:
 216                 return (ehci_device_CS5536);
 217         case PCI_EHCI_DEVICEID_SB200:
 218                 return (ehci_device_sb200);
 219         case PCI_EHCI_DEVICEID_SB400:
 220                 return (ehci_device_sb400);
 221         case PCI_EHCI_DEVICEID_6300:
 222                 return (ehci_device_6300);
 223         case PCI_EHCI_DEVICEID_ICH4:
 224                 return (ehci_device_ich4);
 225         case PCI_EHCI_DEVICEID_ICH5:
 226                 return (ehci_device_ich5);
 227         case PCI_EHCI_DEVICEID_ICH6:
 228                 return (ehci_device_ich6);
 229         case PCI_EHCI_DEVICEID_ICH7:
 230                 return (ehci_device_ich7);
 231         case PCI_EHCI_DEVICEID_NEC:
 232                 return (ehci_device_nec);
 233         case PCI_EHCI_DEVICEID_NF2:
 234                 return (ehci_device_nf2);
 235         case PCI_EHCI_DEVICEID_NF2_400:
 236                 return (ehci_device_nf2_400);
 237         case PCI_EHCI_DEVICEID_NF3:
 238                 return (ehci_device_nf3);
 239         case PCI_EHCI_DEVICEID_NF3_250:
 240                 return (ehci_device_nf3_250);
 241         case PCI_EHCI_DEVICEID_NF4:
 242                 return (ehci_device_nf4);
 243         case PCI_EHCI_DEVICEID_ISP156X:
 244                 return (ehci_device_isp156x);
 245         case PCI_EHCI_DEVICEID_VIA:
 246                 return (ehci_device_via);
 247         default:
 248                 if (pci_get_class(self) == PCIC_SERIALBUS
 249                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
 250                     && pci_get_progif(self) == PCI_INTERFACE_EHCI) {
 251                         return (ehci_device_generic);
 252                 }
 253         }
 254
 255         return NULL;            /* dunno */
 256 }
 257
 258 static int
 259 ehci_pci_probe(device_t self)
 260 {
 261         const char *desc = ehci_pci_match(self);
 262
 263         if (desc) {
 264                 device_set_desc(self, desc);
 265                 device_set_async_attach(self, TRUE);
 266                 return 0;
 267         } else {
 268                 return ENXIO;
 269         }
 270 }
 271
 272 static int
 273 ehci_pci_attach(device_t self)
 274 {
 275         ehci_softc_t *sc = device_get_softc(self);
 276         device_t parent;
 277         device_t *neighbors;
 278         device_t *nbus;
 279         struct usbd_bus *bsc;
 280         int err;
 281         int rid;
 282         int ncomp;
 283         int count, buscount;
 284         int slot, function;
 285         int res;
 286         int i;
 287
 288         switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
 289         case PCI_USBREV_PRE_1_0:
 290         case PCI_USBREV_1_0:
 291         case PCI_USBREV_1_1:
 292                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 293                 kprintf("pre-2.0 USB rev\n");
 294                 return ENXIO;
 295         case PCI_USBREV_2_0:
 296                 sc->sc_bus.usbrev = USBREV_2_0;
 297                 break;
 298         default:
 299                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
 300                 break;
 301         }
 302
 303         pci_enable_busmaster(self);
 304
 305         rid = PCI_CBMEM;
 306         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
 307             RF_ACTIVE);
 308         if (!sc->io_res) {
 309                 device_printf(self, "Could not map memory\n");
 310                 return ENXIO;
 311         }
 312         sc->iot = rman_get_bustag(sc->io_res);
 313         sc->ioh = rman_get_bushandle(sc->io_res);
 314
 315         rid = 0;
 316         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
 317             RF_SHAREABLE | RF_ACTIVE);
 318         if (sc->irq_res == NULL) {
 319                 device_printf(self, "Could not allocate irq\n");
 320                 ehci_pci_detach(self);
 321                 return ENXIO;
 322         }
 323         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
 324         if (!sc->sc_bus.bdev) {
 325                 device_printf(self, "Could not add USB device\n");
 326                 ehci_pci_detach(self);
 327                 return ENOMEM;
 328         }
 329         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
 330
 331         /* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
 332         device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
 333         switch (pci_get_vendor(self)) {
 334         case PCI_EHCI_VENDORID_ACERLABS:
 335                 ksprintf(sc->sc_vendor, "AcerLabs");
 336                 break;
 337         case PCI_EHCI_VENDORID_AMD:
 338                 ksprintf(sc->sc_vendor, "AMD");
 339                 break;
 340         case PCI_EHCI_VENDORID_APPLE:
 341                 ksprintf(sc->sc_vendor, "Apple");
 342                 break;
 343         case PCI_EHCI_VENDORID_ATI:
 344                 ksprintf(sc->sc_vendor, "ATI");
 345                 break;
 346         case PCI_EHCI_VENDORID_CMDTECH:
 347                 ksprintf(sc->sc_vendor, "CMDTECH");
 348                 break;
 349         case PCI_EHCI_VENDORID_INTEL:
 350                 ksprintf(sc->sc_vendor, "Intel");
 351                 break;
 352         case PCI_EHCI_VENDORID_NEC:
 353                 ksprintf(sc->sc_vendor, "NEC");
 354                 break;
 355         case PCI_EHCI_VENDORID_OPTI:
 356                 ksprintf(sc->sc_vendor, "OPTi");
 357                 break;
 358         case PCI_EHCI_VENDORID_SIS:
 359                 ksprintf(sc->sc_vendor, "SiS");
 360                 break;
 361         case PCI_EHCI_VENDORID_NVIDIA:
 362         case PCI_EHCI_VENDORID_NVIDIA2:
 363                 ksprintf(sc->sc_vendor, "nVidia");
 364                 break;
 365         case PCI_EHCI_VENDORID_VIA:
 366                 ksprintf(sc->sc_vendor, "VIA");
 367                 break;
 368         default:
 369                 if (bootverbose)
 370                         device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
 371                             pci_get_devid(self));
 372                 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
 373         }
 374
 375         err = bus_setup_intr(self, sc->irq_res, 0,
 376             (driver_intr_t *) ehci_intr, sc, &sc->ih, NULL);
 377         if (err) {
 378                 device_printf(self, "Could not setup irq, %d\n", err);
 379                 sc->ih = NULL;
 380                 ehci_pci_detach(self);
 381                 return ENXIO;
 382         }
 383
 384         /* Enable workaround for dropped interrupts as required */
 385         switch (pci_get_vendor(self)) {
 386         case PCI_EHCI_VENDORID_ATI:
 387         case PCI_EHCI_VENDORID_VIA:
 388                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
 389                 if (bootverbose)
 390                         device_printf(self,
 391                             "Dropped interrupts workaround enabled\n");
 392                 break;
 393         default:
 394                 break;
 395         }
 396
 397         /*
 398          * Find companion controllers.  According to the spec they always
 399          * have lower function numbers so they should be enumerated already.
 400          */
 401         parent = device_get_parent(self);
 402         res = device_get_children(parent, &neighbors, &count);
 403         if (res != 0) {
 404                 device_printf(self, "Error finding companion busses\n");
 405                 ehci_pci_detach(self);
 406                 return ENXIO;
 407         }
 408         ncomp = 0;
 409         slot = pci_get_slot(self);
 410         function = pci_get_function(self);
 411         for (i = 0; i < count; i++) {
 412                 if (pci_get_slot(neighbors[i]) == slot && \
 413                         pci_get_function(neighbors[i]) < function) {
 414                         res = device_get_children(neighbors[i],
 415                                 &nbus, &buscount);
 416                         if (res != 0 || buscount != 1)
 417                                 continue;
 418                         bsc = device_get_softc(nbus[0]);
 419                         if (bsc == NULL || bsc->bdev == NULL)
 420                                 continue;
 421                         DPRINTF(("ehci_pci_attach: companion %s\n",
 422                             device_get_nameunit(bsc->bdev)));
 423                         sc->sc_comps[ncomp++] = bsc;
 424                         if (ncomp >= EHCI_COMPANION_MAX)
 425                                 break;
 426                 }
 427         }
 428         sc->sc_ncomp = ncomp;
 429
 430         ehci_pci_takecontroller(self);
 431         err = ehci_init(sc);
 432         if (!err) {
 433                 sc->sc_flags |= EHCI_SCFLG_DONEINIT;
 434                 err = device_probe_and_attach(sc->sc_bus.bdev);
 435         }
 436
 437         if (err) {
 438                 device_printf(self, "USB init failed err=%d\n", err);
 439                 ehci_pci_detach(self);
 440                 return EIO;
 441         }
 442         return 0;
 443 }
 444
 445 static int
 446 ehci_pci_detach(device_t self)
 447 {
 448         ehci_softc_t *sc = device_get_softc(self);
 449
 450         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
 451                 ehci_detach(sc, 0);
 452                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
 453         }
 454
 455         /*
 456          * disable interrupts that might have been switched on in ehci_init
 457          */
 458         if (sc->iot && sc->ioh)
 459                 bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
 460
 461         if (sc->irq_res && sc->ih) {
 462                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
 463
 464                 if (err)
 465                         /* XXX or should we panic? */
 466                         device_printf(self, "Could not tear down irq, %d\n",
 467                             err);
 468                 sc->ih = NULL;
 469         }
 470         if (sc->sc_bus.bdev) {
 471                 device_delete_child(self, sc->sc_bus.bdev);
 472                 sc->sc_bus.bdev = NULL;
 473         }
 474         if (sc->irq_res) {
 475                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
 476                 sc->irq_res = NULL;
 477         }
 478         if (sc->io_res) {
 479                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
 480                 sc->io_res = NULL;
 481                 sc->iot = 0;
 482                 sc->ioh = 0;
 483         }
 484         return 0;
 485 }
 486
 487 static void
 488 ehci_pci_takecontroller(device_t self)
 489 {
 490         ehci_softc_t *sc = device_get_softc(self);
 491         u_int32_t cparams, eec, legsup;
 492         int eecp, i;
 493
 494         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 495
 496         /* Synchronise with the BIOS if it owns the controller. */
 497         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
 498              eecp = EHCI_EECP_NEXT(eec)) {
 499                 eec = pci_read_config(self, eecp, 4);
 500                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
 501                         continue;
 502                 legsup = eec;
 503                 pci_write_config(self, eecp, legsup | EHCI_LEGSUP_OSOWNED, 4);
 504                 if (legsup & EHCI_LEGSUP_BIOSOWNED) {
 505                         device_printf(sc->sc_bus.bdev,
 506                             "waiting for BIOS to give up control\n");
 507                         for (i = 0; i < 5000; i++) {
 508                                 legsup = pci_read_config(self, eecp, 4);
 509                                 if ((legsup & EHCI_LEGSUP_BIOSOWNED) == 0)
 510                                         break;
 511                                 DELAY(1000);
 512                         }
 513                         if (legsup & EHCI_LEGSUP_BIOSOWNED)
 514                                 device_printf(sc->sc_bus.bdev,
 515                                     "timed out waiting for BIOS\n");
 516                 }
 517         }
 518 }
 519
 520 static void
 521 ehci_pci_givecontroller(device_t self)
 522 {
 523         ehci_softc_t *sc = device_get_softc(self);
 524         u_int32_t cparams, eec, legsup;
 525         int eecp;
 526
 527         cparams = EREAD4(sc, EHCI_HCCPARAMS);
 528         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
 529              eecp = EHCI_EECP_NEXT(eec)) {
 530                 eec = pci_read_config(self, eecp, 4);
 531                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
 532                         continue;
 533                 legsup = eec;
 534                 pci_write_config(self, eecp, legsup & ~EHCI_LEGSUP_OSOWNED, 4);
 535         }
 536 }
 537
 538 static device_method_t ehci_methods[] = {
 539         /* Device interface */
 540         DEVMETHOD(device_probe, ehci_pci_probe),
 541         DEVMETHOD(device_attach, ehci_pci_attach),
 542         DEVMETHOD(device_detach, ehci_pci_detach),
 543         DEVMETHOD(device_suspend, ehci_pci_suspend),
 544         DEVMETHOD(device_resume, ehci_pci_resume),
 545         DEVMETHOD(device_shutdown, ehci_pci_shutdown),
 546
 547         /* Bus interface */
 548         DEVMETHOD(bus_print_child, bus_generic_print_child),
 549
 550         {0, 0}
 551 };
 552
 553 static driver_t ehci_driver = {
 554         "ehci",
 555         ehci_methods,
 556         sizeof(ehci_softc_t),
 557 };
 558
 559 static devclass_t ehci_devclass;
 560
 561 DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, 0, 0);
 562 DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, 0, 0);