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suser_* to priv_* conversion
[dragonfly.git] / sys / dev / serial / stl / stallion.c
blob71a2da03fced605b8f918d366f5ef332dc371b54
1 /*****************************************************************************/
2
3 /*
4 * stallion.c -- stallion multiport serial driver.
5 *
6 * Copyright (c) 1995-1996 Greg Ungerer (gerg@stallion.oz.au).
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by Greg Ungerer.
20 * 4. Neither the name of the author nor the names of any co-contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * $FreeBSD: src/sys/i386/isa/stallion.c,v 1.39.2.2 2001/08/30 12:29:57 murray Exp $
37 * $DragonFly: src/sys/dev/serial/stl/stallion.c,v 1.27 2008/08/02 01:14:43 dillon Exp $
38 */
39
40 /*****************************************************************************/
41
42 #define TTYDEFCHARS 1
43
44 #include "use_pci.h"
45 #include "opt_compat.h"
46
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/kernel.h>
50 #include <sys/malloc.h>
51 #include <sys/tty.h>
52 #include <sys/proc.h>
53 #include <sys/priv.h>
54 #include <sys/conf.h>
55 #include <sys/fcntl.h>
56 #include <sys/thread2.h>
57 #include <bus/isa/isa_device.h>
58 #include <machine_base/isa/ic/scd1400.h>
59 #include <machine_base/isa/ic/sc26198.h>
60 #include <machine/comstats.h>
61
62 #if NPCI > 0
63 #include <bus/pci/pcivar.h>
64 #include <bus/pci/pcireg.h>
65 #endif
66
67 #undef STLDEBUG
68
69 /*****************************************************************************/
70
71 /*
72 * Define the version level of the kernel - so we can compile in the
73 * appropriate bits of code. By default this will compile for a 2.1
74 * level kernel.
75 */
76 #define VFREEBSD 220
77
78 #if VFREEBSD >= 220
79 #define STATIC static
80 #else
81 #define STATIC
82 #endif
83
84 /*****************************************************************************/
85
86 /*
87 * Define different board types. At the moment I have only declared
88 * those boards that this driver supports. But I will use the standard
89 * "assigned" board numbers. In the future this driver will support
90 * some of the other Stallion boards. Currently supported boards are
91 * abbreviated as EIO = EasyIO and ECH = EasyConnection 8/32.
92 */
93 #define BRD_EASYIO 20
94 #define BRD_ECH 21
95 #define BRD_ECHMC 22
96 #define BRD_ECHPCI 26
97 #define BRD_ECH64PCI 27
98 #define BRD_EASYIOPCI 28
99
100 /*
101 * When using the BSD "config" stuff there is no easy way to specifiy
102 * a secondary IO address region. So it is hard wired here. Also the
103 * shared interrupt information is hard wired here...
104 */
105 static unsigned int stl_ioshared = 0x280;
106 static unsigned int stl_irqshared = 0;
107
108 /*****************************************************************************/
109
110 /*
111 * Define important driver limitations.
112 */
113 #define STL_MAXBRDS 8
114 #define STL_MAXPANELS 4
115 #define STL_MAXBANKS 8
116 #define STL_PORTSPERPANEL 16
117 #define STL_PORTSPERBRD 64
118
119 /*
120 * Define the important minor number break down bits. These have been
121 * chosen to be "compatible" with the standard sio driver minor numbers.
122 * Extra high bits are used to distinguish between boards.
123 */
124 #define STL_CALLOUTDEV 0x80
125 #define STL_CTRLLOCK 0x40
126 #define STL_CTRLINIT 0x20
127 #define STL_CTRLDEV (STL_CTRLLOCK | STL_CTRLINIT)
128
129 #define STL_MEMDEV 0x07000000
130
131 #define STL_DEFSPEED TTYDEF_SPEED
132 #define STL_DEFCFLAG (CS8 | CREAD | HUPCL)
133
134 /*
135 * I haven't really decided (or measured) what buffer sizes give
136 * a good balance between performance and memory usage. These seem
137 * to work pretty well...
138 */
139 #define STL_RXBUFSIZE 2048
140 #define STL_TXBUFSIZE 2048
141
142 #define STL_TXBUFLOW (STL_TXBUFSIZE / 4)
143 #define STL_RXBUFHIGH (3 * STL_RXBUFSIZE / 4)
144
145 /*****************************************************************************/
146
147 /*
148 * Define our local driver identity first. Set up stuff to deal with
149 * all the local structures required by a serial tty driver.
150 */
151 static const char stl_drvname[] = "stl";
152 static const char stl_longdrvname[] = "Stallion Multiport Serial Driver";
153 static const char stl_drvversion[] = "2.0.0";
154 static int stl_brdprobed[STL_MAXBRDS];
155
156 static int stl_nrbrds = 0;
157 static int stl_doingtimeout = 0;
158 static struct callout stl_poll_ch;
159
160 static const char __file__[] = /*__FILE__*/ "stallion.c";
161
162 /*
163 * Define global stats structures. Not used often, and can be
164 * re-used for each stats call.
165 */
166 static combrd_t stl_brdstats;
167 static comstats_t stl_comstats;
168
169 /*****************************************************************************/
170
171 /*
172 * Define a set of structures to hold all the board/panel/port info
173 * for our ports. These will be dynamically allocated as required.
174 */
175
176 /*
177 * Define a ring queue structure for each port. This will hold the
178 * TX data waiting to be output. Characters are fed into this buffer
179 * from the line discipline (or even direct from user space!) and
180 * then fed into the UARTs during interrupts. Will use a clasic ring
181 * queue here for this. The good thing about this type of ring queue
182 * is that the head and tail pointers can be updated without interrupt
183 * protection - since "write" code only needs to change the head, and
184 * interrupt code only needs to change the tail.
185 */
186 typedef struct {
187 char *buf;
188 char *endbuf;
189 char *head;
190 char *tail;
191 } stlrq_t;
192
193 /*
194 * Port, panel and board structures to hold status info about each.
195 * The board structure contains pointers to structures for each panel
196 * connected to it, and in turn each panel structure contains pointers
197 * for each port structure for each port on that panel. Note that
198 * the port structure also contains the board and panel number that it
199 * is associated with, this makes it (fairly) easy to get back to the
200 * board/panel info for a port. Also note that the tty struct is at
201 * the top of the structure, this is important, since the code uses
202 * this fact to get the port struct pointer from the tty struct
203 * pointer!
204 */
205 typedef struct stlport {
206 struct tty tty;
207 int portnr;
208 int panelnr;
209 int brdnr;
210 int ioaddr;
211 int uartaddr;
212 int pagenr;
213 int callout;
214 int brklen;
215 int dtrwait;
216 int dotimestamp;
217 int waitopens;
218 int hotchar;
219 void *uartp;
220 unsigned int state;
221 unsigned int hwid;
222 unsigned int sigs;
223 unsigned int rxignoremsk;
224 unsigned int rxmarkmsk;
225 unsigned int crenable;
226 unsigned int imr;
227 unsigned long clk;
228 struct termios initintios;
229 struct termios initouttios;
230 struct termios lockintios;
231 struct termios lockouttios;
232 struct timeval timestamp;
233 comstats_t stats;
234 stlrq_t tx;
235 stlrq_t rx;
236 stlrq_t rxstatus;
237 struct callout dtr_ch;
238 } stlport_t;
239
240 typedef struct stlpanel {
241 int panelnr;
242 int brdnr;
243 int pagenr;
244 int nrports;
245 int iobase;
246 unsigned int hwid;
247 unsigned int ackmask;
248 void (*isr)(struct stlpanel *panelp, unsigned int iobase);
249 void *uartp;
250 stlport_t *ports[STL_PORTSPERPANEL];
251 } stlpanel_t;
252
253 typedef struct stlbrd {
254 int brdnr;
255 int brdtype;
256 int unitid;
257 int state;
258 int nrpanels;
259 int nrports;
260 int nrbnks;
261 int irq;
262 int irqtype;
263 unsigned int ioaddr1;
264 unsigned int ioaddr2;
265 unsigned int iostatus;
266 unsigned int ioctrl;
267 unsigned int ioctrlval;
268 unsigned int hwid;
269 unsigned long clk;
270 void (*isr)(struct stlbrd *brdp);
271 unsigned int bnkpageaddr[STL_MAXBANKS];
272 unsigned int bnkstataddr[STL_MAXBANKS];
273 stlpanel_t *bnk2panel[STL_MAXBANKS];
274 stlpanel_t *panels[STL_MAXPANELS];
275 stlport_t *ports[STL_PORTSPERBRD];
276 } stlbrd_t;
277
278 static stlbrd_t *stl_brds[STL_MAXBRDS];
279
280 /*
281 * Per board state flags. Used with the state field of the board struct.
282 * Not really much here yet!
283 */
284 #define BRD_FOUND 0x1
285
286 /*
287 * Define the port structure state flags. These set of flags are
288 * modified at interrupt time - so setting and reseting them needs
289 * to be atomic.
290 */
291 #define ASY_TXLOW 0x1
292 #define ASY_RXDATA 0x2
293 #define ASY_DCDCHANGE 0x4
294 #define ASY_DTRWAIT 0x8
295 #define ASY_RTSFLOW 0x10
296 #define ASY_RTSFLOWMODE 0x20
297 #define ASY_CTSFLOWMODE 0x40
298 #define ASY_TXFLOWED 0x80
299 #define ASY_TXBUSY 0x100
300 #define ASY_TXEMPTY 0x200
301
302 #define ASY_ACTIVE (ASY_TXLOW | ASY_RXDATA | ASY_DCDCHANGE)
303
304 /*
305 * Define an array of board names as printable strings. Handy for
306 * referencing boards when printing trace and stuff.
307 */
308 static char *stl_brdnames[] = {
309 (char *) NULL,
310 (char *) NULL,
311 (char *) NULL,
312 (char *) NULL,
313 (char *) NULL,
314 (char *) NULL,
315 (char *) NULL,
316 (char *) NULL,
317 (char *) NULL,
318 (char *) NULL,
319 (char *) NULL,
320 (char *) NULL,
321 (char *) NULL,
322 (char *) NULL,
323 (char *) NULL,
324 (char *) NULL,
325 (char *) NULL,
326 (char *) NULL,
327 (char *) NULL,
328 (char *) NULL,
329 "EasyIO",
330 "EC8/32-AT",
331 "EC8/32-MC",
332 (char *) NULL,
333 (char *) NULL,
334 (char *) NULL,
335 "EC8/32-PCI",
336 "EC8/64-PCI",
337 "EasyIO-PCI",
338 };
339
340 /*****************************************************************************/
341
342 /*
343 * Hardware ID bits for the EasyIO and ECH boards. These defines apply
344 * to the directly accessable io ports of these boards (not the cd1400
345 * uarts - they are in scd1400.h).
346 */
347 #define EIO_8PORTRS 0x04
348 #define EIO_4PORTRS 0x05
349 #define EIO_8PORTDI 0x00
350 #define EIO_8PORTM 0x06
351 #define EIO_MK3 0x03
352 #define EIO_IDBITMASK 0x07
353
354 #define EIO_BRDMASK 0xf0
355 #define ID_BRD4 0x10
356 #define ID_BRD8 0x20
357 #define ID_BRD16 0x30
358
359 #define EIO_INTRPEND 0x08
360 #define EIO_INTEDGE 0x00
361 #define EIO_INTLEVEL 0x08
362
363 #define ECH_ID 0xa0
364 #define ECH_IDBITMASK 0xe0
365 #define ECH_BRDENABLE 0x08
366 #define ECH_BRDDISABLE 0x00
367 #define ECH_INTENABLE 0x01
368 #define ECH_INTDISABLE 0x00
369 #define ECH_INTLEVEL 0x02
370 #define ECH_INTEDGE 0x00
371 #define ECH_INTRPEND 0x01
372 #define ECH_BRDRESET 0x01
373
374 #define ECHMC_INTENABLE 0x01
375 #define ECHMC_BRDRESET 0x02
376
377 #define ECH_PNLSTATUS 2
378 #define ECH_PNL16PORT 0x20
379 #define ECH_PNLIDMASK 0x07
380 #define ECH_PNLXPID 0x40
381 #define ECH_PNLINTRPEND 0x80
382 #define ECH_ADDR2MASK 0x1e0
383
384 #define EIO_CLK 25000000
385 #define EIO_CLK8M 20000000
386 #define ECH_CLK EIO_CLK
387
388 /*
389 * Define the PCI vendor and device ID for Stallion PCI boards.
390 */
391 #define STL_PCINSVENDID 0x100b
392 #define STL_PCINSDEVID 0xd001
393
394 #define STL_PCIVENDID 0x124d
395 #define STL_PCI32DEVID 0x0000
396 #define STL_PCI64DEVID 0x0002
397 #define STL_PCIEIODEVID 0x0003
398
399 #define STL_PCIBADCLASS 0x0101
400
401 typedef struct stlpcibrd {
402 unsigned short vendid;
403 unsigned short devid;
404 int brdtype;
405 } stlpcibrd_t;
406
407 static stlpcibrd_t stl_pcibrds[] = {
408 { STL_PCIVENDID, STL_PCI64DEVID, BRD_ECH64PCI },
409 { STL_PCIVENDID, STL_PCIEIODEVID, BRD_EASYIOPCI },
410 { STL_PCIVENDID, STL_PCI32DEVID, BRD_ECHPCI },
411 { STL_PCINSVENDID, STL_PCINSDEVID, BRD_ECHPCI },
412 };
413
414 static int stl_nrpcibrds = sizeof(stl_pcibrds) / sizeof(stlpcibrd_t);
415
416 /*****************************************************************************/
417
418 /*
419 * Define the vector mapping bits for the programmable interrupt board
420 * hardware. These bits encode the interrupt for the board to use - it
421 * is software selectable (except the EIO-8M).
422 */
423 static unsigned char stl_vecmap[] = {
424 0xff, 0xff, 0xff, 0x04, 0x06, 0x05, 0xff, 0x07,
425 0xff, 0xff, 0x00, 0x02, 0x01, 0xff, 0xff, 0x03
426 };
427
428 /*
429 * Set up enable and disable macros for the ECH boards. They require
430 * the secondary io address space to be activated and deactivated.
431 * This way all ECH boards can share their secondary io region.
432 * If this is an ECH-PCI board then also need to set the page pointer
433 * to point to the correct page.
434 */
435 #define BRDENABLE(brdnr,pagenr) \
436 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
437 outb(stl_brds[(brdnr)]->ioctrl, \
438 (stl_brds[(brdnr)]->ioctrlval | ECH_BRDENABLE));\
439 else if (stl_brds[(brdnr)]->brdtype == BRD_ECHPCI) \
440 outb(stl_brds[(brdnr)]->ioctrl, (pagenr));
441
442 #define BRDDISABLE(brdnr) \
443 if (stl_brds[(brdnr)]->brdtype == BRD_ECH) \
444 outb(stl_brds[(brdnr)]->ioctrl, \
445 (stl_brds[(brdnr)]->ioctrlval | ECH_BRDDISABLE));
446
447 /*
448 * Define some spare buffer space for un-wanted received characters.
449 */
450 static char stl_unwanted[SC26198_RXFIFOSIZE];
451
452 /*****************************************************************************/
453
454 /*
455 * Define macros to extract a brd and port number from a minor number.
456 * This uses the extended minor number range in the upper 2 bytes of
457 * the device number. This gives us plenty of minor numbers to play
458 * with...
459 */
460 #define MKDEV2BRD(m) ((minor(m) & 0x00700000) >> 20)
461 #define MKDEV2PORT(m) ((minor(m) & 0x1f) | ((minor(m) & 0x00010000) >> 11))
462
463 /*
464 * Define some handy local macros...
465 */
466 #ifndef MIN
467 #define MIN(a,b) (((a) <= (b)) ? (a) : (b))
468 #endif
469
470 /*****************************************************************************/
471
472 /*
473 * Declare all those functions in this driver! First up is the set of
474 * externally visible functions.
475 */
476
477 static int stlprobe(struct isa_device *idp);
478 static int stlattach(struct isa_device *idp);
479
480 STATIC d_open_t stlopen;
481 STATIC d_close_t stlclose;
482 STATIC d_ioctl_t stlioctl;
483
484 /*
485 * Internal function prototypes.
486 */
487 static stlport_t *stl_dev2port(cdev_t dev);
488 static int stl_findfreeunit(void);
489 static int stl_rawopen(stlport_t *portp);
490 static int stl_rawclose(stlport_t *portp);
491 static void stl_flush(stlport_t *portp, int flag);
492 static int stl_param(struct tty *tp, struct termios *tiosp);
493 static void stl_start(struct tty *tp);
494 static void stl_stop(struct tty *tp, int);
495 static void stl_ttyoptim(stlport_t *portp, struct termios *tiosp);
496 static void stl_dotimeout(void);
497 static void stl_poll(void *arg);
498 static void stl_rxprocess(stlport_t *portp);
499 static void stl_flowcontrol(stlport_t *portp, int hw, int sw);
500 static void stl_dtrwakeup(void *arg);
501 static int stl_brdinit(stlbrd_t *brdp);
502 static int stl_initeio(stlbrd_t *brdp);
503 static int stl_initech(stlbrd_t *brdp);
504 static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp);
505 static void stl_eiointr(stlbrd_t *brdp);
506 static void stl_echatintr(stlbrd_t *brdp);
507 static void stl_echmcaintr(stlbrd_t *brdp);
508 static void stl_echpciintr(stlbrd_t *brdp);
509 static void stl_echpci64intr(stlbrd_t *brdp);
510 static int stl_memioctl(cdev_t dev, unsigned long cmd, caddr_t data,
511 int flag);
512 static int stl_getbrdstats(caddr_t data);
513 static int stl_getportstats(stlport_t *portp, caddr_t data);
514 static int stl_clrportstats(stlport_t *portp, caddr_t data);
515 static stlport_t *stl_getport(int brdnr, int panelnr, int portnr);
516 static void stlintr(void *);
517
518 #if NPCI > 0
519 static const char *stlpciprobe(pcici_t tag, pcidi_t type);
520 static void stlpciattach(pcici_t tag, int unit);
521 static void stlpciintr(void * arg);
522 #endif
523
524 /*
525 * CD1400 uart specific handling functions.
526 */
527 static void stl_cd1400setreg(stlport_t *portp, int regnr, int value);
528 static int stl_cd1400getreg(stlport_t *portp, int regnr);
529 static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value);
530 static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
531 static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
532 static int stl_cd1400setport(stlport_t *portp, struct termios *tiosp);
533 static int stl_cd1400getsignals(stlport_t *portp);
534 static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts);
535 static void stl_cd1400ccrwait(stlport_t *portp);
536 static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx);
537 static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx);
538 static void stl_cd1400disableintrs(stlport_t *portp);
539 static void stl_cd1400sendbreak(stlport_t *portp, long len);
540 static void stl_cd1400sendflow(stlport_t *portp, int hw, int sw);
541 static int stl_cd1400datastate(stlport_t *portp);
542 static void stl_cd1400flush(stlport_t *portp, int flag);
543 static __inline void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr);
544 static void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr);
545 static void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr);
546 static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase);
547 static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase);
548
549 /*
550 * SC26198 uart specific handling functions.
551 */
552 static void stl_sc26198setreg(stlport_t *portp, int regnr, int value);
553 static int stl_sc26198getreg(stlport_t *portp, int regnr);
554 static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value);
555 static int stl_sc26198getglobreg(stlport_t *portp, int regnr);
556 static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp);
557 static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
558 static int stl_sc26198setport(stlport_t *portp, struct termios *tiosp);
559 static int stl_sc26198getsignals(stlport_t *portp);
560 static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts);
561 static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx);
562 static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx);
563 static void stl_sc26198disableintrs(stlport_t *portp);
564 static void stl_sc26198sendbreak(stlport_t *portp, long len);
565 static void stl_sc26198sendflow(stlport_t *portp, int hw, int sw);
566 static int stl_sc26198datastate(stlport_t *portp);
567 static void stl_sc26198flush(stlport_t *portp, int flag);
568 static void stl_sc26198txunflow(stlport_t *portp);
569 static void stl_sc26198wait(stlport_t *portp);
570 static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase);
571 static void stl_sc26198txisr(stlport_t *port);
572 static void stl_sc26198rxisr(stlport_t *port, unsigned int iack);
573 static void stl_sc26198rxgoodchars(stlport_t *portp);
574 static void stl_sc26198rxbadchars(stlport_t *portp);
575 static void stl_sc26198otherisr(stlport_t *port, unsigned int iack);
576
577 /*****************************************************************************/
578
579 /*
580 * Generic UART support structure.
581 */
582 typedef struct uart {
583 int (*panelinit)(stlbrd_t *brdp, stlpanel_t *panelp);
584 void (*portinit)(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp);
585 int (*setport)(stlport_t *portp, struct termios *tiosp);
586 int (*getsignals)(stlport_t *portp);
587 void (*setsignals)(stlport_t *portp, int dtr, int rts);
588 void (*enablerxtx)(stlport_t *portp, int rx, int tx);
589 void (*startrxtx)(stlport_t *portp, int rx, int tx);
590 void (*disableintrs)(stlport_t *portp);
591 void (*sendbreak)(stlport_t *portp, long len);
592 void (*sendflow)(stlport_t *portp, int hw, int sw);
593 void (*flush)(stlport_t *portp, int flag);
594 int (*datastate)(stlport_t *portp);
595 void (*intr)(stlpanel_t *panelp, unsigned int iobase);
596 } uart_t;
597
598 /*
599 * Define some macros to make calling these functions nice and clean.
600 */
601 #define stl_panelinit (* ((uart_t *) panelp->uartp)->panelinit)
602 #define stl_portinit (* ((uart_t *) portp->uartp)->portinit)
603 #define stl_setport (* ((uart_t *) portp->uartp)->setport)
604 #define stl_getsignals (* ((uart_t *) portp->uartp)->getsignals)
605 #define stl_setsignals (* ((uart_t *) portp->uartp)->setsignals)
606 #define stl_enablerxtx (* ((uart_t *) portp->uartp)->enablerxtx)
607 #define stl_startrxtx (* ((uart_t *) portp->uartp)->startrxtx)
608 #define stl_disableintrs (* ((uart_t *) portp->uartp)->disableintrs)
609 #define stl_sendbreak (* ((uart_t *) portp->uartp)->sendbreak)
610 #define stl_sendflow (* ((uart_t *) portp->uartp)->sendflow)
611 #define stl_uartflush (* ((uart_t *) portp->uartp)->flush)
612 #define stl_datastate (* ((uart_t *) portp->uartp)->datastate)
613
614 /*****************************************************************************/
615
616 /*
617 * CD1400 UART specific data initialization.
618 */
619 static uart_t stl_cd1400uart = {
620 stl_cd1400panelinit,
621 stl_cd1400portinit,
622 stl_cd1400setport,
623 stl_cd1400getsignals,
624 stl_cd1400setsignals,
625 stl_cd1400enablerxtx,
626 stl_cd1400startrxtx,
627 stl_cd1400disableintrs,
628 stl_cd1400sendbreak,
629 stl_cd1400sendflow,
630 stl_cd1400flush,
631 stl_cd1400datastate,
632 stl_cd1400eiointr
633 };
634
635 /*
636 * Define the offsets within the register bank of a cd1400 based panel.
637 * These io address offsets are common to the EasyIO board as well.
638 */
639 #define EREG_ADDR 0
640 #define EREG_DATA 4
641 #define EREG_RXACK 5
642 #define EREG_TXACK 6
643 #define EREG_MDACK 7
644
645 #define EREG_BANKSIZE 8
646
647 #define CD1400_CLK 25000000
648 #define CD1400_CLK8M 20000000
649
650 /*
651 * Define the cd1400 baud rate clocks. These are used when calculating
652 * what clock and divisor to use for the required baud rate. Also
653 * define the maximum baud rate allowed, and the default base baud.
654 */
655 static int stl_cd1400clkdivs[] = {
656 CD1400_CLK0, CD1400_CLK1, CD1400_CLK2, CD1400_CLK3, CD1400_CLK4
657 };
658
659 /*
660 * Define the maximum baud rate of the cd1400 devices.
661 */
662 #define CD1400_MAXBAUD 230400
663
664 /*****************************************************************************/
665
666 /*
667 * SC26198 UART specific data initization.
668 */
669 static uart_t stl_sc26198uart = {
670 stl_sc26198panelinit,
671 stl_sc26198portinit,
672 stl_sc26198setport,
673 stl_sc26198getsignals,
674 stl_sc26198setsignals,
675 stl_sc26198enablerxtx,
676 stl_sc26198startrxtx,
677 stl_sc26198disableintrs,
678 stl_sc26198sendbreak,
679 stl_sc26198sendflow,
680 stl_sc26198flush,
681 stl_sc26198datastate,
682 stl_sc26198intr
683 };
684
685 /*
686 * Define the offsets within the register bank of a sc26198 based panel.
687 */
688 #define XP_DATA 0
689 #define XP_ADDR 1
690 #define XP_MODID 2
691 #define XP_STATUS 2
692 #define XP_IACK 3
693
694 #define XP_BANKSIZE 4
695
696 /*
697 * Define the sc26198 baud rate table. Offsets within the table
698 * represent the actual baud rate selector of sc26198 registers.
699 */
700 static unsigned int sc26198_baudtable[] = {
701 50, 75, 150, 200, 300, 450, 600, 900, 1200, 1800, 2400, 3600,
702 4800, 7200, 9600, 14400, 19200, 28800, 38400, 57600, 115200,
703 230400, 460800
704 };
705
706 #define SC26198_NRBAUDS (sizeof(sc26198_baudtable) / sizeof(unsigned int))
707
708 /*
709 * Define the maximum baud rate of the sc26198 devices.
710 */
711 #define SC26198_MAXBAUD 460800
712
713 /*****************************************************************************/
714
715 /*
716 * Declare the driver isa structure.
717 */
718 struct isa_driver stldriver = {
719 stlprobe, stlattach, "stl"
720 };
721
722 /*****************************************************************************/
723
724 #if NPCI > 0
725
726 /*
727 * Declare the driver pci structure.
728 */
729 static unsigned long stl_count;
730
731 static struct pci_device stlpcidriver = {
732 "stl",
733 stlpciprobe,
734 stlpciattach,
735 &stl_count,
736 NULL,
737 };
738
739 COMPAT_PCI_DRIVER (stlpci, stlpcidriver);
740
741 #endif
742
743 /*****************************************************************************/
744
745 #if VFREEBSD >= 220
746
747 /*
748 * FreeBSD-2.2+ kernel linkage.
749 */
750
751 #define CDEV_MAJOR 72
752 static struct dev_ops stl_ops = {
753 { "stl", CDEV_MAJOR, D_TTY | D_KQFILTER },
754 .d_open = stlopen,
755 .d_close = stlclose,
756 .d_read = ttyread,
757 .d_write = ttywrite,
758 .d_ioctl = stlioctl,
759 .d_poll = ttypoll,
760 .d_kqfilter = ttykqfilter
761 };
762
763 static void stl_drvinit(void *unused)
764 {
765 }
766
767 SYSINIT(sidev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,stl_drvinit,NULL)
768
769 #endif
770
771 /*****************************************************************************/
772
773 /*
774 * Probe for some type of EasyIO or EasyConnection 8/32 board at
775 * the supplied address. All we do is check if we can find the
776 * board ID for the board... (Note, PCI boards not checked here,
777 * they are done in the stlpciprobe() routine).
778 */
779
780 static int stlprobe(struct isa_device *idp)
781 {
782 unsigned int status;
783
784 #if STLDEBUG
785 kprintf("stlprobe(idp=%x): unit=%d iobase=%x\n", (int) idp,
786 idp->id_unit, idp->id_iobase);
787 #endif
788
789 if (idp->id_unit > STL_MAXBRDS)
790 return(0);
791
792 status = inb(idp->id_iobase + 1);
793 if ((status & ECH_IDBITMASK) == ECH_ID) {
794 stl_brdprobed[idp->id_unit] = BRD_ECH;
795 return(1);
796 }
797
798 status = inb(idp->id_iobase + 2);
799 switch (status & EIO_IDBITMASK) {
800 case EIO_8PORTRS:
801 case EIO_8PORTM:
802 case EIO_8PORTDI:
803 case EIO_4PORTRS:
804 case EIO_MK3:
805 stl_brdprobed[idp->id_unit] = BRD_EASYIO;
806 return(1);
807 default:
808 break;
809 }
810
811 return(0);
812 }
813
814 /*****************************************************************************/
815
816 /*
817 * Find an available internal board number (unit number). The problem
818 * is that the same unit numbers can be assigned to different boards
819 * detected during the ISA and PCI initialization phases.
820 */
821
822 static int stl_findfreeunit(void)
823 {
824 int i;
825
826 for (i = 0; (i < STL_MAXBRDS); i++)
827 if (stl_brds[i] == (stlbrd_t *) NULL)
828 break;
829 return((i >= STL_MAXBRDS) ? -1 : i);
830 }
831
832 /*****************************************************************************/
833
834 /*
835 * Allocate resources for and initialize the specified board.
836 */
837
838 static int stlattach(struct isa_device *idp)
839 {
840 stlbrd_t *brdp;
841 int boardnr, portnr, minor_dev;
842
843 #if STLDEBUG
844 kprintf("stlattach(idp=%p): unit=%d iobase=%x\n", (void *) idp,
845 idp->id_unit, idp->id_iobase);
846 #endif
847
848 /* idp->id_intr = (inthand2_t *)stlintr; */
849
850 brdp = kmalloc(sizeof(stlbrd_t), M_TTYS, M_WAITOK | M_ZERO);
851
852 if ((brdp->brdnr = stl_findfreeunit()) < 0) {
853 kprintf("STALLION: too many boards found, max=%d\n",
854 STL_MAXBRDS);
855 return(0);
856 }
857 if (brdp->brdnr >= stl_nrbrds)
858 stl_nrbrds = brdp->brdnr + 1;
859
860 brdp->unitid = idp->id_unit;
861 brdp->brdtype = stl_brdprobed[idp->id_unit];
862 brdp->ioaddr1 = idp->id_iobase;
863 brdp->ioaddr2 = stl_ioshared;
864 brdp->irq = ffs(idp->id_irq) - 1;
865 brdp->irqtype = stl_irqshared;
866 stl_brdinit(brdp);
867
868 /* register devices for DEVFS */
869 boardnr = brdp->brdnr;
870 dev_ops_add(&stl_ops, 31, boardnr);
871 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
872 0600, "staliomem%d", boardnr);
873
874 for (portnr = 0, minor_dev = boardnr * 0x100000;
875 portnr < 32; portnr++, minor_dev++) {
876 /* hw ports */
877 make_dev(&stl_ops, minor_dev,
878 UID_ROOT, GID_WHEEL, 0600,
879 "ttyE%d", portnr + (boardnr * 64));
880 make_dev(&stl_ops, minor_dev + 32,
881 UID_ROOT, GID_WHEEL, 0600,
882 "ttyiE%d", portnr + (boardnr * 64));
883 make_dev(&stl_ops, minor_dev + 64,
884 UID_ROOT, GID_WHEEL, 0600,
885 "ttylE%d", portnr + (boardnr * 64));
886 make_dev(&stl_ops, minor_dev + 128,
887 UID_ROOT, GID_WHEEL, 0600,
888 "cue%d", portnr + (boardnr * 64));
889 make_dev(&stl_ops, minor_dev + 160,
890 UID_ROOT, GID_WHEEL, 0600,
891 "cuie%d", portnr + (boardnr * 64));
892 make_dev(&stl_ops, minor_dev + 192,
893 UID_ROOT, GID_WHEEL, 0600,
894 "cule%d", portnr + (boardnr * 64));
895
896 /* sw ports */
897 make_dev(&stl_ops, minor_dev + 0x10000,
898 UID_ROOT, GID_WHEEL, 0600,
899 "ttyE%d", portnr + (boardnr * 64) + 32);
900 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
901 UID_ROOT, GID_WHEEL, 0600,
902 "ttyiE%d", portnr + (boardnr * 64) + 32);
903 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
904 UID_ROOT, GID_WHEEL, 0600,
905 "ttylE%d", portnr + (boardnr * 64) + 32);
906 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
907 UID_ROOT, GID_WHEEL, 0600,
908 "cue%d", portnr + (boardnr * 64) + 32);
909 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
910 UID_ROOT, GID_WHEEL, 0600,
911 "cuie%d", portnr + (boardnr * 64) + 32);
912 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
913 UID_ROOT, GID_WHEEL, 0600,
914 "cule%d", portnr + (boardnr * 64) + 32);
915 }
916 boardnr = brdp->brdnr;
917 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
918 0600, "staliomem%d", boardnr);
919
920 for (portnr = 0, minor_dev = boardnr * 0x100000;
921 portnr < 32; portnr++, minor_dev++) {
922 /* hw ports */
923 make_dev(&stl_ops, minor_dev,
924 UID_ROOT, GID_WHEEL, 0600,
925 "ttyE%d", portnr + (boardnr * 64));
926 make_dev(&stl_ops, minor_dev + 32,
927 UID_ROOT, GID_WHEEL, 0600,
928 "ttyiE%d", portnr + (boardnr * 64));
929 make_dev(&stl_ops, minor_dev + 64,
930 UID_ROOT, GID_WHEEL, 0600,
931 "ttylE%d", portnr + (boardnr * 64));
932 make_dev(&stl_ops, minor_dev + 128,
933 UID_ROOT, GID_WHEEL, 0600,
934 "cue%d", portnr + (boardnr * 64));
935 make_dev(&stl_ops, minor_dev + 160,
936 UID_ROOT, GID_WHEEL, 0600,
937 "cuie%d", portnr + (boardnr * 64));
938 make_dev(&stl_ops, minor_dev + 192,
939 UID_ROOT, GID_WHEEL, 0600,
940 "cule%d", portnr + (boardnr * 64));
941
942 /* sw ports */
943 make_dev(&stl_ops, minor_dev + 0x10000,
944 UID_ROOT, GID_WHEEL, 0600,
945 "ttyE%d", portnr + (boardnr * 64) + 32);
946 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
947 UID_ROOT, GID_WHEEL, 0600,
948 "ttyiE%d", portnr + (boardnr * 64) + 32);
949 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
950 UID_ROOT, GID_WHEEL, 0600,
951 "ttylE%d", portnr + (boardnr * 64) + 32);
952 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
953 UID_ROOT, GID_WHEEL, 0600,
954 "cue%d", portnr + (boardnr * 64) + 32);
955 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
956 UID_ROOT, GID_WHEEL, 0600,
957 "cuie%d", portnr + (boardnr * 64) + 32);
958 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
959 UID_ROOT, GID_WHEEL, 0600,
960 "cule%d", portnr + (boardnr * 64) + 32);
961 }
962
963 return(1);
964 }
965
966 /*****************************************************************************/
967
968 #if NPCI > 0
969
970 /*
971 * Probe specifically for the PCI boards. We need to be a little
972 * carefull here, since it looks sort like a Nat Semi IDE chip...
973 */
974
975 static const char *stlpciprobe(pcici_t tag, pcidi_t type)
976 {
977 unsigned long class;
978 int i, brdtype;
979
980 #if STLDEBUG
981 kprintf("stlpciprobe(tag=%x,type=%x)\n", (int) &tag, (int) type);
982 #endif
983
984 brdtype = 0;
985 for (i = 0; (i < stl_nrpcibrds); i++) {
986 if (((type & 0xffff) == stl_pcibrds[i].vendid) &&
987 (((type >> 16) & 0xffff) == stl_pcibrds[i].devid)) {
988 brdtype = stl_pcibrds[i].brdtype;
989 break;
990 }
991 }
992
993 if (brdtype == 0)
994 return((char *) NULL);
995
996 class = pci_conf_read(tag, PCI_CLASS_REG);
997 if ((class & PCI_CLASS_MASK) == PCI_CLASS_MASS_STORAGE)
998 return((char *) NULL);
999
1000 return(stl_brdnames[brdtype]);
1001 }
1002
1003 /*****************************************************************************/
1004
1005 /*
1006 * Allocate resources for and initialize the specified PCI board.
1007 */
1008
1009 void stlpciattach(pcici_t tag, int unit)
1010 {
1011 stlbrd_t *brdp;
1012 unsigned int bar[4];
1013 unsigned int id;
1014 int i;
1015 int boardnr, portnr, minor_dev;
1016
1017 #if STLDEBUG
1018 kprintf("stlpciattach(tag=%x,unit=%x)\n", (int) &tag, unit);
1019 #endif
1020
1021 brdp = kmalloc(sizeof(stlbrd_t), M_TTYS, M_WAITOK | M_ZERO);
1022
1023 if ((unit < 0) || (unit > STL_MAXBRDS)) {
1024 kprintf("STALLION: bad PCI board unit number=%d\n", unit);
1025 return;
1026 }
1027
1028 /*
1029 * Allocate us a new driver unique unit number.
1030 */
1031 if ((brdp->brdnr = stl_findfreeunit()) < 0) {
1032 kprintf("STALLION: too many boards found, max=%d\n",
1033 STL_MAXBRDS);
1034 return;
1035 }
1036 if (brdp->brdnr >= stl_nrbrds)
1037 stl_nrbrds = brdp->brdnr + 1;
1038
1039 /*
1040 * Determine what type of PCI board this is...
1041 */
1042 id = (unsigned int) pci_conf_read(tag, 0x0);
1043 for (i = 0; (i < stl_nrpcibrds); i++) {
1044 if (((id & 0xffff) == stl_pcibrds[i].vendid) &&
1045 (((id >> 16) & 0xffff) == stl_pcibrds[i].devid)) {
1046 brdp->brdtype = stl_pcibrds[i].brdtype;
1047 break;
1048 }
1049 }
1050
1051 if (i >= stl_nrpcibrds) {
1052 kprintf("STALLION: probed PCI board unknown type=%x\n", id);
1053 return;
1054 }
1055
1056 for (i = 0; (i < 4); i++)
1057 bar[i] = (unsigned int) pci_conf_read(tag, 0x10 + (i * 4)) &
1058 0xfffc;
1059
1060 switch (brdp->brdtype) {
1061 case BRD_ECH64PCI:
1062 brdp->ioaddr1 = bar[1];
1063 brdp->ioaddr2 = bar[2];
1064 break;
1065 case BRD_EASYIOPCI:
1066 brdp->ioaddr1 = bar[2];
1067 brdp->ioaddr2 = bar[1];
1068 break;
1069 case BRD_ECHPCI:
1070 brdp->ioaddr1 = bar[1];
1071 brdp->ioaddr2 = bar[0];
1072 break;
1073 default:
1074 kprintf("STALLION: unknown PCI board type=%d\n", brdp->brdtype);
1075 return;
1076 break;
1077 }
1078
1079 brdp->unitid = brdp->brdnr; /* PCI units auto-assigned */
1080 brdp->irq = ((int) pci_conf_read(tag, 0x3c)) & 0xff;
1081 brdp->irqtype = 0;
1082 if (pci_map_int(tag, stlpciintr, NULL) == 0) {
1083 kprintf("STALLION: failed to map interrupt irq=%d for unit=%d\n",
1084 brdp->irq, brdp->brdnr);
1085 return;
1086 }
1087
1088 stl_brdinit(brdp);
1089
1090 /* register devices for DEVFS */
1091 boardnr = brdp->brdnr;
1092 make_dev(&stl_ops, boardnr + 0x1000000, UID_ROOT, GID_WHEEL,
1093 0600, "staliomem%d", boardnr);
1094
1095 for (portnr = 0, minor_dev = boardnr * 0x100000;
1096 portnr < 32; portnr++, minor_dev++) {
1097 /* hw ports */
1098 make_dev(&stl_ops, minor_dev,
1099 UID_ROOT, GID_WHEEL, 0600,
1100 "ttyE%d", portnr + (boardnr * 64));
1101 make_dev(&stl_ops, minor_dev + 32,
1102 UID_ROOT, GID_WHEEL, 0600,
1103 "ttyiE%d", portnr + (boardnr * 64));
1104 make_dev(&stl_ops, minor_dev + 64,
1105 UID_ROOT, GID_WHEEL, 0600,
1106 "ttylE%d", portnr + (boardnr * 64));
1107 make_dev(&stl_ops, minor_dev + 128,
1108 UID_ROOT, GID_WHEEL, 0600,
1109 "cue%d", portnr + (boardnr * 64));
1110 make_dev(&stl_ops, minor_dev + 160,
1111 UID_ROOT, GID_WHEEL, 0600,
1112 "cuie%d", portnr + (boardnr * 64));
1113 make_dev(&stl_ops, minor_dev + 192,
1114 UID_ROOT, GID_WHEEL, 0600,
1115 "cule%d", portnr + (boardnr * 64));
1116
1117 /* sw ports */
1118 make_dev(&stl_ops, minor_dev + 0x10000,
1119 UID_ROOT, GID_WHEEL, 0600,
1120 "ttyE%d", portnr + (boardnr * 64) + 32);
1121 make_dev(&stl_ops, minor_dev + 32 + 0x10000,
1122 UID_ROOT, GID_WHEEL, 0600,
1123 "ttyiE%d", portnr + (boardnr * 64) + 32);
1124 make_dev(&stl_ops, minor_dev + 64 + 0x10000,
1125 UID_ROOT, GID_WHEEL, 0600,
1126 "ttylE%d", portnr + (boardnr * 64) + 32);
1127 make_dev(&stl_ops, minor_dev + 128 + 0x10000,
1128 UID_ROOT, GID_WHEEL, 0600,
1129 "cue%d", portnr + (boardnr * 64) + 32);
1130 make_dev(&stl_ops, minor_dev + 160 + 0x10000,
1131 UID_ROOT, GID_WHEEL, 0600,
1132 "cuie%d", portnr + (boardnr * 64) + 32);
1133 make_dev(&stl_ops, minor_dev + 192 + 0x10000,
1134 UID_ROOT, GID_WHEEL, 0600,
1135 "cule%d", portnr + (boardnr * 64) + 32);
1136 }
1137 }
1138
1139 #endif
1140
1141 /*****************************************************************************/
1142
1143 STATIC int stlopen(struct dev_open_args *ap)
1144 {
1145 cdev_t dev = ap->a_head.a_dev;
1146 struct tty *tp;
1147 stlport_t *portp;
1148 int error, callout;
1149
1150 #if STLDEBUG
1151 kprintf("stlopen(dev=%x,flag=%x,mode=%x,p=%x)\n", (int) dev, flag,
1152 mode, (int) p);
1153 #endif
1154
1155 /*
1156 * Firstly check if the supplied device number is a valid device.
1157 */
1158 if (minor(dev) & STL_MEMDEV)
1159 return(0);
1160
1161 portp = stl_dev2port(dev);
1162 if (portp == (stlport_t *) NULL)
1163 return(ENXIO);
1164 if (minor(dev) & STL_CTRLDEV)
1165 return(0);
1166 tp = &portp->tty;
1167 dev->si_tty = tp;
1168 callout = minor(dev) & STL_CALLOUTDEV;
1169 error = 0;
1170
1171 crit_enter();
1172
1173 stlopen_restart:
1174 /*
1175 * Wait here for the DTR drop timeout period to expire.
1176 */
1177 while (portp->state & ASY_DTRWAIT) {
1178 error = tsleep(&portp->dtrwait, PCATCH, "stldtr", 0);
1179 if (error)
1180 goto stlopen_end;
1181 }
1182
1183 /*
1184 * We have a valid device, so now we check if it is already open.
1185 * If not then initialize the port hardware and set up the tty
1186 * struct as required.
1187 */
1188 if ((tp->t_state & TS_ISOPEN) == 0) {
1189 tp->t_oproc = stl_start;
1190 tp->t_stop = stl_stop;
1191 tp->t_param = stl_param;
1192 tp->t_dev = dev;
1193 tp->t_termios = callout ? portp->initouttios :
1194 portp->initintios;
1195 stl_rawopen(portp);
1196 ttsetwater(tp);
1197 if ((portp->sigs & TIOCM_CD) || callout)
1198 (*linesw[tp->t_line].l_modem)(tp, 1);
1199 } else {
1200 if (callout) {
1201 if (portp->callout == 0) {
1202 error = EBUSY;
1203 goto stlopen_end;
1204 }
1205 } else {
1206 if (portp->callout != 0) {
1207 if (ap->a_oflags & O_NONBLOCK) {
1208 error = EBUSY;
1209 goto stlopen_end;
1210 }
1211 error = tsleep(&portp->callout,
1212 PCATCH, "stlcall", 0);
1213 if (error)
1214 goto stlopen_end;
1215 goto stlopen_restart;
1216 }
1217 }
1218 if ((tp->t_state & TS_XCLUDE) && priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) {
1219 error = EBUSY;
1220 goto stlopen_end;
1221 }
1222 }
1223
1224 /*
1225 * If this port is not the callout device and we do not have carrier
1226 * then we need to sleep, waiting for it to be asserted.
1227 */
1228 if (((tp->t_state & TS_CARR_ON) == 0) && !callout &&
1229 ((tp->t_cflag & CLOCAL) == 0) &&
1230 ((ap->a_oflags & O_NONBLOCK) == 0)) {
1231 portp->waitopens++;
1232 error = tsleep(TSA_CARR_ON(tp), PCATCH, "stldcd", 0);
1233 portp->waitopens--;
1234 if (error)
1235 goto stlopen_end;
1236 goto stlopen_restart;
1237 }
1238
1239 /*
1240 * Open the line discipline.
1241 */
1242 error = (*linesw[tp->t_line].l_open)(dev, tp);
1243 stl_ttyoptim(portp, &tp->t_termios);
1244 if ((tp->t_state & TS_ISOPEN) && callout)
1245 portp->callout = 1;
1246
1247 /*
1248 * If for any reason we get to here and the port is not actually
1249 * open then close of the physical hardware - no point leaving it
1250 * active when the open failed...
1251 */
1252 stlopen_end:
1253 crit_exit();
1254 if (((tp->t_state & TS_ISOPEN) == 0) && (portp->waitopens == 0))
1255 stl_rawclose(portp);
1256
1257 return(error);
1258 }
1259
1260 /*****************************************************************************/
1261
1262 STATIC int stlclose(struct dev_close_args *ap)
1263 {
1264 cdev_t dev = ap->a_head.a_dev;
1265 struct tty *tp;
1266 stlport_t *portp;
1267
1268 #if STLDEBUG
1269 kprintf("stlclose(dev=%s,flag=%x,mode=%x,p=%p)\n", devtoname(dev),
1270 flag, mode, (void *) p);
1271 #endif
1272
1273 if (minor(dev) & STL_MEMDEV)
1274 return(0);
1275 if (minor(dev) & STL_CTRLDEV)
1276 return(0);
1277
1278 portp = stl_dev2port(dev);
1279 if (portp == (stlport_t *) NULL)
1280 return(ENXIO);
1281 tp = &portp->tty;
1282
1283 crit_enter();
1284 (*linesw[tp->t_line].l_close)(tp, ap->a_fflag);
1285 stl_ttyoptim(portp, &tp->t_termios);
1286 stl_rawclose(portp);
1287 ttyclose(tp);
1288 crit_exit();
1289 return(0);
1290 }
1291
1292 /*****************************************************************************/
1293
1294 #if VFREEBSD >= 220
1295
1296 STATIC void stl_stop(struct tty *tp, int rw)
1297 {
1298 #if STLDEBUG
1299 kprintf("stl_stop(tp=%x,rw=%x)\n", (int) tp, rw);
1300 #endif
1301
1302 stl_flush((stlport_t *) tp, rw);
1303 }
1304
1305 #else
1306
1307 STATIC int stlstop(struct tty *tp, int rw)
1308 {
1309 #if STLDEBUG
1310 kprintf("stlstop(tp=%x,rw=%x)\n", (int) tp, rw);
1311 #endif
1312
1313 stl_flush((stlport_t *) tp, rw);
1314 return(0);
1315 }
1316
1317 #endif
1318
1319 /*****************************************************************************/
1320
1321 STATIC int stlioctl(struct dev_ioctl_args *ap)
1322 {
1323 cdev_t dev = ap->a_head.a_dev;
1324 u_long cmd = ap->a_cmd;
1325 caddr_t data = ap->a_data;
1326 struct termios *newtios, *localtios;
1327 struct tty *tp;
1328 stlport_t *portp;
1329 int error, i;
1330
1331 #if STLDEBUG
1332 kprintf("stlioctl(dev=%s,cmd=%lx,data=%p,flag=%x)\n",
1333 devtoname(dev), cmd, (void *) data, ap->a_fflag);
1334 #endif
1335
1336 if (minor(dev) & STL_MEMDEV)
1337 return(stl_memioctl(dev, cmd, data, ap->a_fflag));
1338
1339 portp = stl_dev2port(dev);
1340 if (portp == (stlport_t *) NULL)
1341 return(ENODEV);
1342 tp = &portp->tty;
1343 error = 0;
1344
1345 /*
1346 * First up handle ioctls on the control devices.
1347 */
1348 if (minor(dev) & STL_CTRLDEV) {
1349 if ((minor(dev) & STL_CTRLDEV) == STL_CTRLINIT)
1350 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1351 &portp->initouttios : &portp->initintios;
1352 else if ((minor(dev) & STL_CTRLDEV) == STL_CTRLLOCK)
1353 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1354 &portp->lockouttios : &portp->lockintios;
1355 else
1356 return(ENODEV);
1357
1358 switch (cmd) {
1359 case TIOCSETA:
1360 if ((error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) == 0)
1361 *localtios = *((struct termios *) data);
1362 break;
1363 case TIOCGETA:
1364 *((struct termios *) data) = *localtios;
1365 break;
1366 case TIOCGETD:
1367 *((int *) data) = TTYDISC;
1368 break;
1369 case TIOCGWINSZ:
1370 bzero(data, sizeof(struct winsize));
1371 break;
1372 default:
1373 error = ENOTTY;
1374 break;
1375 }
1376 return(error);
1377 }
1378
1379 /*
1380 * Deal with 4.3 compatibility issues if we have too...
1381 */
1382 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1383 if (1) {
1384 struct termios tios;
1385 unsigned long oldcmd;
1386
1387 tios = tp->t_termios;
1388 oldcmd = cmd;
1389 if ((error = ttsetcompat(tp, &cmd, data, &tios)))
1390 return(error);
1391 if (cmd != oldcmd)
1392 data = (caddr_t) &tios;
1393 }
1394 #endif
1395
1396 /*
1397 * Carry out some pre-cmd processing work first...
1398 * Hmmm, not so sure we want this, disable for now...
1399 */
1400 if ((cmd == TIOCSETA) || (cmd == TIOCSETAW) || (cmd == TIOCSETAF)) {
1401 newtios = (struct termios *) data;
1402 localtios = (minor(dev) & STL_CALLOUTDEV) ?
1403 &portp->lockouttios : &portp->lockintios;
1404
1405 newtios->c_iflag = (tp->t_iflag & localtios->c_iflag) |
1406 (newtios->c_iflag & ~localtios->c_iflag);
1407 newtios->c_oflag = (tp->t_oflag & localtios->c_oflag) |
1408 (newtios->c_oflag & ~localtios->c_oflag);
1409 newtios->c_cflag = (tp->t_cflag & localtios->c_cflag) |
1410 (newtios->c_cflag & ~localtios->c_cflag);
1411 newtios->c_lflag = (tp->t_lflag & localtios->c_lflag) |
1412 (newtios->c_lflag & ~localtios->c_lflag);
1413 for (i = 0; (i < NCCS); i++) {
1414 if (localtios->c_cc[i] != 0)
1415 newtios->c_cc[i] = tp->t_cc[i];
1416 }
1417 if (localtios->c_ispeed != 0)
1418 newtios->c_ispeed = tp->t_ispeed;
1419 if (localtios->c_ospeed != 0)
1420 newtios->c_ospeed = tp->t_ospeed;
1421 }
1422
1423 /*
1424 * Call the line discipline and the common command processing to
1425 * process this command (if they can).
1426 */
1427 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data,
1428 ap->a_fflag, ap->a_cred);
1429 if (error != ENOIOCTL)
1430 return(error);
1431
1432 crit_enter();
1433 error = ttioctl(tp, cmd, data, ap->a_fflag);
1434 stl_ttyoptim(portp, &tp->t_termios);
1435 if (error != ENOIOCTL) {
1436 crit_exit();
1437 return(error);
1438 }
1439
1440 error = 0;
1441
1442 /*
1443 * Process local commands here. These are all commands that only we
1444 * can take care of (they all rely on actually doing something special
1445 * to the actual hardware).
1446 */
1447 switch (cmd) {
1448 case TIOCSBRK:
1449 stl_sendbreak(portp, -1);
1450 break;
1451 case TIOCCBRK:
1452 stl_sendbreak(portp, -2);
1453 break;
1454 case TIOCSDTR:
1455 stl_setsignals(portp, 1, -1);
1456 break;
1457 case TIOCCDTR:
1458 stl_setsignals(portp, 0, -1);
1459 break;
1460 case TIOCMSET:
1461 i = *((int *) data);
1462 stl_setsignals(portp, ((i & TIOCM_DTR) ? 1 : 0),
1463 ((i & TIOCM_RTS) ? 1 : 0));
1464 break;
1465 case TIOCMBIS:
1466 i = *((int *) data);
1467 stl_setsignals(portp, ((i & TIOCM_DTR) ? 1 : -1),
1468 ((i & TIOCM_RTS) ? 1 : -1));
1469 break;
1470 case TIOCMBIC:
1471 i = *((int *) data);
1472 stl_setsignals(portp, ((i & TIOCM_DTR) ? 0 : -1),
1473 ((i & TIOCM_RTS) ? 0 : -1));
1474 break;
1475 case TIOCMGET:
1476 *((int *) data) = (stl_getsignals(portp) | TIOCM_LE);
1477 break;
1478 case TIOCMSDTRWAIT:
1479 if ((error = priv_check_cred(ap->a_cred, PRIV_ROOT, 0)) == 0)
1480 portp->dtrwait = *((int *) data) * hz / 100;
1481 break;
1482 case TIOCMGDTRWAIT:
1483 *((int *) data) = portp->dtrwait * 100 / hz;
1484 break;
1485 case TIOCTIMESTAMP:
1486 portp->dotimestamp = 1;
1487 *((struct timeval *) data) = portp->timestamp;
1488 break;
1489 default:
1490 error = ENOTTY;
1491 break;
1492 }
1493 crit_exit();
1494
1495 return(error);
1496 }
1497 /*****************************************************************************/
1498
1499 /*
1500 * Convert the specified minor device number into a port struct
1501 * pointer. Return NULL if the device number is not a valid port.
1502 */
1503
1504 STATIC stlport_t *stl_dev2port(cdev_t dev)
1505 {
1506 stlbrd_t *brdp;
1507
1508 brdp = stl_brds[MKDEV2BRD(dev)];
1509 if (brdp == (stlbrd_t *) NULL)
1510 return((stlport_t *) NULL);
1511 return(brdp->ports[MKDEV2PORT(dev)]);
1512 }
1513
1514 /*****************************************************************************/
1515
1516 /*
1517 * Initialize the port hardware. This involves enabling the transmitter
1518 * and receiver, setting the port configuration, and setting the initial
1519 * signal state.
1520 */
1521
1522 static int stl_rawopen(stlport_t *portp)
1523 {
1524 #if STLDEBUG
1525 kprintf("stl_rawopen(portp=%p): brdnr=%d panelnr=%d portnr=%d\n",
1526 (void *) portp, portp->brdnr, portp->panelnr, portp->portnr);
1527 #endif
1528
1529 stl_setport(portp, &portp->tty.t_termios);
1530 portp->sigs = stl_getsignals(portp);
1531 stl_setsignals(portp, 1, 1);
1532 stl_enablerxtx(portp, 1, 1);
1533 stl_startrxtx(portp, 1, 0);
1534 return(0);
1535 }
1536
1537 /*****************************************************************************/
1538
1539 /*
1540 * Shutdown the hardware of a port. Disable its transmitter and
1541 * receiver, and maybe drop signals if appropriate.
1542 */
1543
1544 static int stl_rawclose(stlport_t *portp)
1545 {
1546 struct tty *tp;
1547
1548 #if STLDEBUG
1549 kprintf("stl_rawclose(portp=%p): brdnr=%d panelnr=%d portnr=%d\n",
1550 (void *) portp, portp->brdnr, portp->panelnr, portp->portnr);
1551 #endif
1552
1553 tp = &portp->tty;
1554 stl_disableintrs(portp);
1555 stl_enablerxtx(portp, 0, 0);
1556 stl_flush(portp, (FWRITE | FREAD));
1557 if (tp->t_cflag & HUPCL) {
1558 stl_setsignals(portp, 0, 0);
1559 if (portp->dtrwait != 0) {
1560 portp->state |= ASY_DTRWAIT;
1561 callout_reset(&portp->dtr_ch, portp->dtrwait,
1562 stl_dtrwakeup, portp);
1563 }
1564 }
1565 portp->callout = 0;
1566 portp->brklen = 0;
1567 portp->state &= ~(ASY_ACTIVE | ASY_RTSFLOW);
1568 wakeup(&portp->callout);
1569 wakeup(TSA_CARR_ON(tp));
1570 return(0);
1571 }
1572
1573 /*****************************************************************************/
1574
1575 /*
1576 * Clear the DTR waiting flag, and wake up any sleepers waiting for
1577 * DTR wait period to finish.
1578 */
1579
1580 static void stl_dtrwakeup(void *arg)
1581 {
1582 stlport_t *portp;
1583
1584 portp = (stlport_t *) arg;
1585 portp->state &= ~ASY_DTRWAIT;
1586 wakeup(&portp->dtrwait);
1587 }
1588
1589 /*****************************************************************************/
1590
1591 /*
1592 * Start (or continue) the transfer of TX data on this port. If the
1593 * port is not currently busy then load up the interrupt ring queue
1594 * buffer and kick of the transmitter. If the port is running low on
1595 * TX data then refill the ring queue. This routine is also used to
1596 * activate input flow control!
1597 */
1598
1599 static void stl_start(struct tty *tp)
1600 {
1601 stlport_t *portp;
1602 unsigned int len, stlen;
1603 char *head, *tail;
1604 int count;
1605
1606 portp = (stlport_t *) tp;
1607
1608 #if STLDEBUG
1609 kprintf("stl_start(tp=%x): brdnr=%d portnr=%d\n", (int) tp,
1610 portp->brdnr, portp->portnr);
1611 #endif
1612
1613 crit_enter();
1614
1615 /*
1616 * Check if the ports input has been blocked, and take appropriate action.
1617 * Not very often do we really need to do anything, so make it quick.
1618 */
1619 if (tp->t_state & TS_TBLOCK) {
1620 if ((portp->state & ASY_RTSFLOWMODE) &&
1621 ((portp->state & ASY_RTSFLOW) == 0))
1622 stl_flowcontrol(portp, 0, -1);
1623 } else {
1624 if (portp->state & ASY_RTSFLOW)
1625 stl_flowcontrol(portp, 1, -1);
1626 }
1627
1628 #if VFREEBSD == 205
1629 /*
1630 * Check if the output cooked clist buffers are near empty, wake up
1631 * the line discipline to fill it up.
1632 */
1633 if (tp->t_outq.c_cc <= tp->t_lowat) {
1634 if (tp->t_state & TS_ASLEEP) {
1635 tp->t_state &= ~TS_ASLEEP;
1636 wakeup(&tp->t_outq);
1637 }
1638 selwakeup(&tp->t_wsel);
1639 }
1640 #endif
1641
1642 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
1643 crit_exit();
1644 return;
1645 }
1646
1647 /*
1648 * Copy data from the clists into the interrupt ring queue. This will
1649 * require at most 2 copys... What we do is calculate how many chars
1650 * can fit into the ring queue, and how many can fit in 1 copy. If after
1651 * the first copy there is still more room then do the second copy.
1652 * The beauty of this type of ring queue is that we do not need to
1653 * spl protect our-selves, since we only ever update the head pointer,
1654 * and the interrupt routine only ever updates the tail pointer.
1655 */
1656 if (tp->t_outq.c_cc != 0) {
1657 head = portp->tx.head;
1658 tail = portp->tx.tail;
1659 if (head >= tail) {
1660 len = STL_TXBUFSIZE - (head - tail) - 1;
1661 stlen = portp->tx.endbuf - head;
1662 } else {
1663 len = tail - head - 1;
1664 stlen = len;
1665 }
1666
1667 if (len > 0) {
1668 stlen = MIN(len, stlen);
1669 count = q_to_b(&tp->t_outq, head, stlen);
1670 len -= count;
1671 head += count;
1672 if (head >= portp->tx.endbuf) {
1673 head = portp->tx.buf;
1674 if (len > 0) {
1675 stlen = q_to_b(&tp->t_outq, head, len);
1676 head += stlen;
1677 count += stlen;
1678 }
1679 }
1680 portp->tx.head = head;
1681 if (count > 0)
1682 stl_startrxtx(portp, -1, 1);
1683 }
1684
1685 /*
1686 * If we sent something, make sure we are called again.
1687 */
1688 tp->t_state |= TS_BUSY;
1689 }
1690
1691 #if VFREEBSD != 205
1692 /*
1693 * Do any writer wakeups.
1694 */
1695 ttwwakeup(tp);
1696 #endif
1697
1698 crit_exit();
1699 }
1700
1701 /*****************************************************************************/
1702
1703 static void stl_flush(stlport_t *portp, int flag)
1704 {
1705 char *head, *tail;
1706 int len;
1707
1708 #if STLDEBUG
1709 kprintf("stl_flush(portp=%x,flag=%x)\n", (int) portp, flag);
1710 #endif
1711
1712 if (portp == (stlport_t *) NULL)
1713 return;
1714
1715 crit_enter();
1716
1717 if (flag & FWRITE) {
1718 stl_uartflush(portp, FWRITE);
1719 portp->tx.tail = portp->tx.head;
1720 }
1721
1722 /*
1723 * The only thing to watch out for when flushing the read side is
1724 * the RX status buffer. The interrupt code relys on the status
1725 * bytes as being zeroed all the time (it does not bother setting
1726 * a good char status to 0, it expects that it already will be).
1727 * We also need to un-flow the RX channel if flow control was
1728 * active.
1729 */
1730 if (flag & FREAD) {
1731 head = portp->rx.head;
1732 tail = portp->rx.tail;
1733 if (head != tail) {
1734 if (head >= tail) {
1735 len = head - tail;
1736 } else {
1737 len = portp->rx.endbuf - tail;
1738 bzero(portp->rxstatus.buf,
1739 (head - portp->rx.buf));
1740 }
1741 bzero((tail + STL_RXBUFSIZE), len);
1742 portp->rx.tail = head;
1743 }
1744
1745 if ((portp->state & ASY_RTSFLOW) &&
1746 ((portp->tty.t_state & TS_TBLOCK) == 0))
1747 stl_flowcontrol(portp, 1, -1);
1748 }
1749
1750 crit_exit();
1751 }
1752
1753 /*****************************************************************************/
1754
1755 /*
1756 * Interrupt handler for host based boards. Interrupts for all boards
1757 * are vectored through here.
1758 */
1759
1760 void stlintr(void *arg)
1761 {
1762 stlbrd_t *brdp;
1763 int i;
1764
1765 #if STLDEBUG
1766 kprintf("stlintr(unit=%d)\n", (int)arg);
1767 #endif
1768
1769 for (i = 0; (i < stl_nrbrds); i++) {
1770 if ((brdp = stl_brds[i]) == (stlbrd_t *) NULL)
1771 continue;
1772 if (brdp->state == 0)
1773 continue;
1774 (* brdp->isr)(brdp);
1775 }
1776 }
1777
1778 /*****************************************************************************/
1779
1780 #if NPCI > 0
1781
1782 static void stlpciintr(void *arg)
1783 {
1784 stlintr((void *)0);
1785 }
1786
1787 #endif
1788
1789 /*****************************************************************************/
1790
1791 /*
1792 * Interrupt service routine for EasyIO boards.
1793 */
1794
1795 static void stl_eiointr(stlbrd_t *brdp)
1796 {
1797 stlpanel_t *panelp;
1798 int iobase;
1799
1800 #if STLDEBUG
1801 kprintf("stl_eiointr(brdp=%p)\n", brdp);
1802 #endif
1803
1804 panelp = (stlpanel_t *) brdp->panels[0];
1805 iobase = panelp->iobase;
1806 while (inb(brdp->iostatus) & EIO_INTRPEND)
1807 (* panelp->isr)(panelp, iobase);
1808 }
1809
1810 /*
1811 * Interrupt service routine for ECH-AT board types.
1812 */
1813
1814 static void stl_echatintr(stlbrd_t *brdp)
1815 {
1816 stlpanel_t *panelp;
1817 unsigned int ioaddr;
1818 int bnknr;
1819
1820 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDENABLE));
1821
1822 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1823 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1824 ioaddr = brdp->bnkstataddr[bnknr];
1825 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1826 panelp = brdp->bnk2panel[bnknr];
1827 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1828 }
1829 }
1830 }
1831
1832 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDDISABLE));
1833 }
1834
1835 /*****************************************************************************/
1836
1837 /*
1838 * Interrupt service routine for ECH-MCA board types.
1839 */
1840
1841 static void stl_echmcaintr(stlbrd_t *brdp)
1842 {
1843 stlpanel_t *panelp;
1844 unsigned int ioaddr;
1845 int bnknr;
1846
1847 while (inb(brdp->iostatus) & ECH_INTRPEND) {
1848 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1849 ioaddr = brdp->bnkstataddr[bnknr];
1850 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1851 panelp = brdp->bnk2panel[bnknr];
1852 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1853 }
1854 }
1855 }
1856 }
1857
1858 /*****************************************************************************/
1859
1860 /*
1861 * Interrupt service routine for ECH-PCI board types.
1862 */
1863
1864 static void stl_echpciintr(stlbrd_t *brdp)
1865 {
1866 stlpanel_t *panelp;
1867 unsigned int ioaddr;
1868 int bnknr, recheck;
1869
1870 #if STLDEBUG
1871 kprintf("stl_echpciintr(brdp=%x)\n", (int) brdp);
1872 #endif
1873
1874 for (;;) {
1875 recheck = 0;
1876 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1877 outb(brdp->ioctrl, brdp->bnkpageaddr[bnknr]);
1878 ioaddr = brdp->bnkstataddr[bnknr];
1879 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1880 panelp = brdp->bnk2panel[bnknr];
1881 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1882 recheck++;
1883 }
1884 }
1885 if (! recheck)
1886 break;
1887 }
1888 }
1889
1890 /*****************************************************************************/
1891
1892 /*
1893 * Interrupt service routine for EC8/64-PCI board types.
1894 */
1895
1896 static void stl_echpci64intr(stlbrd_t *brdp)
1897 {
1898 stlpanel_t *panelp;
1899 unsigned int ioaddr;
1900 int bnknr;
1901
1902 #if STLDEBUG
1903 kprintf("stl_echpci64intr(brdp=%p)\n", brdp);
1904 #endif
1905
1906 while (inb(brdp->ioctrl) & 0x1) {
1907 for (bnknr = 0; (bnknr < brdp->nrbnks); bnknr++) {
1908 ioaddr = brdp->bnkstataddr[bnknr];
1909 #if STLDEBUG
1910 kprintf(" --> ioaddr=%x status=%x(%x)\n", ioaddr, inb(ioaddr) & ECH_PNLINTRPEND, inb(ioaddr));
1911 #endif
1912 if (inb(ioaddr) & ECH_PNLINTRPEND) {
1913 panelp = brdp->bnk2panel[bnknr];
1914 (* panelp->isr)(panelp, (ioaddr & 0xfffc));
1915 }
1916 }
1917 }
1918 }
1919
1920 /*****************************************************************************/
1921
1922 /*
1923 * If we haven't scheduled a timeout then do it, some port needs high
1924 * level processing.
1925 */
1926
1927 static void stl_dotimeout(void)
1928 {
1929 #if STLDEBUG
1930 kprintf("stl_dotimeout()\n");
1931 #endif
1932 if (stl_doingtimeout == 0) {
1933 if ((stl_poll_ch.c_flags & CALLOUT_DID_INIT) == 0)
1934 callout_init(&stl_poll_ch);
1935 callout_reset(&stl_poll_ch, 1, stl_poll, NULL);
1936 stl_doingtimeout++;
1937 }
1938 }
1939
1940 /*****************************************************************************/
1941
1942 /*
1943 * Service "software" level processing. Too slow or painfull to be done
1944 * at real hardware interrupt time. This way we might also be able to
1945 * do some service on other waiting ports as well...
1946 */
1947
1948 static void stl_poll(void *arg)
1949 {
1950 stlbrd_t *brdp;
1951 stlport_t *portp;
1952 struct tty *tp;
1953 int brdnr, portnr, rearm;
1954
1955 #if STLDEBUG
1956 kprintf("stl_poll()\n");
1957 #endif
1958
1959 stl_doingtimeout = 0;
1960 rearm = 0;
1961
1962 crit_enter();
1963 for (brdnr = 0; (brdnr < stl_nrbrds); brdnr++) {
1964 if ((brdp = stl_brds[brdnr]) == (stlbrd_t *) NULL)
1965 continue;
1966 for (portnr = 0; (portnr < brdp->nrports); portnr++) {
1967 if ((portp = brdp->ports[portnr]) == (stlport_t *) NULL)
1968 continue;
1969 if ((portp->state & ASY_ACTIVE) == 0)
1970 continue;
1971 tp = &portp->tty;
1972
1973 if (portp->state & ASY_RXDATA)
1974 stl_rxprocess(portp);
1975 if (portp->state & ASY_DCDCHANGE) {
1976 portp->state &= ~ASY_DCDCHANGE;
1977 portp->sigs = stl_getsignals(portp);
1978 (*linesw[tp->t_line].l_modem)(tp,
1979 (portp->sigs & TIOCM_CD));
1980 }
1981 if (portp->state & ASY_TXEMPTY) {
1982 if (stl_datastate(portp) == 0) {
1983 portp->state &= ~ASY_TXEMPTY;
1984 tp->t_state &= ~TS_BUSY;
1985 (*linesw[tp->t_line].l_start)(tp);
1986 }
1987 }
1988 if (portp->state & ASY_TXLOW) {
1989 portp->state &= ~ASY_TXLOW;
1990 (*linesw[tp->t_line].l_start)(tp);
1991 }
1992
1993 if (portp->state & ASY_ACTIVE)
1994 rearm++;
1995 }
1996 }
1997 crit_exit();
1998
1999 if (rearm)
2000 stl_dotimeout();
2001 }
2002
2003 /*****************************************************************************/
2004
2005 /*
2006 * Process the RX data that has been buffered up in the RX ring queue.
2007 */
2008
2009 static void stl_rxprocess(stlport_t *portp)
2010 {
2011 struct tty *tp;
2012 unsigned int len, stlen, lostlen;
2013 char *head, *tail;
2014 char status;
2015 int ch;
2016
2017 #if STLDEBUG
2018 kprintf("stl_rxprocess(portp=%x): brdnr=%d portnr=%d\n", (int) portp,
2019 portp->brdnr, portp->portnr);
2020 #endif
2021
2022 tp = &portp->tty;
2023 portp->state &= ~ASY_RXDATA;
2024
2025 if ((tp->t_state & TS_ISOPEN) == 0) {
2026 stl_flush(portp, FREAD);
2027 return;
2028 }
2029
2030 /*
2031 * Calculate the amount of data in the RX ring queue. Also calculate
2032 * the largest single copy size...
2033 */
2034 head = portp->rx.head;
2035 tail = portp->rx.tail;
2036 if (head >= tail) {
2037 len = head - tail;
2038 stlen = len;
2039 } else {
2040 len = STL_RXBUFSIZE - (tail - head);
2041 stlen = portp->rx.endbuf - tail;
2042 }
2043
2044 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
2045 if (len > 0) {
2046 if (((tp->t_rawq.c_cc + len) >= TTYHOG) &&
2047 ((portp->state & ASY_RTSFLOWMODE) ||
2048 (tp->t_iflag & IXOFF)) &&
2049 ((tp->t_state & TS_TBLOCK) == 0)) {
2050 ch = TTYHOG - tp->t_rawq.c_cc - 1;
2051 len = (ch > 0) ? ch : 0;
2052 stlen = MIN(stlen, len);
2053 ttyblock(tp);
2054 }
2055 lostlen = b_to_q(tail, stlen, &tp->t_rawq);
2056 tail += stlen;
2057 len -= stlen;
2058 if (tail >= portp->rx.endbuf) {
2059 tail = portp->rx.buf;
2060 lostlen += b_to_q(tail, len, &tp->t_rawq);
2061 tail += len;
2062 }
2063 portp->stats.rxlost += lostlen;
2064 ttwakeup(tp);
2065 portp->rx.tail = tail;
2066 }
2067 } else {
2068 while (portp->rx.tail != head) {
2069 ch = (unsigned char) *(portp->rx.tail);
2070 status = *(portp->rx.tail + STL_RXBUFSIZE);
2071 if (status) {
2072 *(portp->rx.tail + STL_RXBUFSIZE) = 0;
2073 if (status & ST_BREAK)
2074 ch |= TTY_BI;
2075 if (status & ST_FRAMING)
2076 ch |= TTY_FE;
2077 if (status & ST_PARITY)
2078 ch |= TTY_PE;
2079 if (status & ST_OVERRUN)
2080 ch |= TTY_OE;
2081 }
2082 (*linesw[tp->t_line].l_rint)(ch, tp);
2083 if (portp->rx.tail == head)
2084 break;
2085
2086 if (++(portp->rx.tail) >= portp->rx.endbuf)
2087 portp->rx.tail = portp->rx.buf;
2088 }
2089 }
2090
2091 if (head != portp->rx.tail)
2092 portp->state |= ASY_RXDATA;
2093
2094 /*
2095 * If we were flow controled then maybe the buffer is low enough that
2096 * we can re-activate it.
2097 */
2098 if ((portp->state & ASY_RTSFLOW) && ((tp->t_state & TS_TBLOCK) == 0))
2099 stl_flowcontrol(portp, 1, -1);
2100 }
2101
2102 /*****************************************************************************/
2103
2104 static int stl_param(struct tty *tp, struct termios *tiosp)
2105 {
2106 stlport_t *portp;
2107
2108 portp = (stlport_t *) tp;
2109 if (portp == (stlport_t *) NULL)
2110 return(ENODEV);
2111
2112 return(stl_setport(portp, tiosp));
2113 }
2114
2115 /*****************************************************************************/
2116
2117 /*
2118 * Action the flow control as required. The hw and sw args inform the
2119 * routine what flow control methods it should try.
2120 */
2121
2122 static void stl_flowcontrol(stlport_t *portp, int hw, int sw)
2123 {
2124 unsigned char *head, *tail;
2125 int len, hwflow;
2126
2127 #if STLDEBUG
2128 kprintf("stl_flowcontrol(portp=%x,hw=%d,sw=%d)\n", (int) portp, hw, sw);
2129 #endif
2130
2131 hwflow = -1;
2132
2133 if (portp->state & ASY_RTSFLOWMODE) {
2134 if (hw == 0) {
2135 if ((portp->state & ASY_RTSFLOW) == 0)
2136 hwflow = 0;
2137 } else if (hw > 0) {
2138 if (portp->state & ASY_RTSFLOW) {
2139 head = portp->rx.head;
2140 tail = portp->rx.tail;
2141 len = (head >= tail) ? (head - tail) :
2142 (STL_RXBUFSIZE - (tail - head));
2143 if (len < STL_RXBUFHIGH)
2144 hwflow = 1;
2145 }
2146 }
2147 }
2148
2149 /*
2150 * We have worked out what to do, if anything. So now apply it to the
2151 * UART port.
2152 */
2153 stl_sendflow(portp, hwflow, sw);
2154 }
2155
2156 /*****************************************************************************/
2157
2158 /*
2159 * Enable l_rint processing bypass mode if tty modes allow it.
2160 */
2161
2162 static void stl_ttyoptim(stlport_t *portp, struct termios *tiosp)
2163 {
2164 struct tty *tp;
2165
2166 tp = &portp->tty;
2167 if (((tiosp->c_iflag &
2168 (ICRNL | IGNCR | IMAXBEL | INLCR | ISTRIP)) == 0) &&
2169 (((tiosp->c_iflag & BRKINT) == 0) || (tiosp->c_iflag & IGNBRK)) &&
2170 (((tiosp->c_iflag & PARMRK) == 0) ||
2171 ((tiosp->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))) &&
2172 ((tiosp->c_lflag & (ECHO | ICANON | IEXTEN | ISIG | PENDIN)) ==0) &&
2173 (linesw[tp->t_line].l_rint == ttyinput))
2174 tp->t_state |= TS_CAN_BYPASS_L_RINT;
2175 else
2176 tp->t_state &= ~TS_CAN_BYPASS_L_RINT;
2177 portp->hotchar = linesw[tp->t_line].l_hotchar;
2178 }
2179
2180 /*****************************************************************************/
2181
2182 /*
2183 * Try and find and initialize all the ports on a panel. We don't care
2184 * what sort of board these ports are on - since the port io registers
2185 * are almost identical when dealing with ports.
2186 */
2187
2188 static int stl_initports(stlbrd_t *brdp, stlpanel_t *panelp)
2189 {
2190 stlport_t *portp;
2191 unsigned int chipmask;
2192 int i, j;
2193
2194 #if STLDEBUG
2195 kprintf("stl_initports(panelp=%x)\n", (int) panelp);
2196 #endif
2197
2198 chipmask = stl_panelinit(brdp, panelp);
2199
2200 /*
2201 * All UART's are initialized if found. Now go through and setup
2202 * each ports data structures. Also initialize each individual
2203 * UART port.
2204 */
2205 for (i = 0; (i < panelp->nrports); i++) {
2206 portp = kmalloc(sizeof(stlport_t), M_TTYS, M_WAITOK | M_ZERO);
2207
2208 portp->portnr = i;
2209 portp->brdnr = panelp->brdnr;
2210 portp->panelnr = panelp->panelnr;
2211 portp->uartp = panelp->uartp;
2212 portp->clk = brdp->clk;
2213 panelp->ports[i] = portp;
2214
2215 j = STL_TXBUFSIZE + (2 * STL_RXBUFSIZE);
2216 portp->tx.buf = kmalloc(j, M_TTYS, M_WAITOK);
2217 portp->tx.endbuf = portp->tx.buf + STL_TXBUFSIZE;
2218 portp->tx.head = portp->tx.buf;
2219 portp->tx.tail = portp->tx.buf;
2220 portp->rx.buf = portp->tx.buf + STL_TXBUFSIZE;
2221 portp->rx.endbuf = portp->rx.buf + STL_RXBUFSIZE;
2222 portp->rx.head = portp->rx.buf;
2223 portp->rx.tail = portp->rx.buf;
2224 portp->rxstatus.buf = portp->rx.buf + STL_RXBUFSIZE;
2225 portp->rxstatus.endbuf = portp->rxstatus.buf + STL_RXBUFSIZE;
2226 portp->rxstatus.head = portp->rxstatus.buf;
2227 portp->rxstatus.tail = portp->rxstatus.buf;
2228 bzero(portp->rxstatus.head, STL_RXBUFSIZE);
2229
2230 portp->initintios.c_ispeed = STL_DEFSPEED;
2231 portp->initintios.c_ospeed = STL_DEFSPEED;
2232 portp->initintios.c_cflag = STL_DEFCFLAG;
2233 portp->initintios.c_iflag = 0;
2234 portp->initintios.c_oflag = 0;
2235 portp->initintios.c_lflag = 0;
2236 bcopy(&ttydefchars[0], &portp->initintios.c_cc[0],
2237 sizeof(portp->initintios.c_cc));
2238 portp->initouttios = portp->initintios;
2239 portp->dtrwait = 3 * hz;
2240 callout_init(&portp->dtr_ch);
2241
2242 stl_portinit(brdp, panelp, portp);
2243 }
2244
2245 return(0);
2246 }
2247
2248 /*****************************************************************************/
2249
2250 /*
2251 * Try to find and initialize an EasyIO board.
2252 */
2253
2254 static int stl_initeio(stlbrd_t *brdp)
2255 {
2256 stlpanel_t *panelp;
2257 unsigned int status;
2258
2259 #if STLDEBUG
2260 kprintf("stl_initeio(brdp=%x)\n", (int) brdp);
2261 #endif
2262
2263 brdp->ioctrl = brdp->ioaddr1 + 1;
2264 brdp->iostatus = brdp->ioaddr1 + 2;
2265 brdp->clk = EIO_CLK;
2266 brdp->isr = stl_eiointr;
2267
2268 status = inb(brdp->iostatus);
2269 switch (status & EIO_IDBITMASK) {
2270 case EIO_8PORTM:
2271 brdp->clk = EIO_CLK8M;
2272 /* fall thru */
2273 case EIO_8PORTRS:
2274 case EIO_8PORTDI:
2275 brdp->nrports = 8;
2276 break;
2277 case EIO_4PORTRS:
2278 brdp->nrports = 4;
2279 break;
2280 case EIO_MK3:
2281 switch (status & EIO_BRDMASK) {
2282 case ID_BRD4:
2283 brdp->nrports = 4;
2284 break;
2285 case ID_BRD8:
2286 brdp->nrports = 8;
2287 break;
2288 case ID_BRD16:
2289 brdp->nrports = 16;
2290 break;
2291 default:
2292 return(ENODEV);
2293 }
2294 brdp->ioctrl++;
2295 break;
2296 default:
2297 return(ENODEV);
2298 }
2299
2300 if (brdp->brdtype == BRD_EASYIOPCI) {
2301 outb((brdp->ioaddr2 + 0x4c), 0x41);
2302 } else {
2303 /*
2304 * Check that the supplied IRQ is good and then use it to setup the
2305 * programmable interrupt bits on EIO board. Also set the edge/level
2306 * triggered interrupt bit.
2307 */
2308 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2309 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2310 kprintf("STALLION: invalid irq=%d for brd=%d\n",
2311 brdp->irq, brdp->brdnr);
2312 return(EINVAL);
2313 }
2314 outb(brdp->ioctrl, (stl_vecmap[brdp->irq] |
2315 ((brdp->irqtype) ? EIO_INTLEVEL : EIO_INTEDGE)));
2316 }
2317
2318 panelp = kmalloc(sizeof(stlpanel_t), M_TTYS, M_WAITOK | M_ZERO);
2319 panelp->brdnr = brdp->brdnr;
2320 panelp->panelnr = 0;
2321 panelp->nrports = brdp->nrports;
2322 panelp->iobase = brdp->ioaddr1;
2323 panelp->hwid = status;
2324 if ((status & EIO_IDBITMASK) == EIO_MK3) {
2325 panelp->uartp = (void *) &stl_sc26198uart;
2326 panelp->isr = stl_sc26198intr;
2327 } else {
2328 panelp->uartp = (void *) &stl_cd1400uart;
2329 panelp->isr = stl_cd1400eiointr;
2330 }
2331 brdp->panels[0] = panelp;
2332 brdp->nrpanels = 1;
2333 brdp->hwid = status;
2334 brdp->state |= BRD_FOUND;
2335 return(0);
2336 }
2337
2338 /*****************************************************************************/
2339
2340 /*
2341 * Try to find an ECH board and initialize it. This code is capable of
2342 * dealing with all types of ECH board.
2343 */
2344
2345 static int stl_initech(stlbrd_t *brdp)
2346 {
2347 stlpanel_t *panelp;
2348 unsigned int status, nxtid;
2349 int panelnr, ioaddr, banknr, i;
2350
2351 #if STLDEBUG
2352 kprintf("stl_initech(brdp=%x)\n", (int) brdp);
2353 #endif
2354
2355 /*
2356 * Set up the initial board register contents for boards. This varys a
2357 * bit between the different board types. So we need to handle each
2358 * separately. Also do a check that the supplied IRQ is good.
2359 */
2360 switch (brdp->brdtype) {
2361
2362 case BRD_ECH:
2363 brdp->isr = stl_echatintr;
2364 brdp->ioctrl = brdp->ioaddr1 + 1;
2365 brdp->iostatus = brdp->ioaddr1 + 1;
2366 status = inb(brdp->iostatus);
2367 if ((status & ECH_IDBITMASK) != ECH_ID)
2368 return(ENODEV);
2369 brdp->hwid = status;
2370
2371 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2372 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2373 kprintf("STALLION: invalid irq=%d for brd=%d\n",
2374 brdp->irq, brdp->brdnr);
2375 return(EINVAL);
2376 }
2377 status = ((brdp->ioaddr2 & ECH_ADDR2MASK) >> 1);
2378 status |= (stl_vecmap[brdp->irq] << 1);
2379 outb(brdp->ioaddr1, (status | ECH_BRDRESET));
2380 brdp->ioctrlval = ECH_INTENABLE |
2381 ((brdp->irqtype) ? ECH_INTLEVEL : ECH_INTEDGE);
2382 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDENABLE));
2383 outb(brdp->ioaddr1, status);
2384 break;
2385
2386 case BRD_ECHMC:
2387 brdp->isr = stl_echmcaintr;
2388 brdp->ioctrl = brdp->ioaddr1 + 0x20;
2389 brdp->iostatus = brdp->ioctrl;
2390 status = inb(brdp->iostatus);
2391 if ((status & ECH_IDBITMASK) != ECH_ID)
2392 return(ENODEV);
2393 brdp->hwid = status;
2394
2395 if ((brdp->irq < 0) || (brdp->irq > 15) ||
2396 (stl_vecmap[brdp->irq] == (unsigned char) 0xff)) {
2397 kprintf("STALLION: invalid irq=%d for brd=%d\n",
2398 brdp->irq, brdp->brdnr);
2399 return(EINVAL);
2400 }
2401 outb(brdp->ioctrl, ECHMC_BRDRESET);
2402 outb(brdp->ioctrl, ECHMC_INTENABLE);
2403 break;
2404
2405 case BRD_ECHPCI:
2406 brdp->isr = stl_echpciintr;
2407 brdp->ioctrl = brdp->ioaddr1 + 2;
2408 break;
2409
2410 case BRD_ECH64PCI:
2411 brdp->isr = stl_echpci64intr;
2412 brdp->ioctrl = brdp->ioaddr2 + 0x40;
2413 outb((brdp->ioaddr1 + 0x4c), 0x43);
2414 break;
2415
2416 default:
2417 kprintf("STALLION: unknown board type=%d\n", brdp->brdtype);
2418 break;
2419 }
2420
2421 brdp->clk = ECH_CLK;
2422
2423 /*
2424 * Scan through the secondary io address space looking for panels.
2425 * As we find'em allocate and initialize panel structures for each.
2426 */
2427 ioaddr = brdp->ioaddr2;
2428 panelnr = 0;
2429 nxtid = 0;
2430 banknr = 0;
2431
2432 for (i = 0; (i < STL_MAXPANELS); i++) {
2433 if (brdp->brdtype == BRD_ECHPCI) {
2434 outb(brdp->ioctrl, nxtid);
2435 ioaddr = brdp->ioaddr2;
2436 }
2437 status = inb(ioaddr + ECH_PNLSTATUS);
2438 if ((status & ECH_PNLIDMASK) != nxtid)
2439 break;
2440 panelp = kmalloc(sizeof(stlpanel_t), M_TTYS, M_WAITOK | M_ZERO);
2441 panelp->brdnr = brdp->brdnr;
2442 panelp->panelnr = panelnr;
2443 panelp->iobase = ioaddr;
2444 panelp->pagenr = nxtid;
2445 panelp->hwid = status;
2446 brdp->bnk2panel[banknr] = panelp;
2447 brdp->bnkpageaddr[banknr] = nxtid;
2448 brdp->bnkstataddr[banknr++] = ioaddr + ECH_PNLSTATUS;
2449
2450 if (status & ECH_PNLXPID) {
2451 panelp->uartp = (void *) &stl_sc26198uart;
2452 panelp->isr = stl_sc26198intr;
2453 if (status & ECH_PNL16PORT) {
2454 panelp->nrports = 16;
2455 brdp->bnk2panel[banknr] = panelp;
2456 brdp->bnkpageaddr[banknr] = nxtid;
2457 brdp->bnkstataddr[banknr++] = ioaddr + 4 +
2458 ECH_PNLSTATUS;
2459 } else {
2460 panelp->nrports = 8;
2461 }
2462 } else {
2463 panelp->uartp = (void *) &stl_cd1400uart;
2464 panelp->isr = stl_cd1400echintr;
2465 if (status & ECH_PNL16PORT) {
2466 panelp->nrports = 16;
2467 panelp->ackmask = 0x80;
2468 if (brdp->brdtype != BRD_ECHPCI)
2469 ioaddr += EREG_BANKSIZE;
2470 brdp->bnk2panel[banknr] = panelp;
2471 brdp->bnkpageaddr[banknr] = ++nxtid;
2472 brdp->bnkstataddr[banknr++] = ioaddr +
2473 ECH_PNLSTATUS;
2474 } else {
2475 panelp->nrports = 8;
2476 panelp->ackmask = 0xc0;
2477 }
2478 }
2479
2480 nxtid++;
2481 ioaddr += EREG_BANKSIZE;
2482 brdp->nrports += panelp->nrports;
2483 brdp->panels[panelnr++] = panelp;
2484 if ((brdp->brdtype == BRD_ECH) || (brdp->brdtype == BRD_ECHMC)){
2485 if (ioaddr >= (brdp->ioaddr2 + 0x20)) {
2486 kprintf("STALLION: too many ports attached "
2487 "to board %d, remove last module\n",
2488 brdp->brdnr);
2489 break;
2490 }
2491 }
2492 }
2493
2494 brdp->nrpanels = panelnr;
2495 brdp->nrbnks = banknr;
2496 if (brdp->brdtype == BRD_ECH)
2497 outb(brdp->ioctrl, (brdp->ioctrlval | ECH_BRDDISABLE));
2498
2499 brdp->state |= BRD_FOUND;
2500 return(0);
2501 }
2502
2503 /*****************************************************************************/
2504
2505 /*
2506 * Initialize and configure the specified board. This firstly probes
2507 * for the board, if it is found then the board is initialized and
2508 * then all its ports are initialized as well.
2509 */
2510
2511 static int stl_brdinit(stlbrd_t *brdp)
2512 {
2513 stlpanel_t *panelp;
2514 int i, j, k;
2515
2516 #if STLDEBUG
2517 kprintf("stl_brdinit(brdp=%x): unit=%d type=%d io1=%x io2=%x irq=%d\n",
2518 (int) brdp, brdp->brdnr, brdp->brdtype, brdp->ioaddr1,
2519 brdp->ioaddr2, brdp->irq);
2520 #endif
2521
2522 switch (brdp->brdtype) {
2523 case BRD_EASYIO:
2524 case BRD_EASYIOPCI:
2525 stl_initeio(brdp);
2526 break;
2527 case BRD_ECH:
2528 case BRD_ECHMC:
2529 case BRD_ECHPCI:
2530 case BRD_ECH64PCI:
2531 stl_initech(brdp);
2532 break;
2533 default:
2534 kprintf("STALLION: unit=%d is unknown board type=%d\n",
2535 brdp->brdnr, brdp->brdtype);
2536 return(ENODEV);
2537 }
2538
2539 stl_brds[brdp->brdnr] = brdp;
2540 if ((brdp->state & BRD_FOUND) == 0) {
2541 #if 0
2542 kprintf("STALLION: %s board not found, unit=%d io=%x irq=%d\n",
2543 stl_brdnames[brdp->brdtype], brdp->brdnr,
2544 brdp->ioaddr1, brdp->irq);
2545 #endif
2546 return(ENODEV);
2547 }
2548
2549 for (i = 0, k = 0; (i < STL_MAXPANELS); i++) {
2550 panelp = brdp->panels[i];
2551 if (panelp != (stlpanel_t *) NULL) {
2552 stl_initports(brdp, panelp);
2553 for (j = 0; (j < panelp->nrports); j++)
2554 brdp->ports[k++] = panelp->ports[j];
2555 }
2556 }
2557
2558 kprintf("stl%d: %s (driver version %s) unit=%d nrpanels=%d nrports=%d\n",
2559 brdp->unitid, stl_brdnames[brdp->brdtype], stl_drvversion,
2560 brdp->brdnr, brdp->nrpanels, brdp->nrports);
2561 return(0);
2562 }
2563
2564 /*****************************************************************************/
2565
2566 /*
2567 * Return the board stats structure to user app.
2568 */
2569
2570 static int stl_getbrdstats(caddr_t data)
2571 {
2572 stlbrd_t *brdp;
2573 stlpanel_t *panelp;
2574 int i;
2575
2576 stl_brdstats = *((combrd_t *) data);
2577 if (stl_brdstats.brd >= STL_MAXBRDS)
2578 return(-ENODEV);
2579 brdp = stl_brds[stl_brdstats.brd];
2580 if (brdp == (stlbrd_t *) NULL)
2581 return(-ENODEV);
2582
2583 bzero(&stl_brdstats, sizeof(combrd_t));
2584 stl_brdstats.brd = brdp->brdnr;
2585 stl_brdstats.type = brdp->brdtype;
2586 stl_brdstats.hwid = brdp->hwid;
2587 stl_brdstats.state = brdp->state;
2588 stl_brdstats.ioaddr = brdp->ioaddr1;
2589 stl_brdstats.ioaddr2 = brdp->ioaddr2;
2590 stl_brdstats.irq = brdp->irq;
2591 stl_brdstats.nrpanels = brdp->nrpanels;
2592 stl_brdstats.nrports = brdp->nrports;
2593 for (i = 0; (i < brdp->nrpanels); i++) {
2594 panelp = brdp->panels[i];
2595 stl_brdstats.panels[i].panel = i;
2596 stl_brdstats.panels[i].hwid = panelp->hwid;
2597 stl_brdstats.panels[i].nrports = panelp->nrports;
2598 }
2599
2600 *((combrd_t *) data) = stl_brdstats;
2601 return(0);
2602 }
2603
2604 /*****************************************************************************/
2605
2606 /*
2607 * Resolve the referenced port number into a port struct pointer.
2608 */
2609
2610 static stlport_t *stl_getport(int brdnr, int panelnr, int portnr)
2611 {
2612 stlbrd_t *brdp;
2613 stlpanel_t *panelp;
2614
2615 if ((brdnr < 0) || (brdnr >= STL_MAXBRDS))
2616 return((stlport_t *) NULL);
2617 brdp = stl_brds[brdnr];
2618 if (brdp == (stlbrd_t *) NULL)
2619 return((stlport_t *) NULL);
2620 if ((panelnr < 0) || (panelnr >= brdp->nrpanels))
2621 return((stlport_t *) NULL);
2622 panelp = brdp->panels[panelnr];
2623 if (panelp == (stlpanel_t *) NULL)
2624 return((stlport_t *) NULL);
2625 if ((portnr < 0) || (portnr >= panelp->nrports))
2626 return((stlport_t *) NULL);
2627 return(panelp->ports[portnr]);
2628 }
2629
2630 /*****************************************************************************/
2631
2632 /*
2633 * Return the port stats structure to user app. A NULL port struct
2634 * pointer passed in means that we need to find out from the app
2635 * what port to get stats for (used through board control device).
2636 */
2637
2638 static int stl_getportstats(stlport_t *portp, caddr_t data)
2639 {
2640 unsigned char *head, *tail;
2641
2642 if (portp == (stlport_t *) NULL) {
2643 stl_comstats = *((comstats_t *) data);
2644 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2645 stl_comstats.port);
2646 if (portp == (stlport_t *) NULL)
2647 return(-ENODEV);
2648 }
2649
2650 portp->stats.state = portp->state;
2651 /*portp->stats.flags = portp->flags;*/
2652 portp->stats.hwid = portp->hwid;
2653 portp->stats.ttystate = portp->tty.t_state;
2654 portp->stats.cflags = portp->tty.t_cflag;
2655 portp->stats.iflags = portp->tty.t_iflag;
2656 portp->stats.oflags = portp->tty.t_oflag;
2657 portp->stats.lflags = portp->tty.t_lflag;
2658
2659 head = portp->tx.head;
2660 tail = portp->tx.tail;
2661 portp->stats.txbuffered = ((head >= tail) ? (head - tail) :
2662 (STL_TXBUFSIZE - (tail - head)));
2663
2664 head = portp->rx.head;
2665 tail = portp->rx.tail;
2666 portp->stats.rxbuffered = (head >= tail) ? (head - tail) :
2667 (STL_RXBUFSIZE - (tail - head));
2668
2669 portp->stats.signals = (unsigned long) stl_getsignals(portp);
2670
2671 *((comstats_t *) data) = portp->stats;
2672 return(0);
2673 }
2674
2675 /*****************************************************************************/
2676
2677 /*
2678 * Clear the port stats structure. We also return it zeroed out...
2679 */
2680
2681 static int stl_clrportstats(stlport_t *portp, caddr_t data)
2682 {
2683 if (portp == (stlport_t *) NULL) {
2684 stl_comstats = *((comstats_t *) data);
2685 portp = stl_getport(stl_comstats.brd, stl_comstats.panel,
2686 stl_comstats.port);
2687 if (portp == (stlport_t *) NULL)
2688 return(ENODEV);
2689 }
2690
2691 bzero(&portp->stats, sizeof(comstats_t));
2692 portp->stats.brd = portp->brdnr;
2693 portp->stats.panel = portp->panelnr;
2694 portp->stats.port = portp->portnr;
2695 *((comstats_t *) data) = stl_comstats;
2696 return(0);
2697 }
2698
2699 /*****************************************************************************/
2700
2701 /*
2702 * The "staliomem" device is used for stats collection in this driver.
2703 */
2704
2705 static int stl_memioctl(cdev_t dev, unsigned long cmd, caddr_t data, int flag)
2706 {
2707 int rc;
2708
2709 #if STLDEBUG
2710 kprintf("stl_memioctl(dev=%s,cmd=%lx,data=%p,flag=%x)\n",
2711 devtoname(dev), cmd, (void *) data, flag);
2712 #endif
2713
2714 rc = 0;
2715
2716 switch (cmd) {
2717 case COM_GETPORTSTATS:
2718 rc = stl_getportstats((stlport_t *) NULL, data);
2719 break;
2720 case COM_CLRPORTSTATS:
2721 rc = stl_clrportstats((stlport_t *) NULL, data);
2722 break;
2723 case COM_GETBRDSTATS:
2724 rc = stl_getbrdstats(data);
2725 break;
2726 default:
2727 rc = ENOTTY;
2728 break;
2729 }
2730
2731 return(rc);
2732 }
2733
2734 /*****************************************************************************/
2735
2736 /*****************************************************************************/
2737 /* CD1400 UART CODE */
2738 /*****************************************************************************/
2739
2740 /*
2741 * These functions get/set/update the registers of the cd1400 UARTs.
2742 * Access to the cd1400 registers is via an address/data io port pair.
2743 */
2744
2745 static int stl_cd1400getreg(stlport_t *portp, int regnr)
2746 {
2747 outb(portp->ioaddr, (regnr + portp->uartaddr));
2748 return(inb(portp->ioaddr + EREG_DATA));
2749 }
2750
2751 /*****************************************************************************/
2752
2753 static void stl_cd1400setreg(stlport_t *portp, int regnr, int value)
2754 {
2755 outb(portp->ioaddr, (regnr + portp->uartaddr));
2756 outb((portp->ioaddr + EREG_DATA), value);
2757 }
2758
2759 /*****************************************************************************/
2760
2761 static int stl_cd1400updatereg(stlport_t *portp, int regnr, int value)
2762 {
2763 outb(portp->ioaddr, (regnr + portp->uartaddr));
2764 if (inb(portp->ioaddr + EREG_DATA) != value) {
2765 outb((portp->ioaddr + EREG_DATA), value);
2766 return(1);
2767 }
2768 return(0);
2769 }
2770
2771 /*****************************************************************************/
2772
2773 static void stl_cd1400flush(stlport_t *portp, int flag)
2774 {
2775
2776 #if STLDEBUG
2777 kprintf("stl_cd1400flush(portp=%x,flag=%x)\n", (int) portp, flag);
2778 #endif
2779
2780 if (portp == (stlport_t *) NULL)
2781 return;
2782
2783 crit_enter();
2784
2785 if (flag & FWRITE) {
2786 BRDENABLE(portp->brdnr, portp->pagenr);
2787 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
2788 stl_cd1400ccrwait(portp);
2789 stl_cd1400setreg(portp, CCR, CCR_TXFLUSHFIFO);
2790 stl_cd1400ccrwait(portp);
2791 BRDDISABLE(portp->brdnr);
2792 }
2793
2794 if (flag & FREAD) {
2795 /* Hmmm */
2796 }
2797
2798 crit_exit();
2799 }
2800
2801 /*****************************************************************************/
2802
2803 static void stl_cd1400ccrwait(stlport_t *portp)
2804 {
2805 int i;
2806
2807 for (i = 0; (i < CCR_MAXWAIT); i++) {
2808 if (stl_cd1400getreg(portp, CCR) == 0)
2809 return;
2810 }
2811
2812 kprintf("stl%d: cd1400 device not responding, panel=%d port=%d\n",
2813 portp->brdnr, portp->panelnr, portp->portnr);
2814 }
2815
2816 /*****************************************************************************/
2817
2818 /*
2819 * Transmit interrupt handler. This has gotta be fast! Handling TX
2820 * chars is pretty simple, stuff as many as possible from the TX buffer
2821 * into the cd1400 FIFO. Must also handle TX breaks here, since they
2822 * are embedded as commands in the data stream. Oh no, had to use a goto!
2823 */
2824
2825 static __inline void stl_cd1400txisr(stlpanel_t *panelp, int ioaddr)
2826 {
2827 struct tty *tp;
2828 stlport_t *portp;
2829 unsigned char ioack, srer;
2830 char *head, *tail;
2831 int len, stlen;
2832
2833 #if STLDEBUG
2834 kprintf("stl_cd1400txisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
2835 #endif
2836
2837 ioack = inb(ioaddr + EREG_TXACK);
2838 if (((ioack & panelp->ackmask) != 0) ||
2839 ((ioack & ACK_TYPMASK) != ACK_TYPTX)) {
2840 kprintf("STALLION: bad TX interrupt ack value=%x\n",
2841 ioack);
2842 return;
2843 }
2844 portp = panelp->ports[(ioack >> 3)];
2845 tp = &portp->tty;
2846
2847 /*
2848 * Unfortunately we need to handle breaks in the data stream, since
2849 * this is the only way to generate them on the cd1400. Do it now if
2850 * a break is to be sent. Some special cases here: brklen is -1 then
2851 * start sending an un-timed break, if brklen is -2 then stop sending
2852 * an un-timed break, if brklen is -3 then we have just sent an
2853 * un-timed break and do not want any data to go out, if brklen is -4
2854 * then a break has just completed so clean up the port settings.
2855 */
2856 if (portp->brklen != 0) {
2857 if (portp->brklen >= -1) {
2858 outb(ioaddr, (TDR + portp->uartaddr));
2859 outb((ioaddr + EREG_DATA), ETC_CMD);
2860 outb((ioaddr + EREG_DATA), ETC_STARTBREAK);
2861 if (portp->brklen > 0) {
2862 outb((ioaddr + EREG_DATA), ETC_CMD);
2863 outb((ioaddr + EREG_DATA), ETC_DELAY);
2864 outb((ioaddr + EREG_DATA), portp->brklen);
2865 outb((ioaddr + EREG_DATA), ETC_CMD);
2866 outb((ioaddr + EREG_DATA), ETC_STOPBREAK);
2867 portp->brklen = -4;
2868 } else {
2869 portp->brklen = -3;
2870 }
2871 } else if (portp->brklen == -2) {
2872 outb(ioaddr, (TDR + portp->uartaddr));
2873 outb((ioaddr + EREG_DATA), ETC_CMD);
2874 outb((ioaddr + EREG_DATA), ETC_STOPBREAK);
2875 portp->brklen = -4;
2876 } else if (portp->brklen == -3) {
2877 outb(ioaddr, (SRER + portp->uartaddr));
2878 srer = inb(ioaddr + EREG_DATA);
2879 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
2880 outb((ioaddr + EREG_DATA), srer);
2881 } else {
2882 outb(ioaddr, (COR2 + portp->uartaddr));
2883 outb((ioaddr + EREG_DATA),
2884 (inb(ioaddr + EREG_DATA) & ~COR2_ETC));
2885 portp->brklen = 0;
2886 }
2887 goto stl_txalldone;
2888 }
2889
2890 head = portp->tx.head;
2891 tail = portp->tx.tail;
2892 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
2893 if ((len == 0) || ((len < STL_TXBUFLOW) &&
2894 ((portp->state & ASY_TXLOW) == 0))) {
2895 portp->state |= ASY_TXLOW;
2896 stl_dotimeout();
2897 }
2898
2899 if (len == 0) {
2900 outb(ioaddr, (SRER + portp->uartaddr));
2901 srer = inb(ioaddr + EREG_DATA);
2902 if (srer & SRER_TXDATA) {
2903 srer = (srer & ~SRER_TXDATA) | SRER_TXEMPTY;
2904 } else {
2905 srer &= ~(SRER_TXDATA | SRER_TXEMPTY);
2906 portp->state |= ASY_TXEMPTY;
2907 portp->state &= ~ASY_TXBUSY;
2908 }
2909 outb((ioaddr + EREG_DATA), srer);
2910 } else {
2911 len = MIN(len, CD1400_TXFIFOSIZE);
2912 portp->stats.txtotal += len;
2913 stlen = MIN(len, (portp->tx.endbuf - tail));
2914 outb(ioaddr, (TDR + portp->uartaddr));
2915 outsb((ioaddr + EREG_DATA), tail, stlen);
2916 len -= stlen;
2917 tail += stlen;
2918 if (tail >= portp->tx.endbuf)
2919 tail = portp->tx.buf;
2920 if (len > 0) {
2921 outsb((ioaddr + EREG_DATA), tail, len);
2922 tail += len;
2923 }
2924 portp->tx.tail = tail;
2925 }
2926
2927 stl_txalldone:
2928 outb(ioaddr, (EOSRR + portp->uartaddr));
2929 outb((ioaddr + EREG_DATA), 0);
2930 }
2931
2932 /*****************************************************************************/
2933
2934 /*
2935 * Receive character interrupt handler. Determine if we have good chars
2936 * or bad chars and then process appropriately.
2937 */
2938
2939 static __inline void stl_cd1400rxisr(stlpanel_t *panelp, int ioaddr)
2940 {
2941 stlport_t *portp;
2942 struct tty *tp;
2943 unsigned int ioack, len, buflen, stlen;
2944 unsigned char status;
2945 char ch;
2946 char *head, *tail;
2947
2948 #if STLDEBUG
2949 kprintf("stl_cd1400rxisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
2950 #endif
2951
2952 ioack = inb(ioaddr + EREG_RXACK);
2953 if ((ioack & panelp->ackmask) != 0) {
2954 kprintf("STALLION: bad RX interrupt ack value=%x\n", ioack);
2955 return;
2956 }
2957 portp = panelp->ports[(ioack >> 3)];
2958 tp = &portp->tty;
2959
2960 /*
2961 * First up, calculate how much room there is in the RX ring queue.
2962 * We also want to keep track of the longest possible copy length,
2963 * this has to allow for the wrapping of the ring queue.
2964 */
2965 head = portp->rx.head;
2966 tail = portp->rx.tail;
2967 if (head >= tail) {
2968 buflen = STL_RXBUFSIZE - (head - tail) - 1;
2969 stlen = portp->rx.endbuf - head;
2970 } else {
2971 buflen = tail - head - 1;
2972 stlen = buflen;
2973 }
2974
2975 /*
2976 * Check if the input buffer is near full. If so then we should take
2977 * some flow control action... It is very easy to do hardware and
2978 * software flow control from here since we have the port selected on
2979 * the UART.
2980 */
2981 if (buflen <= (STL_RXBUFSIZE - STL_RXBUFHIGH)) {
2982 if (((portp->state & ASY_RTSFLOW) == 0) &&
2983 (portp->state & ASY_RTSFLOWMODE)) {
2984 portp->state |= ASY_RTSFLOW;
2985 stl_cd1400setreg(portp, MCOR1,
2986 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
2987 stl_cd1400setreg(portp, MSVR2, 0);
2988 portp->stats.rxrtsoff++;
2989 }
2990 }
2991
2992 /*
2993 * OK we are set, process good data... If the RX ring queue is full
2994 * just chuck the chars - don't leave them in the UART.
2995 */
2996 if ((ioack & ACK_TYPMASK) == ACK_TYPRXGOOD) {
2997 outb(ioaddr, (RDCR + portp->uartaddr));
2998 len = inb(ioaddr + EREG_DATA);
2999 if (buflen == 0) {
3000 outb(ioaddr, (RDSR + portp->uartaddr));
3001 insb((ioaddr + EREG_DATA), &stl_unwanted[0], len);
3002 portp->stats.rxlost += len;
3003 portp->stats.rxtotal += len;
3004 } else {
3005 len = MIN(len, buflen);
3006 portp->stats.rxtotal += len;
3007 stlen = MIN(len, stlen);
3008 if (len > 0) {
3009 outb(ioaddr, (RDSR + portp->uartaddr));
3010 insb((ioaddr + EREG_DATA), head, stlen);
3011 head += stlen;
3012 if (head >= portp->rx.endbuf) {
3013 head = portp->rx.buf;
3014 len -= stlen;
3015 insb((ioaddr + EREG_DATA), head, len);
3016 head += len;
3017 }
3018 }
3019 }
3020 } else if ((ioack & ACK_TYPMASK) == ACK_TYPRXBAD) {
3021 outb(ioaddr, (RDSR + portp->uartaddr));
3022 status = inb(ioaddr + EREG_DATA);
3023 ch = inb(ioaddr + EREG_DATA);
3024 if (status & ST_BREAK)
3025 portp->stats.rxbreaks++;
3026 if (status & ST_FRAMING)
3027 portp->stats.rxframing++;
3028 if (status & ST_PARITY)
3029 portp->stats.rxparity++;
3030 if (status & ST_OVERRUN)
3031 portp->stats.rxoverrun++;
3032 if (status & ST_SCHARMASK) {
3033 if ((status & ST_SCHARMASK) == ST_SCHAR1)
3034 portp->stats.txxon++;
3035 if ((status & ST_SCHARMASK) == ST_SCHAR2)
3036 portp->stats.txxoff++;
3037 goto stl_rxalldone;
3038 }
3039 if ((portp->rxignoremsk & status) == 0) {
3040 if ((tp->t_state & TS_CAN_BYPASS_L_RINT) &&
3041 ((status & ST_FRAMING) ||
3042 ((status & ST_PARITY) && (tp->t_iflag & INPCK))))
3043 ch = 0;
3044 if ((portp->rxmarkmsk & status) == 0)
3045 status = 0;
3046 *(head + STL_RXBUFSIZE) = status;
3047 *head++ = ch;
3048 if (head >= portp->rx.endbuf)
3049 head = portp->rx.buf;
3050 }
3051 } else {
3052 kprintf("STALLION: bad RX interrupt ack value=%x\n", ioack);
3053 return;
3054 }
3055
3056 portp->rx.head = head;
3057 portp->state |= ASY_RXDATA;
3058 stl_dotimeout();
3059
3060 stl_rxalldone:
3061 outb(ioaddr, (EOSRR + portp->uartaddr));
3062 outb((ioaddr + EREG_DATA), 0);
3063 }
3064
3065 /*****************************************************************************/
3066
3067 /*
3068 * Modem interrupt handler. The is called when the modem signal line
3069 * (DCD) has changed state.
3070 */
3071
3072 static __inline void stl_cd1400mdmisr(stlpanel_t *panelp, int ioaddr)
3073 {
3074 stlport_t *portp;
3075 unsigned int ioack;
3076 unsigned char misr;
3077
3078 #if STLDEBUG
3079 kprintf("stl_cd1400mdmisr(panelp=%x,ioaddr=%x)\n", (int) panelp, ioaddr);
3080 #endif
3081
3082 ioack = inb(ioaddr + EREG_MDACK);
3083 if (((ioack & panelp->ackmask) != 0) ||
3084 ((ioack & ACK_TYPMASK) != ACK_TYPMDM)) {
3085 kprintf("STALLION: bad MODEM interrupt ack value=%x\n", ioack);
3086 return;
3087 }
3088 portp = panelp->ports[(ioack >> 3)];
3089
3090 outb(ioaddr, (MISR + portp->uartaddr));
3091 misr = inb(ioaddr + EREG_DATA);
3092 if (misr & MISR_DCD) {
3093 portp->state |= ASY_DCDCHANGE;
3094 portp->stats.modem++;
3095 stl_dotimeout();
3096 }
3097
3098 outb(ioaddr, (EOSRR + portp->uartaddr));
3099 outb((ioaddr + EREG_DATA), 0);
3100 }
3101
3102 /*****************************************************************************/
3103
3104 /*
3105 * Interrupt service routine for cd1400 EasyIO boards.
3106 */
3107
3108 static void stl_cd1400eiointr(stlpanel_t *panelp, unsigned int iobase)
3109 {
3110 unsigned char svrtype;
3111
3112 #if STLDEBUG
3113 kprintf("stl_cd1400eiointr(panelp=%x,iobase=%x)\n", (int) panelp,
3114 iobase);
3115 #endif
3116
3117 outb(iobase, SVRR);
3118 svrtype = inb(iobase + EREG_DATA);
3119 if (panelp->nrports > 4) {
3120 outb(iobase, (SVRR + 0x80));
3121 svrtype |= inb(iobase + EREG_DATA);
3122 }
3123 #if STLDEBUG
3124 kprintf("stl_cd1400eiointr(panelp=%x,iobase=%x): svrr=%x\n", (int) panelp, iobase, svrtype);
3125 #endif
3126
3127 if (svrtype & SVRR_RX)
3128 stl_cd1400rxisr(panelp, iobase);
3129 else if (svrtype & SVRR_TX)
3130 stl_cd1400txisr(panelp, iobase);
3131 else if (svrtype & SVRR_MDM)
3132 stl_cd1400mdmisr(panelp, iobase);
3133 }
3134
3135 /*****************************************************************************/
3136
3137 /*
3138 * Interrupt service routine for cd1400 panels.
3139 */
3140
3141 static void stl_cd1400echintr(stlpanel_t *panelp, unsigned int iobase)
3142 {
3143 unsigned char svrtype;
3144
3145 #if STLDEBUG
3146 kprintf("stl_cd1400echintr(panelp=%x,iobase=%x)\n", (int) panelp,
3147 iobase);
3148 #endif
3149
3150 outb(iobase, SVRR);
3151 svrtype = inb(iobase + EREG_DATA);
3152 outb(iobase, (SVRR + 0x80));
3153 svrtype |= inb(iobase + EREG_DATA);
3154 if (svrtype & SVRR_RX)
3155 stl_cd1400rxisr(panelp, iobase);
3156 else if (svrtype & SVRR_TX)
3157 stl_cd1400txisr(panelp, iobase);
3158 else if (svrtype & SVRR_MDM)
3159 stl_cd1400mdmisr(panelp, iobase);
3160 }
3161
3162 /*****************************************************************************/
3163
3164 /*
3165 * Set up the cd1400 registers for a port based on the termios port
3166 * settings.
3167 */
3168
3169 static int stl_cd1400setport(stlport_t *portp, struct termios *tiosp)
3170 {
3171 unsigned int clkdiv;
3172 unsigned char cor1, cor2, cor3;
3173 unsigned char cor4, cor5, ccr;
3174 unsigned char srer, sreron, sreroff;
3175 unsigned char mcor1, mcor2, rtpr;
3176 unsigned char clk, div;
3177
3178 #if STLDEBUG
3179 kprintf("stl_cd1400setport(portp=%x,tiosp=%x): brdnr=%d portnr=%d\n",
3180 (int) portp, (int) tiosp, portp->brdnr, portp->portnr);
3181 #endif
3182
3183 cor1 = 0;
3184 cor2 = 0;
3185 cor3 = 0;
3186 cor4 = 0;
3187 cor5 = 0;
3188 ccr = 0;
3189 rtpr = 0;
3190 clk = 0;
3191 div = 0;
3192 mcor1 = 0;
3193 mcor2 = 0;
3194 sreron = 0;
3195 sreroff = 0;
3196
3197 /*
3198 * Set up the RX char ignore mask with those RX error types we
3199 * can ignore. We could have used some special modes of the cd1400
3200 * UART to help, but it is better this way because we can keep stats
3201 * on the number of each type of RX exception event.
3202 */
3203 portp->rxignoremsk = 0;
3204 if (tiosp->c_iflag & IGNPAR)
3205 portp->rxignoremsk |= (ST_PARITY | ST_FRAMING | ST_OVERRUN);
3206 if (tiosp->c_iflag & IGNBRK)
3207 portp->rxignoremsk |= ST_BREAK;
3208
3209 portp->rxmarkmsk = ST_OVERRUN;
3210 if (tiosp->c_iflag & (INPCK | PARMRK))
3211 portp->rxmarkmsk |= (ST_PARITY | ST_FRAMING);
3212 if (tiosp->c_iflag & BRKINT)
3213 portp->rxmarkmsk |= ST_BREAK;
3214
3215 /*
3216 * Go through the char size, parity and stop bits and set all the
3217 * option registers appropriately.
3218 */
3219 switch (tiosp->c_cflag & CSIZE) {
3220 case CS5:
3221 cor1 |= COR1_CHL5;
3222 break;
3223 case CS6:
3224 cor1 |= COR1_CHL6;
3225 break;
3226 case CS7:
3227 cor1 |= COR1_CHL7;
3228 break;
3229 default:
3230 cor1 |= COR1_CHL8;
3231 break;
3232 }
3233
3234 if (tiosp->c_cflag & CSTOPB)
3235 cor1 |= COR1_STOP2;
3236 else
3237 cor1 |= COR1_STOP1;
3238
3239 if (tiosp->c_cflag & PARENB) {
3240 if (tiosp->c_cflag & PARODD)
3241 cor1 |= (COR1_PARENB | COR1_PARODD);
3242 else
3243 cor1 |= (COR1_PARENB | COR1_PAREVEN);
3244 } else {
3245 cor1 |= COR1_PARNONE;
3246 }
3247
3248 /*
3249 * Set the RX FIFO threshold at 6 chars. This gives a bit of breathing
3250 * space for hardware flow control and the like. This should be set to
3251 * VMIN. Also here we will set the RX data timeout to 10ms - this should
3252 * really be based on VTIME...
3253 */
3254 cor3 |= FIFO_RXTHRESHOLD;
3255 rtpr = 2;
3256
3257 /*
3258 * Calculate the baud rate timers. For now we will just assume that
3259 * the input and output baud are the same. Could have used a baud
3260 * table here, but this way we can generate virtually any baud rate
3261 * we like!
3262 */
3263 if (tiosp->c_ispeed == 0)
3264 tiosp->c_ispeed = tiosp->c_ospeed;
3265 if ((tiosp->c_ospeed < 0) || (tiosp->c_ospeed > CD1400_MAXBAUD))
3266 return(EINVAL);
3267
3268 if (tiosp->c_ospeed > 0) {
3269 for (clk = 0; (clk < CD1400_NUMCLKS); clk++) {
3270 clkdiv = ((portp->clk / stl_cd1400clkdivs[clk]) /
3271 tiosp->c_ospeed);
3272 if (clkdiv < 0x100)
3273 break;
3274 }
3275 div = (unsigned char) clkdiv;
3276 }
3277
3278 /*
3279 * Check what form of modem signaling is required and set it up.
3280 */
3281 if ((tiosp->c_cflag & CLOCAL) == 0) {
3282 mcor1 |= MCOR1_DCD;
3283 mcor2 |= MCOR2_DCD;
3284 sreron |= SRER_MODEM;
3285 }
3286
3287 /*
3288 * Setup cd1400 enhanced modes if we can. In particular we want to
3289 * handle as much of the flow control as possbile automatically. As
3290 * well as saving a few CPU cycles it will also greatly improve flow
3291 * control reliablilty.
3292 */
3293 if (tiosp->c_iflag & IXON) {
3294 cor2 |= COR2_TXIBE;
3295 cor3 |= COR3_SCD12;
3296 if (tiosp->c_iflag & IXANY)
3297 cor2 |= COR2_IXM;
3298 }
3299
3300 if (tiosp->c_cflag & CCTS_OFLOW)
3301 cor2 |= COR2_CTSAE;
3302 if (tiosp->c_cflag & CRTS_IFLOW)
3303 mcor1 |= FIFO_RTSTHRESHOLD;
3304
3305 /*
3306 * All cd1400 register values calculated so go through and set them
3307 * all up.
3308 */
3309 #if STLDEBUG
3310 kprintf("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", portp->portnr,
3311 portp->panelnr, portp->brdnr);
3312 kprintf(" cor1=%x cor2=%x cor3=%x cor4=%x cor5=%x\n", cor1, cor2,
3313 cor3, cor4, cor5);
3314 kprintf(" mcor1=%x mcor2=%x rtpr=%x sreron=%x sreroff=%x\n",
3315 mcor1, mcor2, rtpr, sreron, sreroff);
3316 kprintf(" tcor=%x tbpr=%x rcor=%x rbpr=%x\n", clk, div, clk, div);
3317 kprintf(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
3318 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP], tiosp->c_cc[VSTART],
3319 tiosp->c_cc[VSTOP]);
3320 #endif
3321
3322 crit_enter();
3323 BRDENABLE(portp->brdnr, portp->pagenr);
3324 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3325 srer = stl_cd1400getreg(portp, SRER);
3326 stl_cd1400setreg(portp, SRER, 0);
3327 ccr += stl_cd1400updatereg(portp, COR1, cor1);
3328 ccr += stl_cd1400updatereg(portp, COR2, cor2);
3329 ccr += stl_cd1400updatereg(portp, COR3, cor3);
3330 if (ccr) {
3331 stl_cd1400ccrwait(portp);
3332 stl_cd1400setreg(portp, CCR, CCR_CORCHANGE);
3333 }
3334 stl_cd1400setreg(portp, COR4, cor4);
3335 stl_cd1400setreg(portp, COR5, cor5);
3336 stl_cd1400setreg(portp, MCOR1, mcor1);
3337 stl_cd1400setreg(portp, MCOR2, mcor2);
3338 if (tiosp->c_ospeed == 0) {
3339 stl_cd1400setreg(portp, MSVR1, 0);
3340 } else {
3341 stl_cd1400setreg(portp, MSVR1, MSVR1_DTR);
3342 stl_cd1400setreg(portp, TCOR, clk);
3343 stl_cd1400setreg(portp, TBPR, div);
3344 stl_cd1400setreg(portp, RCOR, clk);
3345 stl_cd1400setreg(portp, RBPR, div);
3346 }
3347 stl_cd1400setreg(portp, SCHR1, tiosp->c_cc[VSTART]);
3348 stl_cd1400setreg(portp, SCHR2, tiosp->c_cc[VSTOP]);
3349 stl_cd1400setreg(portp, SCHR3, tiosp->c_cc[VSTART]);
3350 stl_cd1400setreg(portp, SCHR4, tiosp->c_cc[VSTOP]);
3351 stl_cd1400setreg(portp, RTPR, rtpr);
3352 mcor1 = stl_cd1400getreg(portp, MSVR1);
3353 if (mcor1 & MSVR1_DCD)
3354 portp->sigs |= TIOCM_CD;
3355 else
3356 portp->sigs &= ~TIOCM_CD;
3357 stl_cd1400setreg(portp, SRER, ((srer & ~sreroff) | sreron));
3358 BRDDISABLE(portp->brdnr);
3359 portp->state &= ~(ASY_RTSFLOWMODE | ASY_CTSFLOWMODE);
3360 portp->state |= ((tiosp->c_cflag & CRTS_IFLOW) ? ASY_RTSFLOWMODE : 0);
3361 portp->state |= ((tiosp->c_cflag & CCTS_OFLOW) ? ASY_CTSFLOWMODE : 0);
3362 stl_ttyoptim(portp, tiosp);
3363 crit_exit();
3364
3365 return(0);
3366 }
3367
3368 /*****************************************************************************/
3369
3370 /*
3371 * Action the flow control as required. The hw and sw args inform the
3372 * routine what flow control methods it should try.
3373 */
3374
3375 static void stl_cd1400sendflow(stlport_t *portp, int hw, int sw)
3376 {
3377
3378 #if STLDEBUG
3379 kprintf("stl_cd1400sendflow(portp=%x,hw=%d,sw=%d)\n",
3380 (int) portp, hw, sw);
3381 #endif
3382
3383 crit_enter();
3384 BRDENABLE(portp->brdnr, portp->pagenr);
3385 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3386
3387 if (sw >= 0) {
3388 stl_cd1400ccrwait(portp);
3389 if (sw) {
3390 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR2);
3391 portp->stats.rxxoff++;
3392 } else {
3393 stl_cd1400setreg(portp, CCR, CCR_SENDSCHR1);
3394 portp->stats.rxxon++;
3395 }
3396 stl_cd1400ccrwait(portp);
3397 }
3398
3399 if (hw == 0) {
3400 portp->state |= ASY_RTSFLOW;
3401 stl_cd1400setreg(portp, MCOR1,
3402 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3403 stl_cd1400setreg(portp, MSVR2, 0);
3404 portp->stats.rxrtsoff++;
3405 } else if (hw > 0) {
3406 portp->state &= ~ASY_RTSFLOW;
3407 stl_cd1400setreg(portp, MSVR2, MSVR2_RTS);
3408 stl_cd1400setreg(portp, MCOR1,
3409 (stl_cd1400getreg(portp, MCOR1) | FIFO_RTSTHRESHOLD));
3410 portp->stats.rxrtson++;
3411 }
3412
3413 BRDDISABLE(portp->brdnr);
3414 crit_exit();
3415 }
3416
3417 /*****************************************************************************/
3418
3419 /*
3420 * Return the current state of data flow on this port. This is only
3421 * really interresting when determining if data has fully completed
3422 * transmission or not... This is easy for the cd1400, it accurately
3423 * maintains the busy port flag.
3424 */
3425
3426 static int stl_cd1400datastate(stlport_t *portp)
3427 {
3428 #if STLDEBUG
3429 kprintf("stl_cd1400datastate(portp=%x)\n", (int) portp);
3430 #endif
3431
3432 if (portp == (stlport_t *) NULL)
3433 return(0);
3434
3435 return((portp->state & ASY_TXBUSY) ? 1 : 0);
3436 }
3437
3438 /*****************************************************************************/
3439
3440 /*
3441 * Set the state of the DTR and RTS signals. Got to do some extra
3442 * work here to deal hardware flow control.
3443 */
3444
3445 static void stl_cd1400setsignals(stlport_t *portp, int dtr, int rts)
3446 {
3447 unsigned char msvr1, msvr2;
3448
3449 #if STLDEBUG
3450 kprintf("stl_cd1400setsignals(portp=%x,dtr=%d,rts=%d)\n", (int) portp,
3451 dtr, rts);
3452 #endif
3453
3454 msvr1 = 0;
3455 msvr2 = 0;
3456 if (dtr > 0)
3457 msvr1 = MSVR1_DTR;
3458 if (rts > 0)
3459 msvr2 = MSVR2_RTS;
3460
3461 crit_enter();
3462 BRDENABLE(portp->brdnr, portp->pagenr);
3463 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3464 if (rts >= 0) {
3465 if (portp->tty.t_cflag & CRTS_IFLOW) {
3466 if (rts == 0) {
3467 stl_cd1400setreg(portp, MCOR1,
3468 (stl_cd1400getreg(portp, MCOR1) & 0xf0));
3469 portp->stats.rxrtsoff++;
3470 } else {
3471 stl_cd1400setreg(portp, MCOR1,
3472 (stl_cd1400getreg(portp, MCOR1) |
3473 FIFO_RTSTHRESHOLD));
3474 portp->stats.rxrtson++;
3475 }
3476 }
3477 stl_cd1400setreg(portp, MSVR2, msvr2);
3478 }
3479 if (dtr >= 0)
3480 stl_cd1400setreg(portp, MSVR1, msvr1);
3481 BRDDISABLE(portp->brdnr);
3482 crit_exit();
3483 }
3484
3485 /*****************************************************************************/
3486
3487 /*
3488 * Get the state of the signals.
3489 */
3490
3491 static int stl_cd1400getsignals(stlport_t *portp)
3492 {
3493 unsigned char msvr1, msvr2;
3494 int sigs;
3495
3496 #if STLDEBUG
3497 kprintf("stl_cd1400getsignals(portp=%x)\n", (int) portp);
3498 #endif
3499
3500 crit_enter();
3501 BRDENABLE(portp->brdnr, portp->pagenr);
3502 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3503 msvr1 = stl_cd1400getreg(portp, MSVR1);
3504 msvr2 = stl_cd1400getreg(portp, MSVR2);
3505 BRDDISABLE(portp->brdnr);
3506 crit_exit();
3507
3508 sigs = 0;
3509 sigs |= (msvr1 & MSVR1_DCD) ? TIOCM_CD : 0;
3510 sigs |= (msvr1 & MSVR1_CTS) ? TIOCM_CTS : 0;
3511 sigs |= (msvr1 & MSVR1_DTR) ? TIOCM_DTR : 0;
3512 sigs |= (msvr2 & MSVR2_RTS) ? TIOCM_RTS : 0;
3513 #if 0
3514 sigs |= (msvr1 & MSVR1_RI) ? TIOCM_RI : 0;
3515 sigs |= (msvr1 & MSVR1_DSR) ? TIOCM_DSR : 0;
3516 #else
3517 sigs |= TIOCM_DSR;
3518 #endif
3519 return(sigs);
3520 }
3521
3522 /*****************************************************************************/
3523
3524 /*
3525 * Enable or disable the Transmitter and/or Receiver.
3526 */
3527
3528 static void stl_cd1400enablerxtx(stlport_t *portp, int rx, int tx)
3529 {
3530 unsigned char ccr;
3531
3532 #if STLDEBUG
3533 kprintf("stl_cd1400enablerxtx(portp=%x,rx=%d,tx=%d)\n",
3534 (int) portp, rx, tx);
3535 #endif
3536
3537 ccr = 0;
3538 if (tx == 0)
3539 ccr |= CCR_TXDISABLE;
3540 else if (tx > 0)
3541 ccr |= CCR_TXENABLE;
3542 if (rx == 0)
3543 ccr |= CCR_RXDISABLE;
3544 else if (rx > 0)
3545 ccr |= CCR_RXENABLE;
3546
3547 crit_enter();
3548 BRDENABLE(portp->brdnr, portp->pagenr);
3549 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x03));
3550 stl_cd1400ccrwait(portp);
3551 stl_cd1400setreg(portp, CCR, ccr);
3552 stl_cd1400ccrwait(portp);
3553 BRDDISABLE(portp->brdnr);
3554 crit_exit();
3555 }
3556
3557 /*****************************************************************************/
3558
3559 /*
3560 * Start or stop the Transmitter and/or Receiver.
3561 */
3562
3563 static void stl_cd1400startrxtx(stlport_t *portp, int rx, int tx)
3564 {
3565 unsigned char sreron, sreroff;
3566
3567 #if STLDEBUG
3568 kprintf("stl_cd1400startrxtx(portp=%x,rx=%d,tx=%d)\n",
3569 (int) portp, rx, tx);
3570 #endif
3571
3572 sreron = 0;
3573 sreroff = 0;
3574 if (tx == 0)
3575 sreroff |= (SRER_TXDATA | SRER_TXEMPTY);
3576 else if (tx == 1)
3577 sreron |= SRER_TXDATA;
3578 else if (tx >= 2)
3579 sreron |= SRER_TXEMPTY;
3580 if (rx == 0)
3581 sreroff |= SRER_RXDATA;
3582 else if (rx > 0)
3583 sreron |= SRER_RXDATA;
3584
3585 crit_enter();
3586 BRDENABLE(portp->brdnr, portp->pagenr);
3587 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3588 stl_cd1400setreg(portp, SRER,
3589 ((stl_cd1400getreg(portp, SRER) & ~sreroff) | sreron));
3590 BRDDISABLE(portp->brdnr);
3591 if (tx > 0) {
3592 portp->state |= ASY_TXBUSY;
3593 portp->tty.t_state |= TS_BUSY;
3594 }
3595 crit_exit();
3596 }
3597
3598 /*****************************************************************************/
3599
3600 /*
3601 * Disable all interrupts from this port.
3602 */
3603
3604 static void stl_cd1400disableintrs(stlport_t *portp)
3605 {
3606
3607 #if STLDEBUG
3608 kprintf("stl_cd1400disableintrs(portp=%x)\n", (int) portp);
3609 #endif
3610
3611 crit_enter();
3612 BRDENABLE(portp->brdnr, portp->pagenr);
3613 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3614 stl_cd1400setreg(portp, SRER, 0);
3615 BRDDISABLE(portp->brdnr);
3616 crit_exit();
3617 }
3618
3619 /*****************************************************************************/
3620
3621 static void stl_cd1400sendbreak(stlport_t *portp, long len)
3622 {
3623
3624 #if STLDEBUG
3625 kprintf("stl_cd1400sendbreak(portp=%x,len=%d)\n", (int) portp,
3626 (int) len);
3627 #endif
3628
3629 crit_enter();
3630 BRDENABLE(portp->brdnr, portp->pagenr);
3631 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3632 stl_cd1400setreg(portp, COR2,
3633 (stl_cd1400getreg(portp, COR2) | COR2_ETC));
3634 stl_cd1400setreg(portp, SRER,
3635 ((stl_cd1400getreg(portp, SRER) & ~SRER_TXDATA) |
3636 SRER_TXEMPTY));
3637 BRDDISABLE(portp->brdnr);
3638 if (len > 0) {
3639 len = len / 5;
3640 portp->brklen = (len > 255) ? 255 : len;
3641 } else {
3642 portp->brklen = len;
3643 }
3644 crit_exit();
3645 portp->stats.txbreaks++;
3646 }
3647
3648 /*****************************************************************************/
3649
3650 /*
3651 * Try and find and initialize all the ports on a panel. We don't care
3652 * what sort of board these ports are on - since the port io registers
3653 * are almost identical when dealing with ports.
3654 */
3655
3656 static void stl_cd1400portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3657 {
3658 #if STLDEBUG
3659 kprintf("stl_cd1400portinit(brdp=%x,panelp=%x,portp=%x)\n",
3660 (int) brdp, (int) panelp, (int) portp);
3661 #endif
3662
3663 if ((brdp == (stlbrd_t *) NULL) || (panelp == (stlpanel_t *) NULL) ||
3664 (portp == (stlport_t *) NULL))
3665 return;
3666
3667 portp->ioaddr = panelp->iobase + (((brdp->brdtype == BRD_ECHPCI) ||
3668 (portp->portnr < 8)) ? 0 : EREG_BANKSIZE);
3669 portp->uartaddr = (portp->portnr & 0x04) << 5;
3670 portp->pagenr = panelp->pagenr + (portp->portnr >> 3);
3671
3672 BRDENABLE(portp->brdnr, portp->pagenr);
3673 stl_cd1400setreg(portp, CAR, (portp->portnr & 0x3));
3674 stl_cd1400setreg(portp, LIVR, (portp->portnr << 3));
3675 portp->hwid = stl_cd1400getreg(portp, GFRCR);
3676 BRDDISABLE(portp->brdnr);
3677 }
3678
3679 /*****************************************************************************/
3680
3681 /*
3682 * Inbitialize the UARTs in a panel. We don't care what sort of board
3683 * these ports are on - since the port io registers are almost
3684 * identical when dealing with ports.
3685 */
3686
3687 static int stl_cd1400panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3688 {
3689 unsigned int gfrcr;
3690 int chipmask, i, j;
3691 int nrchips, uartaddr, ioaddr;
3692
3693 #if STLDEBUG
3694 kprintf("stl_cd1400panelinit(brdp=%x,panelp=%x)\n", (int) brdp,
3695 (int) panelp);
3696 #endif
3697
3698 BRDENABLE(panelp->brdnr, panelp->pagenr);
3699
3700 /*
3701 * Check that each chip is present and started up OK.
3702 */
3703 chipmask = 0;
3704 nrchips = panelp->nrports / CD1400_PORTS;
3705 for (i = 0; (i < nrchips); i++) {
3706 if (brdp->brdtype == BRD_ECHPCI) {
3707 outb((panelp->pagenr + (i >> 1)), brdp->ioctrl);
3708 ioaddr = panelp->iobase;
3709 } else {
3710 ioaddr = panelp->iobase + (EREG_BANKSIZE * (i >> 1));
3711 }
3712 uartaddr = (i & 0x01) ? 0x080 : 0;
3713 outb(ioaddr, (GFRCR + uartaddr));
3714 outb((ioaddr + EREG_DATA), 0);
3715 outb(ioaddr, (CCR + uartaddr));
3716 outb((ioaddr + EREG_DATA), CCR_RESETFULL);
3717 outb((ioaddr + EREG_DATA), CCR_RESETFULL);
3718 outb(ioaddr, (GFRCR + uartaddr));
3719 for (j = 0; (j < CCR_MAXWAIT); j++) {
3720 if ((gfrcr = inb(ioaddr + EREG_DATA)) != 0)
3721 break;
3722 }
3723 if ((j >= CCR_MAXWAIT) || (gfrcr < 0x40) || (gfrcr > 0x60)) {
3724 kprintf("STALLION: cd1400 not responding, "
3725 "board=%d panel=%d chip=%d\n", panelp->brdnr,
3726 panelp->panelnr, i);
3727 continue;
3728 }
3729 chipmask |= (0x1 << i);
3730 outb(ioaddr, (PPR + uartaddr));
3731 outb((ioaddr + EREG_DATA), PPR_SCALAR);
3732 }
3733
3734
3735 BRDDISABLE(panelp->brdnr);
3736 return(chipmask);
3737 }
3738
3739 /*****************************************************************************/
3740 /* SC26198 HARDWARE FUNCTIONS */
3741 /*****************************************************************************/
3742
3743 /*
3744 * These functions get/set/update the registers of the sc26198 UARTs.
3745 * Access to the sc26198 registers is via an address/data io port pair.
3746 * (Maybe should make this inline...)
3747 */
3748
3749 static int stl_sc26198getreg(stlport_t *portp, int regnr)
3750 {
3751 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3752 return(inb(portp->ioaddr + XP_DATA));
3753 }
3754
3755 static void stl_sc26198setreg(stlport_t *portp, int regnr, int value)
3756 {
3757 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3758 outb((portp->ioaddr + XP_DATA), value);
3759 }
3760
3761 static int stl_sc26198updatereg(stlport_t *portp, int regnr, int value)
3762 {
3763 outb((portp->ioaddr + XP_ADDR), (regnr | portp->uartaddr));
3764 if (inb(portp->ioaddr + XP_DATA) != value) {
3765 outb((portp->ioaddr + XP_DATA), value);
3766 return(1);
3767 }
3768 return(0);
3769 }
3770
3771 /*****************************************************************************/
3772
3773 /*
3774 * Functions to get and set the sc26198 global registers.
3775 */
3776
3777 static int stl_sc26198getglobreg(stlport_t *portp, int regnr)
3778 {
3779 outb((portp->ioaddr + XP_ADDR), regnr);
3780 return(inb(portp->ioaddr + XP_DATA));
3781 }
3782
3783 #if 0
3784 static void stl_sc26198setglobreg(stlport_t *portp, int regnr, int value)
3785 {
3786 outb((portp->ioaddr + XP_ADDR), regnr);
3787 outb((portp->ioaddr + XP_DATA), value);
3788 }
3789 #endif
3790
3791 /*****************************************************************************/
3792
3793 /*
3794 * Inbitialize the UARTs in a panel. We don't care what sort of board
3795 * these ports are on - since the port io registers are almost
3796 * identical when dealing with ports.
3797 */
3798
3799 static int stl_sc26198panelinit(stlbrd_t *brdp, stlpanel_t *panelp)
3800 {
3801 int chipmask, i;
3802 int nrchips, ioaddr;
3803
3804 #if STLDEBUG
3805 kprintf("stl_sc26198panelinit(brdp=%x,panelp=%x)\n", (int) brdp,
3806 (int) panelp);
3807 #endif
3808
3809 BRDENABLE(panelp->brdnr, panelp->pagenr);
3810
3811 /*
3812 * Check that each chip is present and started up OK.
3813 */
3814 chipmask = 0;
3815 nrchips = (panelp->nrports + 4) / SC26198_PORTS;
3816 if (brdp->brdtype == BRD_ECHPCI)
3817 outb(brdp->ioctrl, panelp->pagenr);
3818
3819 for (i = 0; (i < nrchips); i++) {
3820 ioaddr = panelp->iobase + (i * 4);
3821 outb((ioaddr + XP_ADDR), SCCR);
3822 outb((ioaddr + XP_DATA), CR_RESETALL);
3823 outb((ioaddr + XP_ADDR), TSTR);
3824 if (inb(ioaddr + XP_DATA) != 0) {
3825 kprintf("STALLION: sc26198 not responding, "
3826 "board=%d panel=%d chip=%d\n", panelp->brdnr,
3827 panelp->panelnr, i);
3828 continue;
3829 }
3830 chipmask |= (0x1 << i);
3831 outb((ioaddr + XP_ADDR), GCCR);
3832 outb((ioaddr + XP_DATA), GCCR_IVRTYPCHANACK);
3833 outb((ioaddr + XP_ADDR), WDTRCR);
3834 outb((ioaddr + XP_DATA), 0xff);
3835 }
3836
3837 BRDDISABLE(panelp->brdnr);
3838 return(chipmask);
3839 }
3840
3841 /*****************************************************************************/
3842
3843 /*
3844 * Initialize hardware specific port registers.
3845 */
3846
3847 static void stl_sc26198portinit(stlbrd_t *brdp, stlpanel_t *panelp, stlport_t *portp)
3848 {
3849 #if STLDEBUG
3850 kprintf("stl_sc26198portinit(brdp=%x,panelp=%x,portp=%x)\n",
3851 (int) brdp, (int) panelp, (int) portp);
3852 #endif
3853
3854 if ((brdp == (stlbrd_t *) NULL) || (panelp == (stlpanel_t *) NULL) ||
3855 (portp == (stlport_t *) NULL))
3856 return;
3857
3858 portp->ioaddr = panelp->iobase + ((portp->portnr < 8) ? 0 : 4);
3859 portp->uartaddr = (portp->portnr & 0x07) << 4;
3860 portp->pagenr = panelp->pagenr;
3861 portp->hwid = 0x1;
3862
3863 BRDENABLE(portp->brdnr, portp->pagenr);
3864 stl_sc26198setreg(portp, IOPCR, IOPCR_SETSIGS);
3865 BRDDISABLE(portp->brdnr);
3866 }
3867
3868 /*****************************************************************************/
3869
3870 /*
3871 * Set up the sc26198 registers for a port based on the termios port
3872 * settings.
3873 */
3874
3875 static int stl_sc26198setport(stlport_t *portp, struct termios *tiosp)
3876 {
3877 unsigned char mr0, mr1, mr2, clk;
3878 unsigned char imron, imroff, iopr, ipr;
3879
3880 #if STLDEBUG
3881 kprintf("stl_sc26198setport(portp=%x,tiosp=%x): brdnr=%d portnr=%d\n",
3882 (int) portp, (int) tiosp, portp->brdnr, portp->portnr);
3883 #endif
3884
3885 mr0 = 0;
3886 mr1 = 0;
3887 mr2 = 0;
3888 clk = 0;
3889 iopr = 0;
3890 imron = 0;
3891 imroff = 0;
3892
3893 /*
3894 * Set up the RX char ignore mask with those RX error types we
3895 * can ignore.
3896 */
3897 portp->rxignoremsk = 0;
3898 if (tiosp->c_iflag & IGNPAR)
3899 portp->rxignoremsk |= (SR_RXPARITY | SR_RXFRAMING |
3900 SR_RXOVERRUN);
3901 if (tiosp->c_iflag & IGNBRK)
3902 portp->rxignoremsk |= SR_RXBREAK;
3903
3904 portp->rxmarkmsk = SR_RXOVERRUN;
3905 if (tiosp->c_iflag & (INPCK | PARMRK))
3906 portp->rxmarkmsk |= (SR_RXPARITY | SR_RXFRAMING);
3907 if (tiosp->c_iflag & BRKINT)
3908 portp->rxmarkmsk |= SR_RXBREAK;
3909
3910 /*
3911 * Go through the char size, parity and stop bits and set all the
3912 * option registers appropriately.
3913 */
3914 switch (tiosp->c_cflag & CSIZE) {
3915 case CS5:
3916 mr1 |= MR1_CS5;
3917 break;
3918 case CS6:
3919 mr1 |= MR1_CS6;
3920 break;
3921 case CS7:
3922 mr1 |= MR1_CS7;
3923 break;
3924 default:
3925 mr1 |= MR1_CS8;
3926 break;
3927 }
3928
3929 if (tiosp->c_cflag & CSTOPB)
3930 mr2 |= MR2_STOP2;
3931 else
3932 mr2 |= MR2_STOP1;
3933
3934 if (tiosp->c_cflag & PARENB) {
3935 if (tiosp->c_cflag & PARODD)
3936 mr1 |= (MR1_PARENB | MR1_PARODD);
3937 else
3938 mr1 |= (MR1_PARENB | MR1_PAREVEN);
3939 } else {
3940 mr1 |= MR1_PARNONE;
3941 }
3942
3943 mr1 |= MR1_ERRBLOCK;
3944
3945 /*
3946 * Set the RX FIFO threshold at 8 chars. This gives a bit of breathing
3947 * space for hardware flow control and the like. This should be set to
3948 * VMIN.
3949 */
3950 mr2 |= MR2_RXFIFOHALF;
3951
3952 /*
3953 * Calculate the baud rate timers. For now we will just assume that
3954 * the input and output baud are the same. The sc26198 has a fixed
3955 * baud rate table, so only discrete baud rates possible.
3956 */
3957 if (tiosp->c_ispeed == 0)
3958 tiosp->c_ispeed = tiosp->c_ospeed;
3959 if ((tiosp->c_ospeed < 0) || (tiosp->c_ospeed > SC26198_MAXBAUD))
3960 return(EINVAL);
3961
3962 if (tiosp->c_ospeed > 0) {
3963 for (clk = 0; (clk < SC26198_NRBAUDS); clk++) {
3964 if (tiosp->c_ospeed <= sc26198_baudtable[clk])
3965 break;
3966 }
3967 }
3968
3969 /*
3970 * Check what form of modem signaling is required and set it up.
3971 */
3972 if ((tiosp->c_cflag & CLOCAL) == 0) {
3973 iopr |= IOPR_DCDCOS;
3974 imron |= IR_IOPORT;
3975 }
3976
3977 /*
3978 * Setup sc26198 enhanced modes if we can. In particular we want to
3979 * handle as much of the flow control as possible automatically. As
3980 * well as saving a few CPU cycles it will also greatly improve flow
3981 * control reliability.
3982 */
3983 if (tiosp->c_iflag & IXON) {
3984 mr0 |= MR0_SWFTX | MR0_SWFT;
3985 imron |= IR_XONXOFF;
3986 } else {
3987 imroff |= IR_XONXOFF;
3988 }
3989 #if 0
3990 if (tiosp->c_iflag & IXOFF)
3991 mr0 |= MR0_SWFRX;
3992 #endif
3993
3994 if (tiosp->c_cflag & CCTS_OFLOW)
3995 mr2 |= MR2_AUTOCTS;
3996 if (tiosp->c_cflag & CRTS_IFLOW)
3997 mr1 |= MR1_AUTORTS;
3998
3999 /*
4000 * All sc26198 register values calculated so go through and set
4001 * them all up.
4002 */
4003
4004 #if STLDEBUG
4005 kprintf("SETPORT: portnr=%d panelnr=%d brdnr=%d\n", portp->portnr,
4006 portp->panelnr, portp->brdnr);
4007 kprintf(" mr0=%x mr1=%x mr2=%x clk=%x\n", mr0, mr1, mr2, clk);
4008 kprintf(" iopr=%x imron=%x imroff=%x\n", iopr, imron, imroff);
4009 kprintf(" schr1=%x schr2=%x schr3=%x schr4=%x\n",
4010 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP],
4011 tiosp->c_cc[VSTART], tiosp->c_cc[VSTOP]);
4012 #endif
4013
4014 crit_enter();
4015 BRDENABLE(portp->brdnr, portp->pagenr);
4016 stl_sc26198setreg(portp, IMR, 0);
4017 stl_sc26198updatereg(portp, MR0, mr0);
4018 stl_sc26198updatereg(portp, MR1, mr1);
4019 stl_sc26198setreg(portp, SCCR, CR_RXERRBLOCK);
4020 stl_sc26198updatereg(portp, MR2, mr2);
4021 iopr = (stl_sc26198getreg(portp, IOPIOR) & ~IPR_CHANGEMASK) | iopr;
4022 if (tiosp->c_ospeed == 0) {
4023 iopr &= ~IPR_DTR;
4024 } else {
4025 iopr |= IPR_DTR;
4026 stl_sc26198setreg(portp, TXCSR, clk);
4027 stl_sc26198setreg(portp, RXCSR, clk);
4028 }
4029 stl_sc26198updatereg(portp, IOPIOR, iopr);
4030 stl_sc26198setreg(portp, XONCR, tiosp->c_cc[VSTART]);
4031 stl_sc26198setreg(portp, XOFFCR, tiosp->c_cc[VSTOP]);
4032 ipr = stl_sc26198getreg(portp, IPR);
4033 if (ipr & IPR_DCD)
4034 portp->sigs &= ~TIOCM_CD;
4035 else
4036 portp->sigs |= TIOCM_CD;
4037 portp->imr = (portp->imr & ~imroff) | imron;
4038 stl_sc26198setreg(portp, IMR, portp->imr);
4039 BRDDISABLE(portp->brdnr);
4040 portp->state &= ~(ASY_RTSFLOWMODE | ASY_CTSFLOWMODE);
4041 portp->state |= ((tiosp->c_cflag & CRTS_IFLOW) ? ASY_RTSFLOWMODE : 0);
4042 portp->state |= ((tiosp->c_cflag & CCTS_OFLOW) ? ASY_CTSFLOWMODE : 0);
4043 stl_ttyoptim(portp, tiosp);
4044 crit_exit();
4045
4046 return(0);
4047 }
4048
4049 /*****************************************************************************/
4050
4051 /*
4052 * Set the state of the DTR and RTS signals.
4053 */
4054
4055 static void stl_sc26198setsignals(stlport_t *portp, int dtr, int rts)
4056 {
4057 unsigned char iopioron, iopioroff;
4058
4059 #if STLDEBUG
4060 kprintf("stl_sc26198setsignals(portp=%x,dtr=%d,rts=%d)\n",
4061 (int) portp, dtr, rts);
4062 #endif
4063
4064 iopioron = 0;
4065 iopioroff = 0;
4066 if (dtr == 0)
4067 iopioroff |= IPR_DTR;
4068 else if (dtr > 0)
4069 iopioron |= IPR_DTR;
4070 if (rts == 0)
4071 iopioroff |= IPR_RTS;
4072 else if (rts > 0)
4073 iopioron |= IPR_RTS;
4074
4075 crit_enter();
4076 BRDENABLE(portp->brdnr, portp->pagenr);
4077 if ((rts >= 0) && (portp->tty.t_cflag & CRTS_IFLOW)) {
4078 if (rts == 0) {
4079 stl_sc26198setreg(portp, MR1,
4080 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4081 portp->stats.rxrtsoff++;
4082 } else {
4083 stl_sc26198setreg(portp, MR1,
4084 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4085 portp->stats.rxrtson++;
4086 }
4087 }
4088 stl_sc26198setreg(portp, IOPIOR,
4089 ((stl_sc26198getreg(portp, IOPIOR) & ~iopioroff) | iopioron));
4090 BRDDISABLE(portp->brdnr);
4091 crit_exit();
4092 }
4093
4094 /*****************************************************************************/
4095
4096 /*
4097 * Return the state of the signals.
4098 */
4099
4100 static int stl_sc26198getsignals(stlport_t *portp)
4101 {
4102 unsigned char ipr;
4103 int sigs;
4104
4105 #if STLDEBUG
4106 kprintf("stl_sc26198getsignals(portp=%x)\n", (int) portp);
4107 #endif
4108
4109 crit_enter();
4110 BRDENABLE(portp->brdnr, portp->pagenr);
4111 ipr = stl_sc26198getreg(portp, IPR);
4112 BRDDISABLE(portp->brdnr);
4113 crit_exit();
4114
4115 sigs = TIOCM_DSR;
4116 sigs |= (ipr & IPR_DCD) ? 0 : TIOCM_CD;
4117 sigs |= (ipr & IPR_CTS) ? 0 : TIOCM_CTS;
4118 sigs |= (ipr & IPR_DTR) ? 0: TIOCM_DTR;
4119 sigs |= (ipr & IPR_RTS) ? 0: TIOCM_RTS;
4120 return(sigs);
4121 }
4122
4123 /*****************************************************************************/
4124
4125 /*
4126 * Enable/Disable the Transmitter and/or Receiver.
4127 */
4128
4129 static void stl_sc26198enablerxtx(stlport_t *portp, int rx, int tx)
4130 {
4131 unsigned char ccr;
4132
4133 #if STLDEBUG
4134 kprintf("stl_sc26198enablerxtx(portp=%x,rx=%d,tx=%d)\n",
4135 (int) portp, rx, tx);
4136 #endif
4137
4138 ccr = portp->crenable;
4139 if (tx == 0)
4140 ccr &= ~CR_TXENABLE;
4141 else if (tx > 0)
4142 ccr |= CR_TXENABLE;
4143 if (rx == 0)
4144 ccr &= ~CR_RXENABLE;
4145 else if (rx > 0)
4146 ccr |= CR_RXENABLE;
4147
4148 crit_enter();
4149 BRDENABLE(portp->brdnr, portp->pagenr);
4150 stl_sc26198setreg(portp, SCCR, ccr);
4151 BRDDISABLE(portp->brdnr);
4152 portp->crenable = ccr;
4153 crit_exit();
4154 }
4155
4156 /*****************************************************************************/
4157
4158 /*
4159 * Start/stop the Transmitter and/or Receiver.
4160 */
4161
4162 static void stl_sc26198startrxtx(stlport_t *portp, int rx, int tx)
4163 {
4164 unsigned char imr;
4165
4166 #if STLDEBUG
4167 kprintf("stl_sc26198startrxtx(portp=%x,rx=%d,tx=%d)\n",
4168 (int) portp, rx, tx);
4169 #endif
4170
4171 imr = portp->imr;
4172 if (tx == 0)
4173 imr &= ~IR_TXRDY;
4174 else if (tx == 1)
4175 imr |= IR_TXRDY;
4176 if (rx == 0)
4177 imr &= ~(IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG);
4178 else if (rx > 0)
4179 imr |= IR_RXRDY | IR_RXBREAK | IR_RXWATCHDOG;
4180
4181 crit_enter();
4182 BRDENABLE(portp->brdnr, portp->pagenr);
4183 stl_sc26198setreg(portp, IMR, imr);
4184 BRDDISABLE(portp->brdnr);
4185 portp->imr = imr;
4186 if (tx > 0) {
4187 portp->state |= ASY_TXBUSY;
4188 portp->tty.t_state |= TS_BUSY;
4189 }
4190 crit_exit();
4191 }
4192
4193 /*****************************************************************************/
4194
4195 /*
4196 * Disable all interrupts from this port.
4197 */
4198
4199 static void stl_sc26198disableintrs(stlport_t *portp)
4200 {
4201
4202 #if STLDEBUG
4203 kprintf("stl_sc26198disableintrs(portp=%x)\n", (int) portp);
4204 #endif
4205
4206 crit_enter();
4207 BRDENABLE(portp->brdnr, portp->pagenr);
4208 portp->imr = 0;
4209 stl_sc26198setreg(portp, IMR, 0);
4210 BRDDISABLE(portp->brdnr);
4211 crit_exit();
4212 }
4213
4214 /*****************************************************************************/
4215
4216 static void stl_sc26198sendbreak(stlport_t *portp, long len)
4217 {
4218
4219 #if STLDEBUG
4220 kprintf("stl_sc26198sendbreak(portp=%x,len=%d)\n",
4221 (int) portp, (int) len);
4222 #endif
4223
4224 crit_enter();
4225 BRDENABLE(portp->brdnr, portp->pagenr);
4226 if (len == -1) {
4227 stl_sc26198setreg(portp, SCCR, CR_TXSTARTBREAK);
4228 portp->stats.txbreaks++;
4229 } else {
4230 stl_sc26198setreg(portp, SCCR, CR_TXSTOPBREAK);
4231 }
4232 BRDDISABLE(portp->brdnr);
4233 crit_exit();
4234 }
4235
4236 /*****************************************************************************/
4237
4238 /*
4239 * Take flow control actions...
4240 */
4241
4242 static void stl_sc26198sendflow(stlport_t *portp, int hw, int sw)
4243 {
4244 unsigned char mr0;
4245
4246 #if STLDEBUG
4247 kprintf("stl_sc26198sendflow(portp=%x,hw=%d,sw=%d)\n",
4248 (int) portp, hw, sw);
4249 #endif
4250
4251 if (portp == (stlport_t *) NULL)
4252 return;
4253
4254 crit_enter();
4255 BRDENABLE(portp->brdnr, portp->pagenr);
4256
4257 if (sw >= 0) {
4258 mr0 = stl_sc26198getreg(portp, MR0);
4259 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4260 if (sw > 0) {
4261 stl_sc26198setreg(portp, SCCR, CR_TXSENDXOFF);
4262 mr0 &= ~MR0_SWFRX;
4263 portp->stats.rxxoff++;
4264 } else {
4265 stl_sc26198setreg(portp, SCCR, CR_TXSENDXON);
4266 mr0 |= MR0_SWFRX;
4267 portp->stats.rxxon++;
4268 }
4269 stl_sc26198wait(portp);
4270 stl_sc26198setreg(portp, MR0, mr0);
4271 }
4272
4273 if (hw == 0) {
4274 portp->state |= ASY_RTSFLOW;
4275 stl_sc26198setreg(portp, MR1,
4276 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4277 stl_sc26198setreg(portp, IOPIOR,
4278 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4279 portp->stats.rxrtsoff++;
4280 } else if (hw > 0) {
4281 portp->state &= ~ASY_RTSFLOW;
4282 stl_sc26198setreg(portp, MR1,
4283 (stl_sc26198getreg(portp, MR1) | MR1_AUTORTS));
4284 stl_sc26198setreg(portp, IOPIOR,
4285 (stl_sc26198getreg(portp, IOPIOR) | IOPR_RTS));
4286 portp->stats.rxrtson++;
4287 }
4288
4289 BRDDISABLE(portp->brdnr);
4290 crit_exit();
4291 }
4292
4293 /*****************************************************************************/
4294
4295 /*
4296 * Return the current state of data flow on this port. This is only
4297 * really interresting when determining if data has fully completed
4298 * transmission or not... The sc26198 interrupt scheme cannot
4299 * determine when all data has actually drained, so we need to
4300 * check the port statusy register to be sure.
4301 */
4302
4303 static int stl_sc26198datastate(stlport_t *portp)
4304 {
4305 unsigned char sr;
4306
4307 #if STLDEBUG
4308 kprintf("stl_sc26198datastate(portp=%x)\n", (int) portp);
4309 #endif
4310
4311 if (portp == (stlport_t *) NULL)
4312 return(0);
4313 if (portp->state & ASY_TXBUSY)
4314 return(1);
4315
4316 crit_enter();
4317 BRDENABLE(portp->brdnr, portp->pagenr);
4318 sr = stl_sc26198getreg(portp, SR);
4319 BRDDISABLE(portp->brdnr);
4320 crit_exit();
4321
4322 return((sr & SR_TXEMPTY) ? 0 : 1);
4323 }
4324
4325 /*****************************************************************************/
4326
4327 static void stl_sc26198flush(stlport_t *portp, int flag)
4328 {
4329
4330 #if STLDEBUG
4331 kprintf("stl_sc26198flush(portp=%x,flag=%x)\n", (int) portp, flag);
4332 #endif
4333
4334 if (portp == (stlport_t *) NULL)
4335 return;
4336
4337 crit_enter();
4338 BRDENABLE(portp->brdnr, portp->pagenr);
4339 if (flag & FWRITE) {
4340 stl_sc26198setreg(portp, SCCR, CR_TXRESET);
4341 stl_sc26198setreg(portp, SCCR, portp->crenable);
4342 }
4343 if (flag & FREAD) {
4344 while (stl_sc26198getreg(portp, SR) & SR_RXRDY)
4345 stl_sc26198getreg(portp, RXFIFO);
4346 }
4347 BRDDISABLE(portp->brdnr);
4348 crit_exit();
4349 }
4350
4351 /*****************************************************************************/
4352
4353 /*
4354 * If we are TX flow controlled and in IXANY mode then we may
4355 * need to unflow control here. We gotta do this because of the
4356 * automatic flow control modes of the sc26198 - which downs't
4357 * support any concept of an IXANY mode.
4358 */
4359
4360 static void stl_sc26198txunflow(stlport_t *portp)
4361 {
4362 unsigned char mr0;
4363
4364 mr0 = stl_sc26198getreg(portp, MR0);
4365 stl_sc26198setreg(portp, MR0, (mr0 & ~MR0_SWFRXTX));
4366 stl_sc26198setreg(portp, SCCR, CR_HOSTXON);
4367 stl_sc26198setreg(portp, MR0, mr0);
4368 portp->state &= ~ASY_TXFLOWED;
4369 }
4370
4371 /*****************************************************************************/
4372
4373 /*
4374 * Delay for a small amount of time, to give the sc26198 a chance
4375 * to process a command...
4376 */
4377
4378 static void stl_sc26198wait(stlport_t *portp)
4379 {
4380 int i;
4381
4382 #if STLDEBUG
4383 kprintf("stl_sc26198wait(portp=%x)\n", (int) portp);
4384 #endif
4385
4386 if (portp == (stlport_t *) NULL)
4387 return;
4388
4389 for (i = 0; (i < 20); i++)
4390 stl_sc26198getglobreg(portp, TSTR);
4391 }
4392
4393 /*****************************************************************************/
4394
4395 /*
4396 * Transmit interrupt handler. This has gotta be fast! Handling TX
4397 * chars is pretty simple, stuff as many as possible from the TX buffer
4398 * into the sc26198 FIFO.
4399 */
4400
4401 static __inline void stl_sc26198txisr(stlport_t *portp)
4402 {
4403 unsigned int ioaddr;
4404 unsigned char mr0;
4405 char *head, *tail;
4406 int len, stlen;
4407
4408 #if STLDEBUG
4409 kprintf("stl_sc26198txisr(portp=%x)\n", (int) portp);
4410 #endif
4411
4412 ioaddr = portp->ioaddr;
4413
4414 head = portp->tx.head;
4415 tail = portp->tx.tail;
4416 len = (head >= tail) ? (head - tail) : (STL_TXBUFSIZE - (tail - head));
4417 if ((len == 0) || ((len < STL_TXBUFLOW) &&
4418 ((portp->state & ASY_TXLOW) == 0))) {
4419 portp->state |= ASY_TXLOW;
4420 stl_dotimeout();
4421 }
4422
4423 if (len == 0) {
4424 outb((ioaddr + XP_ADDR), (MR0 | portp->uartaddr));
4425 mr0 = inb(ioaddr + XP_DATA);
4426 if ((mr0 & MR0_TXMASK) == MR0_TXEMPTY) {
4427 portp->imr &= ~IR_TXRDY;
4428 outb((ioaddr + XP_ADDR), (IMR | portp->uartaddr));
4429 outb((ioaddr + XP_DATA), portp->imr);
4430 portp->state |= ASY_TXEMPTY;
4431 portp->state &= ~ASY_TXBUSY;
4432 } else {
4433 mr0 |= ((mr0 & ~MR0_TXMASK) | MR0_TXEMPTY);
4434 outb((ioaddr + XP_DATA), mr0);
4435 }
4436 } else {
4437 len = MIN(len, SC26198_TXFIFOSIZE);
4438 portp->stats.txtotal += len;
4439 stlen = MIN(len, (portp->tx.endbuf - tail));
4440 outb((ioaddr + XP_ADDR), GTXFIFO);
4441 outsb((ioaddr + XP_DATA), tail, stlen);
4442 len -= stlen;
4443 tail += stlen;
4444 if (tail >= portp->tx.endbuf)
4445 tail = portp->tx.buf;
4446 if (len > 0) {
4447 outsb((ioaddr + XP_DATA), tail, len);
4448 tail += len;
4449 }
4450 portp->tx.tail = tail;
4451 }
4452 }
4453
4454 /*****************************************************************************/
4455
4456 /*
4457 * Receive character interrupt handler. Determine if we have good chars
4458 * or bad chars and then process appropriately. Good chars are easy
4459 * just shove the lot into the RX buffer and set all status byte to 0.
4460 * If a bad RX char then process as required. This routine needs to be
4461 * fast!
4462 */
4463
4464 static __inline void stl_sc26198rxisr(stlport_t *portp, unsigned int iack)
4465 {
4466 #if STLDEBUG
4467 kprintf("stl_sc26198rxisr(portp=%x,iack=%x)\n", (int) portp, iack);
4468 #endif
4469
4470 if ((iack & IVR_TYPEMASK) == IVR_RXDATA)
4471 stl_sc26198rxgoodchars(portp);
4472 else
4473 stl_sc26198rxbadchars(portp);
4474
4475 /*
4476 * If we are TX flow controlled and in IXANY mode then we may need
4477 * to unflow control here. We gotta do this because of the automatic
4478 * flow control modes of the sc26198.
4479 */
4480 if ((portp->state & ASY_TXFLOWED) && (portp->tty.t_iflag & IXANY))
4481 stl_sc26198txunflow(portp);
4482 }
4483
4484 /*****************************************************************************/
4485
4486 /*
4487 * Process the good received characters from RX FIFO.
4488 */
4489
4490 static void stl_sc26198rxgoodchars(stlport_t *portp)
4491 {
4492 unsigned int ioaddr, len, buflen, stlen;
4493 char *head, *tail;
4494
4495 #if STLDEBUG
4496 kprintf("stl_sc26198rxgoodchars(port=%x)\n", (int) portp);
4497 #endif
4498
4499 ioaddr = portp->ioaddr;
4500
4501 /*
4502 * First up, calculate how much room there is in the RX ring queue.
4503 * We also want to keep track of the longest possible copy length,
4504 * this has to allow for the wrapping of the ring queue.
4505 */
4506 head = portp->rx.head;
4507 tail = portp->rx.tail;
4508 if (head >= tail) {
4509 buflen = STL_RXBUFSIZE - (head - tail) - 1;
4510 stlen = portp->rx.endbuf - head;
4511 } else {
4512 buflen = tail - head - 1;
4513 stlen = buflen;
4514 }
4515
4516 /*
4517 * Check if the input buffer is near full. If so then we should take
4518 * some flow control action... It is very easy to do hardware and
4519 * software flow control from here since we have the port selected on
4520 * the UART.
4521 */
4522 if (buflen <= (STL_RXBUFSIZE - STL_RXBUFHIGH)) {
4523 if (((portp->state & ASY_RTSFLOW) == 0) &&
4524 (portp->state & ASY_RTSFLOWMODE)) {
4525 portp->state |= ASY_RTSFLOW;
4526 stl_sc26198setreg(portp, MR1,
4527 (stl_sc26198getreg(portp, MR1) & ~MR1_AUTORTS));
4528 stl_sc26198setreg(portp, IOPIOR,
4529 (stl_sc26198getreg(portp, IOPIOR) & ~IOPR_RTS));
4530 portp->stats.rxrtsoff++;
4531 }
4532 }
4533
4534 /*
4535 * OK we are set, process good data... If the RX ring queue is full
4536 * just chuck the chars - don't leave them in the UART.
4537 */
4538 outb((ioaddr + XP_ADDR), GIBCR);
4539 len = inb(ioaddr + XP_DATA) + 1;
4540 if (buflen == 0) {
4541 outb((ioaddr + XP_ADDR), GRXFIFO);
4542 insb((ioaddr + XP_DATA), &stl_unwanted[0], len);
4543 portp->stats.rxlost += len;
4544 portp->stats.rxtotal += len;
4545 } else {
4546 len = MIN(len, buflen);
4547 portp->stats.rxtotal += len;
4548 stlen = MIN(len, stlen);
4549 if (len > 0) {
4550 outb((ioaddr + XP_ADDR), GRXFIFO);
4551 insb((ioaddr + XP_DATA), head, stlen);
4552 head += stlen;
4553 if (head >= portp->rx.endbuf) {
4554 head = portp->rx.buf;
4555 len -= stlen;
4556 insb((ioaddr + XP_DATA), head, len);
4557 head += len;
4558 }
4559 }
4560 }
4561
4562 portp->rx.head = head;
4563 portp->state |= ASY_RXDATA;
4564 stl_dotimeout();
4565 }
4566
4567 /*****************************************************************************/
4568
4569 /*
4570 * Process all characters in the RX FIFO of the UART. Check all char
4571 * status bytes as well, and process as required. We need to check
4572 * all bytes in the FIFO, in case some more enter the FIFO while we
4573 * are here. To get the exact character error type we need to switch
4574 * into CHAR error mode (that is why we need to make sure we empty
4575 * the FIFO).
4576 */
4577
4578 static void stl_sc26198rxbadchars(stlport_t *portp)
4579 {
4580 unsigned char mr1;
4581 unsigned int status;
4582 char *head, *tail;
4583 char ch;
4584 int len;
4585
4586 /*
4587 * First up, calculate how much room there is in the RX ring queue.
4588 * We also want to keep track of the longest possible copy length,
4589 * this has to allow for the wrapping of the ring queue.
4590 */
4591 head = portp->rx.head;
4592 tail = portp->rx.tail;
4593 len = (head >= tail) ? (STL_RXBUFSIZE - (head - tail) - 1) :
4594 (tail - head - 1);
4595
4596 /*
4597 * To get the precise error type for each character we must switch
4598 * back into CHAR error mode.
4599 */
4600 mr1 = stl_sc26198getreg(portp, MR1);
4601 stl_sc26198setreg(portp, MR1, (mr1 & ~MR1_ERRBLOCK));
4602
4603 while ((status = stl_sc26198getreg(portp, SR)) & SR_RXRDY) {
4604 stl_sc26198setreg(portp, SCCR, CR_CLEARRXERR);
4605 ch = stl_sc26198getreg(portp, RXFIFO);
4606
4607 if (status & SR_RXBREAK)
4608 portp->stats.rxbreaks++;
4609 if (status & SR_RXFRAMING)
4610 portp->stats.rxframing++;
4611 if (status & SR_RXPARITY)
4612 portp->stats.rxparity++;
4613 if (status & SR_RXOVERRUN)
4614 portp->stats.rxoverrun++;
4615 if ((portp->rxignoremsk & status) == 0) {
4616 if ((portp->tty.t_state & TS_CAN_BYPASS_L_RINT) &&
4617 ((status & SR_RXFRAMING) ||
4618 ((status & SR_RXPARITY) &&
4619 (portp->tty.t_iflag & INPCK))))
4620 ch = 0;
4621 if ((portp->rxmarkmsk & status) == 0)
4622 status = 0;
4623 if (len > 0) {
4624 *(head + STL_RXBUFSIZE) = status;
4625 *head++ = ch;
4626 if (head >= portp->rx.endbuf)
4627 head = portp->rx.buf;
4628 len--;
4629 }
4630 }
4631 }
4632
4633 /*
4634 * To get correct interrupt class we must switch back into BLOCK
4635 * error mode.
4636 */
4637 stl_sc26198setreg(portp, MR1, mr1);
4638
4639 portp->rx.head = head;
4640 portp->state |= ASY_RXDATA;
4641 stl_dotimeout();
4642 }
4643
4644 /*****************************************************************************/
4645
4646 /*
4647 * Other interrupt handler. This includes modem signals, flow
4648 * control actions, etc.
4649 */
4650
4651 static void stl_sc26198otherisr(stlport_t *portp, unsigned int iack)
4652 {
4653 unsigned char cir, ipr, xisr;
4654
4655 #if STLDEBUG
4656 kprintf("stl_sc26198otherisr(portp=%x,iack=%x)\n", (int) portp, iack);
4657 #endif
4658
4659 cir = stl_sc26198getglobreg(portp, CIR);
4660
4661 switch (cir & CIR_SUBTYPEMASK) {
4662 case CIR_SUBCOS:
4663 ipr = stl_sc26198getreg(portp, IPR);
4664 if (ipr & IPR_DCDCHANGE) {
4665 portp->state |= ASY_DCDCHANGE;
4666 portp->stats.modem++;
4667 stl_dotimeout();
4668 }
4669 break;
4670 case CIR_SUBXONXOFF:
4671 xisr = stl_sc26198getreg(portp, XISR);
4672 if (xisr & XISR_RXXONGOT) {
4673 portp->state |= ASY_TXFLOWED;
4674 portp->stats.txxoff++;
4675 }
4676 if (xisr & XISR_RXXOFFGOT) {
4677 portp->state &= ~ASY_TXFLOWED;
4678 portp->stats.txxon++;
4679 }
4680 break;
4681 case CIR_SUBBREAK:
4682 stl_sc26198setreg(portp, SCCR, CR_BREAKRESET);
4683 stl_sc26198rxbadchars(portp);
4684 break;
4685 default:
4686 break;
4687 }
4688 }
4689
4690 /*****************************************************************************/
4691
4692 /*
4693 * Interrupt service routine for sc26198 panels.
4694 */
4695
4696 static void stl_sc26198intr(stlpanel_t *panelp, unsigned int iobase)
4697 {
4698 stlport_t *portp;
4699 unsigned int iack;
4700
4701 /*
4702 * Work around bug in sc26198 chip... Cannot have A6 address
4703 * line of UART high, else iack will be returned as 0.
4704 */
4705 outb((iobase + 1), 0);
4706
4707 iack = inb(iobase + XP_IACK);
4708 #if STLDEBUG
4709 kprintf("stl_sc26198intr(panelp=%p,iobase=%x): iack=%x\n", panelp, iobase, iack);
4710 #endif
4711 portp = panelp->ports[(iack & IVR_CHANMASK) + ((iobase & 0x4) << 1)];
4712
4713 if (iack & IVR_RXDATA)
4714 stl_sc26198rxisr(portp, iack);
4715 else if (iack & IVR_TXDATA)
4716 stl_sc26198txisr(portp);
4717 else
4718 stl_sc26198otherisr(portp, iack);
4719 }
4720
4721 /*****************************************************************************/
DragonFly BSD