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ral - Add missing BUS_DMA_NOWAIT to bus_dmamap_load_mbuf_segment() calls
[dragonfly.git] / sys / dev / netif / ral / rt2560.c
blobb2612d7756a5d8f4577934066fa9c282e25e94f7
1 /* $FreeBSD$ */
2
3 /*-
4 * Copyright (c) 2005, 2006
5 * Damien Bergamini <damien.bergamini@free.fr>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <sys/cdefs.h>
21 __FBSDID("$FreeBSD$");
22
23 /*-
24 * Ralink Technology RT2560 chipset driver
25 * http://www.ralinktech.com/
26 */
27
28 #include <sys/param.h>
29 #include <sys/sysctl.h>
30 #include <sys/sockio.h>
31 #include <sys/mbuf.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
36 #include <sys/lock.h>
37 #include <sys/mutex.h>
38 #include <sys/module.h>
39 #include <sys/bus.h>
40 #include <sys/endian.h>
41
42 #if defined(__DragonFly__)
43 /* empty */
44 #else
45 #include <machine/bus.h>
46 #include <machine/resource.h>
47 #endif
48 #include <sys/rman.h>
49
50 #include <net/bpf.h>
51 #include <net/if.h>
52 #include <net/if_var.h>
53 #include <net/if_arp.h>
54 #include <net/ethernet.h>
55 #include <net/if_dl.h>
56 #include <net/if_media.h>
57 #include <net/if_types.h>
58
59 #include <netproto/802_11/ieee80211_var.h>
60 #include <netproto/802_11/ieee80211_radiotap.h>
61 #include <netproto/802_11/ieee80211_regdomain.h>
62 #include <netproto/802_11/ieee80211_ratectl.h>
63
64 #include <netinet/in.h>
65 #include <netinet/in_systm.h>
66 #include <netinet/in_var.h>
67 #include <netinet/ip.h>
68 #include <netinet/if_ether.h>
69
70 #include <dev/netif/ral/rt2560reg.h>
71 #include <dev/netif/ral/rt2560var.h>
72
73 #define RT2560_RSSI(sc, rssi) \
74 ((rssi) > (RT2560_NOISE_FLOOR + (sc)->rssi_corr) ? \
75 ((rssi) - RT2560_NOISE_FLOOR - (sc)->rssi_corr) : 0)
76
77 #define RAL_DEBUG
78 #ifdef RAL_DEBUG
79 #define DPRINTF(sc, fmt, ...) do { \
80 if (sc->sc_debug > 0) \
81 kprintf(fmt, __VA_ARGS__); \
82 } while (0)
83 #define DPRINTFN(sc, n, fmt, ...) do { \
84 if (sc->sc_debug >= (n)) \
85 kprintf(fmt, __VA_ARGS__); \
86 } while (0)
87 #else
88 #define DPRINTF(sc, fmt, ...)
89 #define DPRINTFN(sc, n, fmt, ...)
90 #endif
91
92 static struct ieee80211vap *rt2560_vap_create(struct ieee80211com *,
93 const char [IFNAMSIZ], int, enum ieee80211_opmode,
94 int, const uint8_t [IEEE80211_ADDR_LEN],
95 const uint8_t [IEEE80211_ADDR_LEN]);
96 static void rt2560_vap_delete(struct ieee80211vap *);
97 static void rt2560_dma_map_addr(void *, bus_dma_segment_t *, int,
98 int);
99 static int rt2560_alloc_tx_ring(struct rt2560_softc *,
100 struct rt2560_tx_ring *, int);
101 static void rt2560_reset_tx_ring(struct rt2560_softc *,
102 struct rt2560_tx_ring *);
103 static void rt2560_free_tx_ring(struct rt2560_softc *,
104 struct rt2560_tx_ring *);
105 static int rt2560_alloc_rx_ring(struct rt2560_softc *,
106 struct rt2560_rx_ring *, int);
107 static void rt2560_reset_rx_ring(struct rt2560_softc *,
108 struct rt2560_rx_ring *);
109 static void rt2560_free_rx_ring(struct rt2560_softc *,
110 struct rt2560_rx_ring *);
111 static int rt2560_newstate(struct ieee80211vap *,
112 enum ieee80211_state, int);
113 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
114 static void rt2560_encryption_intr(struct rt2560_softc *);
115 static void rt2560_tx_intr(struct rt2560_softc *);
116 static void rt2560_prio_intr(struct rt2560_softc *);
117 static void rt2560_decryption_intr(struct rt2560_softc *);
118 static void rt2560_rx_intr(struct rt2560_softc *);
119 static void rt2560_beacon_update(struct ieee80211vap *, int item);
120 static void rt2560_beacon_expire(struct rt2560_softc *);
121 static void rt2560_wakeup_expire(struct rt2560_softc *);
122 static void rt2560_scan_start(struct ieee80211com *);
123 static void rt2560_scan_end(struct ieee80211com *);
124 static void rt2560_set_channel(struct ieee80211com *);
125 static void rt2560_setup_tx_desc(struct rt2560_softc *,
126 struct rt2560_tx_desc *, uint32_t, int, int, int,
127 bus_addr_t);
128 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
129 struct ieee80211_node *);
130 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
131 struct ieee80211_node *);
132 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
133 struct ieee80211_node *);
134 static int rt2560_transmit(struct ieee80211com *, struct mbuf *);
135 static void rt2560_start(struct rt2560_softc *);
136 static void rt2560_watchdog(void *);
137 static void rt2560_parent(struct ieee80211com *);
138 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t,
139 uint8_t);
140 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t);
141 static void rt2560_rf_write(struct rt2560_softc *, uint8_t,
142 uint32_t);
143 static void rt2560_set_chan(struct rt2560_softc *,
144 struct ieee80211_channel *);
145 #if 0
146 static void rt2560_disable_rf_tune(struct rt2560_softc *);
147 #endif
148 static void rt2560_enable_tsf_sync(struct rt2560_softc *);
149 static void rt2560_enable_tsf(struct rt2560_softc *);
150 static void rt2560_update_plcp(struct rt2560_softc *);
151 static void rt2560_update_slot(struct ieee80211com *);
152 static void rt2560_set_basicrates(struct rt2560_softc *,
153 const struct ieee80211_rateset *);
154 static void rt2560_update_led(struct rt2560_softc *, int, int);
155 static void rt2560_set_bssid(struct rt2560_softc *, const uint8_t *);
156 static void rt2560_set_macaddr(struct rt2560_softc *,
157 const uint8_t *);
158 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
159 static void rt2560_update_promisc(struct ieee80211com *);
160 static const char *rt2560_get_rf(int);
161 static void rt2560_read_config(struct rt2560_softc *);
162 static int rt2560_bbp_init(struct rt2560_softc *);
163 static void rt2560_set_txantenna(struct rt2560_softc *, int);
164 static void rt2560_set_rxantenna(struct rt2560_softc *, int);
165 static void rt2560_init_locked(struct rt2560_softc *);
166 static void rt2560_init(void *);
167 static void rt2560_stop_locked(struct rt2560_softc *);
168 static int rt2560_raw_xmit(struct ieee80211_node *, struct mbuf *,
169 const struct ieee80211_bpf_params *);
170
171 static const struct {
172 uint32_t reg;
173 uint32_t val;
174 } rt2560_def_mac[] = {
175 RT2560_DEF_MAC
176 };
177
178 static const struct {
179 uint8_t reg;
180 uint8_t val;
181 } rt2560_def_bbp[] = {
182 RT2560_DEF_BBP
183 };
184
185 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2;
186 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2;
187 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2;
188 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2;
189 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2;
190 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2;
191 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2;
192 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2;
193
194 static const struct {
195 uint8_t chan;
196 uint32_t r1, r2, r4;
197 } rt2560_rf5222[] = {
198 RT2560_RF5222
199 };
200
201 int
202 rt2560_attach(device_t dev, int id)
203 {
204 struct rt2560_softc *sc = device_get_softc(dev);
205 struct ieee80211com *ic = &sc->sc_ic;
206 uint8_t bands[IEEE80211_MODE_BYTES];
207 int error;
208
209 sc->sc_dev = dev;
210
211 #if defined(__DragonFly__)
212 lockinit(&sc->sc_mtx, device_get_nameunit(dev), 0, LK_CANRECURSE);
213 #else
214 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
215 MTX_DEF | MTX_RECURSE);
216 #endif
217
218 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
219 mbufq_init(&sc->sc_snd, ifqmaxlen);
220
221 /* retrieve RT2560 rev. no */
222 sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
223
224 /* retrieve RF rev. no and various other things from EEPROM */
225 rt2560_read_config(sc);
226
227 device_printf(dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
228 sc->asic_rev, rt2560_get_rf(sc->rf_rev));
229
230 /*
231 * Allocate Tx and Rx rings.
232 */
233 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
234 if (error != 0) {
235 device_printf(sc->sc_dev, "could not allocate Tx ring\n");
236 goto fail1;
237 }
238
239 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
240 if (error != 0) {
241 device_printf(sc->sc_dev, "could not allocate ATIM ring\n");
242 goto fail2;
243 }
244
245 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
246 if (error != 0) {
247 device_printf(sc->sc_dev, "could not allocate Prio ring\n");
248 goto fail3;
249 }
250
251 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
252 if (error != 0) {
253 device_printf(sc->sc_dev, "could not allocate Beacon ring\n");
254 goto fail4;
255 }
256
257 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
258 if (error != 0) {
259 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
260 goto fail5;
261 }
262
263 /* retrieve MAC address */
264 rt2560_get_macaddr(sc, ic->ic_macaddr);
265
266 ic->ic_softc = sc;
267 ic->ic_name = device_get_nameunit(dev);
268 ic->ic_opmode = IEEE80211_M_STA;
269 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
270
271 /* set device capabilities */
272 ic->ic_caps =
273 IEEE80211_C_STA /* station mode */
274 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
275 | IEEE80211_C_HOSTAP /* hostap mode */
276 | IEEE80211_C_MONITOR /* monitor mode */
277 | IEEE80211_C_AHDEMO /* adhoc demo mode */
278 | IEEE80211_C_WDS /* 4-address traffic works */
279 | IEEE80211_C_MBSS /* mesh point link mode */
280 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
281 | IEEE80211_C_SHSLOT /* short slot time supported */
282 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
283 | IEEE80211_C_BGSCAN /* capable of bg scanning */
284 #ifdef notyet
285 | IEEE80211_C_TXFRAG /* handle tx frags */
286 #endif
287 ;
288
289 memset(bands, 0, sizeof(bands));
290 setbit(bands, IEEE80211_MODE_11B);
291 setbit(bands, IEEE80211_MODE_11G);
292 if (sc->rf_rev == RT2560_RF_5222)
293 setbit(bands, IEEE80211_MODE_11A);
294 ieee80211_init_channels(ic, NULL, bands);
295
296 ieee80211_ifattach(ic);
297 ic->ic_raw_xmit = rt2560_raw_xmit;
298 ic->ic_updateslot = rt2560_update_slot;
299 ic->ic_update_promisc = rt2560_update_promisc;
300 ic->ic_scan_start = rt2560_scan_start;
301 ic->ic_scan_end = rt2560_scan_end;
302 ic->ic_set_channel = rt2560_set_channel;
303
304 ic->ic_vap_create = rt2560_vap_create;
305 ic->ic_vap_delete = rt2560_vap_delete;
306 ic->ic_parent = rt2560_parent;
307 ic->ic_transmit = rt2560_transmit;
308
309 ieee80211_radiotap_attach(ic,
310 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
311 RT2560_TX_RADIOTAP_PRESENT,
312 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
313 RT2560_RX_RADIOTAP_PRESENT);
314
315 /*
316 * Add a few sysctl knobs.
317 */
318 #ifdef RAL_DEBUG
319 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
320 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
321 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
322 #endif
323 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
324 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
325 "txantenna", CTLFLAG_RW, &sc->tx_ant, 0, "tx antenna (0=auto)");
326
327 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
328 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
329 "rxantenna", CTLFLAG_RW, &sc->rx_ant, 0, "rx antenna (0=auto)");
330
331 if (bootverbose)
332 ieee80211_announce(ic);
333
334 return 0;
335
336 fail5: rt2560_free_tx_ring(sc, &sc->bcnq);
337 fail4: rt2560_free_tx_ring(sc, &sc->prioq);
338 fail3: rt2560_free_tx_ring(sc, &sc->atimq);
339 fail2: rt2560_free_tx_ring(sc, &sc->txq);
340 #if defined(__DragonFly__)
341 fail1: lockuninit(&sc->sc_mtx);
342 #else
343 fail1: mtx_destroy(&sc->sc_mtx);
344 #endif
345
346 return ENXIO;
347 }
348
349 int
350 rt2560_detach(void *xsc)
351 {
352 struct rt2560_softc *sc = xsc;
353 struct ieee80211com *ic = &sc->sc_ic;
354
355 rt2560_stop(sc);
356
357 ieee80211_ifdetach(ic);
358 mbufq_drain(&sc->sc_snd);
359
360 rt2560_free_tx_ring(sc, &sc->txq);
361 rt2560_free_tx_ring(sc, &sc->atimq);
362 rt2560_free_tx_ring(sc, &sc->prioq);
363 rt2560_free_tx_ring(sc, &sc->bcnq);
364 rt2560_free_rx_ring(sc, &sc->rxq);
365
366 #if defined(__DragonFly__)
367 lockuninit(&sc->sc_mtx);
368 #else
369 mtx_destroy(&sc->sc_mtx);
370 #endif
371
372 return 0;
373 }
374
375 static struct ieee80211vap *
376 rt2560_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
377 enum ieee80211_opmode opmode, int flags,
378 const uint8_t bssid[IEEE80211_ADDR_LEN],
379 const uint8_t mac[IEEE80211_ADDR_LEN])
380 {
381 struct rt2560_softc *sc = ic->ic_softc;
382 struct rt2560_vap *rvp;
383 struct ieee80211vap *vap;
384
385 switch (opmode) {
386 case IEEE80211_M_STA:
387 case IEEE80211_M_IBSS:
388 case IEEE80211_M_AHDEMO:
389 case IEEE80211_M_MONITOR:
390 case IEEE80211_M_HOSTAP:
391 case IEEE80211_M_MBSS:
392 /* XXXRP: TBD */
393 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
394 device_printf(sc->sc_dev, "only 1 vap supported\n");
395 return NULL;
396 }
397 if (opmode == IEEE80211_M_STA)
398 flags |= IEEE80211_CLONE_NOBEACONS;
399 break;
400 case IEEE80211_M_WDS:
401 if (TAILQ_EMPTY(&ic->ic_vaps) ||
402 ic->ic_opmode != IEEE80211_M_HOSTAP) {
403 device_printf(sc->sc_dev,
404 "wds only supported in ap mode\n");
405 return NULL;
406 }
407 /*
408 * Silently remove any request for a unique
409 * bssid; WDS vap's always share the local
410 * mac address.
411 */
412 flags &= ~IEEE80211_CLONE_BSSID;
413 break;
414 default:
415 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
416 return NULL;
417 }
418 rvp = kmalloc(sizeof(struct rt2560_vap), M_80211_VAP,
419 M_WAITOK | M_ZERO);
420 vap = &rvp->ral_vap;
421 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
422
423 /* override state transition machine */
424 rvp->ral_newstate = vap->iv_newstate;
425 vap->iv_newstate = rt2560_newstate;
426 vap->iv_update_beacon = rt2560_beacon_update;
427
428 ieee80211_ratectl_init(vap);
429 /* complete setup */
430 ieee80211_vap_attach(vap, ieee80211_media_change,
431 ieee80211_media_status, mac);
432 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
433 ic->ic_opmode = opmode;
434 return vap;
435 }
436
437 static void
438 rt2560_vap_delete(struct ieee80211vap *vap)
439 {
440 struct rt2560_vap *rvp = RT2560_VAP(vap);
441
442 ieee80211_ratectl_deinit(vap);
443 ieee80211_vap_detach(vap);
444 kfree(rvp, M_80211_VAP);
445 }
446
447 void
448 rt2560_resume(void *xsc)
449 {
450 struct rt2560_softc *sc = xsc;
451
452 if (sc->sc_ic.ic_nrunning > 0)
453 rt2560_init(sc);
454 }
455
456 static void
457 rt2560_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
458 {
459 if (error != 0)
460 return;
461
462 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
463
464 *(bus_addr_t *)arg = segs[0].ds_addr;
465 }
466
467 static int
468 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
469 int count)
470 {
471 int i, error;
472
473 ring->count = count;
474 ring->queued = 0;
475 ring->cur = ring->next = 0;
476 ring->cur_encrypt = ring->next_encrypt = 0;
477
478 #if defined(__DragonFly__)
479 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
480 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
481 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE,
482 0, &ring->desc_dmat);
483 #else
484 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
485 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
486 count * RT2560_TX_DESC_SIZE, 1, count * RT2560_TX_DESC_SIZE,
487 0, NULL, NULL, &ring->desc_dmat);
488 #endif
489 if (error != 0) {
490 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
491 goto fail;
492 }
493
494 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
495 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
496 if (error != 0) {
497 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
498 goto fail;
499 }
500
501 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
502 count * RT2560_TX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr,
503 0);
504 if (error != 0) {
505 device_printf(sc->sc_dev, "could not load desc DMA map\n");
506 goto fail;
507 }
508
509 ring->data = kmalloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
510 M_INTWAIT | M_ZERO);
511 if (ring->data == NULL) {
512 device_printf(sc->sc_dev, "could not allocate soft data\n");
513 error = ENOMEM;
514 goto fail;
515 }
516
517 #if defined(__DragonFly__)
518 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
519 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
520 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0,
521 &ring->data_dmat);
522 #else
523 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
524 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
525 MCLBYTES, RT2560_MAX_SCATTER, MCLBYTES, 0, NULL, NULL,
526 &ring->data_dmat);
527 #endif
528 if (error != 0) {
529 device_printf(sc->sc_dev, "could not create data DMA tag\n");
530 goto fail;
531 }
532
533 for (i = 0; i < count; i++) {
534 error = bus_dmamap_create(ring->data_dmat, 0,
535 &ring->data[i].map);
536 if (error != 0) {
537 device_printf(sc->sc_dev, "could not create DMA map\n");
538 goto fail;
539 }
540 }
541
542 return 0;
543
544 fail: rt2560_free_tx_ring(sc, ring);
545 return error;
546 }
547
548 static void
549 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
550 {
551 struct rt2560_tx_desc *desc;
552 struct rt2560_tx_data *data;
553 int i;
554
555 for (i = 0; i < ring->count; i++) {
556 desc = &ring->desc[i];
557 data = &ring->data[i];
558
559 if (data->m != NULL) {
560 bus_dmamap_sync(ring->data_dmat, data->map,
561 BUS_DMASYNC_POSTWRITE);
562 bus_dmamap_unload(ring->data_dmat, data->map);
563 m_freem(data->m);
564 data->m = NULL;
565 }
566
567 if (data->ni != NULL) {
568 ieee80211_free_node(data->ni);
569 data->ni = NULL;
570 }
571
572 desc->flags = 0;
573 }
574
575 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
576
577 ring->queued = 0;
578 ring->cur = ring->next = 0;
579 ring->cur_encrypt = ring->next_encrypt = 0;
580 }
581
582 static void
583 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
584 {
585 struct rt2560_tx_data *data;
586 int i;
587
588 if (ring->desc != NULL) {
589 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
590 BUS_DMASYNC_POSTWRITE);
591 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
592 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
593 }
594
595 if (ring->desc_dmat != NULL)
596 bus_dma_tag_destroy(ring->desc_dmat);
597
598 if (ring->data != NULL) {
599 for (i = 0; i < ring->count; i++) {
600 data = &ring->data[i];
601
602 if (data->m != NULL) {
603 bus_dmamap_sync(ring->data_dmat, data->map,
604 BUS_DMASYNC_POSTWRITE);
605 bus_dmamap_unload(ring->data_dmat, data->map);
606 m_freem(data->m);
607 }
608
609 if (data->ni != NULL)
610 ieee80211_free_node(data->ni);
611
612 if (data->map != NULL)
613 bus_dmamap_destroy(ring->data_dmat, data->map);
614 }
615
616 kfree(ring->data, M_DEVBUF);
617 }
618
619 if (ring->data_dmat != NULL)
620 bus_dma_tag_destroy(ring->data_dmat);
621 }
622
623 static int
624 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
625 int count)
626 {
627 struct rt2560_rx_desc *desc;
628 struct rt2560_rx_data *data;
629 bus_addr_t physaddr;
630 int i, error;
631
632 ring->count = count;
633 ring->cur = ring->next = 0;
634 ring->cur_decrypt = 0;
635
636 #if defined(__DragonFly__)
637 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
638 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
639 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE,
640 0, &ring->desc_dmat);
641 #else
642 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
643 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
644 count * RT2560_RX_DESC_SIZE, 1, count * RT2560_RX_DESC_SIZE,
645 0, NULL, NULL, &ring->desc_dmat);
646 #endif
647 if (error != 0) {
648 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
649 goto fail;
650 }
651
652 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
653 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
654 if (error != 0) {
655 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
656 goto fail;
657 }
658
659 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
660 count * RT2560_RX_DESC_SIZE, rt2560_dma_map_addr, &ring->physaddr,
661 0);
662 if (error != 0) {
663 device_printf(sc->sc_dev, "could not load desc DMA map\n");
664 goto fail;
665 }
666
667 ring->data = kmalloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
668 M_INTWAIT | M_ZERO);
669 if (ring->data == NULL) {
670 device_printf(sc->sc_dev, "could not allocate soft data\n");
671 error = ENOMEM;
672 goto fail;
673 }
674
675 /*
676 * Pre-allocate Rx buffers and populate Rx ring.
677 */
678 #if defined(__DragonFly__)
679 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
680 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
681 1, MCLBYTES, 0, &ring->data_dmat);
682 #else
683 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
684 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
685 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
686 #endif
687 if (error != 0) {
688 device_printf(sc->sc_dev, "could not create data DMA tag\n");
689 goto fail;
690 }
691
692 for (i = 0; i < count; i++) {
693 desc = &sc->rxq.desc[i];
694 data = &sc->rxq.data[i];
695
696 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
697 if (error != 0) {
698 device_printf(sc->sc_dev, "could not create DMA map\n");
699 goto fail;
700 }
701
702 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
703 if (data->m == NULL) {
704 device_printf(sc->sc_dev,
705 "could not allocate rx mbuf\n");
706 error = ENOMEM;
707 goto fail;
708 }
709
710 error = bus_dmamap_load(ring->data_dmat, data->map,
711 mtod(data->m, void *), MCLBYTES, rt2560_dma_map_addr,
712 &physaddr, 0);
713 if (error != 0) {
714 device_printf(sc->sc_dev,
715 "could not load rx buf DMA map");
716 goto fail;
717 }
718
719 desc->flags = htole32(RT2560_RX_BUSY);
720 desc->physaddr = htole32(physaddr);
721 }
722
723 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
724
725 return 0;
726
727 fail: rt2560_free_rx_ring(sc, ring);
728 return error;
729 }
730
731 static void
732 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
733 {
734 int i;
735
736 for (i = 0; i < ring->count; i++) {
737 ring->desc[i].flags = htole32(RT2560_RX_BUSY);
738 ring->data[i].drop = 0;
739 }
740
741 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
742
743 ring->cur = ring->next = 0;
744 ring->cur_decrypt = 0;
745 }
746
747 static void
748 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
749 {
750 struct rt2560_rx_data *data;
751 int i;
752
753 if (ring->desc != NULL) {
754 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
755 BUS_DMASYNC_POSTWRITE);
756 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
757 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
758 }
759
760 if (ring->desc_dmat != NULL)
761 bus_dma_tag_destroy(ring->desc_dmat);
762
763 if (ring->data != NULL) {
764 for (i = 0; i < ring->count; i++) {
765 data = &ring->data[i];
766
767 if (data->m != NULL) {
768 bus_dmamap_sync(ring->data_dmat, data->map,
769 BUS_DMASYNC_POSTREAD);
770 bus_dmamap_unload(ring->data_dmat, data->map);
771 m_freem(data->m);
772 }
773
774 if (data->map != NULL)
775 bus_dmamap_destroy(ring->data_dmat, data->map);
776 }
777
778 kfree(ring->data, M_DEVBUF);
779 }
780
781 if (ring->data_dmat != NULL)
782 bus_dma_tag_destroy(ring->data_dmat);
783 }
784
785 static int
786 rt2560_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
787 {
788 struct rt2560_vap *rvp = RT2560_VAP(vap);
789 struct rt2560_softc *sc = vap->iv_ic->ic_softc;
790 int error;
791
792 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
793 /* abort TSF synchronization */
794 RAL_WRITE(sc, RT2560_CSR14, 0);
795
796 /* turn association led off */
797 rt2560_update_led(sc, 0, 0);
798 }
799
800 error = rvp->ral_newstate(vap, nstate, arg);
801
802 if (error == 0 && nstate == IEEE80211_S_RUN) {
803 struct ieee80211_node *ni = vap->iv_bss;
804 struct mbuf *m;
805
806 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
807 rt2560_update_plcp(sc);
808 rt2560_set_basicrates(sc, &ni->ni_rates);
809 rt2560_set_bssid(sc, ni->ni_bssid);
810 }
811
812 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
813 vap->iv_opmode == IEEE80211_M_IBSS ||
814 vap->iv_opmode == IEEE80211_M_MBSS) {
815 m = ieee80211_beacon_alloc(ni);
816 if (m == NULL) {
817 device_printf(sc->sc_dev,
818 "could not allocate beacon\n");
819 return ENOBUFS;
820 }
821 ieee80211_ref_node(ni);
822 error = rt2560_tx_bcn(sc, m, ni);
823 if (error != 0)
824 return error;
825 }
826
827 /* turn association led on */
828 rt2560_update_led(sc, 1, 0);
829
830 if (vap->iv_opmode != IEEE80211_M_MONITOR)
831 rt2560_enable_tsf_sync(sc);
832 else
833 rt2560_enable_tsf(sc);
834 }
835 return error;
836 }
837
838 /*
839 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
840 * 93C66).
841 */
842 static uint16_t
843 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
844 {
845 uint32_t tmp;
846 uint16_t val;
847 int n;
848
849 /* clock C once before the first command */
850 RT2560_EEPROM_CTL(sc, 0);
851
852 RT2560_EEPROM_CTL(sc, RT2560_S);
853 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
854 RT2560_EEPROM_CTL(sc, RT2560_S);
855
856 /* write start bit (1) */
857 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
858 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
859
860 /* write READ opcode (10) */
861 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
862 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
863 RT2560_EEPROM_CTL(sc, RT2560_S);
864 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
865
866 /* write address (A5-A0 or A7-A0) */
867 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
868 for (; n >= 0; n--) {
869 RT2560_EEPROM_CTL(sc, RT2560_S |
870 (((addr >> n) & 1) << RT2560_SHIFT_D));
871 RT2560_EEPROM_CTL(sc, RT2560_S |
872 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
873 }
874
875 RT2560_EEPROM_CTL(sc, RT2560_S);
876
877 /* read data Q15-Q0 */
878 val = 0;
879 for (n = 15; n >= 0; n--) {
880 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
881 tmp = RAL_READ(sc, RT2560_CSR21);
882 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
883 RT2560_EEPROM_CTL(sc, RT2560_S);
884 }
885
886 RT2560_EEPROM_CTL(sc, 0);
887
888 /* clear Chip Select and clock C */
889 RT2560_EEPROM_CTL(sc, RT2560_S);
890 RT2560_EEPROM_CTL(sc, 0);
891 RT2560_EEPROM_CTL(sc, RT2560_C);
892
893 return val;
894 }
895
896 /*
897 * Some frames were processed by the hardware cipher engine and are ready for
898 * transmission.
899 */
900 static void
901 rt2560_encryption_intr(struct rt2560_softc *sc)
902 {
903 struct rt2560_tx_desc *desc;
904 int hw;
905
906 /* retrieve last descriptor index processed by cipher engine */
907 hw = RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr;
908 hw /= RT2560_TX_DESC_SIZE;
909
910 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
911 BUS_DMASYNC_POSTREAD);
912
913 while (sc->txq.next_encrypt != hw) {
914 if (sc->txq.next_encrypt == sc->txq.cur_encrypt) {
915 kprintf("hw encrypt %d, cur_encrypt %d\n", hw,
916 sc->txq.cur_encrypt);
917 break;
918 }
919
920 desc = &sc->txq.desc[sc->txq.next_encrypt];
921
922 if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
923 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY))
924 break;
925
926 /* for TKIP, swap eiv field to fix a bug in ASIC */
927 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
928 RT2560_TX_CIPHER_TKIP)
929 desc->eiv = bswap32(desc->eiv);
930
931 /* mark the frame ready for transmission */
932 desc->flags |= htole32(RT2560_TX_VALID);
933 desc->flags |= htole32(RT2560_TX_BUSY);
934
935 DPRINTFN(sc, 15, "encryption done idx=%u\n",
936 sc->txq.next_encrypt);
937
938 sc->txq.next_encrypt =
939 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
940 }
941
942 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
943 BUS_DMASYNC_PREWRITE);
944
945 /* kick Tx */
946 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
947 }
948
949 static void
950 rt2560_tx_intr(struct rt2560_softc *sc)
951 {
952 struct rt2560_tx_desc *desc;
953 struct rt2560_tx_data *data;
954 struct mbuf *m;
955 struct ieee80211vap *vap;
956 struct ieee80211_node *ni;
957 uint32_t flags;
958 int retrycnt, status;
959
960 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
961 BUS_DMASYNC_POSTREAD);
962
963 for (;;) {
964 desc = &sc->txq.desc[sc->txq.next];
965 data = &sc->txq.data[sc->txq.next];
966
967 flags = le32toh(desc->flags);
968 if ((flags & RT2560_TX_BUSY) ||
969 (flags & RT2560_TX_CIPHER_BUSY) ||
970 !(flags & RT2560_TX_VALID))
971 break;
972
973 m = data->m;
974 ni = data->ni;
975 vap = ni->ni_vap;
976
977 switch (flags & RT2560_TX_RESULT_MASK) {
978 case RT2560_TX_SUCCESS:
979 retrycnt = 0;
980
981 DPRINTFN(sc, 10, "%s\n", "data frame sent successfully");
982 if (data->rix != IEEE80211_FIXED_RATE_NONE)
983 ieee80211_ratectl_tx_complete(vap, ni,
984 IEEE80211_RATECTL_TX_SUCCESS,
985 &retrycnt, NULL);
986 status = 0;
987 break;
988
989 case RT2560_TX_SUCCESS_RETRY:
990 retrycnt = RT2560_TX_RETRYCNT(flags);
991
992 DPRINTFN(sc, 9, "data frame sent after %u retries\n",
993 retrycnt);
994 if (data->rix != IEEE80211_FIXED_RATE_NONE)
995 ieee80211_ratectl_tx_complete(vap, ni,
996 IEEE80211_RATECTL_TX_SUCCESS,
997 &retrycnt, NULL);
998 status = 0;
999 break;
1000
1001 case RT2560_TX_FAIL_RETRY:
1002 retrycnt = RT2560_TX_RETRYCNT(flags);
1003
1004 DPRINTFN(sc, 9, "data frame failed after %d retries\n",
1005 retrycnt);
1006 if (data->rix != IEEE80211_FIXED_RATE_NONE)
1007 ieee80211_ratectl_tx_complete(vap, ni,
1008 IEEE80211_RATECTL_TX_FAILURE,
1009 &retrycnt, NULL);
1010 status = 1;
1011 break;
1012
1013 case RT2560_TX_FAIL_INVALID:
1014 case RT2560_TX_FAIL_OTHER:
1015 default:
1016 device_printf(sc->sc_dev, "sending data frame failed "
1017 "0x%08x\n", flags);
1018 status = 1;
1019 }
1020
1021 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1022 BUS_DMASYNC_POSTWRITE);
1023 bus_dmamap_unload(sc->txq.data_dmat, data->map);
1024
1025 ieee80211_tx_complete(ni, m, status);
1026 data->ni = NULL;
1027 data->m = NULL;
1028
1029 /* descriptor is no longer valid */
1030 desc->flags &= ~htole32(RT2560_TX_VALID);
1031
1032 DPRINTFN(sc, 15, "tx done idx=%u\n", sc->txq.next);
1033
1034 sc->txq.queued--;
1035 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
1036 }
1037
1038 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1039 BUS_DMASYNC_PREWRITE);
1040
1041 if (sc->prioq.queued == 0 && sc->txq.queued == 0)
1042 sc->sc_tx_timer = 0;
1043
1044 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1)
1045 rt2560_start(sc);
1046 }
1047
1048 static void
1049 rt2560_prio_intr(struct rt2560_softc *sc)
1050 {
1051 struct rt2560_tx_desc *desc;
1052 struct rt2560_tx_data *data;
1053 struct ieee80211_node *ni;
1054 struct mbuf *m;
1055 int flags;
1056
1057 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1058 BUS_DMASYNC_POSTREAD);
1059
1060 for (;;) {
1061 desc = &sc->prioq.desc[sc->prioq.next];
1062 data = &sc->prioq.data[sc->prioq.next];
1063
1064 flags = le32toh(desc->flags);
1065 if ((flags & RT2560_TX_BUSY) || (flags & RT2560_TX_VALID) == 0)
1066 break;
1067
1068 switch (flags & RT2560_TX_RESULT_MASK) {
1069 case RT2560_TX_SUCCESS:
1070 DPRINTFN(sc, 10, "%s\n", "mgt frame sent successfully");
1071 break;
1072
1073 case RT2560_TX_SUCCESS_RETRY:
1074 DPRINTFN(sc, 9, "mgt frame sent after %u retries\n",
1075 (flags >> 5) & 0x7);
1076 break;
1077
1078 case RT2560_TX_FAIL_RETRY:
1079 DPRINTFN(sc, 9, "%s\n",
1080 "sending mgt frame failed (too much retries)");
1081 break;
1082
1083 case RT2560_TX_FAIL_INVALID:
1084 case RT2560_TX_FAIL_OTHER:
1085 default:
1086 device_printf(sc->sc_dev, "sending mgt frame failed "
1087 "0x%08x\n", flags);
1088 break;
1089 }
1090
1091 bus_dmamap_sync(sc->prioq.data_dmat, data->map,
1092 BUS_DMASYNC_POSTWRITE);
1093 bus_dmamap_unload(sc->prioq.data_dmat, data->map);
1094
1095 m = data->m;
1096 data->m = NULL;
1097 ni = data->ni;
1098 data->ni = NULL;
1099
1100 /* descriptor is no longer valid */
1101 desc->flags &= ~htole32(RT2560_TX_VALID);
1102
1103 DPRINTFN(sc, 15, "prio done idx=%u\n", sc->prioq.next);
1104
1105 sc->prioq.queued--;
1106 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1107
1108 if (m->m_flags & M_TXCB)
1109 ieee80211_process_callback(ni, m,
1110 (flags & RT2560_TX_RESULT_MASK) &~
1111 (RT2560_TX_SUCCESS | RT2560_TX_SUCCESS_RETRY));
1112 m_freem(m);
1113 ieee80211_free_node(ni);
1114 }
1115
1116 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1117 BUS_DMASYNC_PREWRITE);
1118
1119 if (sc->prioq.queued == 0 && sc->txq.queued == 0)
1120 sc->sc_tx_timer = 0;
1121
1122 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT)
1123 rt2560_start(sc);
1124 }
1125
1126 /*
1127 * Some frames were processed by the hardware cipher engine and are ready for
1128 * handoff to the IEEE802.11 layer.
1129 */
1130 static void
1131 rt2560_decryption_intr(struct rt2560_softc *sc)
1132 {
1133 struct ieee80211com *ic = &sc->sc_ic;
1134 struct rt2560_rx_desc *desc;
1135 struct rt2560_rx_data *data;
1136 bus_addr_t physaddr;
1137 struct ieee80211_frame *wh;
1138 struct ieee80211_node *ni;
1139 struct mbuf *mnew, *m;
1140 int hw, error;
1141 int8_t rssi, nf;
1142
1143 /* retrieve last descriptor index processed by cipher engine */
1144 hw = RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr;
1145 hw /= RT2560_RX_DESC_SIZE;
1146
1147 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1148 BUS_DMASYNC_POSTREAD);
1149
1150 for (; sc->rxq.cur_decrypt != hw;) {
1151 desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1152 data = &sc->rxq.data[sc->rxq.cur_decrypt];
1153
1154 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1155 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1156 break;
1157
1158 if (data->drop) {
1159 #if defined(__DragonFly__)
1160 /* not implemeted */
1161 #else
1162 counter_u64_add(ic->ic_ierrors, 1);
1163 #endif
1164 goto skip;
1165 }
1166
1167 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1168 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1169 #if defined(__DragonFly__)
1170 /* not implemeted */
1171 #else
1172 counter_u64_add(ic->ic_ierrors, 1);
1173 #endif
1174 goto skip;
1175 }
1176
1177 /*
1178 * Try to allocate a new mbuf for this ring element and load it
1179 * before processing the current mbuf. If the ring element
1180 * cannot be loaded, drop the received packet and reuse the old
1181 * mbuf. In the unlikely case that the old mbuf can't be
1182 * reloaded either, explicitly panic.
1183 */
1184 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1185 if (mnew == NULL) {
1186 #if defined(__DragonFly__)
1187 /* not implemeted */
1188 #else
1189 counter_u64_add(ic->ic_ierrors, 1);
1190 #endif
1191 goto skip;
1192 }
1193
1194 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1195 BUS_DMASYNC_POSTREAD);
1196 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1197
1198 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1199 mtod(mnew, void *), MCLBYTES, rt2560_dma_map_addr,
1200 &physaddr, 0);
1201 if (error != 0) {
1202 m_freem(mnew);
1203
1204 /* try to reload the old mbuf */
1205 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1206 mtod(data->m, void *), MCLBYTES,
1207 rt2560_dma_map_addr, &physaddr, 0);
1208 if (error != 0) {
1209 /* very unlikely that it will fail... */
1210 panic("%s: could not load old rx mbuf",
1211 device_get_name(sc->sc_dev));
1212 }
1213 #if defined(__DragonFly__)
1214 /* not implemeted */
1215 #else
1216 counter_u64_add(ic->ic_ierrors, 1);
1217 #endif
1218 goto skip;
1219 }
1220
1221 /*
1222 * New mbuf successfully loaded, update Rx ring and continue
1223 * processing.
1224 */
1225 m = data->m;
1226 data->m = mnew;
1227 desc->physaddr = htole32(physaddr);
1228
1229 /* finalize mbuf */
1230 m->m_pkthdr.len = m->m_len =
1231 (le32toh(desc->flags) >> 16) & 0xfff;
1232
1233 rssi = RT2560_RSSI(sc, desc->rssi);
1234 nf = RT2560_NOISE_FLOOR;
1235 if (ieee80211_radiotap_active(ic)) {
1236 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1237 uint32_t tsf_lo, tsf_hi;
1238
1239 /* get timestamp (low and high 32 bits) */
1240 tsf_hi = RAL_READ(sc, RT2560_CSR17);
1241 tsf_lo = RAL_READ(sc, RT2560_CSR16);
1242
1243 tap->wr_tsf =
1244 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1245 tap->wr_flags = 0;
1246 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1247 (desc->flags & htole32(RT2560_RX_OFDM)) ?
1248 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1249 tap->wr_antenna = sc->rx_ant;
1250 tap->wr_antsignal = nf + rssi;
1251 tap->wr_antnoise = nf;
1252 }
1253
1254 sc->sc_flags |= RT2560_F_INPUT_RUNNING;
1255 RAL_UNLOCK(sc);
1256 wh = mtod(m, struct ieee80211_frame *);
1257 ni = ieee80211_find_rxnode(ic,
1258 (struct ieee80211_frame_min *)wh);
1259 if (ni != NULL) {
1260 (void) ieee80211_input(ni, m, rssi, nf);
1261 ieee80211_free_node(ni);
1262 } else
1263 (void) ieee80211_input_all(ic, m, rssi, nf);
1264
1265 RAL_LOCK(sc);
1266 sc->sc_flags &= ~RT2560_F_INPUT_RUNNING;
1267 skip: desc->flags = htole32(RT2560_RX_BUSY);
1268
1269 DPRINTFN(sc, 15, "decryption done idx=%u\n", sc->rxq.cur_decrypt);
1270
1271 sc->rxq.cur_decrypt =
1272 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1273 }
1274
1275 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1276 BUS_DMASYNC_PREWRITE);
1277 }
1278
1279 /*
1280 * Some frames were received. Pass them to the hardware cipher engine before
1281 * sending them to the 802.11 layer.
1282 */
1283 static void
1284 rt2560_rx_intr(struct rt2560_softc *sc)
1285 {
1286 struct rt2560_rx_desc *desc;
1287 struct rt2560_rx_data *data;
1288
1289 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1290 BUS_DMASYNC_POSTREAD);
1291
1292 for (;;) {
1293 desc = &sc->rxq.desc[sc->rxq.cur];
1294 data = &sc->rxq.data[sc->rxq.cur];
1295
1296 if ((le32toh(desc->flags) & RT2560_RX_BUSY) ||
1297 (le32toh(desc->flags) & RT2560_RX_CIPHER_BUSY))
1298 break;
1299
1300 data->drop = 0;
1301
1302 if ((le32toh(desc->flags) & RT2560_RX_PHY_ERROR) ||
1303 (le32toh(desc->flags) & RT2560_RX_CRC_ERROR)) {
1304 /*
1305 * This should not happen since we did not request
1306 * to receive those frames when we filled RXCSR0.
1307 */
1308 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1309 le32toh(desc->flags));
1310 data->drop = 1;
1311 }
1312
1313 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1314 DPRINTFN(sc, 5, "%s\n", "bad length");
1315 data->drop = 1;
1316 }
1317
1318 /* mark the frame for decryption */
1319 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1320
1321 DPRINTFN(sc, 15, "rx done idx=%u\n", sc->rxq.cur);
1322
1323 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1324 }
1325
1326 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1327 BUS_DMASYNC_PREWRITE);
1328
1329 /* kick decrypt */
1330 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1331 }
1332
1333 static void
1334 rt2560_beacon_update(struct ieee80211vap *vap, int item)
1335 {
1336 struct ieee80211_beacon_offsets *bo = &vap->iv_bcn_off;
1337
1338 setbit(bo->bo_flags, item);
1339 }
1340
1341 /*
1342 * This function is called periodically in IBSS mode when a new beacon must be
1343 * sent out.
1344 */
1345 static void
1346 rt2560_beacon_expire(struct rt2560_softc *sc)
1347 {
1348 struct ieee80211com *ic = &sc->sc_ic;
1349 struct rt2560_tx_data *data;
1350
1351 if (ic->ic_opmode != IEEE80211_M_IBSS &&
1352 ic->ic_opmode != IEEE80211_M_HOSTAP &&
1353 ic->ic_opmode != IEEE80211_M_MBSS)
1354 return;
1355
1356 data = &sc->bcnq.data[sc->bcnq.next];
1357 /*
1358 * Don't send beacon if bsschan isn't set
1359 */
1360 if (data->ni == NULL)
1361 return;
1362
1363 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
1364 bus_dmamap_unload(sc->bcnq.data_dmat, data->map);
1365
1366 /* XXX 1 =>'s mcast frames which means all PS sta's will wakeup! */
1367 ieee80211_beacon_update(data->ni, data->m, 1);
1368
1369 rt2560_tx_bcn(sc, data->m, data->ni);
1370
1371 DPRINTFN(sc, 15, "%s", "beacon expired\n");
1372
1373 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1374 }
1375
1376 /* ARGSUSED */
1377 static void
1378 rt2560_wakeup_expire(struct rt2560_softc *sc)
1379 {
1380 DPRINTFN(sc, 2, "%s", "wakeup expired\n");
1381 }
1382
1383 void
1384 rt2560_intr(void *arg)
1385 {
1386 struct rt2560_softc *sc = arg;
1387 uint32_t r;
1388
1389 RAL_LOCK(sc);
1390
1391 /* disable interrupts */
1392 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1393
1394 /* don't re-enable interrupts if we're shutting down */
1395 if (!(sc->sc_flags & RT2560_F_RUNNING)) {
1396 RAL_UNLOCK(sc);
1397 return;
1398 }
1399
1400 r = RAL_READ(sc, RT2560_CSR7);
1401 RAL_WRITE(sc, RT2560_CSR7, r);
1402
1403 if (r & RT2560_BEACON_EXPIRE)
1404 rt2560_beacon_expire(sc);
1405
1406 if (r & RT2560_WAKEUP_EXPIRE)
1407 rt2560_wakeup_expire(sc);
1408
1409 if (r & RT2560_ENCRYPTION_DONE)
1410 rt2560_encryption_intr(sc);
1411
1412 if (r & RT2560_TX_DONE)
1413 rt2560_tx_intr(sc);
1414
1415 if (r & RT2560_PRIO_DONE)
1416 rt2560_prio_intr(sc);
1417
1418 if (r & RT2560_DECRYPTION_DONE)
1419 rt2560_decryption_intr(sc);
1420
1421 if (r & RT2560_RX_DONE) {
1422 rt2560_rx_intr(sc);
1423 rt2560_encryption_intr(sc);
1424 }
1425
1426 /* re-enable interrupts */
1427 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1428
1429 RAL_UNLOCK(sc);
1430 }
1431
1432 #define RAL_SIFS 10 /* us */
1433
1434 #define RT2560_TXRX_TURNAROUND 10 /* us */
1435
1436 static uint8_t
1437 rt2560_plcp_signal(int rate)
1438 {
1439 switch (rate) {
1440 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1441 case 12: return 0xb;
1442 case 18: return 0xf;
1443 case 24: return 0xa;
1444 case 36: return 0xe;
1445 case 48: return 0x9;
1446 case 72: return 0xd;
1447 case 96: return 0x8;
1448 case 108: return 0xc;
1449
1450 /* CCK rates (NB: not IEEE std, device-specific) */
1451 case 2: return 0x0;
1452 case 4: return 0x1;
1453 case 11: return 0x2;
1454 case 22: return 0x3;
1455 }
1456 return 0xff; /* XXX unsupported/unknown rate */
1457 }
1458
1459 static void
1460 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1461 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1462 {
1463 struct ieee80211com *ic = &sc->sc_ic;
1464 uint16_t plcp_length;
1465 int remainder;
1466
1467 desc->flags = htole32(flags);
1468 desc->flags |= htole32(len << 16);
1469
1470 desc->physaddr = htole32(physaddr);
1471 desc->wme = htole16(
1472 RT2560_AIFSN(2) |
1473 RT2560_LOGCWMIN(3) |
1474 RT2560_LOGCWMAX(8));
1475
1476 /* setup PLCP fields */
1477 desc->plcp_signal = rt2560_plcp_signal(rate);
1478 desc->plcp_service = 4;
1479
1480 len += IEEE80211_CRC_LEN;
1481 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1482 desc->flags |= htole32(RT2560_TX_OFDM);
1483
1484 plcp_length = len & 0xfff;
1485 desc->plcp_length_hi = plcp_length >> 6;
1486 desc->plcp_length_lo = plcp_length & 0x3f;
1487 } else {
1488 plcp_length = howmany(16 * len, rate);
1489 if (rate == 22) {
1490 remainder = (16 * len) % 22;
1491 if (remainder != 0 && remainder < 7)
1492 desc->plcp_service |= RT2560_PLCP_LENGEXT;
1493 }
1494 desc->plcp_length_hi = plcp_length >> 8;
1495 desc->plcp_length_lo = plcp_length & 0xff;
1496
1497 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1498 desc->plcp_signal |= 0x08;
1499 }
1500
1501 if (!encrypt)
1502 desc->flags |= htole32(RT2560_TX_VALID);
1503 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY)
1504 : htole32(RT2560_TX_BUSY);
1505 }
1506
1507 static int
1508 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1509 struct ieee80211_node *ni)
1510 {
1511 struct ieee80211vap *vap = ni->ni_vap;
1512 struct rt2560_tx_desc *desc;
1513 struct rt2560_tx_data *data;
1514 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1515 int nsegs, rate, error;
1516
1517 desc = &sc->bcnq.desc[sc->bcnq.cur];
1518 data = &sc->bcnq.data[sc->bcnq.cur];
1519
1520 /* XXX maybe a separate beacon rate? */
1521 rate = vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)].mgmtrate;
1522
1523 #if defined(__DragonFly__)
1524 error = bus_dmamap_load_mbuf_segment(sc->bcnq.data_dmat, data->map, m0,
1525 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1526 #else
1527 error = bus_dmamap_load_mbuf_sg(sc->bcnq.data_dmat, data->map, m0,
1528 segs, &nsegs, BUS_DMA_NOWAIT);
1529 #endif
1530 if (error != 0) {
1531 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1532 error);
1533 m_freem(m0);
1534 return error;
1535 }
1536
1537 if (ieee80211_radiotap_active_vap(vap)) {
1538 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1539
1540 tap->wt_flags = 0;
1541 tap->wt_rate = rate;
1542 tap->wt_antenna = sc->tx_ant;
1543
1544 ieee80211_radiotap_tx(vap, m0);
1545 }
1546
1547 data->m = m0;
1548 data->ni = ni;
1549
1550 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1551 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, segs->ds_addr);
1552
1553 DPRINTFN(sc, 10, "sending beacon frame len=%u idx=%u rate=%u\n",
1554 m0->m_pkthdr.len, sc->bcnq.cur, rate);
1555
1556 bus_dmamap_sync(sc->bcnq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1557 bus_dmamap_sync(sc->bcnq.desc_dmat, sc->bcnq.desc_map,
1558 BUS_DMASYNC_PREWRITE);
1559
1560 sc->bcnq.cur = (sc->bcnq.cur + 1) % RT2560_BEACON_RING_COUNT;
1561
1562 return 0;
1563 }
1564
1565 static int
1566 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1567 struct ieee80211_node *ni)
1568 {
1569 struct ieee80211vap *vap = ni->ni_vap;
1570 struct ieee80211com *ic = ni->ni_ic;
1571 struct rt2560_tx_desc *desc;
1572 struct rt2560_tx_data *data;
1573 struct ieee80211_frame *wh;
1574 struct ieee80211_key *k;
1575 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1576 uint16_t dur;
1577 uint32_t flags = 0;
1578 int nsegs, rate, error;
1579
1580 desc = &sc->prioq.desc[sc->prioq.cur];
1581 data = &sc->prioq.data[sc->prioq.cur];
1582
1583 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1584
1585 wh = mtod(m0, struct ieee80211_frame *);
1586
1587 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1588 k = ieee80211_crypto_encap(ni, m0);
1589 if (k == NULL) {
1590 m_freem(m0);
1591 return ENOBUFS;
1592 }
1593 }
1594
1595 #if defined(__DragonFly__)
1596 error = bus_dmamap_load_mbuf_segment(sc->prioq.data_dmat, data->map, m0,
1597 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1598 #else
1599 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0,
1600 segs, &nsegs, 0);
1601 #endif
1602 if (error != 0) {
1603 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1604 error);
1605 m_freem(m0);
1606 return error;
1607 }
1608
1609 if (ieee80211_radiotap_active_vap(vap)) {
1610 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1611
1612 tap->wt_flags = 0;
1613 tap->wt_rate = rate;
1614 tap->wt_antenna = sc->tx_ant;
1615
1616 ieee80211_radiotap_tx(vap, m0);
1617 }
1618
1619 data->m = m0;
1620 data->ni = ni;
1621 /* management frames are not taken into account for amrr */
1622 data->rix = IEEE80211_FIXED_RATE_NONE;
1623
1624 wh = mtod(m0, struct ieee80211_frame *);
1625
1626 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1627 flags |= RT2560_TX_ACK;
1628
1629 dur = ieee80211_ack_duration(ic->ic_rt,
1630 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1631 *(uint16_t *)wh->i_dur = htole16(dur);
1632
1633 /* tell hardware to add timestamp for probe responses */
1634 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
1635 IEEE80211_FC0_TYPE_MGT &&
1636 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
1637 IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1638 flags |= RT2560_TX_TIMESTAMP;
1639 }
1640
1641 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1642 segs->ds_addr);
1643
1644 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1645 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1646 BUS_DMASYNC_PREWRITE);
1647
1648 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1649 m0->m_pkthdr.len, sc->prioq.cur, rate);
1650
1651 /* kick prio */
1652 sc->prioq.queued++;
1653 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1654 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1655
1656 return 0;
1657 }
1658
1659 static int
1660 rt2560_sendprot(struct rt2560_softc *sc,
1661 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1662 {
1663 struct ieee80211com *ic = ni->ni_ic;
1664 const struct ieee80211_frame *wh;
1665 struct rt2560_tx_desc *desc;
1666 struct rt2560_tx_data *data;
1667 struct mbuf *mprot;
1668 int protrate, ackrate, pktlen, flags, isshort, error;
1669 uint16_t dur;
1670 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1671 int nsegs;
1672
1673 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1674 ("protection %d", prot));
1675
1676 wh = mtod(m, const struct ieee80211_frame *);
1677 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1678
1679 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1680 ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1681
1682 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1683 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1684 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1685 flags = RT2560_TX_MORE_FRAG;
1686 if (prot == IEEE80211_PROT_RTSCTS) {
1687 /* NB: CTS is the same size as an ACK */
1688 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1689 flags |= RT2560_TX_ACK;
1690 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1691 } else {
1692 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1693 }
1694 if (mprot == NULL) {
1695 /* XXX stat + msg */
1696 return ENOBUFS;
1697 }
1698
1699 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1700 data = &sc->txq.data[sc->txq.cur_encrypt];
1701
1702 #if defined(__DragonFly__)
1703 error = bus_dmamap_load_mbuf_segment(sc->txq.data_dmat, data->map,
1704 mprot, segs, 1, &nsegs, BUS_DMA_NOWAIT);
1705 #else
1706 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map,
1707 mprot, segs, &nsegs, 0);
1708 #endif
1709 if (error != 0) {
1710 device_printf(sc->sc_dev,
1711 "could not map mbuf (error %d)\n", error);
1712 m_freem(mprot);
1713 return error;
1714 }
1715
1716 data->m = mprot;
1717 data->ni = ieee80211_ref_node(ni);
1718 /* ctl frames are not taken into account for amrr */
1719 data->rix = IEEE80211_FIXED_RATE_NONE;
1720
1721 rt2560_setup_tx_desc(sc, desc, flags, mprot->m_pkthdr.len, protrate, 1,
1722 segs->ds_addr);
1723
1724 bus_dmamap_sync(sc->txq.data_dmat, data->map,
1725 BUS_DMASYNC_PREWRITE);
1726
1727 sc->txq.queued++;
1728 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1729
1730 return 0;
1731 }
1732
1733 static int
1734 rt2560_tx_raw(struct rt2560_softc *sc, struct mbuf *m0,
1735 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
1736 {
1737 struct ieee80211vap *vap = ni->ni_vap;
1738 struct ieee80211com *ic = ni->ni_ic;
1739 struct rt2560_tx_desc *desc;
1740 struct rt2560_tx_data *data;
1741 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1742 uint32_t flags;
1743 int nsegs, rate, error;
1744
1745 desc = &sc->prioq.desc[sc->prioq.cur];
1746 data = &sc->prioq.data[sc->prioq.cur];
1747
1748 rate = params->ibp_rate0;
1749 if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
1750 /* XXX fall back to mcast/mgmt rate? */
1751 m_freem(m0);
1752 return EINVAL;
1753 }
1754
1755 flags = 0;
1756 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
1757 flags |= RT2560_TX_ACK;
1758 if (params->ibp_flags & (IEEE80211_BPF_RTS|IEEE80211_BPF_CTS)) {
1759 error = rt2560_sendprot(sc, m0, ni,
1760 params->ibp_flags & IEEE80211_BPF_RTS ?
1761 IEEE80211_PROT_RTSCTS : IEEE80211_PROT_CTSONLY,
1762 rate);
1763 if (error) {
1764 m_freem(m0);
1765 return error;
1766 }
1767 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1768 }
1769
1770 #if defined(__DragonFly__)
1771 error = bus_dmamap_load_mbuf_segment(sc->prioq.data_dmat, data->map, m0,
1772 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1773 #else
1774 error = bus_dmamap_load_mbuf_sg(sc->prioq.data_dmat, data->map, m0,
1775 segs, &nsegs, 0);
1776 #endif
1777 if (error != 0) {
1778 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1779 error);
1780 m_freem(m0);
1781 return error;
1782 }
1783
1784 if (ieee80211_radiotap_active_vap(vap)) {
1785 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1786
1787 tap->wt_flags = 0;
1788 tap->wt_rate = rate;
1789 tap->wt_antenna = sc->tx_ant;
1790
1791 ieee80211_radiotap_tx(ni->ni_vap, m0);
1792 }
1793
1794 data->m = m0;
1795 data->ni = ni;
1796
1797 /* XXX need to setup descriptor ourself */
1798 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len,
1799 rate, (params->ibp_flags & IEEE80211_BPF_CRYPTO) != 0,
1800 segs->ds_addr);
1801
1802 bus_dmamap_sync(sc->prioq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1803 bus_dmamap_sync(sc->prioq.desc_dmat, sc->prioq.desc_map,
1804 BUS_DMASYNC_PREWRITE);
1805
1806 DPRINTFN(sc, 10, "sending raw frame len=%u idx=%u rate=%u\n",
1807 m0->m_pkthdr.len, sc->prioq.cur, rate);
1808
1809 /* kick prio */
1810 sc->prioq.queued++;
1811 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1812 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1813
1814 return 0;
1815 }
1816
1817 static int
1818 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1819 struct ieee80211_node *ni)
1820 {
1821 struct ieee80211vap *vap = ni->ni_vap;
1822 struct ieee80211com *ic = ni->ni_ic;
1823 struct rt2560_tx_desc *desc;
1824 struct rt2560_tx_data *data;
1825 struct ieee80211_frame *wh;
1826 const struct ieee80211_txparam *tp;
1827 struct ieee80211_key *k;
1828 struct mbuf *mnew;
1829 bus_dma_segment_t segs[RT2560_MAX_SCATTER];
1830 uint16_t dur;
1831 uint32_t flags;
1832 int nsegs, rate, error;
1833
1834 wh = mtod(m0, struct ieee80211_frame *);
1835
1836 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1837 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1838 rate = tp->mcastrate;
1839 } else if (m0->m_flags & M_EAPOL) {
1840 rate = tp->mgmtrate;
1841 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1842 rate = tp->ucastrate;
1843 } else {
1844 (void) ieee80211_ratectl_rate(ni, NULL, 0);
1845 rate = ni->ni_txrate;
1846 }
1847
1848 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1849 k = ieee80211_crypto_encap(ni, m0);
1850 if (k == NULL) {
1851 m_freem(m0);
1852 return ENOBUFS;
1853 }
1854
1855 /* packet header may have moved, reset our local pointer */
1856 wh = mtod(m0, struct ieee80211_frame *);
1857 }
1858
1859 flags = 0;
1860 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1861 int prot = IEEE80211_PROT_NONE;
1862 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1863 prot = IEEE80211_PROT_RTSCTS;
1864 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1865 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1866 prot = ic->ic_protmode;
1867 if (prot != IEEE80211_PROT_NONE) {
1868 error = rt2560_sendprot(sc, m0, ni, prot, rate);
1869 if (error) {
1870 m_freem(m0);
1871 return error;
1872 }
1873 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
1874 }
1875 }
1876
1877 data = &sc->txq.data[sc->txq.cur_encrypt];
1878 desc = &sc->txq.desc[sc->txq.cur_encrypt];
1879
1880 #if defined(__DragonFly__)
1881 error = bus_dmamap_load_mbuf_segment(sc->txq.data_dmat, data->map, m0,
1882 segs, 1, &nsegs, BUS_DMA_NOWAIT);
1883 #else
1884 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map, m0,
1885 segs, &nsegs, 0);
1886 #endif
1887 if (error != 0 && error != EFBIG) {
1888 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1889 error);
1890 m_freem(m0);
1891 return error;
1892 }
1893 if (error != 0) {
1894 mnew = m_defrag(m0, M_NOWAIT);
1895 if (mnew == NULL) {
1896 device_printf(sc->sc_dev,
1897 "could not defragment mbuf\n");
1898 m_freem(m0);
1899 return ENOBUFS;
1900 }
1901 m0 = mnew;
1902
1903 #if defined(__DragonFly__)
1904 error = bus_dmamap_load_mbuf_segment(sc->txq.data_dmat,
1905 data->map,
1906 m0, segs, 1, &nsegs, BUS_DMA_NOWAIT);
1907 #else
1908 error = bus_dmamap_load_mbuf_sg(sc->txq.data_dmat, data->map,
1909 m0, segs, &nsegs, 0);
1910 #endif
1911 if (error != 0) {
1912 device_printf(sc->sc_dev,
1913 "could not map mbuf (error %d)\n", error);
1914 m_freem(m0);
1915 return error;
1916 }
1917
1918 /* packet header may have moved, reset our local pointer */
1919 wh = mtod(m0, struct ieee80211_frame *);
1920 }
1921
1922 if (ieee80211_radiotap_active_vap(vap)) {
1923 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1924
1925 tap->wt_flags = 0;
1926 tap->wt_rate = rate;
1927 tap->wt_antenna = sc->tx_ant;
1928
1929 ieee80211_radiotap_tx(vap, m0);
1930 }
1931
1932 data->m = m0;
1933 data->ni = ni;
1934
1935 /* remember link conditions for rate adaptation algorithm */
1936 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1937 data->rix = ni->ni_txrate;
1938 /* XXX probably need last rssi value and not avg */
1939 data->rssi = ic->ic_node_getrssi(ni);
1940 } else
1941 data->rix = IEEE80211_FIXED_RATE_NONE;
1942
1943 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1944 flags |= RT2560_TX_ACK;
1945
1946 dur = ieee80211_ack_duration(ic->ic_rt,
1947 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1948 *(uint16_t *)wh->i_dur = htole16(dur);
1949 }
1950
1951 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
1952 segs->ds_addr);
1953
1954 bus_dmamap_sync(sc->txq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1955 bus_dmamap_sync(sc->txq.desc_dmat, sc->txq.desc_map,
1956 BUS_DMASYNC_PREWRITE);
1957
1958 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1959 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate);
1960
1961 /* kick encrypt */
1962 sc->txq.queued++;
1963 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
1964 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
1965
1966 return 0;
1967 }
1968
1969 static int
1970 rt2560_transmit(struct ieee80211com *ic, struct mbuf *m)
1971 {
1972 struct rt2560_softc *sc = ic->ic_softc;
1973 int error;
1974
1975 RAL_LOCK(sc);
1976 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) {
1977 RAL_UNLOCK(sc);
1978 return (ENXIO);
1979 }
1980 error = mbufq_enqueue(&sc->sc_snd, m);
1981 if (error) {
1982 RAL_UNLOCK(sc);
1983 return (error);
1984 }
1985 rt2560_start(sc);
1986 RAL_UNLOCK(sc);
1987
1988 return (0);
1989 }
1990
1991 static void
1992 rt2560_start(struct rt2560_softc *sc)
1993 {
1994 struct ieee80211_node *ni;
1995 struct mbuf *m;
1996
1997 RAL_LOCK_ASSERT(sc);
1998
1999 while (sc->txq.queued < RT2560_TX_RING_COUNT - 1 &&
2000 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
2001 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
2002 if (rt2560_tx_data(sc, m, ni) != 0) {
2003 if_inc_counter(ni->ni_vap->iv_ifp,
2004 IFCOUNTER_OERRORS, 1);
2005 ieee80211_free_node(ni);
2006 break;
2007 }
2008 sc->sc_tx_timer = 5;
2009 }
2010 }
2011
2012 static void
2013 rt2560_watchdog(void *arg)
2014 {
2015 struct rt2560_softc *sc = arg;
2016
2017 RAL_LOCK_ASSERT(sc);
2018
2019 KASSERT(sc->sc_flags & RT2560_F_RUNNING, ("not running"));
2020
2021 if (sc->sc_invalid) /* card ejected */
2022 return;
2023
2024 rt2560_encryption_intr(sc);
2025 rt2560_tx_intr(sc);
2026
2027 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
2028 device_printf(sc->sc_dev, "device timeout\n");
2029 rt2560_init_locked(sc);
2030 #if defined(__DragonFly__)
2031 /* not implemeted */
2032 #else
2033 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
2034 #endif
2035 /* NB: callout is reset in rt2560_init() */
2036 return;
2037 }
2038 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc);
2039 }
2040
2041 static void
2042 rt2560_parent(struct ieee80211com *ic)
2043 {
2044 struct rt2560_softc *sc = ic->ic_softc;
2045 int startall = 0;
2046
2047 RAL_LOCK(sc);
2048 if (ic->ic_nrunning > 0) {
2049 if ((sc->sc_flags & RT2560_F_RUNNING) == 0) {
2050 rt2560_init_locked(sc);
2051 startall = 1;
2052 } else
2053 rt2560_update_promisc(ic);
2054 } else if (sc->sc_flags & RT2560_F_RUNNING)
2055 rt2560_stop_locked(sc);
2056 RAL_UNLOCK(sc);
2057 if (startall)
2058 ieee80211_start_all(ic);
2059 }
2060
2061 static void
2062 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2063 {
2064 uint32_t tmp;
2065 int ntries;
2066
2067 for (ntries = 0; ntries < 100; ntries++) {
2068 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2069 break;
2070 DELAY(1);
2071 }
2072 if (ntries == 100) {
2073 device_printf(sc->sc_dev, "could not write to BBP\n");
2074 return;
2075 }
2076
2077 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2078 RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2079
2080 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
2081 }
2082
2083 static uint8_t
2084 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2085 {
2086 uint32_t val;
2087 int ntries;
2088
2089 for (ntries = 0; ntries < 100; ntries++) {
2090 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2091 break;
2092 DELAY(1);
2093 }
2094 if (ntries == 100) {
2095 device_printf(sc->sc_dev, "could not read from BBP\n");
2096 return 0;
2097 }
2098
2099 val = RT2560_BBP_BUSY | reg << 8;
2100 RAL_WRITE(sc, RT2560_BBPCSR, val);
2101
2102 for (ntries = 0; ntries < 100; ntries++) {
2103 val = RAL_READ(sc, RT2560_BBPCSR);
2104 if (!(val & RT2560_BBP_BUSY))
2105 return val & 0xff;
2106 DELAY(1);
2107 }
2108
2109 device_printf(sc->sc_dev, "could not read from BBP\n");
2110 return 0;
2111 }
2112
2113 static void
2114 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2115 {
2116 uint32_t tmp;
2117 int ntries;
2118
2119 for (ntries = 0; ntries < 100; ntries++) {
2120 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2121 break;
2122 DELAY(1);
2123 }
2124 if (ntries == 100) {
2125 device_printf(sc->sc_dev, "could not write to RF\n");
2126 return;
2127 }
2128
2129 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2130 (reg & 0x3);
2131 RAL_WRITE(sc, RT2560_RFCSR, tmp);
2132
2133 /* remember last written value in sc */
2134 sc->rf_regs[reg] = val;
2135
2136 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff);
2137 }
2138
2139 static void
2140 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2141 {
2142 struct ieee80211com *ic = &sc->sc_ic;
2143 uint8_t power, tmp;
2144 u_int i, chan;
2145
2146 chan = ieee80211_chan2ieee(ic, c);
2147 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
2148
2149 if (IEEE80211_IS_CHAN_2GHZ(c))
2150 power = min(sc->txpow[chan - 1], 31);
2151 else
2152 power = 31;
2153
2154 /* adjust txpower using ifconfig settings */
2155 power -= (100 - ic->ic_txpowlimit) / 8;
2156
2157 DPRINTFN(sc, 2, "setting channel to %u, txpower to %u\n", chan, power);
2158
2159 switch (sc->rf_rev) {
2160 case RT2560_RF_2522:
2161 rt2560_rf_write(sc, RAL_RF1, 0x00814);
2162 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2522_r2[chan - 1]);
2163 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2164 break;
2165
2166 case RT2560_RF_2523:
2167 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2168 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2523_r2[chan - 1]);
2169 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x38044);
2170 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2171 break;
2172
2173 case RT2560_RF_2524:
2174 rt2560_rf_write(sc, RAL_RF1, 0x0c808);
2175 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2524_r2[chan - 1]);
2176 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2177 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2178 break;
2179
2180 case RT2560_RF_2525:
2181 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2182 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2183 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2184 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2185
2186 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2187 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525_r2[chan - 1]);
2188 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2189 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286);
2190 break;
2191
2192 case RT2560_RF_2525E:
2193 rt2560_rf_write(sc, RAL_RF1, 0x08808);
2194 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2525e_r2[chan - 1]);
2195 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2196 rt2560_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282);
2197 break;
2198
2199 case RT2560_RF_2526:
2200 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2201 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2202 rt2560_rf_write(sc, RAL_RF1, 0x08804);
2203
2204 rt2560_rf_write(sc, RAL_RF2, rt2560_rf2526_r2[chan - 1]);
2205 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x18044);
2206 rt2560_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381);
2207 break;
2208
2209 /* dual-band RF */
2210 case RT2560_RF_5222:
2211 for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2212
2213 rt2560_rf_write(sc, RAL_RF1, rt2560_rf5222[i].r1);
2214 rt2560_rf_write(sc, RAL_RF2, rt2560_rf5222[i].r2);
2215 rt2560_rf_write(sc, RAL_RF3, power << 7 | 0x00040);
2216 rt2560_rf_write(sc, RAL_RF4, rt2560_rf5222[i].r4);
2217 break;
2218 default:
2219 kprintf("unknown ral rev=%d\n", sc->rf_rev);
2220 }
2221
2222 /* XXX */
2223 if ((ic->ic_flags & IEEE80211_F_SCAN) == 0) {
2224 /* set Japan filter bit for channel 14 */
2225 tmp = rt2560_bbp_read(sc, 70);
2226
2227 tmp &= ~RT2560_JAPAN_FILTER;
2228 if (chan == 14)
2229 tmp |= RT2560_JAPAN_FILTER;
2230
2231 rt2560_bbp_write(sc, 70, tmp);
2232
2233 /* clear CRC errors */
2234 RAL_READ(sc, RT2560_CNT0);
2235 }
2236 }
2237
2238 static void
2239 rt2560_set_channel(struct ieee80211com *ic)
2240 {
2241 struct rt2560_softc *sc = ic->ic_softc;
2242
2243 RAL_LOCK(sc);
2244 rt2560_set_chan(sc, ic->ic_curchan);
2245 RAL_UNLOCK(sc);
2246
2247 }
2248
2249 #if 0
2250 /*
2251 * Disable RF auto-tuning.
2252 */
2253 static void
2254 rt2560_disable_rf_tune(struct rt2560_softc *sc)
2255 {
2256 uint32_t tmp;
2257
2258 if (sc->rf_rev != RT2560_RF_2523) {
2259 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE;
2260 rt2560_rf_write(sc, RAL_RF1, tmp);
2261 }
2262
2263 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE;
2264 rt2560_rf_write(sc, RAL_RF3, tmp);
2265
2266 DPRINTFN(sc, 2, "%s", "disabling RF autotune\n");
2267 }
2268 #endif
2269
2270 /*
2271 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2272 * synchronization.
2273 */
2274 static void
2275 rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2276 {
2277 struct ieee80211com *ic = &sc->sc_ic;
2278 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2279 uint16_t logcwmin, preload;
2280 uint32_t tmp;
2281
2282 /* first, disable TSF synchronization */
2283 RAL_WRITE(sc, RT2560_CSR14, 0);
2284
2285 tmp = 16 * vap->iv_bss->ni_intval;
2286 RAL_WRITE(sc, RT2560_CSR12, tmp);
2287
2288 RAL_WRITE(sc, RT2560_CSR13, 0);
2289
2290 logcwmin = 5;
2291 preload = (vap->iv_opmode == IEEE80211_M_STA) ? 384 : 1024;
2292 tmp = logcwmin << 16 | preload;
2293 RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2294
2295 /* finally, enable TSF synchronization */
2296 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2297 if (ic->ic_opmode == IEEE80211_M_STA)
2298 tmp |= RT2560_ENABLE_TSF_SYNC(1);
2299 else
2300 tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2301 RT2560_ENABLE_BEACON_GENERATOR;
2302 RAL_WRITE(sc, RT2560_CSR14, tmp);
2303
2304 DPRINTF(sc, "%s", "enabling TSF synchronization\n");
2305 }
2306
2307 static void
2308 rt2560_enable_tsf(struct rt2560_softc *sc)
2309 {
2310 RAL_WRITE(sc, RT2560_CSR14, 0);
2311 RAL_WRITE(sc, RT2560_CSR14,
2312 RT2560_ENABLE_TSF_SYNC(2) | RT2560_ENABLE_TSF);
2313 }
2314
2315 static void
2316 rt2560_update_plcp(struct rt2560_softc *sc)
2317 {
2318 struct ieee80211com *ic = &sc->sc_ic;
2319
2320 /* no short preamble for 1Mbps */
2321 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2322
2323 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2324 /* values taken from the reference driver */
2325 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401);
2326 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2327 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403);
2328 } else {
2329 /* same values as above or'ed 0x8 */
2330 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409);
2331 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2332 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b);
2333 }
2334
2335 DPRINTF(sc, "updating PLCP for %s preamble\n",
2336 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long");
2337 }
2338
2339 /*
2340 * This function can be called by ieee80211_set_shortslottime(). Refer to
2341 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed.
2342 */
2343 static void
2344 rt2560_update_slot(struct ieee80211com *ic)
2345 {
2346 struct rt2560_softc *sc = ic->ic_softc;
2347 uint8_t slottime;
2348 uint16_t tx_sifs, tx_pifs, tx_difs, eifs;
2349 uint32_t tmp;
2350
2351 #ifndef FORCE_SLOTTIME
2352 slottime = IEEE80211_GET_SLOTTIME(ic);
2353 #else
2354 /*
2355 * Setting slot time according to "short slot time" capability
2356 * in beacon/probe_resp seems to cause problem to acknowledge
2357 * certain AP's data frames transimitted at CCK/DS rates: the
2358 * problematic AP keeps retransmitting data frames, probably
2359 * because MAC level acks are not received by hardware.
2360 * So we cheat a little bit here by claiming we are capable of
2361 * "short slot time" but setting hardware slot time to the normal
2362 * slot time. ral(4) does not seem to have trouble to receive
2363 * frames transmitted using short slot time even if hardware
2364 * slot time is set to normal slot time. If we didn't use this
2365 * trick, we would have to claim that short slot time is not
2366 * supported; this would give relative poor RX performance
2367 * (-1Mb~-2Mb lower) and the _whole_ BSS would stop using short
2368 * slot time.
2369 */
2370 slottime = IEEE80211_DUR_SLOT;
2371 #endif
2372
2373 /* update the MAC slot boundaries */
2374 tx_sifs = RAL_SIFS - RT2560_TXRX_TURNAROUND;
2375 tx_pifs = tx_sifs + slottime;
2376 tx_difs = IEEE80211_DUR_DIFS(tx_sifs, slottime);
2377 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2378
2379 tmp = RAL_READ(sc, RT2560_CSR11);
2380 tmp = (tmp & ~0x1f00) | slottime << 8;
2381 RAL_WRITE(sc, RT2560_CSR11, tmp);
2382
2383 tmp = tx_pifs << 16 | tx_sifs;
2384 RAL_WRITE(sc, RT2560_CSR18, tmp);
2385
2386 tmp = eifs << 16 | tx_difs;
2387 RAL_WRITE(sc, RT2560_CSR19, tmp);
2388
2389 DPRINTF(sc, "setting slottime to %uus\n", slottime);
2390 }
2391
2392 static void
2393 rt2560_set_basicrates(struct rt2560_softc *sc,
2394 const struct ieee80211_rateset *rs)
2395 {
2396 struct ieee80211com *ic = &sc->sc_ic;
2397 uint32_t mask = 0;
2398 uint8_t rate;
2399 int i;
2400
2401 for (i = 0; i < rs->rs_nrates; i++) {
2402 rate = rs->rs_rates[i];
2403
2404 if (!(rate & IEEE80211_RATE_BASIC))
2405 continue;
2406
2407 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,
2408 IEEE80211_RV(rate));
2409 }
2410
2411 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, mask);
2412
2413 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
2414 }
2415
2416 static void
2417 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2418 {
2419 uint32_t tmp;
2420
2421 /* set ON period to 70ms and OFF period to 30ms */
2422 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2423 RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2424 }
2425
2426 static void
2427 rt2560_set_bssid(struct rt2560_softc *sc, const uint8_t *bssid)
2428 {
2429 uint32_t tmp;
2430
2431 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2432 RAL_WRITE(sc, RT2560_CSR5, tmp);
2433
2434 tmp = bssid[4] | bssid[5] << 8;
2435 RAL_WRITE(sc, RT2560_CSR6, tmp);
2436
2437 #if defined(__DragonFly__)
2438 DPRINTF(sc, "setting BSSID to %s\n", ether_sprintf(bssid));
2439 #else
2440 DPRINTF(sc, "setting BSSID to %6D\n", bssid, ":");
2441 #endif
2442 }
2443
2444 static void
2445 rt2560_set_macaddr(struct rt2560_softc *sc, const uint8_t *addr)
2446 {
2447 uint32_t tmp;
2448
2449 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2450 RAL_WRITE(sc, RT2560_CSR3, tmp);
2451
2452 tmp = addr[4] | addr[5] << 8;
2453 RAL_WRITE(sc, RT2560_CSR4, tmp);
2454
2455 #if defined(__DragonFly__)
2456 DPRINTF(sc, "setting MAC address to %s\n", ether_sprintf(addr));
2457 #else
2458 DPRINTF(sc, "setting MAC address to %6D\n", addr, ":");
2459 #endif
2460 }
2461
2462 static void
2463 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2464 {
2465 uint32_t tmp;
2466
2467 tmp = RAL_READ(sc, RT2560_CSR3);
2468 addr[0] = tmp & 0xff;
2469 addr[1] = (tmp >> 8) & 0xff;
2470 addr[2] = (tmp >> 16) & 0xff;
2471 addr[3] = (tmp >> 24);
2472
2473 tmp = RAL_READ(sc, RT2560_CSR4);
2474 addr[4] = tmp & 0xff;
2475 addr[5] = (tmp >> 8) & 0xff;
2476 }
2477
2478 static void
2479 rt2560_update_promisc(struct ieee80211com *ic)
2480 {
2481 struct rt2560_softc *sc = ic->ic_softc;
2482 uint32_t tmp;
2483
2484 tmp = RAL_READ(sc, RT2560_RXCSR0);
2485
2486 tmp &= ~RT2560_DROP_NOT_TO_ME;
2487 if (ic->ic_promisc == 0)
2488 tmp |= RT2560_DROP_NOT_TO_ME;
2489
2490 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2491
2492 DPRINTF(sc, "%s promiscuous mode\n",
2493 (ic->ic_promisc > 0) ? "entering" : "leaving");
2494 }
2495
2496 static const char *
2497 rt2560_get_rf(int rev)
2498 {
2499 switch (rev) {
2500 case RT2560_RF_2522: return "RT2522";
2501 case RT2560_RF_2523: return "RT2523";
2502 case RT2560_RF_2524: return "RT2524";
2503 case RT2560_RF_2525: return "RT2525";
2504 case RT2560_RF_2525E: return "RT2525e";
2505 case RT2560_RF_2526: return "RT2526";
2506 case RT2560_RF_5222: return "RT5222";
2507 default: return "unknown";
2508 }
2509 }
2510
2511 static void
2512 rt2560_read_config(struct rt2560_softc *sc)
2513 {
2514 uint16_t val;
2515 int i;
2516
2517 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2518 sc->rf_rev = (val >> 11) & 0x7;
2519 sc->hw_radio = (val >> 10) & 0x1;
2520 sc->led_mode = (val >> 6) & 0x7;
2521 sc->rx_ant = (val >> 4) & 0x3;
2522 sc->tx_ant = (val >> 2) & 0x3;
2523 sc->nb_ant = val & 0x3;
2524
2525 /* read default values for BBP registers */
2526 for (i = 0; i < 16; i++) {
2527 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2528 if (val == 0 || val == 0xffff)
2529 continue;
2530
2531 sc->bbp_prom[i].reg = val >> 8;
2532 sc->bbp_prom[i].val = val & 0xff;
2533 }
2534
2535 /* read Tx power for all b/g channels */
2536 for (i = 0; i < 14 / 2; i++) {
2537 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2538 sc->txpow[i * 2] = val & 0xff;
2539 sc->txpow[i * 2 + 1] = val >> 8;
2540 }
2541 for (i = 0; i < 14; ++i) {
2542 if (sc->txpow[i] > 31)
2543 sc->txpow[i] = 24;
2544 }
2545
2546 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CALIBRATE);
2547 if ((val & 0xff) == 0xff)
2548 sc->rssi_corr = RT2560_DEFAULT_RSSI_CORR;
2549 else
2550 sc->rssi_corr = val & 0xff;
2551 DPRINTF(sc, "rssi correction %d, calibrate 0x%02x\n",
2552 sc->rssi_corr, val);
2553 }
2554
2555
2556 static void
2557 rt2560_scan_start(struct ieee80211com *ic)
2558 {
2559 struct rt2560_softc *sc = ic->ic_softc;
2560
2561 /* abort TSF synchronization */
2562 RAL_WRITE(sc, RT2560_CSR14, 0);
2563 rt2560_set_bssid(sc, ieee80211broadcastaddr);
2564 }
2565
2566 static void
2567 rt2560_scan_end(struct ieee80211com *ic)
2568 {
2569 struct rt2560_softc *sc = ic->ic_softc;
2570 struct ieee80211vap *vap = ic->ic_scan->ss_vap;
2571
2572 rt2560_enable_tsf_sync(sc);
2573 /* XXX keep local copy */
2574 rt2560_set_bssid(sc, vap->iv_bss->ni_bssid);
2575 }
2576
2577 static int
2578 rt2560_bbp_init(struct rt2560_softc *sc)
2579 {
2580 int i, ntries;
2581
2582 /* wait for BBP to be ready */
2583 for (ntries = 0; ntries < 100; ntries++) {
2584 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2585 break;
2586 DELAY(1);
2587 }
2588 if (ntries == 100) {
2589 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2590 return EIO;
2591 }
2592
2593 /* initialize BBP registers to default values */
2594 for (i = 0; i < nitems(rt2560_def_bbp); i++) {
2595 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2596 rt2560_def_bbp[i].val);
2597 }
2598
2599 /* initialize BBP registers to values stored in EEPROM */
2600 for (i = 0; i < 16; i++) {
2601 if (sc->bbp_prom[i].reg == 0 && sc->bbp_prom[i].val == 0)
2602 break;
2603 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2604 }
2605 rt2560_bbp_write(sc, 17, 0x48); /* XXX restore bbp17 */
2606
2607 return 0;
2608 }
2609
2610 static void
2611 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2612 {
2613 uint32_t tmp;
2614 uint8_t tx;
2615
2616 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2617 if (antenna == 1)
2618 tx |= RT2560_BBP_ANTA;
2619 else if (antenna == 2)
2620 tx |= RT2560_BBP_ANTB;
2621 else
2622 tx |= RT2560_BBP_DIVERSITY;
2623
2624 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2625 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2626 sc->rf_rev == RT2560_RF_5222)
2627 tx |= RT2560_BBP_FLIPIQ;
2628
2629 rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2630
2631 /* update values for CCK and OFDM in BBPCSR1 */
2632 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2633 tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2634 RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2635 }
2636
2637 static void
2638 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2639 {
2640 uint8_t rx;
2641
2642 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2643 if (antenna == 1)
2644 rx |= RT2560_BBP_ANTA;
2645 else if (antenna == 2)
2646 rx |= RT2560_BBP_ANTB;
2647 else
2648 rx |= RT2560_BBP_DIVERSITY;
2649
2650 /* need to force no I/Q flip for RF 2525e and 2526 */
2651 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2652 rx &= ~RT2560_BBP_FLIPIQ;
2653
2654 rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2655 }
2656
2657 static void
2658 rt2560_init_locked(struct rt2560_softc *sc)
2659 {
2660 struct ieee80211com *ic = &sc->sc_ic;
2661 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2662 uint32_t tmp;
2663 int i;
2664
2665 RAL_LOCK_ASSERT(sc);
2666
2667 rt2560_stop_locked(sc);
2668
2669 /* setup tx rings */
2670 tmp = RT2560_PRIO_RING_COUNT << 24 |
2671 RT2560_ATIM_RING_COUNT << 16 |
2672 RT2560_TX_RING_COUNT << 8 |
2673 RT2560_TX_DESC_SIZE;
2674
2675 /* rings must be initialized in this exact order */
2676 RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2677 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2678 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2679 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2680 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2681
2682 /* setup rx ring */
2683 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2684
2685 RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2686 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2687
2688 /* initialize MAC registers to default values */
2689 for (i = 0; i < nitems(rt2560_def_mac); i++)
2690 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2691
2692 rt2560_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
2693
2694 /* set basic rate set (will be updated later) */
2695 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2696
2697 rt2560_update_slot(ic);
2698 rt2560_update_plcp(sc);
2699 rt2560_update_led(sc, 0, 0);
2700
2701 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2702 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2703
2704 if (rt2560_bbp_init(sc) != 0) {
2705 rt2560_stop_locked(sc);
2706 return;
2707 }
2708
2709 rt2560_set_txantenna(sc, sc->tx_ant);
2710 rt2560_set_rxantenna(sc, sc->rx_ant);
2711
2712 /* set default BSS channel */
2713 rt2560_set_chan(sc, ic->ic_curchan);
2714
2715 /* kick Rx */
2716 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2717 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2718 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2719 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2720 ic->ic_opmode != IEEE80211_M_MBSS)
2721 tmp |= RT2560_DROP_TODS;
2722 if (ic->ic_promisc == 0)
2723 tmp |= RT2560_DROP_NOT_TO_ME;
2724 }
2725 RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2726
2727 /* clear old FCS and Rx FIFO errors */
2728 RAL_READ(sc, RT2560_CNT0);
2729 RAL_READ(sc, RT2560_CNT4);
2730
2731 /* clear any pending interrupts */
2732 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2733
2734 /* enable interrupts */
2735 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2736
2737 sc->sc_flags |= RT2560_F_RUNNING;
2738
2739 callout_reset(&sc->watchdog_ch, hz, rt2560_watchdog, sc);
2740 }
2741
2742 static void
2743 rt2560_init(void *priv)
2744 {
2745 struct rt2560_softc *sc = priv;
2746 struct ieee80211com *ic = &sc->sc_ic;
2747
2748 RAL_LOCK(sc);
2749 rt2560_init_locked(sc);
2750 RAL_UNLOCK(sc);
2751
2752 if (sc->sc_flags & RT2560_F_RUNNING)
2753 ieee80211_start_all(ic); /* start all vap's */
2754 }
2755
2756 static void
2757 rt2560_stop_locked(struct rt2560_softc *sc)
2758 {
2759 volatile int *flags = &sc->sc_flags;
2760
2761 RAL_LOCK_ASSERT(sc);
2762
2763 #if defined(__DragonFly__)
2764 while (*flags & RT2560_F_INPUT_RUNNING)
2765 lksleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2766 #else
2767 while (*flags & RT2560_F_INPUT_RUNNING)
2768 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2769 #endif
2770
2771 callout_stop(&sc->watchdog_ch);
2772 sc->sc_tx_timer = 0;
2773
2774 if (sc->sc_flags & RT2560_F_RUNNING) {
2775 sc->sc_flags &= ~RT2560_F_RUNNING;
2776
2777 /* abort Tx */
2778 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2779
2780 /* disable Rx */
2781 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2782
2783 /* reset ASIC (imply reset BBP) */
2784 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2785 RAL_WRITE(sc, RT2560_CSR1, 0);
2786
2787 /* disable interrupts */
2788 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2789
2790 /* reset Tx and Rx rings */
2791 rt2560_reset_tx_ring(sc, &sc->txq);
2792 rt2560_reset_tx_ring(sc, &sc->atimq);
2793 rt2560_reset_tx_ring(sc, &sc->prioq);
2794 rt2560_reset_tx_ring(sc, &sc->bcnq);
2795 rt2560_reset_rx_ring(sc, &sc->rxq);
2796 }
2797 }
2798
2799 void
2800 rt2560_stop(void *arg)
2801 {
2802 struct rt2560_softc *sc = arg;
2803
2804 RAL_LOCK(sc);
2805 rt2560_stop_locked(sc);
2806 RAL_UNLOCK(sc);
2807 }
2808
2809 static int
2810 rt2560_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2811 const struct ieee80211_bpf_params *params)
2812 {
2813 struct ieee80211com *ic = ni->ni_ic;
2814 struct rt2560_softc *sc = ic->ic_softc;
2815
2816 RAL_LOCK(sc);
2817
2818 /* prevent management frames from being sent if we're not ready */
2819 if (!(sc->sc_flags & RT2560_F_RUNNING)) {
2820 RAL_UNLOCK(sc);
2821 m_freem(m);
2822 return ENETDOWN;
2823 }
2824 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
2825 RAL_UNLOCK(sc);
2826 m_freem(m);
2827 return ENOBUFS; /* XXX */
2828 }
2829
2830 if (params == NULL) {
2831 /*
2832 * Legacy path; interpret frame contents to decide
2833 * precisely how to send the frame.
2834 */
2835 if (rt2560_tx_mgt(sc, m, ni) != 0)
2836 goto bad;
2837 } else {
2838 /*
2839 * Caller supplied explicit parameters to use in
2840 * sending the frame.
2841 */
2842 if (rt2560_tx_raw(sc, m, ni, params))
2843 goto bad;
2844 }
2845 sc->sc_tx_timer = 5;
2846
2847 RAL_UNLOCK(sc);
2848
2849 return 0;
2850 bad:
2851 RAL_UNLOCK(sc);
2852 return EIO; /* XXX */
2853 }
DragonFly BSD