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Nuke unused macro and comment
[dragonfly.git] / sys / dev / disk / stg / tmc18c30.c
blobe84e158b9567c40594ca8f32273bfcc9b55784cf
1 /* $FreeBSD: src/sys/dev/stg/tmc18c30.c,v 1.1.2.5 2001/12/17 13:30:19 non Exp $ */
2 /* $DragonFly: src/sys/dev/disk/stg/tmc18c30.c,v 1.14 2007/01/06 08:33:34 dillon Exp $ */
3 /* $NecBSD: tmc18c30.c,v 1.28.12.3 2001/06/19 04:35:48 honda Exp $ */
4 /* $NetBSD$ */
5
6 #define STG_DEBUG
7 #define STG_STATICS
8 #define STG_IO_CONTROL_FLAGS (STG_FIFO_INTERRUPTS | STG_WAIT_FOR_SELECT)
9
10 /*
11 * [NetBSD for NEC PC-98 series]
12 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
13 * NetBSD/pc98 porting staff. All rights reserved.
14 * Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001
15 * Naofumi HONDA. All rights reserved.
16 * Copyright (c) 1996, 1997, 1998, 1999
17 * Kouichi Matsuda. All rights reserved.
18 *
19 * Redistribution and use in source and binary forms, with or without
20 * modification, are permitted provided that the following conditions
21 * are met:
22 * 1. Redistributions of source code must retain the above copyright
23 * notice, this list of conditions and the following disclaimer.
24 * 2. Redistributions in binary form must reproduce the above copyright
25 * notice, this list of conditions and the following disclaimer in the
26 * documentation and/or other materials provided with the distribution.
27 * 3. The name of the author may not be used to endorse or promote products
28 * derived from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
31 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
32 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
33 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
34 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
35 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
36 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
38 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
39 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42 #include "opt_ddb.h"
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/buf.h>
48 #include <sys/queue.h>
49 #include <sys/malloc.h>
50 #include <sys/errno.h>
51 #include <sys/bus.h>
52 #include <sys/thread2.h>
53
54 #include <machine/clock.h>
55 #include <machine/cpu.h>
56
57 #include <bus/cam/scsi/scsi_low.h>
58 #include "tmc18c30reg.h"
59 #include "tmc18c30var.h"
60
61 /***************************************************
62 * USER SETTINGS
63 ***************************************************/
64 /* DEVICE CONFIGURATION FLAGS (MINOR)
65 *
66 * 0x01 DISCONECT OFF
67 * 0x02 PARITY LINE OFF
68 * 0x04 IDENTIFY MSG OFF ( = single lun)
69 * 0x08 SYNC TRANSFER OFF
70 */
71 /* #define STG_SYNC_SUPPORT */ /* NOT YET but easy */
72
73 /* For the 512 fifo type: change below */
74 #define TMC18C30_FIFOSZ 0x800
75 #define TMC18C30_FCBSZ 0x200
76 #define TMC18C50_FIFOSZ 0x2000
77 #define TMC18C50_FCBSZ 0x400
78
79 #define STG_MAX_DATA_SIZE (64 * 1024)
80 #define STG_DELAY_MAX (2 * 1000 * 1000)
81 #define STG_DELAY_INTERVAL (1)
82 #define STG_DELAY_SELECT_POLLING_MAX (5 * 1000 * 1000)
83
84 /***************************************************
85 * PARAMS
86 ***************************************************/
87 #define STG_NTARGETS 8
88 #define STG_NLUNS 8
89
90 /***************************************************
91 * DEBUG
92 ***************************************************/
93 #ifdef STG_DEBUG
94 int stg_debug;
95 #endif /* STG_DEBUG */
96
97 #ifdef STG_STATICS
98 struct stg_statics {
99 int arbit_fail_0;
100 int arbit_fail_1;
101 int disconnect;
102 int reselect;
103 } stg_statics;
104 #endif /* STG_STATICS */
105
106 /***************************************************
107 * IO control flags
108 ***************************************************/
109 #define STG_FIFO_INTERRUPTS 0x0001
110 #define STG_WAIT_FOR_SELECT 0x0100
111
112 int stg_io_control = STG_IO_CONTROL_FLAGS;
113
114 /***************************************************
115 * DEVICE STRUCTURE
116 ***************************************************/
117 extern struct cfdriver stg_cd;
118
119 /**************************************************************
120 * DECLARE
121 **************************************************************/
122 /* static */
123 static void stg_pio_read (struct stg_softc *, struct targ_info *, u_int);
124 static void stg_pio_write (struct stg_softc *, struct targ_info *, u_int);
125 static int stg_xfer (struct stg_softc *, u_int8_t *, int, int, int);
126 static int stg_msg (struct stg_softc *, struct targ_info *, u_int);
127 static int stg_reselected (struct stg_softc *);
128 static int stg_disconnected (struct stg_softc *, struct targ_info *);
129 static __inline void stg_pdma_end (struct stg_softc *, struct targ_info *);
130 static int stghw_select_targ_wait (struct stg_softc *, int);
131 static int stghw_check (struct stg_softc *);
132 static void stghw_init (struct stg_softc *);
133 static int stg_negate_signal (struct stg_softc *, u_int8_t, u_char *);
134 static int stg_expect_signal (struct stg_softc *, u_int8_t, u_int8_t);
135 static int stg_world_start (struct stg_softc *, int);
136 static int stghw_start_selection (struct stg_softc *sc, struct slccb *);
137 static void stghw_bus_reset (struct stg_softc *);
138 static void stghw_attention (struct stg_softc *);
139 static int stg_target_nexus_establish (struct stg_softc *);
140 static int stg_lun_nexus_establish (struct stg_softc *);
141 static int stg_ccb_nexus_establish (struct stg_softc *);
142 static int stg_targ_init (struct stg_softc *, struct targ_info *, int);
143 static __inline void stghw_bcr_write_1 (struct stg_softc *, u_int8_t);
144 static int stg_timeout (struct stg_softc *);
145 static void stg_selection_done_and_expect_msgout (struct stg_softc *);
146
147 struct scsi_low_funcs stgfuncs = {
148 SC_LOW_INIT_T stg_world_start,
149 SC_LOW_BUSRST_T stghw_bus_reset,
150 SC_LOW_TARG_INIT_T stg_targ_init,
151 SC_LOW_LUN_INIT_T NULL,
152
153 SC_LOW_SELECT_T stghw_start_selection,
154 SC_LOW_NEXUS_T stg_lun_nexus_establish,
155 SC_LOW_NEXUS_T stg_ccb_nexus_establish,
156
157 SC_LOW_ATTEN_T stghw_attention,
158 SC_LOW_MSG_T stg_msg,
159
160 SC_LOW_TIMEOUT_T stg_timeout,
161 SC_LOW_POLL_T stgintr,
162
163 NULL,
164 };
165
166 /****************************************************
167 * hwfuncs
168 ****************************************************/
169 static __inline void
170 stghw_bcr_write_1(struct stg_softc *sc, u_int8_t bcv)
171 {
172
173 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv);
174 sc->sc_busimg = bcv;
175 }
176
177 static int
178 stghw_check(struct stg_softc *sc)
179 {
180 struct scsi_low_softc *slp = &sc->sc_sclow;
181 bus_space_tag_t iot = sc->sc_iot;
182 bus_space_handle_t ioh = sc->sc_ioh;
183 u_int fcbsize, fcb;
184 u_int16_t lsb, msb;
185
186 lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
187 msb = bus_space_read_1(iot, ioh, tmc_idmsb);
188 switch (msb << 8 | lsb)
189 {
190 case 0x6127:
191 /* TMCCHIP_1800 not supported. (it's my policy) */
192 sc->sc_chip = TMCCHIP_1800;
193 return EINVAL;
194
195 case 0x60e9:
196 if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02)
197 {
198 sc->sc_chip = TMCCHIP_18C30;
199 sc->sc_fsz = TMC18C30_FIFOSZ;
200 fcbsize = TMC18C30_FCBSZ;
201 }
202 else
203 {
204 sc->sc_chip = TMCCHIP_18C50;
205 sc->sc_fsz = TMC18C50_FIFOSZ;
206 fcbsize = TMC18C50_FCBSZ;
207 }
208 break;
209
210 default:
211 sc->sc_chip = TMCCHIP_UNK;
212 return ENODEV;
213 }
214
215 sc->sc_fcRinit = FCTL_INTEN;
216 sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
217
218 if (slp->sl_cfgflags & CFG_NOATTEN)
219 sc->sc_imsg = 0;
220 else
221 sc->sc_imsg = BCTL_ATN;
222 sc->sc_busc = BCTL_BUSEN;
223
224 sc->sc_wthold = fcbsize + 256;
225 sc->sc_rthold = fcbsize - 256;
226 sc->sc_maxwsize = sc->sc_fsz;
227
228 fcb = fcbsize / (sc->sc_fsz / 16);
229 sc->sc_icinit = ICTL_CD | ICTL_SEL | ICTL_ARBIT | fcb;
230 return 0;
231 }
232
233 static void
234 stghw_init(struct stg_softc *sc)
235 {
236 bus_space_tag_t iot = sc->sc_iot;
237 bus_space_handle_t ioh = sc->sc_ioh;
238
239 bus_space_write_1(iot, ioh, tmc_ictl, 0);
240 stghw_bcr_write_1(sc, BCTL_BUSFREE);
241 bus_space_write_1(iot, ioh, tmc_fctl,
242 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
243 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
244 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
245
246 bus_space_write_1(iot, ioh, tmc_ssctl, 0);
247 }
248
249 static int
250 stg_targ_init(struct stg_softc *sc, struct targ_info *ti, int action)
251 {
252 struct stg_targ_info *sti = (void *) ti;
253
254 if (action == SCSI_LOW_INFO_ALLOC || action == SCSI_LOW_INFO_REVOKE)
255 {
256 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
257 ti->ti_maxsynch.period = 0;
258 ti->ti_maxsynch.offset = 0;
259 sti->sti_reg_synch = 0;
260 }
261 return 0;
262 }
263
264 /****************************************************
265 * scsi low interface
266 ****************************************************/
267 static void
268 stghw_attention(struct stg_softc *sc)
269 {
270
271 sc->sc_busc |= BCTL_ATN;
272 sc->sc_busimg |= BCTL_ATN;
273 bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg);
274 SCSI_LOW_DELAY(10);
275 }
276
277 static void
278 stghw_bus_reset(struct stg_softc *sc)
279 {
280 bus_space_tag_t iot = sc->sc_iot;
281 bus_space_handle_t ioh = sc->sc_ioh;
282
283 bus_space_write_1(iot, ioh, tmc_ictl, 0);
284 bus_space_write_1(iot, ioh, tmc_fctl, 0);
285 stghw_bcr_write_1(sc, BCTL_RST);
286 SCSI_LOW_DELAY(100000);
287 stghw_bcr_write_1(sc, BCTL_BUSFREE);
288 }
289
290 static int
291 stghw_start_selection(struct stg_softc *sc, struct slccb *cb)
292 {
293 bus_space_tag_t iot = sc->sc_iot;
294 bus_space_handle_t ioh = sc->sc_ioh;
295 struct targ_info *ti = cb->ti;
296 u_int8_t stat;
297
298 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
299 sc->sc_dataout_timeout = 0;
300 sc->sc_ubf_timeout = 0;
301 stghw_bcr_write_1(sc, BCTL_BUSFREE);
302 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
303
304 crit_enter();
305 stat = bus_space_read_1(iot, ioh, tmc_astat);
306 if ((stat & ASTAT_INT) != 0)
307 {
308 crit_exit();
309 return SCSI_LOW_START_FAIL;
310 }
311
312 bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit);
313 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
314 crit_exit();
315
316 SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
317 return SCSI_LOW_START_OK;
318 }
319
320 static int
321 stg_world_start(struct stg_softc *sc, int fdone)
322 {
323 struct scsi_low_softc *slp = &sc->sc_sclow;
324 int error;
325
326 if ((slp->sl_cfgflags & CFG_NOPARITY) == 0)
327 sc->sc_fcRinit |= FCTL_PARENB;
328 else
329 sc->sc_fcRinit &= ~FCTL_PARENB;
330
331 if ((error = stghw_check(sc)) != 0)
332 return error;
333
334 stghw_init(sc);
335 scsi_low_bus_reset(slp);
336 stghw_init(sc);
337
338 SOFT_INTR_REQUIRED(slp);
339 return 0;
340 }
341
342 static int
343 stg_msg(struct stg_softc *sc, struct targ_info *ti, u_int msg)
344 {
345 bus_space_tag_t iot = sc->sc_iot;
346 bus_space_handle_t ioh = sc->sc_ioh;
347 struct stg_targ_info *sti = (void *) ti;
348 u_int period, offset;
349
350 if ((msg & SCSI_LOW_MSG_WIDE) != 0)
351 {
352 if (ti->ti_width != SCSI_LOW_BUS_WIDTH_8)
353 {
354 ti->ti_width = SCSI_LOW_BUS_WIDTH_8;
355 return EINVAL;
356 }
357 return 0;
358 }
359
360 if ((msg & SCSI_LOW_MSG_SYNCH) == 0)
361 return 0;
362
363 period = ti->ti_maxsynch.period;
364 offset = ti->ti_maxsynch.offset;
365 period = period << 2;
366 if (period >= 200)
367 {
368 sti->sti_reg_synch = (period - 200) / 50;
369 if (period % 50)
370 sti->sti_reg_synch ++;
371 sti->sti_reg_synch |= SSCTL_SYNCHEN;
372 }
373 else if (period >= 100)
374 {
375 sti->sti_reg_synch = (period - 100) / 50;
376 if (period % 50)
377 sti->sti_reg_synch ++;
378 sti->sti_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
379 }
380 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
381 return 0;
382 }
383
384 /**************************************************************
385 * General probe attach
386 **************************************************************/
387 int
388 stgprobesubr(bus_space_tag_t iot, bus_space_handle_t ioh, u_int dvcfg)
389 {
390 u_int16_t lsb, msb;
391
392 lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
393 msb = bus_space_read_1(iot, ioh, tmc_idmsb);
394 switch (msb << 8 | lsb)
395 {
396 default:
397 return 0;
398 case 0x6127:
399 /* not support! */
400 return 0;
401 case 0x60e9:
402 return 1;
403 }
404 return 0;
405 }
406
407 int
408 stgprint(void *aux, const char *name)
409 {
410
411 if (name != NULL)
412 kprintf("%s: scsibus ", name);
413 return UNCONF;
414 }
415
416 void
417 stgattachsubr(struct stg_softc *sc)
418 {
419 struct scsi_low_softc *slp = &sc->sc_sclow;
420
421 kprintf("\n");
422
423 sc->sc_idbit = (1 << slp->sl_hostid);
424 slp->sl_funcs = &stgfuncs;
425 sc->sc_tmaxcnt = SCSI_LOW_MIN_TOUT * 1000 * 1000; /* default */
426
427 slp->sl_flags |= HW_READ_PADDING;
428 slp->sl_cfgflags |= CFG_ASYNC; /* XXX */
429
430 (void) scsi_low_attach(slp, 0, STG_NTARGETS, STG_NLUNS,
431 sizeof(struct stg_targ_info), 0);
432 }
433
434 /**************************************************************
435 * PDMA functions
436 **************************************************************/
437 static __inline void
438 stg_pdma_end(struct stg_softc *sc, struct targ_info *ti)
439 {
440 struct scsi_low_softc *slp = &sc->sc_sclow;
441 bus_space_tag_t iot = sc->sc_iot;
442 bus_space_handle_t ioh = sc->sc_ioh;
443 struct slccb *cb = slp->sl_Qnexus;
444 u_int len, tres;
445
446 slp->sl_flags &= ~HW_PDMASTART;
447 sc->sc_icinit &= ~ICTL_FIFO;
448 sc->sc_dataout_timeout = 0;
449
450 if (cb == NULL)
451 {
452 slp->sl_error |= PDMAERR;
453 goto out;
454 }
455
456 if (ti->ti_phase == PH_DATA)
457 {
458 len = bus_space_read_2(iot, ioh, tmc_fdcnt);
459 if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
460 {
461 if (len != 0)
462 {
463 tres = len + slp->sl_scp.scp_datalen;
464 if (tres <= (u_int) cb->ccb_scp.scp_datalen)
465 {
466 slp->sl_scp.scp_data -= len;
467 slp->sl_scp.scp_datalen = tres;
468 }
469 else
470 {
471 slp->sl_error |= PDMAERR;
472 kprintf("%s len %x >= datalen %x\n",
473 slp->sl_xname,
474 len, slp->sl_scp.scp_datalen);
475 }
476 }
477 }
478 else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
479 {
480 if (len != 0)
481 {
482 slp->sl_error |= PDMAERR;
483 kprintf("%s: len %x left in fifo\n",
484 slp->sl_xname, len);
485 }
486 }
487 scsi_low_data_finish(slp);
488 }
489 else
490 {
491
492 kprintf("%s data phase miss\n", slp->sl_xname);
493 slp->sl_error |= PDMAERR;
494 }
495
496 out:
497 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
498 }
499
500 static void
501 stg_pio_read(struct stg_softc *sc, struct targ_info *ti, u_int thold)
502 {
503 struct scsi_low_softc *slp = &sc->sc_sclow;
504 bus_space_tag_t iot = sc->sc_iot;
505 bus_space_handle_t ioh = sc->sc_ioh;
506 struct sc_p *sp = &slp->sl_scp;
507 int tout;
508 u_int res;
509 u_int8_t stat;
510
511 if ((slp->sl_flags & HW_PDMASTART) == 0)
512 {
513 bus_space_write_1(iot, ioh, tmc_fctl,
514 sc->sc_fcRinit | FCTL_FIFOEN);
515 slp->sl_flags |= HW_PDMASTART;
516 }
517
518 tout = sc->sc_tmaxcnt;
519 while (tout -- > 0)
520 {
521 if (thold > 0)
522 {
523 crit_enter();
524 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
525 if (res < thold)
526 {
527 bus_space_write_1(iot, ioh, tmc_ictl,
528 sc->sc_icinit);
529 crit_exit();
530 break;
531 }
532 crit_exit();
533 }
534 else
535 {
536 stat = bus_space_read_1(iot, ioh, tmc_bstat);
537 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
538 if (res == 0)
539 {
540 if ((stat & PHASE_MASK) != DATA_IN_PHASE)
541 break;
542 if (sp->scp_datalen <= 0)
543 break;
544 SCSI_LOW_DELAY(1);
545 continue;
546 }
547 }
548
549 /* The assumtion res != 0 is valid here */
550 if (res > sp->scp_datalen)
551 {
552 if (res == (u_int) -1)
553 break;
554
555 slp->sl_error |= PDMAERR;
556 if ((slp->sl_flags & HW_READ_PADDING) == 0)
557 {
558 kprintf("%s: read padding required\n",
559 slp->sl_xname);
560 break;
561 }
562
563 sp->scp_datalen = 0;
564 if (res > STG_MAX_DATA_SIZE)
565 res = STG_MAX_DATA_SIZE;
566 while (res -- > 0)
567 {
568 (void) bus_space_read_1(iot, ioh, tmc_rfifo);
569 }
570 continue;
571 }
572
573 sp->scp_datalen -= res;
574 if (res & 1)
575 {
576 *sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo);
577 sp->scp_data ++;
578 res --;
579 }
580
581 bus_space_read_multi_2(iot, ioh, tmc_rfifo,
582 (u_int16_t *) sp->scp_data, res >> 1);
583 sp->scp_data += res;
584 }
585
586 if (tout <= 0)
587 kprintf("%s: pio read timeout\n", slp->sl_xname);
588 }
589
590 static void
591 stg_pio_write(struct stg_softc *sc, struct targ_info *ti, u_int thold)
592 {
593 struct scsi_low_softc *slp = &sc->sc_sclow;
594 bus_space_tag_t iot = sc->sc_iot;
595 bus_space_handle_t ioh = sc->sc_ioh;
596 struct sc_p *sp = &slp->sl_scp;
597 u_int res;
598 int tout;
599 u_int8_t stat;
600
601 if ((slp->sl_flags & HW_PDMASTART) == 0)
602 {
603 stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
604 bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO);
605 bus_space_write_1(iot, ioh, tmc_fctl, stat);
606 slp->sl_flags |= HW_PDMASTART;
607 }
608
609 tout = sc->sc_tmaxcnt;
610 while (tout -- > 0)
611 {
612 stat = bus_space_read_1(iot, ioh, tmc_bstat);
613 if ((stat & PHASE_MASK) != DATA_OUT_PHASE)
614 break;
615
616 if (sp->scp_datalen <= 0)
617 {
618 if (sc->sc_dataout_timeout == 0)
619 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
620 break;
621 }
622
623 if (thold > 0)
624 {
625 crit_enter();
626 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
627 if (res > thold)
628 {
629 bus_space_write_1(iot, ioh, tmc_ictl,
630 sc->sc_icinit);
631 crit_exit();
632 break;
633 }
634 crit_exit();
635 }
636 else
637 {
638 res = bus_space_read_2(iot, ioh, tmc_fdcnt);
639 if (res > sc->sc_maxwsize / 2)
640 {
641 SCSI_LOW_DELAY(1);
642 continue;
643 }
644 }
645
646 if (res == (u_int) -1)
647 break;
648 res = sc->sc_maxwsize - res;
649 if (res > sp->scp_datalen)
650 res = sp->scp_datalen;
651
652 sp->scp_datalen -= res;
653 if ((res & 0x1) != 0)
654 {
655 bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data);
656 sp->scp_data ++;
657 res --;
658 }
659
660 bus_space_write_multi_2(iot, ioh, tmc_wfifo,
661 (u_int16_t *) sp->scp_data, res >> 1);
662 sp->scp_data += res;
663 }
664
665 if (tout <= 0)
666 kprintf("%s: pio write timeout\n", slp->sl_xname);
667 }
668
669 static int
670 stg_negate_signal(struct stg_softc *sc, u_int8_t mask, u_char *s)
671 {
672 struct scsi_low_softc *slp = &sc->sc_sclow;
673 bus_space_tag_t bst = sc->sc_iot;
674 bus_space_handle_t bsh = sc->sc_ioh;
675 int wc;
676 u_int8_t regv;
677
678 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
679 {
680 regv = bus_space_read_1(bst, bsh, tmc_bstat);
681 if (regv == (u_int8_t) -1)
682 return -1;
683 if ((regv & mask) == 0)
684 return 1;
685
686 SCSI_LOW_DELAY(STG_DELAY_INTERVAL);
687 }
688
689 kprintf("%s: %s stg_negate_signal timeout\n", slp->sl_xname, s);
690 return -1;
691 }
692
693 static int
694 stg_expect_signal(struct stg_softc *sc, u_int8_t phase, u_int8_t mask)
695 {
696 struct scsi_low_softc *slp = &sc->sc_sclow;
697 bus_space_tag_t bst = sc->sc_iot;
698 bus_space_handle_t bsh = sc->sc_ioh;
699 int wc;
700 u_int8_t ph;
701
702 phase &= PHASE_MASK;
703 for (wc = 0; wc < STG_DELAY_MAX / STG_DELAY_INTERVAL; wc ++)
704 {
705 ph = bus_space_read_1(bst, bsh, tmc_bstat);
706 if (ph == (u_int8_t) -1)
707 return -1;
708 if ((ph & PHASE_MASK) != phase)
709 return 0;
710 if ((ph & mask) != 0)
711 return 1;
712
713 SCSI_LOW_DELAY(STG_DELAY_INTERVAL);
714 }
715
716 kprintf("%s: stg_expect_signal timeout\n", slp->sl_xname);
717 return -1;
718 }
719
720 static int
721 stg_xfer(struct stg_softc *sc, u_int8_t *buf, int len, int phase,
722 int clear_atn)
723 {
724 bus_space_tag_t iot = sc->sc_iot;
725 bus_space_handle_t ioh = sc->sc_ioh;
726 int rv, ptr;
727
728 if (phase & BSTAT_IO)
729 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
730 else
731 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
732
733 for (ptr = 0; len > 0; len --)
734 {
735 rv = stg_expect_signal(sc, phase, BSTAT_REQ);
736 if (rv <= 0)
737 goto bad;
738
739 if (len == 1 && clear_atn != 0)
740 {
741 sc->sc_busc &= ~BCTL_ATN;
742 stghw_bcr_write_1(sc, sc->sc_busc);
743 SCSI_LOW_DEASSERT_ATN(&sc->sc_sclow);
744 }
745
746 if (phase & BSTAT_IO)
747 {
748 buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata);
749 }
750 else
751 {
752 bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]);
753 }
754
755 stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
756 }
757
758 bad:
759 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
760 return len;
761 }
762
763 /**************************************************************
764 * disconnect & reselect (HW low)
765 **************************************************************/
766 static int
767 stg_reselected(struct stg_softc *sc)
768 {
769 struct scsi_low_softc *slp = &sc->sc_sclow;
770 bus_space_tag_t iot = sc->sc_iot;
771 bus_space_handle_t ioh = sc->sc_ioh;
772 int tout;
773 u_int sid;
774 u_int8_t regv;
775
776 if (slp->sl_selid != NULL)
777 {
778 /* XXX:
779 * Selection vs Reselection conflicts.
780 */
781 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
782 stghw_bcr_write_1(sc, BCTL_BUSFREE);
783 }
784 else if (slp->sl_Tnexus != NULL)
785 {
786 kprintf("%s: unexpected termination\n", slp->sl_xname);
787 stg_disconnected(sc, slp->sl_Tnexus);
788 }
789
790 /* XXX:
791 * We should ack the reselection as soon as possible,
792 * because the target would abort the current reselection seq
793 * due to reselection timeout.
794 */
795 tout = STG_DELAY_SELECT_POLLING_MAX;
796 while (tout -- > 0)
797 {
798 regv = bus_space_read_1(iot, ioh, tmc_bstat);
799 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
800 (BSTAT_IO | BSTAT_SEL))
801 {
802 SCSI_LOW_DELAY(1);
803 regv = bus_space_read_1(iot, ioh, tmc_bstat);
804 if ((regv & (BSTAT_IO | BSTAT_SEL | BSTAT_BSY)) ==
805 (BSTAT_IO | BSTAT_SEL))
806 goto reselect_start;
807 }
808 SCSI_LOW_DELAY(1);
809 }
810 kprintf("%s: reselction timeout I\n", slp->sl_xname);
811 return EJUSTRETURN;
812
813 reselect_start:
814 sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid);
815 if ((sid & sc->sc_idbit) == 0)
816 {
817 /* not us */
818 return EJUSTRETURN;
819 }
820
821 bus_space_write_1(iot, ioh, tmc_fctl,
822 sc->sc_fcRinit | FCTL_CLRFIFO | FCTL_CLRINT);
823 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
824 stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
825
826 while (tout -- > 0)
827 {
828 regv = bus_space_read_1(iot, ioh, tmc_bstat);
829 if ((regv & (BSTAT_SEL | BSTAT_BSY)) == BSTAT_BSY)
830 goto reselected;
831 SCSI_LOW_DELAY(1);
832 }
833 kprintf("%s: reselction timeout II\n", slp->sl_xname);
834 return EJUSTRETURN;
835
836 reselected:
837 sid &= ~sc->sc_idbit;
838 sid = ffs(sid) - 1;
839 if (scsi_low_reselected(slp, sid) == NULL)
840 return EJUSTRETURN;
841
842 #ifdef STG_STATICS
843 stg_statics.reselect ++;
844 #endif /* STG_STATICS */
845 return EJUSTRETURN;
846 }
847
848 static int
849 stg_disconnected(struct stg_softc *sc, struct targ_info *ti)
850 {
851 struct scsi_low_softc *slp = &sc->sc_sclow;
852 bus_space_tag_t iot = sc->sc_iot;
853 bus_space_handle_t ioh = sc->sc_ioh;
854
855 /* clear bus status & fifo */
856 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
857 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
858 stghw_bcr_write_1(sc, BCTL_BUSFREE);
859 sc->sc_icinit &= ~ICTL_FIFO;
860 sc->sc_busc &= ~BCTL_ATN;
861 sc->sc_dataout_timeout = 0;
862 sc->sc_ubf_timeout = 0;
863
864 #ifdef STG_STATICS
865 stg_statics.disconnect ++;
866 #endif /* STG_STATICS */
867 scsi_low_disconnected(slp, ti);
868 return 1;
869 }
870
871 /**************************************************************
872 * SEQUENCER
873 **************************************************************/
874 static int
875 stg_target_nexus_establish(struct stg_softc *sc)
876 {
877 struct scsi_low_softc *slp = &sc->sc_sclow;
878 bus_space_tag_t iot = sc->sc_iot;
879 bus_space_handle_t ioh = sc->sc_ioh;
880 struct targ_info *ti = slp->sl_Tnexus;
881 struct stg_targ_info *sti = (void *) ti;
882
883 bus_space_write_1(iot, ioh, tmc_ssctl, sti->sti_reg_synch);
884 if ((stg_io_control & STG_FIFO_INTERRUPTS) != 0)
885 {
886 sc->sc_icinit |= ICTL_FIFO;
887 }
888 return 0;
889 }
890
891 static int
892 stg_lun_nexus_establish(struct stg_softc *sc)
893 {
894
895 return 0;
896 }
897
898 static int
899 stg_ccb_nexus_establish(struct stg_softc *sc)
900 {
901 struct scsi_low_softc *slp = &sc->sc_sclow;
902 struct slccb *cb = slp->sl_Qnexus;
903
904 sc->sc_tmaxcnt = cb->ccb_tcmax * 1000 * 1000;
905 return 0;
906 }
907
908 #define STGHW_SELECT_INTERVAL 10
909
910 static int
911 stghw_select_targ_wait(struct stg_softc *sc, int mu)
912 {
913 bus_space_tag_t iot = sc->sc_iot;
914 bus_space_handle_t ioh = sc->sc_ioh;
915
916 mu = mu / STGHW_SELECT_INTERVAL;
917 while (mu -- > 0)
918 {
919 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) == 0)
920 {
921 SCSI_LOW_DELAY(STGHW_SELECT_INTERVAL);
922 continue;
923 }
924 SCSI_LOW_DELAY(1);
925 if ((bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY) != 0)
926 {
927 return 0;
928 }
929 }
930 return ENXIO;
931 }
932
933 static void
934 stg_selection_done_and_expect_msgout(struct stg_softc *sc)
935 {
936 struct scsi_low_softc *slp = &sc->sc_sclow;
937 bus_space_tag_t iot = sc->sc_iot;
938 bus_space_handle_t ioh = sc->sc_ioh;
939
940 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
941 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
942 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
943 SCSI_LOW_ASSERT_ATN(slp);
944 }
945
946 int
947 stgintr(void *arg)
948 {
949 struct stg_softc *sc = arg;
950 struct scsi_low_softc *slp = &sc->sc_sclow;
951 bus_space_tag_t iot = sc->sc_iot;
952 bus_space_handle_t ioh = sc->sc_ioh;
953 struct targ_info *ti;
954 struct buf *bp;
955 u_int derror, flags;
956 int len;
957 u_int8_t status, astatus, regv;
958
959 /*******************************************
960 * interrupt check
961 *******************************************/
962 if (slp->sl_flags & HW_INACTIVE)
963 return 0;
964
965 astatus = bus_space_read_1(iot, ioh, tmc_astat);
966 status = bus_space_read_1(iot, ioh, tmc_bstat);
967
968 if ((astatus & ASTAT_STATMASK) == 0 || astatus == (u_int8_t) -1)
969 return 0;
970
971 bus_space_write_1(iot, ioh, tmc_ictl, 0);
972 if (astatus & ASTAT_SCSIRST)
973 {
974 bus_space_write_1(iot, ioh, tmc_fctl,
975 sc->sc_fcRinit | FCTL_CLRFIFO);
976 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
977 bus_space_write_1(iot, ioh, tmc_ictl, 0);
978
979 scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT,
980 "bus reset (power off?)");
981 return 1;
982 }
983
984 /*******************************************
985 * debug section
986 *******************************************/
987 #ifdef STG_DEBUG
988 if (stg_debug)
989 {
990 scsi_low_print(slp, NULL);
991 kprintf("%s: st %x ist %x\n\n", slp->sl_xname,
992 status, astatus);
993 #ifdef DDB
994 if (stg_debug > 1)
995 SCSI_LOW_DEBUGGER("stg");
996 #endif /* DDB */
997 }
998 #endif /* STG_DEBUG */
999
1000 /*******************************************
1001 * reselection & nexus
1002 *******************************************/
1003 if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
1004 {
1005 if (stg_reselected(sc) == EJUSTRETURN)
1006 goto out;
1007 }
1008
1009 if ((ti = slp->sl_Tnexus) == NULL)
1010 return 0;
1011
1012 derror = 0;
1013 if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
1014 (sc->sc_fcRinit & FCTL_PARENB) != 0)
1015 {
1016 slp->sl_error |= PARITYERR;
1017 derror = SCSI_LOW_DATA_PE;
1018 if ((status & PHASE_MASK) == MESSAGE_IN_PHASE)
1019 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 0);
1020 else
1021 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
1022 }
1023
1024 /*******************************************
1025 * aribitration & selection
1026 *******************************************/
1027 switch (ti->ti_phase)
1028 {
1029 case PH_ARBSTART:
1030 if ((astatus & ASTAT_ARBIT) == 0)
1031 {
1032 #ifdef STG_STATICS
1033 stg_statics.arbit_fail_0 ++;
1034 #endif /* STG_STATICS */
1035 goto arb_fail;
1036 }
1037
1038 status = bus_space_read_1(iot, ioh, tmc_bstat);
1039 if ((status & BSTAT_IO) != 0)
1040 {
1041 /* XXX:
1042 * Selection vs Reselection conflicts.
1043 */
1044 #ifdef STG_STATICS
1045 stg_statics.arbit_fail_1 ++;
1046 #endif /* STG_STATICS */
1047 arb_fail:
1048 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1049 stghw_bcr_write_1(sc, BCTL_BUSFREE);
1050 scsi_low_arbit_fail(slp, slp->sl_Qnexus);
1051 goto out;
1052 }
1053
1054 /*
1055 * selection assert start.
1056 */
1057 SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
1058 scsi_low_arbit_win(slp);
1059
1060 crit_enter();
1061 bus_space_write_1(iot, ioh, tmc_scsiid,
1062 sc->sc_idbit | (1 << ti->ti_id));
1063 stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
1064 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
1065 if ((stg_io_control & STG_WAIT_FOR_SELECT) != 0)
1066 {
1067 /* selection abort delay 200 + 100 micro sec */
1068 if (stghw_select_targ_wait(sc, 300) == 0)
1069 {
1070 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1071 stg_selection_done_and_expect_msgout(sc);
1072 }
1073 }
1074 crit_exit();
1075 goto out;
1076
1077 case PH_SELSTART:
1078 if ((status & BSTAT_BSY) == 0)
1079 {
1080 /* selection timeout delay 250 ms */
1081 if (stghw_select_targ_wait(sc, 250 * 1000) != 0)
1082 {
1083 stg_disconnected(sc, ti);
1084 goto out;
1085 }
1086 }
1087
1088 SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
1089 stg_selection_done_and_expect_msgout(sc);
1090 goto out;
1091
1092 case PH_SELECTED:
1093 if ((status & BSTAT_REQ) == 0)
1094 goto out;
1095 stg_target_nexus_establish(sc);
1096 break;
1097
1098 case PH_RESEL:
1099 if ((status & BSTAT_REQ) == 0)
1100 goto out;
1101
1102 /* clear a busy line */
1103 bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
1104 stghw_bcr_write_1(sc, sc->sc_busc);
1105 stg_target_nexus_establish(sc);
1106 if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
1107 {
1108 kprintf("%s: unexpected phase after reselect\n",
1109 slp->sl_xname);
1110 slp->sl_error |= FATALIO;
1111 scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
1112 goto out;
1113 }
1114 break;
1115 }
1116
1117 /*******************************************
1118 * data phase
1119 *******************************************/
1120 if ((slp->sl_flags & HW_PDMASTART) && STG_IS_PHASE_DATA(status) == 0)
1121 {
1122 if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
1123 stg_pio_read(sc, ti, 0);
1124
1125 stg_pdma_end(sc, ti);
1126 }
1127
1128 /*******************************************
1129 * scsi seq
1130 *******************************************/
1131 switch (status & PHASE_MASK)
1132 {
1133 case COMMAND_PHASE:
1134 if (stg_expect_signal(sc, COMMAND_PHASE, BSTAT_REQ) <= 0)
1135 break;
1136
1137 SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
1138 if (scsi_low_cmd(slp, ti) != 0)
1139 {
1140 scsi_low_attention(slp);
1141 }
1142
1143 if (stg_xfer(sc, slp->sl_scp.scp_cmd, slp->sl_scp.scp_cmdlen,
1144 COMMAND_PHASE, 0) != 0)
1145 {
1146 kprintf("%s: CMDOUT short\n", slp->sl_xname);
1147 }
1148 break;
1149
1150 case DATA_OUT_PHASE:
1151 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1152 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
1153 {
1154 scsi_low_attention(slp);
1155 }
1156
1157 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1158 stg_pio_write(sc, ti, sc->sc_wthold);
1159 else
1160 stg_pio_write(sc, ti, 0);
1161 break;
1162
1163 case DATA_IN_PHASE:
1164 SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
1165 if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
1166 {
1167 scsi_low_attention(slp);
1168 }
1169
1170 if ((sc->sc_icinit & ICTL_FIFO) != 0)
1171 stg_pio_read(sc, ti, sc->sc_rthold);
1172 else
1173 stg_pio_read(sc, ti, 0);
1174 break;
1175
1176 case STATUS_PHASE:
1177 regv = stg_expect_signal(sc, STATUS_PHASE, BSTAT_REQ);
1178 if (regv <= 0)
1179 break;
1180
1181 SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
1182 regv = bus_space_read_1(iot, ioh, tmc_sdna);
1183 if (scsi_low_statusin(slp, ti, regv | derror) != 0)
1184 {
1185 scsi_low_attention(slp);
1186 }
1187 if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
1188 {
1189 kprintf("%s: STATIN: data mismatch\n", slp->sl_xname);
1190 }
1191 stg_negate_signal(sc, BSTAT_ACK, "statin<ACK>");
1192 break;
1193
1194 case MESSAGE_OUT_PHASE:
1195 if (stg_expect_signal(sc, MESSAGE_OUT_PHASE, BSTAT_REQ) <= 0)
1196 break;
1197
1198 SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
1199 flags = (ti->ti_ophase != ti->ti_phase) ?
1200 SCSI_LOW_MSGOUT_INIT : 0;
1201 len = scsi_low_msgout(slp, ti, flags);
1202
1203 if (len > 1 && slp->sl_atten == 0)
1204 {
1205 scsi_low_attention(slp);
1206 }
1207
1208 if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE,
1209 slp->sl_clear_atten) != 0)
1210 {
1211 kprintf("%s: MSGOUT short\n", slp->sl_xname);
1212 }
1213 else
1214 {
1215 if (slp->sl_msgphase >= MSGPH_ABORT)
1216 {
1217 stg_disconnected(sc, ti);
1218 }
1219 }
1220 break;
1221
1222 case MESSAGE_IN_PHASE:
1223 /* confirm phase and req signal */
1224 if (stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ) <= 0)
1225 break;
1226
1227 SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
1228
1229 /* read data with NOACK */
1230 regv = bus_space_read_1(iot, ioh, tmc_sdna);
1231
1232 if (scsi_low_msgin(slp, ti, derror | regv) == 0)
1233 {
1234 if (scsi_low_is_msgout_continue(ti, 0) != 0)
1235 {
1236 scsi_low_attention(slp);
1237 }
1238 }
1239
1240 /* read data with ACK */
1241 if (regv != bus_space_read_1(iot, ioh, tmc_rdata))
1242 {
1243 kprintf("%s: MSGIN: data mismatch\n", slp->sl_xname);
1244 }
1245
1246 /* wait for the ack negated */
1247 stg_negate_signal(sc, BSTAT_ACK, "msgin<ACK>");
1248
1249 if (slp->sl_msgphase != 0 && slp->sl_msgphase < MSGPH_ABORT)
1250 {
1251 stg_disconnected(sc, ti);
1252 }
1253 break;
1254
1255 case BUSFREE_PHASE:
1256 kprintf("%s: unexpected disconnect\n", slp->sl_xname);
1257 stg_disconnected(sc, ti);
1258 break;
1259
1260 default:
1261 slp->sl_error |= FATALIO;
1262 kprintf("%s: unknown phase bus %x intr %x\n",
1263 slp->sl_xname, status, astatus);
1264 break;
1265 }
1266
1267 out:
1268 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
1269 return 1;
1270 }
1271
1272 static int
1273 stg_timeout(struct stg_softc *sc)
1274 {
1275 struct scsi_low_softc *slp = &sc->sc_sclow;
1276 bus_space_tag_t iot = sc->sc_iot;
1277 bus_space_handle_t ioh = sc->sc_ioh;
1278 int tout, count;
1279 u_int8_t status;
1280
1281 if (slp->sl_Tnexus == NULL)
1282 return 0;
1283
1284 status = bus_space_read_1(iot, ioh, tmc_bstat);
1285 if ((status & PHASE_MASK) == 0)
1286 {
1287 if (sc->sc_ubf_timeout ++ == 0)
1288 return 0;
1289
1290 kprintf("%s: unexpected bus free detected\n", slp->sl_xname);
1291 slp->sl_error |= FATALIO;
1292 scsi_low_print(slp, slp->sl_Tnexus);
1293 stg_disconnected(sc, slp->sl_Tnexus);
1294 return 0;
1295 }
1296
1297 switch (status & PHASE_MASK)
1298 {
1299 case DATA_OUT_PHASE:
1300 if (sc->sc_dataout_timeout == 0)
1301 break;
1302 if ((status & BSTAT_REQ) == 0)
1303 break;
1304 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
1305 break;
1306 if ((-- sc->sc_dataout_timeout) > 0)
1307 break;
1308
1309 slp->sl_error |= PDMAERR;
1310 if ((slp->sl_flags & HW_WRITE_PADDING) == 0)
1311 {
1312 kprintf("%s: write padding required\n",
1313 slp->sl_xname);
1314 break;
1315 }
1316
1317 bus_space_write_1(iot, ioh, tmc_ictl, 0);
1318
1319 tout = STG_DELAY_MAX;
1320 while (tout --)
1321 {
1322 status = bus_space_read_1(iot, ioh, tmc_bstat);
1323 if ((status & PHASE_MASK) != DATA_OUT_PHASE)
1324 break;
1325
1326 if (bus_space_read_2(iot, ioh, tmc_fdcnt) != 0)
1327 {
1328 SCSI_LOW_DELAY(1);
1329 continue;
1330 }
1331
1332 for (count = sc->sc_maxwsize; count > 0; count --)
1333 bus_space_write_1(iot, ioh, tmc_wfifo, 0);
1334 }
1335
1336 status = bus_space_read_1(iot, ioh, tmc_bstat);
1337 if ((status & PHASE_MASK) == DATA_OUT_PHASE)
1338 sc->sc_dataout_timeout = SCSI_LOW_TIMEOUT_HZ;
1339
1340 bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
1341 break;
1342
1343 default:
1344 break;
1345 }
1346 return 0;
1347 }
DragonFly BSD