if_iwm - Use chan list from ieee80211_scan_state for scan, not ic_channels.
[dragonfly.git] / sys / dev / disk / mpt / mpt_pci.c
blobf9a4013cad35c2d93c6aee54033aeec8f6f535eb
1 /*-
2 * PCI specific probe and attach routines for LSI Fusion Adapters
3 * FreeBSD Version.
5 * Copyright (c) 2000, 2001 by Greg Ansley
6 * Partially derived from Matt Jacob's ISP driver.
7 * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8 * Feral Software
9 * All rights reserved.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice immediately at the beginning of the file, without modification,
16 * this list of conditions, and the following disclaimer.
17 * 2. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
32 /*-
33 * Copyright (c) 2002, 2006 by Matthew Jacob
34 * All rights reserved.
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions are
38 * met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42 * substantially similar to the "NO WARRANTY" disclaimer below
43 * ("Disclaimer") and any redistribution must be conditioned upon including
44 * a substantially similar Disclaimer requirement for further binary
45 * redistribution.
46 * 3. Neither the names of the above listed copyright holders nor the names
47 * of any contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Support from Chris Ellsworth in order to make SAS adapters work
63 * is gratefully acknowledged.
65 * Support from LSI-Logic has also gone a great deal toward making this a
66 * workable subsystem and is gratefully acknowledged.
69 * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70 * Copyright (c) 2005, WHEEL Sp. z o.o.
71 * Copyright (c) 2004, 2005 Justin T. Gibbs
72 * All rights reserved.
74 * Redistribution and use in source and binary forms, with or without
75 * modification, are permitted provided that the following conditions are
76 * met:
77 * 1. Redistributions of source code must retain the above copyright
78 * notice, this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80 * substantially similar to the "NO WARRANTY" disclaimer below
81 * ("Disclaimer") and any redistribution must be conditioned upon including
82 * a substantially similar Disclaimer requirement for further binary
83 * redistribution.
84 * 3. Neither the names of the above listed copyright holders nor the names
85 * of any contributors may be used to endorse or promote products derived
86 * from this software without specific prior written permission.
88 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98 * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
100 * $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.70 2012/04/04 20:42:45 marius Exp $
103 #include <dev/disk/mpt/mpt.h>
104 #include <dev/disk/mpt/mpt_cam.h>
105 #include <dev/disk/mpt/mpt_raid.h>
108 * XXX it seems no other MPT driver knows about the following chips.
111 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC909_FB
112 #define MPI_MANUFACTPAGE_DEVICEID_FC909_FB 0x0620
113 #endif
115 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
116 #define MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB 0x0625
117 #endif
119 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
120 #define MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB 0x0623
121 #endif
123 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
124 #define MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB 0x0627
125 #endif
127 #ifndef MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
128 #define MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB 0x0629
129 #endif
131 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
132 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB 0x0055
133 #endif
135 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
136 #define MPI_MANUFACTPAGE_DEVID_SAS1068E_FB 0x0059
137 #endif
139 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
140 #define MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB 0x007C
141 #endif
143 static int mpt_pci_probe(device_t);
144 static int mpt_pci_attach(device_t);
145 static void mpt_free_bus_resources(struct mpt_softc *mpt);
146 static int mpt_pci_detach(device_t);
147 static int mpt_pci_shutdown(device_t);
148 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
149 static void mpt_dma_mem_free(struct mpt_softc *mpt);
150 #if 0
151 static void mpt_read_config_regs(struct mpt_softc *mpt);
152 static void mpt_set_config_regs(struct mpt_softc *mpt);
153 #endif
154 static void mpt_pci_intr(void *);
156 static device_method_t mpt_methods[] = {
157 /* Device interface */
158 DEVMETHOD(device_probe, mpt_pci_probe),
159 DEVMETHOD(device_attach, mpt_pci_attach),
160 DEVMETHOD(device_detach, mpt_pci_detach),
161 DEVMETHOD(device_shutdown, mpt_pci_shutdown),
162 DEVMETHOD_END
165 static driver_t mpt_driver = {
166 "mpt", mpt_methods, sizeof(struct mpt_softc)
169 static devclass_t mpt_devclass;
170 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
171 MODULE_DEPEND(mpt, pci, 1, 1, 1);
172 MODULE_VERSION(mpt, 1);
174 static int
175 mpt_pci_probe(device_t dev)
177 const char *desc;
178 int rval;
180 if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
181 return (ENXIO);
183 rval = BUS_PROBE_DEFAULT;
184 switch (pci_get_device(dev)) {
185 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
186 desc = "LSILogic FC909 FC Adapter";
187 break;
188 case MPI_MANUFACTPAGE_DEVICEID_FC909:
189 desc = "LSILogic FC909A FC Adapter";
190 break;
191 case MPI_MANUFACTPAGE_DEVICEID_FC919:
192 desc = "LSILogic FC919 FC Adapter";
193 break;
194 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
195 desc = "LSILogic FC919 LAN Adapter";
196 break;
197 case MPI_MANUFACTPAGE_DEVICEID_FC929:
198 desc = "Dual LSILogic FC929 FC Adapter";
199 break;
200 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
201 desc = "Dual LSILogic FC929 LAN Adapter";
202 break;
203 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
204 desc = "LSILogic FC919 FC PCI-X Adapter";
205 break;
206 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
207 desc = "LSILogic FC919 LAN PCI-X Adapter";
208 break;
209 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
210 desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
211 break;
212 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
213 desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
214 break;
215 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
216 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
217 break;
218 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
219 desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
220 break;
221 case MPI_MANUFACTPAGE_DEVID_53C1030:
222 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
223 desc = "LSILogic 1030 Ultra4 Adapter";
224 break;
225 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
227 * Allow mfi(4) to claim this device in case it's in MegaRAID
228 * mode.
230 rval = BUS_PROBE_LOW_PRIORITY;
231 /* FALLTHROUGH */
232 case MPI_MANUFACTPAGE_DEVID_SAS1064:
233 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
234 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
235 case MPI_MANUFACTPAGE_DEVID_SAS1066:
236 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
237 case MPI_MANUFACTPAGE_DEVID_SAS1068:
238 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
239 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
240 case MPI_MANUFACTPAGE_DEVID_SAS1078:
241 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
242 desc = "LSILogic SAS/SATA Adapter";
243 break;
244 default:
245 return (ENXIO);
248 device_set_desc(dev, desc);
249 return (rval);
252 static void
253 mpt_set_options(struct mpt_softc *mpt)
255 int bitmap;
256 int tval;
258 bitmap = 0;
259 if (kgetenv_int("mpt_disable", &bitmap)) {
260 if (bitmap & (1 << mpt->unit)) {
261 mpt->disabled = 1;
264 bitmap = 0;
265 if (kgetenv_int("mpt_debug", &bitmap)) {
266 if (bitmap & (1 << mpt->unit)) {
267 mpt->verbose = MPT_PRT_DEBUG;
270 bitmap = 0;
271 if (kgetenv_int("mpt_debug1", &bitmap)) {
272 if (bitmap & (1 << mpt->unit)) {
273 mpt->verbose = MPT_PRT_DEBUG1;
276 bitmap = 0;
277 if (kgetenv_int("mpt_debug2", &bitmap)) {
278 if (bitmap & (1 << mpt->unit)) {
279 mpt->verbose = MPT_PRT_DEBUG2;
282 bitmap = 0;
283 if (kgetenv_int("mpt_debug3", &bitmap)) {
284 if (bitmap & (1 << mpt->unit)) {
285 mpt->verbose = MPT_PRT_DEBUG3;
289 mpt->cfg_role = MPT_ROLE_DEFAULT;
290 bitmap = 0;
291 if (kgetenv_int("mpt_nil_role", &bitmap)) {
292 if (bitmap & (1 << mpt->unit)) {
293 mpt->cfg_role = 0;
295 mpt->do_cfg_role = 1;
297 bitmap = 0;
298 if (kgetenv_int("mpt_tgt_role", &bitmap)) {
299 if (bitmap & (1 << mpt->unit)) {
300 mpt->cfg_role |= MPT_ROLE_TARGET;
302 mpt->do_cfg_role = 1;
304 bitmap = 0;
305 if (kgetenv_int("mpt_ini_role", &bitmap)) {
306 if (bitmap & (1 << mpt->unit)) {
307 mpt->cfg_role |= MPT_ROLE_INITIATOR;
309 mpt->do_cfg_role = 1;
311 tval = 0;
312 mpt->msi_enable = 0;
313 if (mpt->is_sas)
314 mpt->msi_enable = 1;
315 if (kgetenv_int("hw.mpt.msi.enable", &tval))
316 mpt->msi_enable = tval;
319 #if 0
320 static void
321 mpt_link_peer(struct mpt_softc *mpt)
323 struct mpt_softc *mpt2;
325 if (mpt->unit == 0) {
326 return;
329 * XXX: depends on probe order
331 mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
333 if (mpt2 == NULL) {
334 return;
336 if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
337 return;
339 if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
340 return;
342 mpt->mpt2 = mpt2;
343 mpt2->mpt2 = mpt;
344 if (mpt->verbose >= MPT_PRT_DEBUG) {
345 mpt_prt(mpt, "linking with peer (mpt%d)\n",
346 device_get_unit(mpt2->dev));
350 static void
351 mpt_unlink_peer(struct mpt_softc *mpt)
354 if (mpt->mpt2) {
355 mpt->mpt2->mpt2 = NULL;
358 #endif
360 static int
361 mpt_pci_attach(device_t dev)
363 struct mpt_softc *mpt;
364 int iqd;
365 uint32_t val;
366 int mpt_io_bar, mpt_mem_bar;
367 u_int irq_flags;
369 mpt = (struct mpt_softc*)device_get_softc(dev);
371 switch (pci_get_device(dev)) {
372 case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
373 case MPI_MANUFACTPAGE_DEVICEID_FC909:
374 case MPI_MANUFACTPAGE_DEVICEID_FC919:
375 case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
376 case MPI_MANUFACTPAGE_DEVICEID_FC929:
377 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
378 case MPI_MANUFACTPAGE_DEVICEID_FC929X:
379 case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
380 case MPI_MANUFACTPAGE_DEVICEID_FC919X:
381 case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
382 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
383 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
384 mpt->is_fc = 1;
385 break;
386 case MPI_MANUFACTPAGE_DEVID_SAS1078:
387 case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
388 mpt->is_1078 = 1;
389 /* FALLTHROUGH */
390 case MPI_MANUFACTPAGE_DEVID_SAS1064:
391 case MPI_MANUFACTPAGE_DEVID_SAS1064A:
392 case MPI_MANUFACTPAGE_DEVID_SAS1064E:
393 case MPI_MANUFACTPAGE_DEVID_SAS1066:
394 case MPI_MANUFACTPAGE_DEVID_SAS1066E:
395 case MPI_MANUFACTPAGE_DEVID_SAS1068:
396 case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
397 case MPI_MANUFACTPAGE_DEVID_SAS1068E:
398 case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
399 mpt->is_sas = 1;
400 break;
401 default:
402 mpt->is_spi = 1;
403 break;
405 mpt->dev = dev;
406 mpt->unit = device_get_unit(dev);
407 mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
408 mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
409 mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
410 mpt->verbose = MPT_PRT_NONE;
411 mpt->role = MPT_ROLE_NONE;
412 mpt->mpt_ini_id = MPT_INI_ID_NONE;
413 mpt_set_options(mpt);
414 if (mpt->verbose == MPT_PRT_NONE) {
415 mpt->verbose = MPT_PRT_WARN;
416 /* Print INFO level (if any) if bootverbose is set */
417 mpt->verbose += (bootverbose != 0)? 1 : 0;
421 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
423 val = pci_read_config(dev, PCIR_COMMAND, 2);
424 val |= PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
425 PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
426 pci_write_config(dev, PCIR_COMMAND, val, 2);
429 * Make sure we've disabled the ROM.
431 val = pci_read_config(dev, PCIR_BIOS, 4);
432 val &= ~PCIM_BIOS_ENABLE;
433 pci_write_config(dev, PCIR_BIOS, val, 4);
435 #if 0
437 * Is this part a dual?
438 * If so, link with our partner (around yet)
440 switch (pci_get_device(dev)) {
441 case MPI_MANUFACTPAGE_DEVICEID_FC929:
442 case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
443 case MPI_MANUFACTPAGE_DEVICEID_FC949E:
444 case MPI_MANUFACTPAGE_DEVICEID_FC949X:
445 case MPI_MANUFACTPAGE_DEVID_53C1030:
446 case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
447 mpt_link_peer(mpt);
448 break;
449 default:
450 break;
452 #endif
455 * Figure out which are the I/O and MEM Bars
457 val = pci_read_config(dev, PCIR_BAR(0), 4);
458 if (PCI_BAR_IO(val)) {
459 /* BAR0 is IO, BAR1 is memory */
460 mpt_io_bar = 0;
461 mpt_mem_bar = 1;
462 } else {
463 /* BAR0 is memory, BAR1 is IO */
464 mpt_mem_bar = 0;
465 mpt_io_bar = 1;
469 * Set up register access. PIO mode is required for
470 * certain reset operations (but must be disabled for
471 * some cards otherwise).
473 mpt_io_bar = PCIR_BAR(mpt_io_bar);
474 mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
475 &mpt_io_bar, RF_ACTIVE);
476 if (mpt->pci_pio_reg == NULL) {
477 if (bootverbose) {
478 device_printf(dev,
479 "unable to map registers in PIO mode\n");
481 } else {
482 mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
483 mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
486 mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
487 mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
488 &mpt_mem_bar, RF_ACTIVE);
489 if (mpt->pci_reg == NULL) {
490 if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
491 device_printf(dev,
492 "Unable to memory map registers.\n");
494 if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
495 device_printf(dev, "Giving Up.\n");
496 goto bad;
498 if (bootverbose) {
499 device_printf(dev, "Falling back to PIO mode.\n");
501 mpt->pci_st = mpt->pci_pio_st;
502 mpt->pci_sh = mpt->pci_pio_sh;
503 } else {
504 mpt->pci_st = rman_get_bustag(mpt->pci_reg);
505 mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
508 /* Get a handle to the interrupt */
509 iqd = 0;
510 #if 0 /* XXX MSI-X support */
511 if (mpt->msi_enable) {
513 * First try to alloc an MSI-X message. If that
514 * fails, then try to alloc an MSI message instead.
516 if (pci_msix_count(dev) == 1) {
517 mpt->pci_msi_count = 1;
518 if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
519 iqd = 1;
520 } else {
521 mpt->pci_msi_count = 0;
525 #endif
526 mpt->irq_type = pci_alloc_1intr(dev, mpt->msi_enable, &iqd,
527 &irq_flags);
528 mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
529 irq_flags);
530 if (mpt->pci_irq == NULL) {
531 device_printf(dev, "could not allocate interrupt\n");
532 goto bad;
535 MPT_LOCK_SETUP(mpt);
537 /* Disable interrupts at the part */
538 mpt_disable_ints(mpt);
540 /* Register the interrupt handler */
541 if (bus_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, mpt_pci_intr,
542 mpt, &mpt->ih, NULL)) {
543 device_printf(dev, "could not setup interrupt\n");
544 goto bad;
547 /* Allocate dma memory */
548 if (mpt_dma_mem_alloc(mpt)) {
549 mpt_prt(mpt, "Could not allocate DMA memory\n");
550 goto bad;
553 #if 0
555 * Save the PCI config register values
557 * Hard resets are known to screw up the BAR for diagnostic
558 * memory accesses (Mem1).
560 * Using Mem1 is known to make the chip stop responding to
561 * configuration space transfers, so we need to save it now
564 mpt_read_config_regs(mpt);
565 #endif
568 * Disable PIO until we need it
570 if (mpt->is_sas) {
571 pci_disable_io(dev, SYS_RES_IOPORT);
574 /* Initialize the hardware */
575 if (mpt->disabled == 0) {
576 if (mpt_attach(mpt) != 0) {
577 goto bad;
579 } else {
580 mpt_prt(mpt, "device disabled at user request\n");
581 goto bad;
584 mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
585 dev, SHUTDOWN_PRI_LAST);
587 if (mpt->eh == NULL) {
588 mpt_prt(mpt, "shutdown event registration failed\n");
589 mpt_disable_ints(mpt);
590 (void) mpt_detach(mpt);
591 mpt_reset(mpt, /*reinit*/FALSE);
592 mpt_raid_free_mem(mpt);
593 goto bad;
595 return (0);
597 bad:
598 mpt_dma_mem_free(mpt);
599 mpt_free_bus_resources(mpt);
600 #if 0
601 mpt_unlink_peer(mpt);
602 #endif
604 MPT_LOCK_DESTROY(mpt);
607 * but return zero to preserve unit numbering
609 return (0);
613 * Free bus resources
615 static void
616 mpt_free_bus_resources(struct mpt_softc *mpt)
619 if (mpt->ih) {
620 bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
621 mpt->ih = NULL;
624 if (mpt->pci_irq) {
625 bus_release_resource(mpt->dev, SYS_RES_IRQ,
626 rman_get_rid(mpt->pci_irq), mpt->pci_irq);
627 if (mpt->irq_type == PCI_INTR_TYPE_MSI)
628 pci_release_msi(mpt->dev);
630 mpt->pci_irq = NULL;
633 if (mpt->pci_pio_reg) {
634 bus_release_resource(mpt->dev, SYS_RES_IOPORT,
635 rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
636 mpt->pci_pio_reg = NULL;
639 if (mpt->pci_reg) {
640 bus_release_resource(mpt->dev, SYS_RES_MEMORY,
641 rman_get_rid(mpt->pci_reg), mpt->pci_reg);
642 mpt->pci_reg = NULL;
647 * Disconnect ourselves from the system.
649 static int
650 mpt_pci_detach(device_t dev)
652 struct mpt_softc *mpt;
654 mpt = (struct mpt_softc*)device_get_softc(dev);
656 if (mpt) {
657 mpt_disable_ints(mpt);
658 mpt_detach(mpt);
659 mpt_reset(mpt, /*reinit*/FALSE);
660 mpt_raid_free_mem(mpt);
661 mpt_dma_mem_free(mpt);
662 mpt_free_bus_resources(mpt);
663 #if 0
664 mpt_unlink_peer(mpt);
665 #endif
666 if (mpt->eh != NULL) {
667 EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
669 MPT_LOCK_DESTROY(mpt);
671 return(0);
675 * Disable the hardware
677 static int
678 mpt_pci_shutdown(device_t dev)
680 struct mpt_softc *mpt;
682 mpt = (struct mpt_softc *)device_get_softc(dev);
683 if (mpt)
684 return (mpt_shutdown(mpt));
685 return(0);
688 static int
689 mpt_dma_mem_alloc(struct mpt_softc *mpt)
691 size_t len;
692 struct mpt_map_info mi;
694 /* Check if we alreay have allocated the reply memory */
695 if (mpt->reply_phys != 0) {
696 return 0;
699 len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
700 mpt->request_pool = (request_t *)kmalloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
701 if (mpt->request_pool == NULL) {
702 mpt_prt(mpt, "cannot allocate request pool\n");
703 return (1);
707 * Create a parent dma tag for this device.
709 * Align at byte boundaries,
710 * Limit to 32-bit addressing for request/reply queues.
712 if (mpt_dma_tag_create(mpt, /*parent*/NULL,
713 /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
714 /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
715 /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
716 /*nsegments*/BUS_SPACE_UNRESTRICTED,
717 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
718 &mpt->parent_dmat) != 0) {
719 mpt_prt(mpt, "cannot create parent dma tag\n");
720 return (1);
723 /* Create a child tag for reply buffers */
724 if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
725 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
726 NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
727 &mpt->reply_dmat) != 0) {
728 mpt_prt(mpt, "cannot create a dma tag for replies\n");
729 return (1);
732 /* Allocate some DMA accessible memory for replies */
733 if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
734 BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
735 mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
736 (u_long) (2 * PAGE_SIZE));
737 return (1);
740 mi.mpt = mpt;
741 mi.error = 0;
743 /* Load and lock it into "bus space" */
744 bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
745 2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
747 if (mi.error) {
748 mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
749 mi.error);
750 return (1);
752 mpt->reply_phys = mi.phys;
754 return (0);
757 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
759 static void
760 mpt_dma_mem_free(struct mpt_softc *mpt)
763 /* Make sure we aren't double destroying */
764 if (mpt->reply_dmat == NULL) {
765 mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
766 return;
769 bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
770 bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
771 bus_dma_tag_destroy(mpt->reply_dmat);
772 bus_dma_tag_destroy(mpt->parent_dmat);
773 mpt->reply_dmat = NULL;
774 kfree(mpt->request_pool, M_DEVBUF);
775 mpt->request_pool = NULL;
778 #if 0
779 /* Reads modifiable (via PCI transactions) config registers */
780 static void
781 mpt_read_config_regs(struct mpt_softc *mpt)
784 mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
785 mpt->pci_cfg.LatencyTimer_LineSize =
786 pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
787 mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
788 mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
789 mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
790 mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
791 mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
792 mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
793 mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
794 mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
797 /* Sets modifiable config registers */
798 static void
799 mpt_set_config_regs(struct mpt_softc *mpt)
801 uint32_t val;
803 #define MPT_CHECK(reg, offset, size) \
804 val = pci_read_config(mpt->dev, offset, size); \
805 if (mpt->pci_cfg.reg != val) { \
806 mpt_prt(mpt, \
807 "Restoring " #reg " to 0x%X from 0x%X\n", \
808 mpt->pci_cfg.reg, val); \
811 if (mpt->verbose >= MPT_PRT_DEBUG) {
812 MPT_CHECK(Command, PCIR_COMMAND, 2);
813 MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
814 MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
815 MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
816 MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
817 MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
818 MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
819 MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
820 MPT_CHECK(IntLine, PCIR_INTLINE, 1);
821 MPT_CHECK(PMCSR, 0x44, 4);
823 #undef MPT_CHECK
825 pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
826 pci_write_config(mpt->dev, PCIR_CACHELNSZ,
827 mpt->pci_cfg.LatencyTimer_LineSize, 2);
828 pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
829 pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
830 pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
831 pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
832 pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
833 pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
834 pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
835 pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
837 #endif
839 static void
840 mpt_pci_intr(void *arg)
842 struct mpt_softc *mpt;
844 mpt = (struct mpt_softc *)arg;
845 MPT_LOCK(mpt);
846 mpt_intr(mpt);
847 MPT_UNLOCK(mpt);