sys/bus/pci/i386/pci_cfgreg.h

   1 /*-
   2  * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice unmodified, this list of conditions, and the following
  10  *    disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/i386/include/pci_cfgreg.h,v 1.14.20.1 2009/04/15 03:14:26 kensmith Exp $
  27  *
  28  */
  29
  30 #define CONF1_ADDR_PORT    0x0cf8
  31 #define CONF1_DATA_PORT    0x0cfc
  32
  33 #define CONF1_ENABLE       0x80000000ul
  34 #define CONF1_ENABLE_CHK   0x80000000ul
  35 #define CONF1_ENABLE_MSK   0x7f000000ul
  36 #define CONF1_ENABLE_CHK1  0xff000001ul
  37 #define CONF1_ENABLE_MSK1  0x80000001ul
  38 #define CONF1_ENABLE_RES1  0x80000000ul
  39
  40 #define CONF2_ENABLE_PORT  0x0cf8
  41 #define CONF2_FORWARD_PORT 0x0cfa
  42
  43 #define CONF2_ENABLE_CHK   0x0e
  44 #define CONF2_ENABLE_RES   0x0e
  45
  46 int             pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus);
  47 int             pci_cfgregopen(void);
  48 u_int32_t       pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
  49 void            pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
  50 void            pci_pir_open(void);
  51 int             pci_pir_probe(int bus, int require_parse);
  52 int             pci_pir_route_interrupt(int bus, int device, int func, int pin);