Oops, I accidentally MFC'd too much.
[dragonfly.git] / sys / dev / netif / iwl / if_iwlvar.h
blob39d24606a427c2869f598574773f4b2ed7af97a8
1 /*
2 * Copyright (c) 2008 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
34 * $DragonFly: src/sys/dev/netif/iwl/if_iwlvar.h,v 1.1 2008/03/05 14:10:39 sephe Exp $
37 #ifndef _IF_IWLVAR_H
38 #define _IF_IWLVAR_H
40 #define IWL_ALIGN 0x1000 /* XXX */
42 struct iwl_dmamap_ctx {
43 int nsegs;
44 bus_dma_segment_t *segs;
47 struct iwlmsg {
48 struct netmsg iwlm_nmsg;
49 void *iwlm_softc;
51 /* For newstate() */
52 enum ieee80211_state iwlm_nstate;
53 int iwlm_arg;
56 struct iwlcom {
57 struct ieee80211com iwl_ic;
58 int iwl_end;
60 int iwl_mem_rid;
61 struct resource *iwl_mem_res;
62 bus_space_tag_t iwl_mem_bt;
63 bus_space_handle_t iwl_mem_bh;
65 int iwl_irq_rid;
66 struct resource *iwl_irq_res;
67 void *iwl_irq_handle;
69 struct sysctl_ctx_list iwl_sysctl_ctx;
70 struct sysctl_oid *iwl_sysctl_tree;
72 int iwl_tx_timer;
74 struct lwkt_port iwl_reply_port;
75 struct lwkt_port iwl_thread_port;
76 struct thread iwl_thread;
77 int (*iwl_fwd_port)
78 (struct lwkt_port *, struct lwkt_msg *);
81 #define sc_ic iwlcom.iwl_ic
82 #define sc_irq_res iwlcom.iwl_irq_res
83 #define sc_irq_handle iwlcom.iwl_irq_handle
84 #define sc_thread iwlcom.iwl_thread
85 #define sc_thread_port iwlcom.iwl_thread_port
86 #define sc_reply_port iwlcom.iwl_reply_port
87 #define sc_tx_timer iwlcom.iwl_tx_timer
88 #define sc_sysctl_ctx iwlcom.iwl_sysctl_ctx
89 #define sc_sysctl_tree iwlcom.iwl_sysctl_tree
91 #define IWL_FW_PATH "iwl/"
93 #define IWL_WRITE_4(iwl, reg, val) \
94 bus_space_write_4((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg), (val))
95 #define IWL_WRITE_2(iwl, reg, val) \
96 bus_space_write_2((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg), (val))
97 #define IWL_WRITE_1(iwl, reg, val) \
98 bus_space_write_1((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg), (val))
99 #define IWL_READ_4(iwl, reg) \
100 bus_space_read_4((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg))
101 #define IWL_READ_2(iwl, reg) \
102 bus_space_read_2((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg))
103 #define IWL_READ_1(iwl, reg) \
104 bus_space_read_1((iwl)->iwl_mem_bt, (iwl)->iwl_mem_bh, (reg))
106 #define IND_WRITE_4(sc, reg, val) \
107 iwl_ind_write_4(&(sc)->iwlcom, (reg), (val))
108 #define IND_WRITE_2(sc, reg, val) \
109 iwl_ind_write_2(&(sc)->iwlcom, (reg), (val))
110 #define IND_WRITE_1(sc, reg, val) \
111 iwl_ind_write_1(&(sc)->iwlcom, (reg), (val))
112 #define IND_READ_4(sc, reg) \
113 iwl_ind_read_4(&(sc)->iwlcom, (reg))
114 #define IND_READ_2(sc, reg) \
115 iwl_ind_read_2(&(sc)->iwlcom, (reg))
116 #define IND_READ_1(sc, reg) \
117 iwl_ind_read_1(&(sc)->iwlcom, (reg))
119 #define CSR_READ_1(sc, reg) IWL_READ_1(&(sc)->iwlcom, (reg))
121 #define CSR_WRITE_4(sc, reg, val) IWL_WRITE_4(&(sc)->iwlcom, (reg), (val))
122 #define CSR_READ_4(sc, reg) IWL_READ_4(&(sc)->iwlcom, (reg))
123 #define CSR_SETBITS_4(sc, reg, bit) \
124 CSR_WRITE_4((sc), (reg), CSR_READ_4((sc), (reg)) | (bit))
126 extern const struct ieee80211_rateset iwl_rateset_11b;
128 void iwl_ind_write_4(struct iwlcom *, uint32_t, uint32_t);
129 void iwl_ind_write_2(struct iwlcom *, uint32_t, uint16_t);
130 void iwl_ind_write_1(struct iwlcom *, uint32_t, uint8_t);
131 uint32_t iwl_ind_read_4(struct iwlcom *, uint32_t);
132 uint16_t iwl_ind_read_2(struct iwlcom *, uint32_t);
133 uint8_t iwl_ind_read_1(struct iwlcom *, uint32_t);
134 uint16_t iwl_read_eeprom(struct iwlcom *, uint8_t);
135 int iwl_dma_mem_create(device_t, bus_dma_tag_t, bus_size_t,
136 bus_dma_tag_t *, void **, bus_addr_t *,
137 bus_dmamap_t *);
138 void iwl_dma_mem_destroy(bus_dma_tag_t, void *, bus_dmamap_t);
139 void iwl_dma_buf_addr(void *, bus_dma_segment_t *, int,
140 bus_size_t, int);
141 void iwl_create_thread(struct iwlcom *, int);
142 void iwl_destroy_thread(struct iwlcom *);
144 void iwlmsg_send(struct iwlmsg *, struct lwkt_port *);
145 void iwlmsg_init(struct iwlmsg *, struct lwkt_port *,
146 netisr_fn_t, void *);
148 #endif /* !_IF_IWLVAR_H */