1 /******************************************************************************
3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
5 *****************************************************************************/
7 /******************************************************************************
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
12 * All rights reserved.
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
37 * The above copyright and patent license is granted only if the following
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
72 * 3.4. Intel retains all right, title, and interest in and to the Original
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
80 * 4. Disclaimer and Export Compliance
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
114 *****************************************************************************
116 * Alternatively, you may choose to be licensed under the terms of the
119 * Redistribution and use in source and binary forms, with or without
120 * modification, are permitted provided that the following conditions
122 * 1. Redistributions of source code must retain the above copyright
123 * notice, this list of conditions, and the following disclaimer,
124 * without modification.
125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
126 * substantially similar to the "NO WARRANTY" disclaimer below
127 * ("Disclaimer") and any redistribution must be conditioned upon
128 * including a substantially similar Disclaimer requirement for further
129 * binary redistribution.
130 * 3. Neither the names of the above-listed copyright holders nor the names
131 * of any contributors may be used to endorse or promote products derived
132 * from this software without specific prior written permission.
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
146 * Alternatively, you may choose to be licensed under the terms of the
147 * GNU General Public License ("GPL") version 2 as published by the Free
148 * Software Foundation.
150 *****************************************************************************/
156 /*******************************************************************************
158 * Additional ACPI Tables (2)
160 * These tables are not consumed directly by the ACPICA subsystem, but are
161 * included here to support device drivers and the AML disassembler.
163 ******************************************************************************/
167 * Values for description table header signatures for tables defined in this
168 * file. Useful because they make it more difficult to inadvertently type in
169 * the wrong signature.
171 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
172 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
173 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
174 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
175 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
176 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
177 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
178 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
179 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
180 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
181 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
182 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
183 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
184 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
185 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
186 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */
187 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
188 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
189 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
193 * All tables must be byte-packed to match the ACPI specification, since
194 * the tables are provided by the system BIOS.
199 * Note: C bitfields are not used for this reason:
201 * "Bitfields are great and easy to read, but unfortunately the C language
202 * does not specify the layout of bitfields in memory, which means they are
203 * essentially useless for dealing with packed data in on-disk formats or
204 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
205 * this decision was a design error in C. Ritchie could have picked an order
206 * and stuck with it." Norman Ramsey.
207 * See http://stackoverflow.com/a/1053662/41661
211 /*******************************************************************************
213 * IORT - IO Remapping Table
215 * Conforms to "IO Remapping Table System Software on ARM Platforms",
216 * Document number: ARM DEN 0049C, May 2017
218 ******************************************************************************/
220 typedef struct acpi_table_iort
222 ACPI_TABLE_HEADER Header
;
233 typedef struct acpi_iort_node
240 UINT32 MappingOffset
;
245 /* Values for subtable Type above */
247 enum AcpiIortNodeType
249 ACPI_IORT_NODE_ITS_GROUP
= 0x00,
250 ACPI_IORT_NODE_NAMED_COMPONENT
= 0x01,
251 ACPI_IORT_NODE_PCI_ROOT_COMPLEX
= 0x02,
252 ACPI_IORT_NODE_SMMU
= 0x03,
253 ACPI_IORT_NODE_SMMU_V3
= 0x04
257 typedef struct acpi_iort_id_mapping
259 UINT32 InputBase
; /* Lowest value in input range */
260 UINT32 IdCount
; /* Number of IDs */
261 UINT32 OutputBase
; /* Lowest value in output range */
262 UINT32 OutputReference
; /* A reference to the output node */
265 } ACPI_IORT_ID_MAPPING
;
267 /* Masks for Flags field above for IORT subtable */
269 #define ACPI_IORT_ID_SINGLE_MAPPING (1)
272 typedef struct acpi_iort_memory_access
274 UINT32 CacheCoherency
;
279 } ACPI_IORT_MEMORY_ACCESS
;
281 /* Values for CacheCoherency field above */
283 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
284 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
286 /* Masks for Hints field above */
288 #define ACPI_IORT_HT_TRANSIENT (1)
289 #define ACPI_IORT_HT_WRITE (1<<1)
290 #define ACPI_IORT_HT_READ (1<<2)
291 #define ACPI_IORT_HT_OVERRIDE (1<<3)
293 /* Masks for MemoryFlags field above */
295 #define ACPI_IORT_MF_COHERENCY (1)
296 #define ACPI_IORT_MF_ATTRIBUTES (1<<1)
300 * IORT node specific subtables
302 typedef struct acpi_iort_its_group
305 UINT32 Identifiers
[1]; /* GIC ITS identifier arrary */
307 } ACPI_IORT_ITS_GROUP
;
310 typedef struct acpi_iort_named_component
313 UINT64 MemoryProperties
; /* Memory access properties */
314 UINT8 MemoryAddressLimit
; /* Memory address size limit */
315 char DeviceName
[1]; /* Path of namespace object */
317 } ACPI_IORT_NAMED_COMPONENT
;
320 typedef struct acpi_iort_root_complex
322 UINT64 MemoryProperties
; /* Memory access properties */
324 UINT32 PciSegmentNumber
;
326 } ACPI_IORT_ROOT_COMPLEX
;
328 /* Values for AtsAttribute field above */
330 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
331 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
334 typedef struct acpi_iort_smmu
336 UINT64 BaseAddress
; /* SMMU base address */
337 UINT64 Span
; /* Length of memory range */
340 UINT32 GlobalInterruptOffset
;
341 UINT32 ContextInterruptCount
;
342 UINT32 ContextInterruptOffset
;
343 UINT32 PmuInterruptCount
;
344 UINT32 PmuInterruptOffset
;
345 UINT64 Interrupts
[1]; /* Interrupt array */
349 /* Values for Model field above */
351 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
352 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
353 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
354 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
355 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
356 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */
358 /* Masks for Flags field above */
360 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
361 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
363 /* Global interrupt format */
365 typedef struct acpi_iort_smmu_gsi
370 UINT32 NSgCfgIrptFlags
;
372 } ACPI_IORT_SMMU_GSI
;
375 typedef struct acpi_iort_smmu_v3
377 UINT64 BaseAddress
; /* SMMUv3 base address */
389 UINT32 IdMappingIndex
;
393 /* Values for Model field above */
395 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
396 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */
397 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
399 /* Masks for Flags field above */
401 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
402 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1)
403 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
406 /*******************************************************************************
408 * IVRS - I/O Virtualization Reporting Structure
411 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
412 * Revision 1.26, February 2009.
414 ******************************************************************************/
416 typedef struct acpi_table_ivrs
418 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
419 UINT32 Info
; /* Common virtualization info */
424 /* Values for Info field above */
426 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
427 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
428 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
431 /* IVRS subtable header */
433 typedef struct acpi_ivrs_header
435 UINT8 Type
; /* Subtable type */
437 UINT16 Length
; /* Subtable length */
438 UINT16 DeviceId
; /* ID of IOMMU */
442 /* Values for subtable Type above */
446 ACPI_IVRS_TYPE_HARDWARE
= 0x10,
447 ACPI_IVRS_TYPE_MEMORY1
= 0x20,
448 ACPI_IVRS_TYPE_MEMORY2
= 0x21,
449 ACPI_IVRS_TYPE_MEMORY3
= 0x22
452 /* Masks for Flags field above for IVHD subtable */
454 #define ACPI_IVHD_TT_ENABLE (1)
455 #define ACPI_IVHD_PASS_PW (1<<1)
456 #define ACPI_IVHD_RES_PASS_PW (1<<2)
457 #define ACPI_IVHD_ISOC (1<<3)
458 #define ACPI_IVHD_IOTLB (1<<4)
460 /* Masks for Flags field above for IVMD subtable */
462 #define ACPI_IVMD_UNITY (1)
463 #define ACPI_IVMD_READ (1<<1)
464 #define ACPI_IVMD_WRITE (1<<2)
465 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
469 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER
472 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
474 typedef struct acpi_ivrs_hardware
476 ACPI_IVRS_HEADER Header
;
477 UINT16 CapabilityOffset
; /* Offset for IOMMU control fields */
478 UINT64 BaseAddress
; /* IOMMU control registers */
479 UINT16 PciSegmentGroup
;
480 UINT16 Info
; /* MSI number and unit ID */
483 } ACPI_IVRS_HARDWARE
;
485 /* Masks for Info field above */
487 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
488 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */
492 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure.
493 * Upper two bits of the Type field are the (encoded) length of the structure.
494 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
495 * are reserved for future use but not defined.
497 typedef struct acpi_ivrs_de_header
503 } ACPI_IVRS_DE_HEADER
;
505 /* Length of device entry is in the top two bits of Type field above */
507 #define ACPI_IVHD_ENTRY_LENGTH 0xC0
509 /* Values for device entry Type field above */
511 enum AcpiIvrsDeviceEntryType
513 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */
515 ACPI_IVRS_TYPE_PAD4
= 0,
516 ACPI_IVRS_TYPE_ALL
= 1,
517 ACPI_IVRS_TYPE_SELECT
= 2,
518 ACPI_IVRS_TYPE_START
= 3,
519 ACPI_IVRS_TYPE_END
= 4,
521 /* 8-byte device entries */
523 ACPI_IVRS_TYPE_PAD8
= 64,
524 ACPI_IVRS_TYPE_NOT_USED
= 65,
525 ACPI_IVRS_TYPE_ALIAS_SELECT
= 66, /* Uses ACPI_IVRS_DEVICE8A */
526 ACPI_IVRS_TYPE_ALIAS_START
= 67, /* Uses ACPI_IVRS_DEVICE8A */
527 ACPI_IVRS_TYPE_EXT_SELECT
= 70, /* Uses ACPI_IVRS_DEVICE8B */
528 ACPI_IVRS_TYPE_EXT_START
= 71, /* Uses ACPI_IVRS_DEVICE8B */
529 ACPI_IVRS_TYPE_SPECIAL
= 72 /* Uses ACPI_IVRS_DEVICE8C */
532 /* Values for Data field above */
534 #define ACPI_IVHD_INIT_PASS (1)
535 #define ACPI_IVHD_EINT_PASS (1<<1)
536 #define ACPI_IVHD_NMI_PASS (1<<2)
537 #define ACPI_IVHD_SYSTEM_MGMT (3<<4)
538 #define ACPI_IVHD_LINT0_PASS (1<<6)
539 #define ACPI_IVHD_LINT1_PASS (1<<7)
542 /* Types 0-4: 4-byte device entry */
544 typedef struct acpi_ivrs_device4
546 ACPI_IVRS_DE_HEADER Header
;
550 /* Types 66-67: 8-byte device entry */
552 typedef struct acpi_ivrs_device8a
554 ACPI_IVRS_DE_HEADER Header
;
559 } ACPI_IVRS_DEVICE8A
;
561 /* Types 70-71: 8-byte device entry */
563 typedef struct acpi_ivrs_device8b
565 ACPI_IVRS_DE_HEADER Header
;
568 } ACPI_IVRS_DEVICE8B
;
570 /* Values for ExtendedData above */
572 #define ACPI_IVHD_ATS_DISABLED (1<<31)
574 /* Type 72: 8-byte device entry */
576 typedef struct acpi_ivrs_device8c
578 ACPI_IVRS_DE_HEADER Header
;
583 } ACPI_IVRS_DEVICE8C
;
585 /* Values for Variety field above */
587 #define ACPI_IVHD_IOAPIC 1
588 #define ACPI_IVHD_HPET 2
591 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
593 typedef struct acpi_ivrs_memory
595 ACPI_IVRS_HEADER Header
;
604 /*******************************************************************************
606 * LPIT - Low Power Idle Table
608 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
610 ******************************************************************************/
612 typedef struct acpi_table_lpit
614 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
619 /* LPIT subtable header */
621 typedef struct acpi_lpit_header
623 UINT32 Type
; /* Subtable type */
624 UINT32 Length
; /* Subtable length */
631 /* Values for subtable Type above */
635 ACPI_LPIT_TYPE_NATIVE_CSTATE
= 0x00,
636 ACPI_LPIT_TYPE_RESERVED
= 0x01 /* 1 and above are reserved */
639 /* Masks for Flags field above */
641 #define ACPI_LPIT_STATE_DISABLED (1)
642 #define ACPI_LPIT_NO_COUNTER (1<<1)
645 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER
648 /* 0x00: Native C-state instruction based LPI structure */
650 typedef struct acpi_lpit_native
652 ACPI_LPIT_HEADER Header
;
653 ACPI_GENERIC_ADDRESS EntryTrigger
;
656 ACPI_GENERIC_ADDRESS ResidencyCounter
;
657 UINT64 CounterFrequency
;
662 /*******************************************************************************
664 * MADT - Multiple APIC Description Table
667 ******************************************************************************/
669 typedef struct acpi_table_madt
671 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
672 UINT32 Address
; /* Physical address of local APIC */
677 /* Masks for Flags field above */
679 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
681 /* Values for PCATCompat flag */
683 #define ACPI_MADT_DUAL_PIC 1
684 #define ACPI_MADT_MULTIPLE_APIC 0
687 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */
691 ACPI_MADT_TYPE_LOCAL_APIC
= 0,
692 ACPI_MADT_TYPE_IO_APIC
= 1,
693 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE
= 2,
694 ACPI_MADT_TYPE_NMI_SOURCE
= 3,
695 ACPI_MADT_TYPE_LOCAL_APIC_NMI
= 4,
696 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE
= 5,
697 ACPI_MADT_TYPE_IO_SAPIC
= 6,
698 ACPI_MADT_TYPE_LOCAL_SAPIC
= 7,
699 ACPI_MADT_TYPE_INTERRUPT_SOURCE
= 8,
700 ACPI_MADT_TYPE_LOCAL_X2APIC
= 9,
701 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI
= 10,
702 ACPI_MADT_TYPE_GENERIC_INTERRUPT
= 11,
703 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR
= 12,
704 ACPI_MADT_TYPE_GENERIC_MSI_FRAME
= 13,
705 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR
= 14,
706 ACPI_MADT_TYPE_GENERIC_TRANSLATOR
= 15,
707 ACPI_MADT_TYPE_RESERVED
= 16 /* 16 and greater are reserved */
712 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
715 /* 0: Processor Local APIC */
717 typedef struct acpi_madt_local_apic
719 ACPI_SUBTABLE_HEADER Header
;
720 UINT8 ProcessorId
; /* ACPI processor id */
721 UINT8 Id
; /* Processor's local APIC id */
724 } ACPI_MADT_LOCAL_APIC
;
729 typedef struct acpi_madt_io_apic
731 ACPI_SUBTABLE_HEADER Header
;
732 UINT8 Id
; /* I/O APIC ID */
733 UINT8 Reserved
; /* Reserved - must be zero */
734 UINT32 Address
; /* APIC physical address */
735 UINT32 GlobalIrqBase
; /* Global system interrupt where INTI lines start */
740 /* 2: Interrupt Override */
742 typedef struct acpi_madt_interrupt_override
744 ACPI_SUBTABLE_HEADER Header
;
745 UINT8 Bus
; /* 0 - ISA */
746 UINT8 SourceIrq
; /* Interrupt source (IRQ) */
747 UINT32 GlobalIrq
; /* Global system interrupt */
750 } ACPI_MADT_INTERRUPT_OVERRIDE
;
755 typedef struct acpi_madt_nmi_source
757 ACPI_SUBTABLE_HEADER Header
;
759 UINT32 GlobalIrq
; /* Global system interrupt */
761 } ACPI_MADT_NMI_SOURCE
;
764 /* 4: Local APIC NMI */
766 typedef struct acpi_madt_local_apic_nmi
768 ACPI_SUBTABLE_HEADER Header
;
769 UINT8 ProcessorId
; /* ACPI processor id */
771 UINT8 Lint
; /* LINTn to which NMI is connected */
773 } ACPI_MADT_LOCAL_APIC_NMI
;
776 /* 5: Address Override */
778 typedef struct acpi_madt_local_apic_override
780 ACPI_SUBTABLE_HEADER Header
;
781 UINT16 Reserved
; /* Reserved, must be zero */
782 UINT64 Address
; /* APIC physical address */
784 } ACPI_MADT_LOCAL_APIC_OVERRIDE
;
789 typedef struct acpi_madt_io_sapic
791 ACPI_SUBTABLE_HEADER Header
;
792 UINT8 Id
; /* I/O SAPIC ID */
793 UINT8 Reserved
; /* Reserved, must be zero */
794 UINT32 GlobalIrqBase
; /* Global interrupt for SAPIC start */
795 UINT64 Address
; /* SAPIC physical address */
797 } ACPI_MADT_IO_SAPIC
;
802 typedef struct acpi_madt_local_sapic
804 ACPI_SUBTABLE_HEADER Header
;
805 UINT8 ProcessorId
; /* ACPI processor id */
806 UINT8 Id
; /* SAPIC ID */
807 UINT8 Eid
; /* SAPIC EID */
808 UINT8 Reserved
[3]; /* Reserved, must be zero */
810 UINT32 Uid
; /* Numeric UID - ACPI 3.0 */
811 char UidString
[1]; /* String UID - ACPI 3.0 */
813 } ACPI_MADT_LOCAL_SAPIC
;
816 /* 8: Platform Interrupt Source */
818 typedef struct acpi_madt_interrupt_source
820 ACPI_SUBTABLE_HEADER Header
;
822 UINT8 Type
; /* 1=PMI, 2=INIT, 3=corrected */
823 UINT8 Id
; /* Processor ID */
824 UINT8 Eid
; /* Processor EID */
825 UINT8 IoSapicVector
; /* Vector value for PMI interrupts */
826 UINT32 GlobalIrq
; /* Global system interrupt */
827 UINT32 Flags
; /* Interrupt Source Flags */
829 } ACPI_MADT_INTERRUPT_SOURCE
;
831 /* Masks for Flags field above */
833 #define ACPI_MADT_CPEI_OVERRIDE (1)
836 /* 9: Processor Local X2APIC (ACPI 4.0) */
838 typedef struct acpi_madt_local_x2apic
840 ACPI_SUBTABLE_HEADER Header
;
841 UINT16 Reserved
; /* Reserved - must be zero */
842 UINT32 LocalApicId
; /* Processor x2APIC ID */
844 UINT32 Uid
; /* ACPI processor UID */
846 } ACPI_MADT_LOCAL_X2APIC
;
849 /* 10: Local X2APIC NMI (ACPI 4.0) */
851 typedef struct acpi_madt_local_x2apic_nmi
853 ACPI_SUBTABLE_HEADER Header
;
855 UINT32 Uid
; /* ACPI processor UID */
856 UINT8 Lint
; /* LINTn to which NMI is connected */
857 UINT8 Reserved
[3]; /* Reserved - must be zero */
859 } ACPI_MADT_LOCAL_X2APIC_NMI
;
862 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */
864 typedef struct acpi_madt_generic_interrupt
866 ACPI_SUBTABLE_HEADER Header
;
867 UINT16 Reserved
; /* Reserved - must be zero */
868 UINT32 CpuInterfaceNumber
;
871 UINT32 ParkingVersion
;
872 UINT32 PerformanceInterrupt
;
873 UINT64 ParkedAddress
;
875 UINT64 GicvBaseAddress
;
876 UINT64 GichBaseAddress
;
877 UINT32 VgicInterrupt
;
878 UINT64 GicrBaseAddress
;
880 UINT8 EfficiencyClass
;
883 } ACPI_MADT_GENERIC_INTERRUPT
;
885 /* Masks for Flags field above */
887 /* ACPI_MADT_ENABLED (1) Processor is usable if set */
888 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
889 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
892 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
894 typedef struct acpi_madt_generic_distributor
896 ACPI_SUBTABLE_HEADER Header
;
897 UINT16 Reserved
; /* Reserved - must be zero */
900 UINT32 GlobalIrqBase
;
902 UINT8 Reserved2
[3]; /* Reserved - must be zero */
904 } ACPI_MADT_GENERIC_DISTRIBUTOR
;
906 /* Values for Version field above */
908 enum AcpiMadtGicVersion
910 ACPI_MADT_GIC_VERSION_NONE
= 0,
911 ACPI_MADT_GIC_VERSION_V1
= 1,
912 ACPI_MADT_GIC_VERSION_V2
= 2,
913 ACPI_MADT_GIC_VERSION_V3
= 3,
914 ACPI_MADT_GIC_VERSION_V4
= 4,
915 ACPI_MADT_GIC_VERSION_RESERVED
= 5 /* 5 and greater are reserved */
919 /* 13: Generic MSI Frame (ACPI 5.1) */
921 typedef struct acpi_madt_generic_msi_frame
923 ACPI_SUBTABLE_HEADER Header
;
924 UINT16 Reserved
; /* Reserved - must be zero */
931 } ACPI_MADT_GENERIC_MSI_FRAME
;
933 /* Masks for Flags field above */
935 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
938 /* 14: Generic Redistributor (ACPI 5.1) */
940 typedef struct acpi_madt_generic_redistributor
942 ACPI_SUBTABLE_HEADER Header
;
943 UINT16 Reserved
; /* reserved - must be zero */
947 } ACPI_MADT_GENERIC_REDISTRIBUTOR
;
950 /* 15: Generic Translator (ACPI 6.0) */
952 typedef struct acpi_madt_generic_translator
954 ACPI_SUBTABLE_HEADER Header
;
955 UINT16 Reserved
; /* reserved - must be zero */
956 UINT32 TranslationId
;
960 } ACPI_MADT_GENERIC_TRANSLATOR
;
964 * Common flags fields for MADT subtables
967 /* MADT Local APIC flags */
969 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
971 /* MADT MPS INTI flags (IntiFlags) */
973 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
974 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
976 /* Values for MPS INTI flags */
978 #define ACPI_MADT_POLARITY_CONFORMS 0
979 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
980 #define ACPI_MADT_POLARITY_RESERVED 2
981 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3
983 #define ACPI_MADT_TRIGGER_CONFORMS (0)
984 #define ACPI_MADT_TRIGGER_EDGE (1<<2)
985 #define ACPI_MADT_TRIGGER_RESERVED (2<<2)
986 #define ACPI_MADT_TRIGGER_LEVEL (3<<2)
989 /*******************************************************************************
991 * MCFG - PCI Memory Mapped Configuration table and subtable
994 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
996 ******************************************************************************/
998 typedef struct acpi_table_mcfg
1000 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1008 typedef struct acpi_mcfg_allocation
1010 UINT64 Address
; /* Base address, processor-relative */
1011 UINT16 PciSegment
; /* PCI segment group number */
1012 UINT8 StartBusNumber
; /* Starting PCI Bus number */
1013 UINT8 EndBusNumber
; /* Final PCI Bus number */
1016 } ACPI_MCFG_ALLOCATION
;
1019 /*******************************************************************************
1021 * MCHI - Management Controller Host Interface Table
1024 * Conforms to "Management Component Transport Protocol (MCTP) Host
1025 * Interface Specification", Revision 1.0.0a, October 13, 2009
1027 ******************************************************************************/
1029 typedef struct acpi_table_mchi
1031 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1032 UINT8 InterfaceType
;
1034 UINT64 ProtocolData
;
1035 UINT8 InterruptType
;
1037 UINT8 PciDeviceFlag
;
1038 UINT32 GlobalInterrupt
;
1039 ACPI_GENERIC_ADDRESS ControlRegister
;
1048 /*******************************************************************************
1050 * MPST - Memory Power State Table (ACPI 5.0)
1053 ******************************************************************************/
1055 #define ACPI_MPST_CHANNEL_INFO \
1057 UINT8 Reserved1[3]; \
1058 UINT16 PowerNodeCount; \
1063 typedef struct acpi_table_mpst
1065 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1066 ACPI_MPST_CHANNEL_INFO
/* Platform Communication Channel */
1071 /* Memory Platform Communication Channel Info */
1073 typedef struct acpi_mpst_channel
1075 ACPI_MPST_CHANNEL_INFO
/* Platform Communication Channel */
1077 } ACPI_MPST_CHANNEL
;
1080 /* Memory Power Node Structure */
1082 typedef struct acpi_mpst_power_node
1088 UINT64 RangeAddress
;
1090 UINT32 NumPowerStates
;
1091 UINT32 NumPhysicalComponents
;
1093 } ACPI_MPST_POWER_NODE
;
1095 /* Values for Flags field above */
1097 #define ACPI_MPST_ENABLED 1
1098 #define ACPI_MPST_POWER_MANAGED 2
1099 #define ACPI_MPST_HOT_PLUG_CAPABLE 4
1102 /* Memory Power State Structure (follows POWER_NODE above) */
1104 typedef struct acpi_mpst_power_state
1109 } ACPI_MPST_POWER_STATE
;
1112 /* Physical Component ID Structure (follows POWER_STATE above) */
1114 typedef struct acpi_mpst_component
1118 } ACPI_MPST_COMPONENT
;
1121 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
1123 typedef struct acpi_mpst_data_hdr
1125 UINT16 CharacteristicsCount
;
1128 } ACPI_MPST_DATA_HDR
;
1130 typedef struct acpi_mpst_power_data
1135 UINT32 AveragePower
;
1140 } ACPI_MPST_POWER_DATA
;
1142 /* Values for Flags field above */
1144 #define ACPI_MPST_PRESERVE 1
1145 #define ACPI_MPST_AUTOENTRY 2
1146 #define ACPI_MPST_AUTOEXIT 4
1149 /* Shared Memory Region (not part of an ACPI table) */
1151 typedef struct acpi_mpst_shared
1156 UINT32 CommandRegister
;
1157 UINT32 StatusRegister
;
1158 UINT32 PowerStateId
;
1160 UINT64 EnergyConsumed
;
1161 UINT64 AveragePower
;
1166 /*******************************************************************************
1168 * MSCT - Maximum System Characteristics Table (ACPI 4.0)
1171 ******************************************************************************/
1173 typedef struct acpi_table_msct
1175 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1176 UINT32 ProximityOffset
; /* Location of proximity info struct(s) */
1177 UINT32 MaxProximityDomains
;/* Max number of proximity domains */
1178 UINT32 MaxClockDomains
; /* Max number of clock domains */
1179 UINT64 MaxAddress
; /* Max physical address in system */
1184 /* Subtable - Maximum Proximity Domain Information. Version 1 */
1186 typedef struct acpi_msct_proximity
1190 UINT32 RangeStart
; /* Start of domain range */
1191 UINT32 RangeEnd
; /* End of domain range */
1192 UINT32 ProcessorCapacity
;
1193 UINT64 MemoryCapacity
; /* In bytes */
1195 } ACPI_MSCT_PROXIMITY
;
1198 /*******************************************************************************
1200 * MSDM - Microsoft Data Management table
1202 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
1203 * November 29, 2011. Copyright 2011 Microsoft
1205 ******************************************************************************/
1207 /* Basic MSDM table is only the common ACPI header */
1209 typedef struct acpi_table_msdm
1211 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1216 /*******************************************************************************
1218 * MTMR - MID Timer Table
1221 * Conforms to "Simple Firmware Interface Specification",
1222 * Draft 0.8.2, Oct 19, 2010
1223 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
1225 ******************************************************************************/
1227 typedef struct acpi_table_mtmr
1229 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1235 typedef struct acpi_mtmr_entry
1237 ACPI_GENERIC_ADDRESS PhysicalAddress
;
1244 /*******************************************************************************
1246 * NFIT - NVDIMM Interface Table (ACPI 6.0+)
1249 ******************************************************************************/
1251 typedef struct acpi_table_nfit
1253 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1254 UINT32 Reserved
; /* Reserved, must be zero */
1258 /* Subtable header for NFIT */
1260 typedef struct acpi_nfit_header
1268 /* Values for subtable type in ACPI_NFIT_HEADER */
1272 ACPI_NFIT_TYPE_SYSTEM_ADDRESS
= 0,
1273 ACPI_NFIT_TYPE_MEMORY_MAP
= 1,
1274 ACPI_NFIT_TYPE_INTERLEAVE
= 2,
1275 ACPI_NFIT_TYPE_SMBIOS
= 3,
1276 ACPI_NFIT_TYPE_CONTROL_REGION
= 4,
1277 ACPI_NFIT_TYPE_DATA_REGION
= 5,
1278 ACPI_NFIT_TYPE_FLUSH_ADDRESS
= 6,
1279 ACPI_NFIT_TYPE_CAPABILITIES
= 7,
1280 ACPI_NFIT_TYPE_RESERVED
= 8 /* 8 and greater are reserved */
1287 /* 0: System Physical Address Range Structure */
1289 typedef struct acpi_nfit_system_address
1291 ACPI_NFIT_HEADER Header
;
1294 UINT32 Reserved
; /* Reserved, must be zero */
1295 UINT32 ProximityDomain
;
1296 UINT8 RangeGuid
[16];
1299 UINT64 MemoryMapping
;
1301 } ACPI_NFIT_SYSTEM_ADDRESS
;
1305 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
1306 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
1308 /* Range Type GUIDs appear in the include/acuuid.h file */
1311 /* 1: Memory Device to System Address Range Map Structure */
1313 typedef struct acpi_nfit_memory_map
1315 ACPI_NFIT_HEADER Header
;
1316 UINT32 DeviceHandle
;
1322 UINT64 RegionOffset
;
1324 UINT16 InterleaveIndex
;
1325 UINT16 InterleaveWays
;
1327 UINT16 Reserved
; /* Reserved, must be zero */
1329 } ACPI_NFIT_MEMORY_MAP
;
1333 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
1334 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
1335 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
1336 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
1337 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
1338 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
1339 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
1342 /* 2: Interleave Structure */
1344 typedef struct acpi_nfit_interleave
1346 ACPI_NFIT_HEADER Header
;
1347 UINT16 InterleaveIndex
;
1348 UINT16 Reserved
; /* Reserved, must be zero */
1351 UINT32 LineOffset
[1]; /* Variable length */
1353 } ACPI_NFIT_INTERLEAVE
;
1356 /* 3: SMBIOS Management Information Structure */
1358 typedef struct acpi_nfit_smbios
1360 ACPI_NFIT_HEADER Header
;
1361 UINT32 Reserved
; /* Reserved, must be zero */
1362 UINT8 Data
[1]; /* Variable length */
1367 /* 4: NVDIMM Control Region Structure */
1369 typedef struct acpi_nfit_control_region
1371 ACPI_NFIT_HEADER Header
;
1376 UINT16 SubsystemVendorId
;
1377 UINT16 SubsystemDeviceId
;
1378 UINT16 SubsystemRevisionId
;
1380 UINT8 ManufacturingLocation
;
1381 UINT16 ManufacturingDate
;
1382 UINT8 Reserved
[2]; /* Reserved, must be zero */
1383 UINT32 SerialNumber
;
1387 UINT64 CommandOffset
;
1389 UINT64 StatusOffset
;
1392 UINT8 Reserved1
[6]; /* Reserved, must be zero */
1394 } ACPI_NFIT_CONTROL_REGION
;
1398 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
1400 /* ValidFields bits */
1402 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
1405 /* 5: NVDIMM Block Data Window Region Structure */
1407 typedef struct acpi_nfit_data_region
1409 ACPI_NFIT_HEADER Header
;
1415 UINT64 StartAddress
;
1417 } ACPI_NFIT_DATA_REGION
;
1420 /* 6: Flush Hint Address Structure */
1422 typedef struct acpi_nfit_flush_address
1424 ACPI_NFIT_HEADER Header
;
1425 UINT32 DeviceHandle
;
1427 UINT8 Reserved
[6]; /* Reserved, must be zero */
1428 UINT64 HintAddress
[1]; /* Variable length */
1430 } ACPI_NFIT_FLUSH_ADDRESS
;
1433 /* 7: Platform Capabilities Structure */
1435 typedef struct acpi_nfit_capabilities
1437 ACPI_NFIT_HEADER Header
;
1438 UINT8 HighestCapability
;
1439 UINT8 Reserved
[3]; /* Reserved, must be zero */
1440 UINT32 Capabilities
;
1443 } ACPI_NFIT_CAPABILITIES
;
1445 /* Capabilities Flags */
1447 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
1448 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
1449 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
1453 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
1455 typedef struct nfit_device_handle
1459 } NFIT_DEVICE_HANDLE
;
1461 /* Device handle construction and extraction macros */
1463 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
1464 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
1465 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
1466 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
1467 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
1469 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
1470 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
1471 #define ACPI_NFIT_MEMORY_ID_OFFSET 8
1472 #define ACPI_NFIT_SOCKET_ID_OFFSET 12
1473 #define ACPI_NFIT_NODE_ID_OFFSET 16
1475 /* Macro to construct a NFIT/NVDIMM device handle */
1477 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
1479 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
1480 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
1481 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
1482 ((node) << ACPI_NFIT_NODE_ID_OFFSET))
1484 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */
1486 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
1487 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
1489 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
1490 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
1492 #define ACPI_NFIT_GET_MEMORY_ID(handle) \
1493 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
1495 #define ACPI_NFIT_GET_SOCKET_ID(handle) \
1496 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
1498 #define ACPI_NFIT_GET_NODE_ID(handle) \
1499 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
1502 /*******************************************************************************
1504 * PCCT - Platform Communications Channel Table (ACPI 5.0)
1505 * Version 2 (ACPI 6.2)
1507 ******************************************************************************/
1509 typedef struct acpi_table_pcct
1511 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1517 /* Values for Flags field above */
1519 #define ACPI_PCCT_DOORBELL 1
1521 /* Values for subtable type in ACPI_SUBTABLE_HEADER */
1525 ACPI_PCCT_TYPE_GENERIC_SUBSPACE
= 0,
1526 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE
= 1,
1527 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2
= 2, /* ACPI 6.1 */
1528 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE
= 3, /* ACPI 6.2 */
1529 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE
= 4, /* ACPI 6.2 */
1530 ACPI_PCCT_TYPE_RESERVED
= 5 /* 5 and greater are reserved */
1534 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
1537 /* 0: Generic Communications Subspace */
1539 typedef struct acpi_pcct_subspace
1541 ACPI_SUBTABLE_HEADER Header
;
1545 ACPI_GENERIC_ADDRESS DoorbellRegister
;
1546 UINT64 PreserveMask
;
1549 UINT32 MaxAccessRate
;
1550 UINT16 MinTurnaroundTime
;
1552 } ACPI_PCCT_SUBSPACE
;
1555 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */
1557 typedef struct acpi_pcct_hw_reduced
1559 ACPI_SUBTABLE_HEADER Header
;
1560 UINT32 PlatformInterrupt
;
1565 ACPI_GENERIC_ADDRESS DoorbellRegister
;
1566 UINT64 PreserveMask
;
1569 UINT32 MaxAccessRate
;
1570 UINT16 MinTurnaroundTime
;
1572 } ACPI_PCCT_HW_REDUCED
;
1575 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
1577 typedef struct acpi_pcct_hw_reduced_type2
1579 ACPI_SUBTABLE_HEADER Header
;
1580 UINT32 PlatformInterrupt
;
1585 ACPI_GENERIC_ADDRESS DoorbellRegister
;
1586 UINT64 PreserveMask
;
1589 UINT32 MaxAccessRate
;
1590 UINT16 MinTurnaroundTime
;
1591 ACPI_GENERIC_ADDRESS PlatformAckRegister
;
1592 UINT64 AckPreserveMask
;
1593 UINT64 AckWriteMask
;
1595 } ACPI_PCCT_HW_REDUCED_TYPE2
;
1598 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
1600 typedef struct acpi_pcct_ext_pcc_master
1602 ACPI_SUBTABLE_HEADER Header
;
1603 UINT32 PlatformInterrupt
;
1608 ACPI_GENERIC_ADDRESS DoorbellRegister
;
1609 UINT64 PreserveMask
;
1612 UINT32 MaxAccessRate
;
1613 UINT32 MinTurnaroundTime
;
1614 ACPI_GENERIC_ADDRESS PlatformAckRegister
;
1615 UINT64 AckPreserveMask
;
1618 ACPI_GENERIC_ADDRESS CmdCompleteRegister
;
1619 UINT64 CmdCompleteMask
;
1620 ACPI_GENERIC_ADDRESS CmdUpdateRegister
;
1621 UINT64 CmdUpdatePreserveMask
;
1622 UINT64 CmdUpdateSetMask
;
1623 ACPI_GENERIC_ADDRESS ErrorStatusRegister
;
1624 UINT64 ErrorStatusMask
;
1626 } ACPI_PCCT_EXT_PCC_MASTER
;
1629 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
1631 typedef struct acpi_pcct_ext_pcc_slave
1633 ACPI_SUBTABLE_HEADER Header
;
1634 UINT32 PlatformInterrupt
;
1639 ACPI_GENERIC_ADDRESS DoorbellRegister
;
1640 UINT64 PreserveMask
;
1643 UINT32 MaxAccessRate
;
1644 UINT32 MinTurnaroundTime
;
1645 ACPI_GENERIC_ADDRESS PlatformAckRegister
;
1646 UINT64 AckPreserveMask
;
1649 ACPI_GENERIC_ADDRESS CmdCompleteRegister
;
1650 UINT64 CmdCompleteMask
;
1651 ACPI_GENERIC_ADDRESS CmdUpdateRegister
;
1652 UINT64 CmdUpdatePreserveMask
;
1653 UINT64 CmdUpdateSetMask
;
1654 ACPI_GENERIC_ADDRESS ErrorStatusRegister
;
1655 UINT64 ErrorStatusMask
;
1657 } ACPI_PCCT_EXT_PCC_SLAVE
;
1660 /* Values for doorbell flags above */
1662 #define ACPI_PCCT_INTERRUPT_POLARITY (1)
1663 #define ACPI_PCCT_INTERRUPT_MODE (1<<1)
1667 * PCC memory structures (not part of the ACPI table)
1670 /* Shared Memory Region */
1672 typedef struct acpi_pcct_shared_memory
1678 } ACPI_PCCT_SHARED_MEMORY
;
1681 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
1683 typedef struct acpi_pcct_ext_pcc_shared_memory
1690 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY
;
1693 /*******************************************************************************
1695 * PDTT - Platform Debug Trigger Table (ACPI 6.2)
1698 ******************************************************************************/
1700 typedef struct acpi_table_pdtt
1702 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1711 * PDTT Communication Channel Identifier Structure.
1712 * The number of these structures is defined by TriggerCount above,
1713 * starting at ArrayOffset.
1715 typedef struct acpi_pdtt_channel
1720 } ACPI_PDTT_CHANNEL
;
1722 /* Flags for above */
1724 #define ACPI_PDTT_RUNTIME_TRIGGER (1)
1725 #define ACPI_PDTT_WAIT_COMPLETION (1<<1)
1728 /*******************************************************************************
1730 * PMTT - Platform Memory Topology Table (ACPI 5.0)
1733 ******************************************************************************/
1735 typedef struct acpi_table_pmtt
1737 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1743 /* Common header for PMTT subtables that follow main table */
1745 typedef struct acpi_pmtt_header
1755 /* Values for Type field above */
1757 #define ACPI_PMTT_TYPE_SOCKET 0
1758 #define ACPI_PMTT_TYPE_CONTROLLER 1
1759 #define ACPI_PMTT_TYPE_DIMM 2
1760 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
1762 /* Values for Flags field above */
1764 #define ACPI_PMTT_TOP_LEVEL 0x0001
1765 #define ACPI_PMTT_PHYSICAL 0x0002
1766 #define ACPI_PMTT_MEMORY_TYPE 0x000C
1770 * PMTT subtables, correspond to Type in acpi_pmtt_header
1774 /* 0: Socket Structure */
1776 typedef struct acpi_pmtt_socket
1778 ACPI_PMTT_HEADER Header
;
1785 /* 1: Memory Controller subtable */
1787 typedef struct acpi_pmtt_controller
1789 ACPI_PMTT_HEADER Header
;
1791 UINT32 WriteLatency
;
1792 UINT32 ReadBandwidth
;
1793 UINT32 WriteBandwidth
;
1799 } ACPI_PMTT_CONTROLLER
;
1801 /* 1a: Proximity Domain substructure */
1803 typedef struct acpi_pmtt_domain
1805 UINT32 ProximityDomain
;
1810 /* 2: Physical Component Identifier (DIMM) */
1812 typedef struct acpi_pmtt_physical_component
1814 ACPI_PMTT_HEADER Header
;
1820 } ACPI_PMTT_PHYSICAL_COMPONENT
;
1823 /*******************************************************************************
1825 * PPTT - Processor Properties Topology Table (ACPI 6.2)
1828 ******************************************************************************/
1830 typedef struct acpi_table_pptt
1832 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1836 /* Values for Type field above */
1840 ACPI_PPTT_TYPE_PROCESSOR
= 0,
1841 ACPI_PPTT_TYPE_CACHE
= 1,
1842 ACPI_PPTT_TYPE_ID
= 2,
1843 ACPI_PPTT_TYPE_RESERVED
= 3
1847 /* 0: Processor Hierarchy Node Structure */
1849 typedef struct acpi_pptt_processor
1851 ACPI_SUBTABLE_HEADER Header
;
1855 UINT32 AcpiProcessorId
;
1856 UINT32 NumberOfPrivResources
;
1858 } ACPI_PPTT_PROCESSOR
;
1862 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */
1863 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */
1866 /* 1: Cache Type Structure */
1868 typedef struct acpi_pptt_cache
1870 ACPI_SUBTABLE_HEADER Header
;
1873 UINT32 NextLevelOfCache
;
1875 UINT32 NumberOfSets
;
1876 UINT8 Associativity
;
1884 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
1885 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
1886 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
1887 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
1888 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
1889 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
1890 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
1892 /* Masks for Attributes */
1894 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
1895 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
1896 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
1898 /* Attributes describing cache */
1899 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
1900 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
1901 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
1902 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
1904 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
1905 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
1906 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
1907 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
1909 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
1910 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
1912 /* 2: ID Structure */
1914 typedef struct acpi_pptt_id
1916 ACPI_SUBTABLE_HEADER Header
;
1928 /*******************************************************************************
1930 * RASF - RAS Feature Table (ACPI 5.0)
1933 ******************************************************************************/
1935 typedef struct acpi_table_rasf
1937 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
1938 UINT8 ChannelId
[12];
1942 /* RASF Platform Communication Channel Shared Memory Region */
1944 typedef struct acpi_rasf_shared_memory
1950 UINT8 Capabilities
[16];
1951 UINT8 SetCapabilities
[16];
1952 UINT16 NumParameterBlocks
;
1953 UINT32 SetCapabilitiesStatus
;
1955 } ACPI_RASF_SHARED_MEMORY
;
1957 /* RASF Parameter Block Structure Header */
1959 typedef struct acpi_rasf_parameter_block
1965 } ACPI_RASF_PARAMETER_BLOCK
;
1967 /* RASF Parameter Block Structure for PATROL_SCRUB */
1969 typedef struct acpi_rasf_patrol_scrub_parameter
1971 ACPI_RASF_PARAMETER_BLOCK Header
;
1972 UINT16 PatrolScrubCommand
;
1973 UINT64 RequestedAddressRange
[2];
1974 UINT64 ActualAddressRange
[2];
1976 UINT8 RequestedSpeed
;
1978 } ACPI_RASF_PATROL_SCRUB_PARAMETER
;
1980 /* Masks for Flags and Speed fields above */
1982 #define ACPI_RASF_SCRUBBER_RUNNING 1
1983 #define ACPI_RASF_SPEED (7<<1)
1984 #define ACPI_RASF_SPEED_SLOW (0<<1)
1985 #define ACPI_RASF_SPEED_MEDIUM (4<<1)
1986 #define ACPI_RASF_SPEED_FAST (7<<1)
1988 /* Channel Commands */
1990 enum AcpiRasfCommands
1992 ACPI_RASF_EXECUTE_RASF_COMMAND
= 1
1995 /* Platform RAS Capabilities */
1997 enum AcpiRasfCapabiliities
1999 ACPI_HW_PATROL_SCRUB_SUPPORTED
= 0,
2000 ACPI_SW_PATROL_SCRUB_EXPOSED
= 1
2003 /* Patrol Scrub Commands */
2005 enum AcpiRasfPatrolScrubCommands
2007 ACPI_RASF_GET_PATROL_PARAMETERS
= 1,
2008 ACPI_RASF_START_PATROL_SCRUBBER
= 2,
2009 ACPI_RASF_STOP_PATROL_SCRUBBER
= 3
2012 /* Channel Command flags */
2014 #define ACPI_RASF_GENERATE_SCI (1<<15)
2020 ACPI_RASF_SUCCESS
= 0,
2021 ACPI_RASF_NOT_VALID
= 1,
2022 ACPI_RASF_NOT_SUPPORTED
= 2,
2024 ACPI_RASF_FAILED
= 4,
2025 ACPI_RASF_ABORTED
= 5,
2026 ACPI_RASF_INVALID_DATA
= 6
2031 #define ACPI_RASF_COMMAND_COMPLETE (1)
2032 #define ACPI_RASF_SCI_DOORBELL (1<<1)
2033 #define ACPI_RASF_ERROR (1<<2)
2034 #define ACPI_RASF_STATUS (0x1F<<3)
2037 /*******************************************************************************
2039 * SBST - Smart Battery Specification Table
2042 ******************************************************************************/
2044 typedef struct acpi_table_sbst
2046 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
2047 UINT32 WarningLevel
;
2049 UINT32 CriticalLevel
;
2054 /*******************************************************************************
2056 * SDEI - Software Delegated Exception Interface Descriptor Table
2058 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
2059 * May 8th, 2017. Copyright 2017 ARM Ltd.
2061 ******************************************************************************/
2063 typedef struct acpi_table_sdei
2065 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
2070 /*******************************************************************************
2072 * SDEV - Secure Devices Table (ACPI 6.2)
2075 ******************************************************************************/
2077 typedef struct acpi_table_sdev
2079 ACPI_TABLE_HEADER Header
; /* Common ACPI table header */
2084 typedef struct acpi_sdev_header
2093 /* Values for subtable type above */
2097 ACPI_SDEV_TYPE_NAMESPACE_DEVICE
= 0,
2098 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE
= 1,
2099 ACPI_SDEV_TYPE_RESERVED
= 2 /* 2 and greater are reserved */
2102 /* Values for flags above */
2104 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
2110 /* 0: Namespace Device Based Secure Device Structure */
2112 typedef struct acpi_sdev_namespace
2114 ACPI_SDEV_HEADER Header
;
2115 UINT16 DeviceIdOffset
;
2116 UINT16 DeviceIdLength
;
2117 UINT16 VendorDataOffset
;
2118 UINT16 VendorDataLength
;
2120 } ACPI_SDEV_NAMESPACE
;
2122 /* 1: PCIe Endpoint Device Based Device Structure */
2124 typedef struct acpi_sdev_pcie
2126 ACPI_SDEV_HEADER Header
;
2131 UINT16 VendorDataOffset
;
2132 UINT16 VendorDataLength
;
2136 /* 1a: PCIe Endpoint path entry */
2138 typedef struct acpi_sdev_pcie_path
2143 } ACPI_SDEV_PCIE_PATH
;
2146 /* Reset to default packing */
2150 #endif /* __ACTBL2_H__ */