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Sync ACPICA with Intel's version 20180508 (from previously 20170831).
[dragonfly.git] / sys / contrib / dev / acpica / source / include / actbl1.h
blob4f03ab05a01d3b6e2d362ab6b674bff8d2e69c23
1 /******************************************************************************
2 *
3 * Name: actbl1.h - Additional ACPI table definitions
4 *
5 *****************************************************************************/
6
7 /******************************************************************************
8 *
9 * 1. Copyright Notice
10 *
11 * Some or all of this work - Copyright (c) 1999 - 2018, Intel Corp.
12 * All rights reserved.
13 *
14 * 2. License
15 *
16 * 2.1. This is your license from Intel Corp. under its intellectual property
17 * rights. You may have additional license terms from the party that provided
18 * you this software, covering your right to use that party's intellectual
19 * property rights.
20 *
21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
22 * copy of the source code appearing in this file ("Covered Code") an
23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the
24 * base code distributed originally by Intel ("Original Intel Code") to copy,
25 * make derivatives, distribute, use and display any portion of the Covered
26 * Code in any form, with the right to sublicense such rights; and
27 *
28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
29 * license (with the right to sublicense), under only those claims of Intel
30 * patents that are infringed by the Original Intel Code, to make, use, sell,
31 * offer to sell, and import the Covered Code and derivative works thereof
32 * solely to the minimum extent necessary to exercise the above copyright
33 * license, and in no event shall the patent license extend to any additions
34 * to or modifications of the Original Intel Code. No other license or right
35 * is granted directly or by implication, estoppel or otherwise;
36 *
37 * The above copyright and patent license is granted only if the following
38 * conditions are met:
39 *
40 * 3. Conditions
41 *
42 * 3.1. Redistribution of Source with Rights to Further Distribute Source.
43 * Redistribution of source code of any substantial portion of the Covered
44 * Code or modification with rights to further distribute source must include
45 * the above Copyright Notice, the above License, this list of Conditions,
46 * and the following Disclaimer and Export Compliance provision. In addition,
47 * Licensee must cause all Covered Code to which Licensee contributes to
48 * contain a file documenting the changes Licensee made to create that Covered
49 * Code and the date of any change. Licensee must include in that file the
50 * documentation of any changes made by any predecessor Licensee. Licensee
51 * must include a prominent statement that the modification is derived,
52 * directly or indirectly, from Original Intel Code.
53 *
54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source.
55 * Redistribution of source code of any substantial portion of the Covered
56 * Code or modification without rights to further distribute source must
57 * include the following Disclaimer and Export Compliance provision in the
58 * documentation and/or other materials provided with distribution. In
59 * addition, Licensee may not authorize further sublicense of source of any
60 * portion of the Covered Code, and must include terms to the effect that the
61 * license from Licensee to its licensee is limited to the intellectual
62 * property embodied in the software Licensee provides to its licensee, and
63 * not to intellectual property embodied in modifications its licensee may
64 * make.
65 *
66 * 3.3. Redistribution of Executable. Redistribution in executable form of any
67 * substantial portion of the Covered Code or modification must reproduce the
68 * above Copyright Notice, and the following Disclaimer and Export Compliance
69 * provision in the documentation and/or other materials provided with the
70 * distribution.
71 *
72 * 3.4. Intel retains all right, title, and interest in and to the Original
73 * Intel Code.
74 *
75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by
76 * Intel shall be used in advertising or otherwise to promote the sale, use or
77 * other dealings in products derived from or relating to the Covered Code
78 * without prior written authorization from Intel.
79 *
80 * 4. Disclaimer and Export Compliance
81 *
82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
88 * PARTICULAR PURPOSE.
89 *
90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
97 * LIMITED REMEDY.
98 *
99 * 4.3. Licensee shall not export, either directly or indirectly, any of this
100 * software or system incorporating such software without first obtaining any
101 * required license or other approval from the U. S. Department of Commerce or
102 * any other agency or department of the United States Government. In the
103 * event Licensee exports any such software from the United States or
104 * re-exports any such software from a foreign destination, Licensee shall
105 * ensure that the distribution and export/re-export of the software is in
106 * compliance with all laws, regulations, orders, or other restrictions of the
107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor
108 * any of its subsidiaries will export/re-export any technical data, process,
109 * software, or service, directly or indirectly, to any country for which the
110 * United States government or any agency thereof requires an export license,
111 * other governmental approval, or letter of assurance, without first obtaining
112 * such license, approval or letter.
113 *
114 *****************************************************************************
115 *
116 * Alternatively, you may choose to be licensed under the terms of the
117 * following license:
118 *
119 * Redistribution and use in source and binary forms, with or without
120 * modification, are permitted provided that the following conditions
121 * are met:
122 * 1. Redistributions of source code must retain the above copyright
123 * notice, this list of conditions, and the following disclaimer,
124 * without modification.
125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
126 * substantially similar to the "NO WARRANTY" disclaimer below
127 * ("Disclaimer") and any redistribution must be conditioned upon
128 * including a substantially similar Disclaimer requirement for further
129 * binary redistribution.
130 * 3. Neither the names of the above-listed copyright holders nor the names
131 * of any contributors may be used to endorse or promote products derived
132 * from this software without specific prior written permission.
133 *
134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
145 *
146 * Alternatively, you may choose to be licensed under the terms of the
147 * GNU General Public License ("GPL") version 2 as published by the Free
148 * Software Foundation.
149 *
150 *****************************************************************************/
151
152 #ifndef __ACTBL1_H__
153 #define __ACTBL1_H__
154
155
156 /*******************************************************************************
157 *
158 * Additional ACPI Tables
159 *
160 * These tables are not consumed directly by the ACPICA subsystem, but are
161 * included here to support device drivers and the AML disassembler.
162 *
163 ******************************************************************************/
164
165
166 /*
167 * Values for description table header signatures for tables defined in this
168 * file. Useful because they make it more difficult to inadvertently type in
169 * the wrong signature.
170 */
171 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
172 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */
173 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */
174 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
175 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */
176 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
177 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
178 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
179 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
180 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */
181 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */
182 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */
183 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */
184 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */
185 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */
186 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */
187 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */
188 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
189 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
190
191 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */
192 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */
193
194
195 /* Reserved table signatures */
196
197 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */
198 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
199
200 /*
201 * These tables have been seen in the field, but no definition has been found
202 */
203 #ifdef ACPI_UNDEFINED_TABLES
204 #define ACPI_SIG_ATKG "ATKG"
205 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
206 #define ACPI_SIG_IEIT "IEIT"
207 #endif
208
209 /*
210 * All tables must be byte-packed to match the ACPI specification, since
211 * the tables are provided by the system BIOS.
212 */
213 #pragma pack(1)
214
215 /*
216 * Note: C bitfields are not used for this reason:
217 *
218 * "Bitfields are great and easy to read, but unfortunately the C language
219 * does not specify the layout of bitfields in memory, which means they are
220 * essentially useless for dealing with packed data in on-disk formats or
221 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
222 * this decision was a design error in C. Ritchie could have picked an order
223 * and stuck with it." Norman Ramsey.
224 * See http://stackoverflow.com/a/1053662/41661
225 */
226
227
228 /*******************************************************************************
229 *
230 * Common subtable headers
231 *
232 ******************************************************************************/
233
234 /* Generic subtable header (used in MADT, SRAT, etc.) */
235
236 typedef struct acpi_subtable_header
237 {
238 UINT8 Type;
239 UINT8 Length;
240
241 } ACPI_SUBTABLE_HEADER;
242
243
244 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */
245
246 typedef struct acpi_whea_header
247 {
248 UINT8 Action;
249 UINT8 Instruction;
250 UINT8 Flags;
251 UINT8 Reserved;
252 ACPI_GENERIC_ADDRESS RegisterRegion;
253 UINT64 Value; /* Value used with Read/Write register */
254 UINT64 Mask; /* Bitmask required for this register instruction */
255
256 } ACPI_WHEA_HEADER;
257
258
259 /*******************************************************************************
260 *
261 * ASF - Alert Standard Format table (Signature "ASF!")
262 * Revision 0x10
263 *
264 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
265 *
266 ******************************************************************************/
267
268 typedef struct acpi_table_asf
269 {
270 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
271
272 } ACPI_TABLE_ASF;
273
274
275 /* ASF subtable header */
276
277 typedef struct acpi_asf_header
278 {
279 UINT8 Type;
280 UINT8 Reserved;
281 UINT16 Length;
282
283 } ACPI_ASF_HEADER;
284
285
286 /* Values for Type field above */
287
288 enum AcpiAsfType
289 {
290 ACPI_ASF_TYPE_INFO = 0,
291 ACPI_ASF_TYPE_ALERT = 1,
292 ACPI_ASF_TYPE_CONTROL = 2,
293 ACPI_ASF_TYPE_BOOT = 3,
294 ACPI_ASF_TYPE_ADDRESS = 4,
295 ACPI_ASF_TYPE_RESERVED = 5
296 };
297
298 /*
299 * ASF subtables
300 */
301
302 /* 0: ASF Information */
303
304 typedef struct acpi_asf_info
305 {
306 ACPI_ASF_HEADER Header;
307 UINT8 MinResetValue;
308 UINT8 MinPollInterval;
309 UINT16 SystemId;
310 UINT32 MfgId;
311 UINT8 Flags;
312 UINT8 Reserved2[3];
313
314 } ACPI_ASF_INFO;
315
316 /* Masks for Flags field above */
317
318 #define ACPI_ASF_SMBUS_PROTOCOLS (1)
319
320
321 /* 1: ASF Alerts */
322
323 typedef struct acpi_asf_alert
324 {
325 ACPI_ASF_HEADER Header;
326 UINT8 AssertMask;
327 UINT8 DeassertMask;
328 UINT8 Alerts;
329 UINT8 DataLength;
330
331 } ACPI_ASF_ALERT;
332
333 typedef struct acpi_asf_alert_data
334 {
335 UINT8 Address;
336 UINT8 Command;
337 UINT8 Mask;
338 UINT8 Value;
339 UINT8 SensorType;
340 UINT8 Type;
341 UINT8 Offset;
342 UINT8 SourceType;
343 UINT8 Severity;
344 UINT8 SensorNumber;
345 UINT8 Entity;
346 UINT8 Instance;
347
348 } ACPI_ASF_ALERT_DATA;
349
350
351 /* 2: ASF Remote Control */
352
353 typedef struct acpi_asf_remote
354 {
355 ACPI_ASF_HEADER Header;
356 UINT8 Controls;
357 UINT8 DataLength;
358 UINT16 Reserved2;
359
360 } ACPI_ASF_REMOTE;
361
362 typedef struct acpi_asf_control_data
363 {
364 UINT8 Function;
365 UINT8 Address;
366 UINT8 Command;
367 UINT8 Value;
368
369 } ACPI_ASF_CONTROL_DATA;
370
371
372 /* 3: ASF RMCP Boot Options */
373
374 typedef struct acpi_asf_rmcp
375 {
376 ACPI_ASF_HEADER Header;
377 UINT8 Capabilities[7];
378 UINT8 CompletionCode;
379 UINT32 EnterpriseId;
380 UINT8 Command;
381 UINT16 Parameter;
382 UINT16 BootOptions;
383 UINT16 OemParameters;
384
385 } ACPI_ASF_RMCP;
386
387
388 /* 4: ASF Address */
389
390 typedef struct acpi_asf_address
391 {
392 ACPI_ASF_HEADER Header;
393 UINT8 EpromAddress;
394 UINT8 Devices;
395
396 } ACPI_ASF_ADDRESS;
397
398
399 /*******************************************************************************
400 *
401 * BERT - Boot Error Record Table (ACPI 4.0)
402 * Version 1
403 *
404 ******************************************************************************/
405
406 typedef struct acpi_table_bert
407 {
408 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
409 UINT32 RegionLength; /* Length of the boot error region */
410 UINT64 Address; /* Physical address of the error region */
411
412 } ACPI_TABLE_BERT;
413
414
415 /* Boot Error Region (not a subtable, pointed to by Address field above) */
416
417 typedef struct acpi_bert_region
418 {
419 UINT32 BlockStatus; /* Type of error information */
420 UINT32 RawDataOffset; /* Offset to raw error data */
421 UINT32 RawDataLength; /* Length of raw error data */
422 UINT32 DataLength; /* Length of generic error data */
423 UINT32 ErrorSeverity; /* Severity code */
424
425 } ACPI_BERT_REGION;
426
427 /* Values for BlockStatus flags above */
428
429 #define ACPI_BERT_UNCORRECTABLE (1)
430 #define ACPI_BERT_CORRECTABLE (1<<1)
431 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2)
432 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3)
433 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
434
435 /* Values for ErrorSeverity above */
436
437 enum AcpiBertErrorSeverity
438 {
439 ACPI_BERT_ERROR_CORRECTABLE = 0,
440 ACPI_BERT_ERROR_FATAL = 1,
441 ACPI_BERT_ERROR_CORRECTED = 2,
442 ACPI_BERT_ERROR_NONE = 3,
443 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */
444 };
445
446 /*
447 * Note: The generic error data that follows the ErrorSeverity field above
448 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below
449 */
450
451
452 /*******************************************************************************
453 *
454 * BGRT - Boot Graphics Resource Table (ACPI 5.0)
455 * Version 1
456 *
457 ******************************************************************************/
458
459 typedef struct acpi_table_bgrt
460 {
461 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
462 UINT16 Version;
463 UINT8 Status;
464 UINT8 ImageType;
465 UINT64 ImageAddress;
466 UINT32 ImageOffsetX;
467 UINT32 ImageOffsetY;
468
469 } ACPI_TABLE_BGRT;
470
471 /* Flags for Status field above */
472
473 #define ACPI_BGRT_DISPLAYED (1)
474 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1)
475
476
477 /*******************************************************************************
478 *
479 * BOOT - Simple Boot Flag Table
480 * Version 1
481 *
482 * Conforms to the "Simple Boot Flag Specification", Version 2.1
483 *
484 ******************************************************************************/
485
486 typedef struct acpi_table_boot
487 {
488 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
489 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */
490 UINT8 Reserved[3];
491
492 } ACPI_TABLE_BOOT;
493
494
495 /*******************************************************************************
496 *
497 * CPEP - Corrected Platform Error Polling table (ACPI 4.0)
498 * Version 1
499 *
500 ******************************************************************************/
501
502 typedef struct acpi_table_cpep
503 {
504 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
505 UINT64 Reserved;
506
507 } ACPI_TABLE_CPEP;
508
509
510 /* Subtable */
511
512 typedef struct acpi_cpep_polling
513 {
514 ACPI_SUBTABLE_HEADER Header;
515 UINT8 Id; /* Processor ID */
516 UINT8 Eid; /* Processor EID */
517 UINT32 Interval; /* Polling interval (msec) */
518
519 } ACPI_CPEP_POLLING;
520
521
522 /*******************************************************************************
523 *
524 * CSRT - Core System Resource Table
525 * Version 0
526 *
527 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
528 *
529 ******************************************************************************/
530
531 typedef struct acpi_table_csrt
532 {
533 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
534
535 } ACPI_TABLE_CSRT;
536
537
538 /* Resource Group subtable */
539
540 typedef struct acpi_csrt_group
541 {
542 UINT32 Length;
543 UINT32 VendorId;
544 UINT32 SubvendorId;
545 UINT16 DeviceId;
546 UINT16 SubdeviceId;
547 UINT16 Revision;
548 UINT16 Reserved;
549 UINT32 SharedInfoLength;
550
551 /* Shared data immediately follows (Length = SharedInfoLength) */
552
553 } ACPI_CSRT_GROUP;
554
555 /* Shared Info subtable */
556
557 typedef struct acpi_csrt_shared_info
558 {
559 UINT16 MajorVersion;
560 UINT16 MinorVersion;
561 UINT32 MmioBaseLow;
562 UINT32 MmioBaseHigh;
563 UINT32 GsiInterrupt;
564 UINT8 InterruptPolarity;
565 UINT8 InterruptMode;
566 UINT8 NumChannels;
567 UINT8 DmaAddressWidth;
568 UINT16 BaseRequestLine;
569 UINT16 NumHandshakeSignals;
570 UINT32 MaxBlockSize;
571
572 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */
573
574 } ACPI_CSRT_SHARED_INFO;
575
576 /* Resource Descriptor subtable */
577
578 typedef struct acpi_csrt_descriptor
579 {
580 UINT32 Length;
581 UINT16 Type;
582 UINT16 Subtype;
583 UINT32 Uid;
584
585 /* Resource-specific information immediately follows */
586
587 } ACPI_CSRT_DESCRIPTOR;
588
589
590 /* Resource Types */
591
592 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001
593 #define ACPI_CSRT_TYPE_TIMER 0x0002
594 #define ACPI_CSRT_TYPE_DMA 0x0003
595
596 /* Resource Subtypes */
597
598 #define ACPI_CSRT_XRUPT_LINE 0x0000
599 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
600 #define ACPI_CSRT_TIMER 0x0000
601 #define ACPI_CSRT_DMA_CHANNEL 0x0000
602 #define ACPI_CSRT_DMA_CONTROLLER 0x0001
603
604
605 /*******************************************************************************
606 *
607 * DBG2 - Debug Port Table 2
608 * Version 0 (Both main table and subtables)
609 *
610 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", December 10, 2015
611 *
612 ******************************************************************************/
613
614 typedef struct acpi_table_dbg2
615 {
616 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
617 UINT32 InfoOffset;
618 UINT32 InfoCount;
619
620 } ACPI_TABLE_DBG2;
621
622
623 typedef struct acpi_dbg2_header
624 {
625 UINT32 InfoOffset;
626 UINT32 InfoCount;
627
628 } ACPI_DBG2_HEADER;
629
630
631 /* Debug Device Information Subtable */
632
633 typedef struct acpi_dbg2_device
634 {
635 UINT8 Revision;
636 UINT16 Length;
637 UINT8 RegisterCount; /* Number of BaseAddress registers */
638 UINT16 NamepathLength;
639 UINT16 NamepathOffset;
640 UINT16 OemDataLength;
641 UINT16 OemDataOffset;
642 UINT16 PortType;
643 UINT16 PortSubtype;
644 UINT16 Reserved;
645 UINT16 BaseAddressOffset;
646 UINT16 AddressSizeOffset;
647 /*
648 * Data that follows:
649 * BaseAddress (required) - Each in 12-byte Generic Address Structure format.
650 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register.
651 * Namepath (required) - Null terminated string. Single dot if not supported.
652 * OemData (optional) - Length is OemDataLength.
653 */
654 } ACPI_DBG2_DEVICE;
655
656 /* Types for PortType field above */
657
658 #define ACPI_DBG2_SERIAL_PORT 0x8000
659 #define ACPI_DBG2_1394_PORT 0x8001
660 #define ACPI_DBG2_USB_PORT 0x8002
661 #define ACPI_DBG2_NET_PORT 0x8003
662
663 /* Subtypes for PortSubtype field above */
664
665 #define ACPI_DBG2_16550_COMPATIBLE 0x0000
666 #define ACPI_DBG2_16550_SUBSET 0x0001
667 #define ACPI_DBG2_ARM_PL011 0x0003
668 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
669 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
670 #define ACPI_DBG2_ARM_DCC 0x000F
671 #define ACPI_DBG2_BCM2835 0x0010
672
673 #define ACPI_DBG2_1394_STANDARD 0x0000
674
675 #define ACPI_DBG2_USB_XHCI 0x0000
676 #define ACPI_DBG2_USB_EHCI 0x0001
677
678
679 /*******************************************************************************
680 *
681 * DBGP - Debug Port table
682 * Version 1
683 *
684 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
685 *
686 ******************************************************************************/
687
688 typedef struct acpi_table_dbgp
689 {
690 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
691 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */
692 UINT8 Reserved[3];
693 ACPI_GENERIC_ADDRESS DebugPort;
694
695 } ACPI_TABLE_DBGP;
696
697
698 /*******************************************************************************
699 *
700 * DMAR - DMA Remapping table
701 * Version 1
702 *
703 * Conforms to "Intel Virtualization Technology for Directed I/O",
704 * Version 2.3, October 2014
705 *
706 ******************************************************************************/
707
708 typedef struct acpi_table_dmar
709 {
710 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
711 UINT8 Width; /* Host Address Width */
712 UINT8 Flags;
713 UINT8 Reserved[10];
714
715 } ACPI_TABLE_DMAR;
716
717 /* Masks for Flags field above */
718
719 #define ACPI_DMAR_INTR_REMAP (1)
720 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
721 #define ACPI_DMAR_X2APIC_MODE (1<<2)
722
723
724 /* DMAR subtable header */
725
726 typedef struct acpi_dmar_header
727 {
728 UINT16 Type;
729 UINT16 Length;
730
731 } ACPI_DMAR_HEADER;
732
733 /* Values for subtable type in ACPI_DMAR_HEADER */
734
735 enum AcpiDmarType
736 {
737 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
738 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
739 ACPI_DMAR_TYPE_ROOT_ATS = 2,
740 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
741 ACPI_DMAR_TYPE_NAMESPACE = 4,
742 ACPI_DMAR_TYPE_RESERVED = 5 /* 5 and greater are reserved */
743 };
744
745
746 /* DMAR Device Scope structure */
747
748 typedef struct acpi_dmar_device_scope
749 {
750 UINT8 EntryType;
751 UINT8 Length;
752 UINT16 Reserved;
753 UINT8 EnumerationId;
754 UINT8 Bus;
755
756 } ACPI_DMAR_DEVICE_SCOPE;
757
758 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */
759
760 enum AcpiDmarScopeType
761 {
762 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
763 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
764 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
765 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
766 ACPI_DMAR_SCOPE_TYPE_HPET = 4,
767 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
768 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
769 };
770
771 typedef struct acpi_dmar_pci_path
772 {
773 UINT8 Device;
774 UINT8 Function;
775
776 } ACPI_DMAR_PCI_PATH;
777
778
779 /*
780 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER
781 */
782
783 /* 0: Hardware Unit Definition */
784
785 typedef struct acpi_dmar_hardware_unit
786 {
787 ACPI_DMAR_HEADER Header;
788 UINT8 Flags;
789 UINT8 Reserved;
790 UINT16 Segment;
791 UINT64 Address; /* Register Base Address */
792
793 } ACPI_DMAR_HARDWARE_UNIT;
794
795 /* Masks for Flags field above */
796
797 #define ACPI_DMAR_INCLUDE_ALL (1)
798
799
800 /* 1: Reserved Memory Defininition */
801
802 typedef struct acpi_dmar_reserved_memory
803 {
804 ACPI_DMAR_HEADER Header;
805 UINT16 Reserved;
806 UINT16 Segment;
807 UINT64 BaseAddress; /* 4K aligned base address */
808 UINT64 EndAddress; /* 4K aligned limit address */
809
810 } ACPI_DMAR_RESERVED_MEMORY;
811
812 /* Masks for Flags field above */
813
814 #define ACPI_DMAR_ALLOW_ALL (1)
815
816
817 /* 2: Root Port ATS Capability Reporting Structure */
818
819 typedef struct acpi_dmar_atsr
820 {
821 ACPI_DMAR_HEADER Header;
822 UINT8 Flags;
823 UINT8 Reserved;
824 UINT16 Segment;
825
826 } ACPI_DMAR_ATSR;
827
828 /* Masks for Flags field above */
829
830 #define ACPI_DMAR_ALL_PORTS (1)
831
832
833 /* 3: Remapping Hardware Static Affinity Structure */
834
835 typedef struct acpi_dmar_rhsa
836 {
837 ACPI_DMAR_HEADER Header;
838 UINT32 Reserved;
839 UINT64 BaseAddress;
840 UINT32 ProximityDomain;
841
842 } ACPI_DMAR_RHSA;
843
844
845 /* 4: ACPI Namespace Device Declaration Structure */
846
847 typedef struct acpi_dmar_andd
848 {
849 ACPI_DMAR_HEADER Header;
850 UINT8 Reserved[3];
851 UINT8 DeviceNumber;
852 char DeviceName[1];
853
854 } ACPI_DMAR_ANDD;
855
856
857 /*******************************************************************************
858 *
859 * DRTM - Dynamic Root of Trust for Measurement table
860 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0
861 * Table version 1
862 *
863 ******************************************************************************/
864
865 typedef struct acpi_table_drtm
866 {
867 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
868 UINT64 EntryBaseAddress;
869 UINT64 EntryLength;
870 UINT32 EntryAddress32;
871 UINT64 EntryAddress64;
872 UINT64 ExitAddress;
873 UINT64 LogAreaAddress;
874 UINT32 LogAreaLength;
875 UINT64 ArchDependentAddress;
876 UINT32 Flags;
877
878 } ACPI_TABLE_DRTM;
879
880 /* Flag Definitions for above */
881
882 #define ACPI_DRTM_ACCESS_ALLOWED (1)
883 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1)
884 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2)
885 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3)
886
887
888 /* 1) Validated Tables List (64-bit addresses) */
889
890 typedef struct acpi_drtm_vtable_list
891 {
892 UINT32 ValidatedTableCount;
893 UINT64 ValidatedTables[1];
894
895 } ACPI_DRTM_VTABLE_LIST;
896
897 /* 2) Resources List (of Resource Descriptors) */
898
899 /* Resource Descriptor */
900
901 typedef struct acpi_drtm_resource
902 {
903 UINT8 Size[7];
904 UINT8 Type;
905 UINT64 Address;
906
907 } ACPI_DRTM_RESOURCE;
908
909 typedef struct acpi_drtm_resource_list
910 {
911 UINT32 ResourceCount;
912 ACPI_DRTM_RESOURCE Resources[1];
913
914 } ACPI_DRTM_RESOURCE_LIST;
915
916 /* 3) Platform-specific Identifiers List */
917
918 typedef struct acpi_drtm_dps_id
919 {
920 UINT32 DpsIdLength;
921 UINT8 DpsId[16];
922
923 } ACPI_DRTM_DPS_ID;
924
925
926 /*******************************************************************************
927 *
928 * ECDT - Embedded Controller Boot Resources Table
929 * Version 1
930 *
931 ******************************************************************************/
932
933 typedef struct acpi_table_ecdt
934 {
935 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
936 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */
937 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */
938 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */
939 UINT8 Gpe; /* The GPE for the EC */
940 UINT8 Id[1]; /* Full namepath of the EC in the ACPI namespace */
941
942 } ACPI_TABLE_ECDT;
943
944
945 /*******************************************************************************
946 *
947 * EINJ - Error Injection Table (ACPI 4.0)
948 * Version 1
949 *
950 ******************************************************************************/
951
952 typedef struct acpi_table_einj
953 {
954 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
955 UINT32 HeaderLength;
956 UINT8 Flags;
957 UINT8 Reserved[3];
958 UINT32 Entries;
959
960 } ACPI_TABLE_EINJ;
961
962
963 /* EINJ Injection Instruction Entries (actions) */
964
965 typedef struct acpi_einj_entry
966 {
967 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */
968
969 } ACPI_EINJ_ENTRY;
970
971 /* Masks for Flags field above */
972
973 #define ACPI_EINJ_PRESERVE (1)
974
975 /* Values for Action field above */
976
977 enum AcpiEinjActions
978 {
979 ACPI_EINJ_BEGIN_OPERATION = 0,
980 ACPI_EINJ_GET_TRIGGER_TABLE = 1,
981 ACPI_EINJ_SET_ERROR_TYPE = 2,
982 ACPI_EINJ_GET_ERROR_TYPE = 3,
983 ACPI_EINJ_END_OPERATION = 4,
984 ACPI_EINJ_EXECUTE_OPERATION = 5,
985 ACPI_EINJ_CHECK_BUSY_STATUS = 6,
986 ACPI_EINJ_GET_COMMAND_STATUS = 7,
987 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8,
988 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9,
989 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */
990 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */
991 };
992
993 /* Values for Instruction field above */
994
995 enum AcpiEinjInstructions
996 {
997 ACPI_EINJ_READ_REGISTER = 0,
998 ACPI_EINJ_READ_REGISTER_VALUE = 1,
999 ACPI_EINJ_WRITE_REGISTER = 2,
1000 ACPI_EINJ_WRITE_REGISTER_VALUE = 3,
1001 ACPI_EINJ_NOOP = 4,
1002 ACPI_EINJ_FLUSH_CACHELINE = 5,
1003 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */
1004 };
1005
1006 typedef struct acpi_einj_error_type_with_addr
1007 {
1008 UINT32 ErrorType;
1009 UINT32 VendorStructOffset;
1010 UINT32 Flags;
1011 UINT32 ApicId;
1012 UINT64 Address;
1013 UINT64 Range;
1014 UINT32 PcieId;
1015
1016 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR;
1017
1018 typedef struct acpi_einj_vendor
1019 {
1020 UINT32 Length;
1021 UINT32 PcieId;
1022 UINT16 VendorId;
1023 UINT16 DeviceId;
1024 UINT8 RevisionId;
1025 UINT8 Reserved[3];
1026
1027 } ACPI_EINJ_VENDOR;
1028
1029
1030 /* EINJ Trigger Error Action Table */
1031
1032 typedef struct acpi_einj_trigger
1033 {
1034 UINT32 HeaderSize;
1035 UINT32 Revision;
1036 UINT32 TableSize;
1037 UINT32 EntryCount;
1038
1039 } ACPI_EINJ_TRIGGER;
1040
1041 /* Command status return values */
1042
1043 enum AcpiEinjCommandStatus
1044 {
1045 ACPI_EINJ_SUCCESS = 0,
1046 ACPI_EINJ_FAILURE = 1,
1047 ACPI_EINJ_INVALID_ACCESS = 2,
1048 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */
1049 };
1050
1051
1052 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */
1053
1054 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1)
1055 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1)
1056 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2)
1057 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3)
1058 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4)
1059 #define ACPI_EINJ_MEMORY_FATAL (1<<5)
1060 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6)
1061 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7)
1062 #define ACPI_EINJ_PCIX_FATAL (1<<8)
1063 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9)
1064 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10)
1065 #define ACPI_EINJ_PLATFORM_FATAL (1<<11)
1066 #define ACPI_EINJ_VENDOR_DEFINED (1<<31)
1067
1068
1069 /*******************************************************************************
1070 *
1071 * ERST - Error Record Serialization Table (ACPI 4.0)
1072 * Version 1
1073 *
1074 ******************************************************************************/
1075
1076 typedef struct acpi_table_erst
1077 {
1078 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1079 UINT32 HeaderLength;
1080 UINT32 Reserved;
1081 UINT32 Entries;
1082
1083 } ACPI_TABLE_ERST;
1084
1085
1086 /* ERST Serialization Entries (actions) */
1087
1088 typedef struct acpi_erst_entry
1089 {
1090 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */
1091
1092 } ACPI_ERST_ENTRY;
1093
1094 /* Masks for Flags field above */
1095
1096 #define ACPI_ERST_PRESERVE (1)
1097
1098 /* Values for Action field above */
1099
1100 enum AcpiErstActions
1101 {
1102 ACPI_ERST_BEGIN_WRITE = 0,
1103 ACPI_ERST_BEGIN_READ = 1,
1104 ACPI_ERST_BEGIN_CLEAR = 2,
1105 ACPI_ERST_END = 3,
1106 ACPI_ERST_SET_RECORD_OFFSET = 4,
1107 ACPI_ERST_EXECUTE_OPERATION = 5,
1108 ACPI_ERST_CHECK_BUSY_STATUS = 6,
1109 ACPI_ERST_GET_COMMAND_STATUS = 7,
1110 ACPI_ERST_GET_RECORD_ID = 8,
1111 ACPI_ERST_SET_RECORD_ID = 9,
1112 ACPI_ERST_GET_RECORD_COUNT = 10,
1113 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11,
1114 ACPI_ERST_NOT_USED = 12,
1115 ACPI_ERST_GET_ERROR_RANGE = 13,
1116 ACPI_ERST_GET_ERROR_LENGTH = 14,
1117 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15,
1118 ACPI_ERST_EXECUTE_TIMINGS = 16,
1119 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */
1120 };
1121
1122 /* Values for Instruction field above */
1123
1124 enum AcpiErstInstructions
1125 {
1126 ACPI_ERST_READ_REGISTER = 0,
1127 ACPI_ERST_READ_REGISTER_VALUE = 1,
1128 ACPI_ERST_WRITE_REGISTER = 2,
1129 ACPI_ERST_WRITE_REGISTER_VALUE = 3,
1130 ACPI_ERST_NOOP = 4,
1131 ACPI_ERST_LOAD_VAR1 = 5,
1132 ACPI_ERST_LOAD_VAR2 = 6,
1133 ACPI_ERST_STORE_VAR1 = 7,
1134 ACPI_ERST_ADD = 8,
1135 ACPI_ERST_SUBTRACT = 9,
1136 ACPI_ERST_ADD_VALUE = 10,
1137 ACPI_ERST_SUBTRACT_VALUE = 11,
1138 ACPI_ERST_STALL = 12,
1139 ACPI_ERST_STALL_WHILE_TRUE = 13,
1140 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14,
1141 ACPI_ERST_GOTO = 15,
1142 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16,
1143 ACPI_ERST_SET_DST_ADDRESS_BASE = 17,
1144 ACPI_ERST_MOVE_DATA = 18,
1145 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */
1146 };
1147
1148 /* Command status return values */
1149
1150 enum AcpiErstCommandStatus
1151 {
1152 ACPI_ERST_SUCESS = 0,
1153 ACPI_ERST_NO_SPACE = 1,
1154 ACPI_ERST_NOT_AVAILABLE = 2,
1155 ACPI_ERST_FAILURE = 3,
1156 ACPI_ERST_RECORD_EMPTY = 4,
1157 ACPI_ERST_NOT_FOUND = 5,
1158 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */
1159 };
1160
1161
1162 /* Error Record Serialization Information */
1163
1164 typedef struct acpi_erst_info
1165 {
1166 UINT16 Signature; /* Should be "ER" */
1167 UINT8 Data[48];
1168
1169 } ACPI_ERST_INFO;
1170
1171
1172 /*******************************************************************************
1173 *
1174 * FPDT - Firmware Performance Data Table (ACPI 5.0)
1175 * Version 1
1176 *
1177 ******************************************************************************/
1178
1179 typedef struct acpi_table_fpdt
1180 {
1181 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1182
1183 } ACPI_TABLE_FPDT;
1184
1185
1186 /* FPDT subtable header (Performance Record Structure) */
1187
1188 typedef struct acpi_fpdt_header
1189 {
1190 UINT16 Type;
1191 UINT8 Length;
1192 UINT8 Revision;
1193
1194 } ACPI_FPDT_HEADER;
1195
1196 /* Values for Type field above */
1197
1198 enum AcpiFpdtType
1199 {
1200 ACPI_FPDT_TYPE_BOOT = 0,
1201 ACPI_FPDT_TYPE_S3PERF = 1
1202 };
1203
1204
1205 /*
1206 * FPDT subtables
1207 */
1208
1209 /* 0: Firmware Basic Boot Performance Record */
1210
1211 typedef struct acpi_fpdt_boot_pointer
1212 {
1213 ACPI_FPDT_HEADER Header;
1214 UINT8 Reserved[4];
1215 UINT64 Address;
1216
1217 } ACPI_FPDT_BOOT_POINTER;
1218
1219
1220 /* 1: S3 Performance Table Pointer Record */
1221
1222 typedef struct acpi_fpdt_s3pt_pointer
1223 {
1224 ACPI_FPDT_HEADER Header;
1225 UINT8 Reserved[4];
1226 UINT64 Address;
1227
1228 } ACPI_FPDT_S3PT_POINTER;
1229
1230
1231 /*
1232 * S3PT - S3 Performance Table. This table is pointed to by the
1233 * S3 Pointer Record above.
1234 */
1235 typedef struct acpi_table_s3pt
1236 {
1237 UINT8 Signature[4]; /* "S3PT" */
1238 UINT32 Length;
1239
1240 } ACPI_TABLE_S3PT;
1241
1242
1243 /*
1244 * S3PT Subtables (Not part of the actual FPDT)
1245 */
1246
1247 /* Values for Type field in S3PT header */
1248
1249 enum AcpiS3ptType
1250 {
1251 ACPI_S3PT_TYPE_RESUME = 0,
1252 ACPI_S3PT_TYPE_SUSPEND = 1,
1253 ACPI_FPDT_BOOT_PERFORMANCE = 2
1254 };
1255
1256 typedef struct acpi_s3pt_resume
1257 {
1258 ACPI_FPDT_HEADER Header;
1259 UINT32 ResumeCount;
1260 UINT64 FullResume;
1261 UINT64 AverageResume;
1262
1263 } ACPI_S3PT_RESUME;
1264
1265 typedef struct acpi_s3pt_suspend
1266 {
1267 ACPI_FPDT_HEADER Header;
1268 UINT64 SuspendStart;
1269 UINT64 SuspendEnd;
1270
1271 } ACPI_S3PT_SUSPEND;
1272
1273
1274 /*
1275 * FPDT Boot Performance Record (Not part of the actual FPDT)
1276 */
1277 typedef struct acpi_fpdt_boot
1278 {
1279 ACPI_FPDT_HEADER Header;
1280 UINT8 Reserved[4];
1281 UINT64 ResetEnd;
1282 UINT64 LoadStart;
1283 UINT64 StartupStart;
1284 UINT64 ExitServicesEntry;
1285 UINT64 ExitServicesExit;
1286
1287 } ACPI_FPDT_BOOT;
1288
1289
1290 /*******************************************************************************
1291 *
1292 * GTDT - Generic Timer Description Table (ACPI 5.1)
1293 * Version 2
1294 *
1295 ******************************************************************************/
1296
1297 typedef struct acpi_table_gtdt
1298 {
1299 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1300 UINT64 CounterBlockAddresss;
1301 UINT32 Reserved;
1302 UINT32 SecureEl1Interrupt;
1303 UINT32 SecureEl1Flags;
1304 UINT32 NonSecureEl1Interrupt;
1305 UINT32 NonSecureEl1Flags;
1306 UINT32 VirtualTimerInterrupt;
1307 UINT32 VirtualTimerFlags;
1308 UINT32 NonSecureEl2Interrupt;
1309 UINT32 NonSecureEl2Flags;
1310 UINT64 CounterReadBlockAddress;
1311 UINT32 PlatformTimerCount;
1312 UINT32 PlatformTimerOffset;
1313
1314 } ACPI_TABLE_GTDT;
1315
1316 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */
1317
1318 #define ACPI_GTDT_INTERRUPT_MODE (1)
1319 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1)
1320 #define ACPI_GTDT_ALWAYS_ON (1<<2)
1321
1322
1323 /* Common GTDT subtable header */
1324
1325 typedef struct acpi_gtdt_header
1326 {
1327 UINT8 Type;
1328 UINT16 Length;
1329
1330 } ACPI_GTDT_HEADER;
1331
1332 /* Values for GTDT subtable type above */
1333
1334 enum AcpiGtdtType
1335 {
1336 ACPI_GTDT_TYPE_TIMER_BLOCK = 0,
1337 ACPI_GTDT_TYPE_WATCHDOG = 1,
1338 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */
1339 };
1340
1341
1342 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */
1343
1344 /* 0: Generic Timer Block */
1345
1346 typedef struct acpi_gtdt_timer_block
1347 {
1348 ACPI_GTDT_HEADER Header;
1349 UINT8 Reserved;
1350 UINT64 BlockAddress;
1351 UINT32 TimerCount;
1352 UINT32 TimerOffset;
1353
1354 } ACPI_GTDT_TIMER_BLOCK;
1355
1356 /* Timer Sub-Structure, one per timer */
1357
1358 typedef struct acpi_gtdt_timer_entry
1359 {
1360 UINT8 FrameNumber;
1361 UINT8 Reserved[3];
1362 UINT64 BaseAddress;
1363 UINT64 El0BaseAddress;
1364 UINT32 TimerInterrupt;
1365 UINT32 TimerFlags;
1366 UINT32 VirtualTimerInterrupt;
1367 UINT32 VirtualTimerFlags;
1368 UINT32 CommonFlags;
1369
1370 } ACPI_GTDT_TIMER_ENTRY;
1371
1372 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */
1373
1374 #define ACPI_GTDT_GT_IRQ_MODE (1)
1375 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1)
1376
1377 /* Flag Definitions: CommonFlags above */
1378
1379 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1)
1380 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1)
1381
1382
1383 /* 1: SBSA Generic Watchdog Structure */
1384
1385 typedef struct acpi_gtdt_watchdog
1386 {
1387 ACPI_GTDT_HEADER Header;
1388 UINT8 Reserved;
1389 UINT64 RefreshFrameAddress;
1390 UINT64 ControlFrameAddress;
1391 UINT32 TimerInterrupt;
1392 UINT32 TimerFlags;
1393
1394 } ACPI_GTDT_WATCHDOG;
1395
1396 /* Flag Definitions: TimerFlags above */
1397
1398 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1)
1399 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1)
1400 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2)
1401
1402
1403 /*******************************************************************************
1404 *
1405 * HEST - Hardware Error Source Table (ACPI 4.0)
1406 * Version 1
1407 *
1408 ******************************************************************************/
1409
1410 typedef struct acpi_table_hest
1411 {
1412 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1413 UINT32 ErrorSourceCount;
1414
1415 } ACPI_TABLE_HEST;
1416
1417
1418 /* HEST subtable header */
1419
1420 typedef struct acpi_hest_header
1421 {
1422 UINT16 Type;
1423 UINT16 SourceId;
1424
1425 } ACPI_HEST_HEADER;
1426
1427
1428 /* Values for Type field above for subtables */
1429
1430 enum AcpiHestTypes
1431 {
1432 ACPI_HEST_TYPE_IA32_CHECK = 0,
1433 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1,
1434 ACPI_HEST_TYPE_IA32_NMI = 2,
1435 ACPI_HEST_TYPE_NOT_USED3 = 3,
1436 ACPI_HEST_TYPE_NOT_USED4 = 4,
1437 ACPI_HEST_TYPE_NOT_USED5 = 5,
1438 ACPI_HEST_TYPE_AER_ROOT_PORT = 6,
1439 ACPI_HEST_TYPE_AER_ENDPOINT = 7,
1440 ACPI_HEST_TYPE_AER_BRIDGE = 8,
1441 ACPI_HEST_TYPE_GENERIC_ERROR = 9,
1442 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10,
1443 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11,
1444 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */
1445 };
1446
1447
1448 /*
1449 * HEST substructures contained in subtables
1450 */
1451
1452 /*
1453 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and
1454 * ACPI_HEST_IA_CORRECTED structures.
1455 */
1456 typedef struct acpi_hest_ia_error_bank
1457 {
1458 UINT8 BankNumber;
1459 UINT8 ClearStatusOnInit;
1460 UINT8 StatusFormat;
1461 UINT8 Reserved;
1462 UINT32 ControlRegister;
1463 UINT64 ControlData;
1464 UINT32 StatusRegister;
1465 UINT32 AddressRegister;
1466 UINT32 MiscRegister;
1467
1468 } ACPI_HEST_IA_ERROR_BANK;
1469
1470
1471 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */
1472
1473 typedef struct acpi_hest_aer_common
1474 {
1475 UINT16 Reserved1;
1476 UINT8 Flags;
1477 UINT8 Enabled;
1478 UINT32 RecordsToPreallocate;
1479 UINT32 MaxSectionsPerRecord;
1480 UINT32 Bus; /* Bus and Segment numbers */
1481 UINT16 Device;
1482 UINT16 Function;
1483 UINT16 DeviceControl;
1484 UINT16 Reserved2;
1485 UINT32 UncorrectableMask;
1486 UINT32 UncorrectableSeverity;
1487 UINT32 CorrectableMask;
1488 UINT32 AdvancedCapabilities;
1489
1490 } ACPI_HEST_AER_COMMON;
1491
1492 /* Masks for HEST Flags fields */
1493
1494 #define ACPI_HEST_FIRMWARE_FIRST (1)
1495 #define ACPI_HEST_GLOBAL (1<<1)
1496 #define ACPI_HEST_GHES_ASSIST (1<<2)
1497
1498 /*
1499 * Macros to access the bus/segment numbers in Bus field above:
1500 * Bus number is encoded in bits 7:0
1501 * Segment number is encoded in bits 23:8
1502 */
1503 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF)
1504 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF)
1505
1506
1507 /* Hardware Error Notification */
1508
1509 typedef struct acpi_hest_notify
1510 {
1511 UINT8 Type;
1512 UINT8 Length;
1513 UINT16 ConfigWriteEnable;
1514 UINT32 PollInterval;
1515 UINT32 Vector;
1516 UINT32 PollingThresholdValue;
1517 UINT32 PollingThresholdWindow;
1518 UINT32 ErrorThresholdValue;
1519 UINT32 ErrorThresholdWindow;
1520
1521 } ACPI_HEST_NOTIFY;
1522
1523 /* Values for Notify Type field above */
1524
1525 enum AcpiHestNotifyTypes
1526 {
1527 ACPI_HEST_NOTIFY_POLLED = 0,
1528 ACPI_HEST_NOTIFY_EXTERNAL = 1,
1529 ACPI_HEST_NOTIFY_LOCAL = 2,
1530 ACPI_HEST_NOTIFY_SCI = 3,
1531 ACPI_HEST_NOTIFY_NMI = 4,
1532 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */
1533 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */
1534 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */
1535 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */
1536 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */
1537 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */
1538 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */
1539 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */
1540 };
1541
1542 /* Values for ConfigWriteEnable bitfield above */
1543
1544 #define ACPI_HEST_TYPE (1)
1545 #define ACPI_HEST_POLL_INTERVAL (1<<1)
1546 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2)
1547 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3)
1548 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4)
1549 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5)
1550
1551
1552 /*
1553 * HEST subtables
1554 */
1555
1556 /* 0: IA32 Machine Check Exception */
1557
1558 typedef struct acpi_hest_ia_machine_check
1559 {
1560 ACPI_HEST_HEADER Header;
1561 UINT16 Reserved1;
1562 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1563 UINT8 Enabled;
1564 UINT32 RecordsToPreallocate;
1565 UINT32 MaxSectionsPerRecord;
1566 UINT64 GlobalCapabilityData;
1567 UINT64 GlobalControlData;
1568 UINT8 NumHardwareBanks;
1569 UINT8 Reserved3[7];
1570
1571 } ACPI_HEST_IA_MACHINE_CHECK;
1572
1573
1574 /* 1: IA32 Corrected Machine Check */
1575
1576 typedef struct acpi_hest_ia_corrected
1577 {
1578 ACPI_HEST_HEADER Header;
1579 UINT16 Reserved1;
1580 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1581 UINT8 Enabled;
1582 UINT32 RecordsToPreallocate;
1583 UINT32 MaxSectionsPerRecord;
1584 ACPI_HEST_NOTIFY Notify;
1585 UINT8 NumHardwareBanks;
1586 UINT8 Reserved2[3];
1587
1588 } ACPI_HEST_IA_CORRECTED;
1589
1590
1591 /* 2: IA32 Non-Maskable Interrupt */
1592
1593 typedef struct acpi_hest_ia_nmi
1594 {
1595 ACPI_HEST_HEADER Header;
1596 UINT32 Reserved;
1597 UINT32 RecordsToPreallocate;
1598 UINT32 MaxSectionsPerRecord;
1599 UINT32 MaxRawDataLength;
1600
1601 } ACPI_HEST_IA_NMI;
1602
1603
1604 /* 3,4,5: Not used */
1605
1606 /* 6: PCI Express Root Port AER */
1607
1608 typedef struct acpi_hest_aer_root
1609 {
1610 ACPI_HEST_HEADER Header;
1611 ACPI_HEST_AER_COMMON Aer;
1612 UINT32 RootErrorCommand;
1613
1614 } ACPI_HEST_AER_ROOT;
1615
1616
1617 /* 7: PCI Express AER (AER Endpoint) */
1618
1619 typedef struct acpi_hest_aer
1620 {
1621 ACPI_HEST_HEADER Header;
1622 ACPI_HEST_AER_COMMON Aer;
1623
1624 } ACPI_HEST_AER;
1625
1626
1627 /* 8: PCI Express/PCI-X Bridge AER */
1628
1629 typedef struct acpi_hest_aer_bridge
1630 {
1631 ACPI_HEST_HEADER Header;
1632 ACPI_HEST_AER_COMMON Aer;
1633 UINT32 UncorrectableMask2;
1634 UINT32 UncorrectableSeverity2;
1635 UINT32 AdvancedCapabilities2;
1636
1637 } ACPI_HEST_AER_BRIDGE;
1638
1639
1640 /* 9: Generic Hardware Error Source */
1641
1642 typedef struct acpi_hest_generic
1643 {
1644 ACPI_HEST_HEADER Header;
1645 UINT16 RelatedSourceId;
1646 UINT8 Reserved;
1647 UINT8 Enabled;
1648 UINT32 RecordsToPreallocate;
1649 UINT32 MaxSectionsPerRecord;
1650 UINT32 MaxRawDataLength;
1651 ACPI_GENERIC_ADDRESS ErrorStatusAddress;
1652 ACPI_HEST_NOTIFY Notify;
1653 UINT32 ErrorBlockLength;
1654
1655 } ACPI_HEST_GENERIC;
1656
1657
1658 /* 10: Generic Hardware Error Source, version 2 */
1659
1660 typedef struct acpi_hest_generic_v2
1661 {
1662 ACPI_HEST_HEADER Header;
1663 UINT16 RelatedSourceId;
1664 UINT8 Reserved;
1665 UINT8 Enabled;
1666 UINT32 RecordsToPreallocate;
1667 UINT32 MaxSectionsPerRecord;
1668 UINT32 MaxRawDataLength;
1669 ACPI_GENERIC_ADDRESS ErrorStatusAddress;
1670 ACPI_HEST_NOTIFY Notify;
1671 UINT32 ErrorBlockLength;
1672 ACPI_GENERIC_ADDRESS ReadAckRegister;
1673 UINT64 ReadAckPreserve;
1674 UINT64 ReadAckWrite;
1675
1676 } ACPI_HEST_GENERIC_V2;
1677
1678
1679 /* Generic Error Status block */
1680
1681 typedef struct acpi_hest_generic_status
1682 {
1683 UINT32 BlockStatus;
1684 UINT32 RawDataOffset;
1685 UINT32 RawDataLength;
1686 UINT32 DataLength;
1687 UINT32 ErrorSeverity;
1688
1689 } ACPI_HEST_GENERIC_STATUS;
1690
1691 /* Values for BlockStatus flags above */
1692
1693 #define ACPI_HEST_UNCORRECTABLE (1)
1694 #define ACPI_HEST_CORRECTABLE (1<<1)
1695 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2)
1696 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3)
1697 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */
1698
1699
1700 /* Generic Error Data entry */
1701
1702 typedef struct acpi_hest_generic_data
1703 {
1704 UINT8 SectionType[16];
1705 UINT32 ErrorSeverity;
1706 UINT16 Revision;
1707 UINT8 ValidationBits;
1708 UINT8 Flags;
1709 UINT32 ErrorDataLength;
1710 UINT8 FruId[16];
1711 UINT8 FruText[20];
1712
1713 } ACPI_HEST_GENERIC_DATA;
1714
1715 /* Extension for revision 0x0300 */
1716
1717 typedef struct acpi_hest_generic_data_v300
1718 {
1719 UINT8 SectionType[16];
1720 UINT32 ErrorSeverity;
1721 UINT16 Revision;
1722 UINT8 ValidationBits;
1723 UINT8 Flags;
1724 UINT32 ErrorDataLength;
1725 UINT8 FruId[16];
1726 UINT8 FruText[20];
1727 UINT64 TimeStamp;
1728
1729 } ACPI_HEST_GENERIC_DATA_V300;
1730
1731 /* Values for ErrorSeverity above */
1732
1733 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0
1734 #define ACPI_HEST_GEN_ERROR_FATAL 1
1735 #define ACPI_HEST_GEN_ERROR_CORRECTED 2
1736 #define ACPI_HEST_GEN_ERROR_NONE 3
1737
1738 /* Flags for ValidationBits above */
1739
1740 #define ACPI_HEST_GEN_VALID_FRU_ID (1)
1741 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1)
1742 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2)
1743
1744
1745 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */
1746
1747 typedef struct acpi_hest_ia_deferred_check
1748 {
1749 ACPI_HEST_HEADER Header;
1750 UINT16 Reserved1;
1751 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */
1752 UINT8 Enabled;
1753 UINT32 RecordsToPreallocate;
1754 UINT32 MaxSectionsPerRecord;
1755 ACPI_HEST_NOTIFY Notify;
1756 UINT8 NumHardwareBanks;
1757 UINT8 Reserved2[3];
1758
1759 } ACPI_HEST_IA_DEFERRED_CHECK;
1760
1761
1762 /*******************************************************************************
1763 *
1764 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2)
1765 * Version 1
1766 *
1767 ******************************************************************************/
1768
1769 typedef struct acpi_table_hmat
1770 {
1771 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1772 UINT32 Reserved;
1773
1774 } ACPI_TABLE_HMAT;
1775
1776
1777 /* Values for HMAT structure types */
1778
1779 enum AcpiHmatType
1780 {
1781 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subystem address range */
1782 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */
1783 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */
1784 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */
1785 };
1786
1787 typedef struct acpi_hmat_structure
1788 {
1789 UINT16 Type;
1790 UINT16 Reserved;
1791 UINT32 Length;
1792
1793 } ACPI_HMAT_STRUCTURE;
1794
1795
1796 /*
1797 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE
1798 */
1799
1800 /* 0: Memory subystem address range */
1801
1802 typedef struct acpi_hmat_address_range
1803 {
1804 ACPI_HMAT_STRUCTURE Header;
1805 UINT16 Flags;
1806 UINT16 Reserved1;
1807 UINT32 ProcessorPD; /* Processor proximity domain */
1808 UINT32 MemoryPD; /* Memory proximity domain */
1809 UINT32 Reserved2;
1810 UINT64 PhysicalAddressBase; /* Physical address range base */
1811 UINT64 PhysicalAddressLength; /* Physical address range length */
1812
1813 } ACPI_HMAT_ADDRESS_RANGE;
1814
1815 /* Masks for Flags field above */
1816
1817 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: ProcessorPD field is valid */
1818 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: MemoryPD field is valid */
1819 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */
1820
1821
1822 /* 1: System locality latency and bandwidth information */
1823
1824 typedef struct acpi_hmat_locality
1825 {
1826 ACPI_HMAT_STRUCTURE Header;
1827 UINT8 Flags;
1828 UINT8 DataType;
1829 UINT16 Reserved1;
1830 UINT32 NumberOfInitiatorPDs;
1831 UINT32 NumberOfTargetPDs;
1832 UINT32 Reserved2;
1833 UINT64 EntryBaseUnit;
1834
1835 } ACPI_HMAT_LOCALITY;
1836
1837 /* Masks for Flags field above */
1838
1839 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F)
1840
1841 /* Values for Memory Hierarchy flag */
1842
1843 #define ACPI_HMAT_MEMORY 0
1844 #define ACPI_HMAT_LAST_LEVEL_CACHE 1
1845 #define ACPI_HMAT_1ST_LEVEL_CACHE 2
1846 #define ACPI_HMAT_2ND_LEVEL_CACHE 3
1847 #define ACPI_HMAT_3RD_LEVEL_CACHE 4
1848
1849 /* Values for DataType field above */
1850
1851 #define ACPI_HMAT_ACCESS_LATENCY 0
1852 #define ACPI_HMAT_READ_LATENCY 1
1853 #define ACPI_HMAT_WRITE_LATENCY 2
1854 #define ACPI_HMAT_ACCESS_BANDWIDTH 3
1855 #define ACPI_HMAT_READ_BANDWIDTH 4
1856 #define ACPI_HMAT_WRITE_BANDWIDTH 5
1857
1858
1859 /* 2: Memory side cache information */
1860
1861 typedef struct acpi_hmat_cache
1862 {
1863 ACPI_HMAT_STRUCTURE Header;
1864 UINT32 MemoryPD;
1865 UINT32 Reserved1;
1866 UINT64 CacheSize;
1867 UINT32 CacheAttributes;
1868 UINT16 Reserved2;
1869 UINT16 NumberOfSMBIOSHandles;
1870
1871 } ACPI_HMAT_CACHE;
1872
1873 /* Masks for CacheAttributes field above */
1874
1875 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F)
1876 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0)
1877 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00)
1878 #define ACPI_HMAT_WRITE_POLICY (0x0000F000)
1879 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000)
1880
1881 /* Values for cache associativity flag */
1882
1883 #define ACPI_HMAT_CA_NONE (0)
1884 #define ACPI_HMAT_CA_DIRECT_MAPPED (1)
1885 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2)
1886
1887 /* Values for write policy flag */
1888
1889 #define ACPI_HMAT_CP_NONE (0)
1890 #define ACPI_HMAT_CP_WB (1)
1891 #define ACPI_HMAT_CP_WT (2)
1892
1893
1894 /*******************************************************************************
1895 *
1896 * HPET - High Precision Event Timer table
1897 * Version 1
1898 *
1899 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
1900 * Version 1.0a, October 2004
1901 *
1902 ******************************************************************************/
1903
1904 typedef struct acpi_table_hpet
1905 {
1906 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1907 UINT32 Id; /* Hardware ID of event timer block */
1908 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */
1909 UINT8 Sequence; /* HPET sequence number */
1910 UINT16 MinimumTick; /* Main counter min tick, periodic mode */
1911 UINT8 Flags;
1912
1913 } ACPI_TABLE_HPET;
1914
1915 /* Masks for Flags field above */
1916
1917 #define ACPI_HPET_PAGE_PROTECT_MASK (3)
1918
1919 /* Values for Page Protect flags */
1920
1921 enum AcpiHpetPageProtect
1922 {
1923 ACPI_HPET_NO_PAGE_PROTECT = 0,
1924 ACPI_HPET_PAGE_PROTECT4 = 1,
1925 ACPI_HPET_PAGE_PROTECT64 = 2
1926 };
1927
1928
1929 /*******************************************************************************
1930 *
1931 * IBFT - Boot Firmware Table
1932 * Version 1
1933 *
1934 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
1935 * Specification", Version 1.01, March 1, 2007
1936 *
1937 * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
1938 * Therefore, it is not currently supported by the disassembler.
1939 *
1940 ******************************************************************************/
1941
1942 typedef struct acpi_table_ibft
1943 {
1944 ACPI_TABLE_HEADER Header; /* Common ACPI table header */
1945 UINT8 Reserved[12];
1946
1947 } ACPI_TABLE_IBFT;
1948
1949
1950 /* IBFT common subtable header */
1951
1952 typedef struct acpi_ibft_header
1953 {
1954 UINT8 Type;
1955 UINT8 Version;
1956 UINT16 Length;
1957 UINT8 Index;
1958 UINT8 Flags;
1959
1960 } ACPI_IBFT_HEADER;
1961
1962 /* Values for Type field above */
1963
1964 enum AcpiIbftType
1965 {
1966 ACPI_IBFT_TYPE_NOT_USED = 0,
1967 ACPI_IBFT_TYPE_CONTROL = 1,
1968 ACPI_IBFT_TYPE_INITIATOR = 2,
1969 ACPI_IBFT_TYPE_NIC = 3,
1970 ACPI_IBFT_TYPE_TARGET = 4,
1971 ACPI_IBFT_TYPE_EXTENSIONS = 5,
1972 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
1973 };
1974
1975
1976 /* IBFT subtables */
1977
1978 typedef struct acpi_ibft_control
1979 {
1980 ACPI_IBFT_HEADER Header;
1981 UINT16 Extensions;
1982 UINT16 InitiatorOffset;
1983 UINT16 Nic0Offset;
1984 UINT16 Target0Offset;
1985 UINT16 Nic1Offset;
1986 UINT16 Target1Offset;
1987
1988 } ACPI_IBFT_CONTROL;
1989
1990 typedef struct acpi_ibft_initiator
1991 {
1992 ACPI_IBFT_HEADER Header;
1993 UINT8 SnsServer[16];
1994 UINT8 SlpServer[16];
1995 UINT8 PrimaryServer[16];
1996 UINT8 SecondaryServer[16];
1997 UINT16 NameLength;
1998 UINT16 NameOffset;
1999
2000 } ACPI_IBFT_INITIATOR;
2001
2002 typedef struct acpi_ibft_nic
2003 {
2004 ACPI_IBFT_HEADER Header;
2005 UINT8 IpAddress[16];
2006 UINT8 SubnetMaskPrefix;
2007 UINT8 Origin;
2008 UINT8 Gateway[16];
2009 UINT8 PrimaryDns[16];
2010 UINT8 SecondaryDns[16];
2011 UINT8 Dhcp[16];
2012 UINT16 Vlan;
2013 UINT8 MacAddress[6];
2014 UINT16 PciAddress;
2015 UINT16 NameLength;
2016 UINT16 NameOffset;
2017
2018 } ACPI_IBFT_NIC;
2019
2020 typedef struct acpi_ibft_target
2021 {
2022 ACPI_IBFT_HEADER Header;
2023 UINT8 TargetIpAddress[16];
2024 UINT16 TargetIpSocket;
2025 UINT8 TargetBootLun[8];
2026 UINT8 ChapType;
2027 UINT8 NicAssociation;
2028 UINT16 TargetNameLength;
2029 UINT16 TargetNameOffset;
2030 UINT16 ChapNameLength;
2031 UINT16 ChapNameOffset;
2032 UINT16 ChapSecretLength;
2033 UINT16 ChapSecretOffset;
2034 UINT16 ReverseChapNameLength;
2035 UINT16 ReverseChapNameOffset;
2036 UINT16 ReverseChapSecretLength;
2037 UINT16 ReverseChapSecretOffset;
2038
2039 } ACPI_IBFT_TARGET;
2040
2041
2042 /* Reset to default packing */
2043
2044 #pragma pack()
2045
2046 #endif /* __ACTBL1_H__ */
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