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kernel - AHCI - enable AHCI device initiated power management
[dragonfly.git] / sys / dev / raid / iir / iir.c
blob2e669652582d4206b1407fe7ec9260cf0de34a59
1 /* $FreeBSD: src/sys/dev/iir/iir.c,v 1.20 2008/01/09 20:02:56 scottl Exp $ */
2 /* $DragonFly: src/sys/dev/raid/iir/iir.c,v 1.21 2008/05/18 20:30:23 pavalos Exp $ */
3 /*-
4 * Copyright (c) 2000-04 ICP vortex GmbH
5 * Copyright (c) 2002-04 Intel Corporation
6 * Copyright (c) 2003-04 Adaptec Inc.
7 * All Rights Reserved
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions, and the following disclaimer,
14 * without modification, immediately at the beginning of the file.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
25 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34 /*
35 * iir.c: SCSI dependant code for the Intel Integrated RAID Controller driver
36 *
37 * Written by: Achim Leubner <achim_leubner@adaptec.com>
38 * Fixes/Additions: Boji Tony Kannanthanam <boji.t.kannanthanam@intel.com>
39 *
40 * credits: Niklas Hallqvist; OpenBSD driver for the ICP Controllers.
41 * Mike Smith; Some driver source code.
42 * FreeBSD.ORG; Great O/S to work on and for.
43 *
44 * $Id: iir.c 1.5 2004/03/30 10:17:53 achim Exp $"
45 */
46
47
48 #define _IIR_C_
49
50 /* #include "opt_iir.h" */
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/types.h>
54 #include <sys/endian.h>
55 #include <sys/eventhandler.h>
56 #include <sys/malloc.h>
57 #include <sys/kernel.h>
58 #include <sys/bus.h>
59 #include <sys/thread2.h>
60
61 #include <machine/stdarg.h>
62
63 #include <bus/cam/cam.h>
64 #include <bus/cam/cam_ccb.h>
65 #include <bus/cam/cam_sim.h>
66 #include <bus/cam/cam_xpt_sim.h>
67 #include <bus/cam/cam_debug.h>
68 #include <bus/cam/scsi/scsi_all.h>
69 #include <bus/cam/scsi/scsi_message.h>
70
71 #include <vm/vm.h>
72 #include <vm/pmap.h>
73
74 #include <dev/raid/iir/iir.h>
75
76 MALLOC_DEFINE(M_GDTBUF, "iirbuf", "iir driver buffer");
77
78 struct gdt_softc *gdt_wait_gdt;
79 int gdt_wait_index;
80
81 #ifdef GDT_DEBUG
82 int gdt_debug = GDT_DEBUG;
83 #ifdef __SERIAL__
84 #define MAX_SERBUF 160
85 static void ser_init(void);
86 static void ser_puts(char *str);
87 static void ser_putc(int c);
88 static char strbuf[MAX_SERBUF+1];
89 #ifdef __COM2__
90 #define COM_BASE 0x2f8
91 #else
92 #define COM_BASE 0x3f8
93 #endif
94 static void ser_init()
95 {
96 unsigned port=COM_BASE;
97
98 outb(port+3, 0x80);
99 outb(port+1, 0);
100 /* 19200 Baud, if 9600: outb(12,port) */
101 outb(port, 6);
102 outb(port+3, 3);
103 outb(port+1, 0);
104 }
105
106 static void ser_puts(char *str)
107 {
108 char *ptr;
109
110 ser_init();
111 for (ptr=str;*ptr;++ptr)
112 ser_putc((int)(*ptr));
113 }
114
115 static void ser_putc(int c)
116 {
117 unsigned port=COM_BASE;
118
119 while ((inb(port+5) & 0x20)==0);
120 outb(port, c);
121 if (c==0x0a)
122 {
123 while ((inb(port+5) & 0x20)==0);
124 outb(port, 0x0d);
125 }
126 }
127
128 int
129 ser_kprintf(const char *fmt, ...)
130 {
131 __va_list args;
132 int i;
133
134 __va_start(args,fmt);
135 i = kvsprintf(strbuf,fmt,args);
136 ser_puts(strbuf);
137 __va_end(args);
138 return i;
139 }
140 #endif
141 #endif
142
143 /* The linked list of softc structures */
144 struct gdt_softc_list gdt_softcs = TAILQ_HEAD_INITIALIZER(gdt_softcs);
145 /* controller cnt. */
146 int gdt_cnt = 0;
147 /* event buffer */
148 static gdt_evt_str ebuffer[GDT_MAX_EVENTS];
149 static int elastidx, eoldidx;
150 /* statistics */
151 gdt_statist_t gdt_stat;
152
153 /* Definitions for our use of the SIM private CCB area */
154 #define ccb_sim_ptr spriv_ptr0
155 #define ccb_priority spriv_field1
156
157 static void iir_action(struct cam_sim *sim, union ccb *ccb);
158 static void iir_poll(struct cam_sim *sim);
159 static void iir_shutdown(void *arg, int howto);
160 static void iir_timeout(void *arg);
161 static void iir_watchdog(void *arg);
162
163 static void gdt_eval_mapping(u_int32_t size, int *cyls, int *heads,
164 int *secs);
165 static int gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb,
166 u_int8_t service, u_int16_t opcode,
167 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3);
168 static int gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *ccb,
169 int timeout);
170
171 static struct gdt_ccb *gdt_get_ccb(struct gdt_softc *gdt);
172
173 static int gdt_sync_event(struct gdt_softc *gdt, int service,
174 u_int8_t index, struct gdt_ccb *gccb);
175 static int gdt_async_event(struct gdt_softc *gdt, int service);
176 static struct gdt_ccb *gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb);
177 static struct gdt_ccb *gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb);
178 static struct gdt_ccb *gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd);
179 static void gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb);
180
181 static void gdtmapmem(void *arg, bus_dma_segment_t *dm_segs,
182 int nseg, int error);
183 static void gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs,
184 int nseg, int error);
185
186 int
187 iir_init(struct gdt_softc *gdt)
188 {
189 u_int16_t cdev_cnt;
190 int i, id, drv_cyls, drv_hds, drv_secs;
191 struct gdt_ccb *gccb;
192
193 GDT_DPRINTF(GDT_D_DEBUG, ("iir_init()\n"));
194
195 gdt->sc_state = GDT_POLLING;
196 gdt_clear_events();
197 bzero(&gdt_stat, sizeof(gdt_statist_t));
198
199 SLIST_INIT(&gdt->sc_free_gccb);
200 SLIST_INIT(&gdt->sc_pending_gccb);
201 TAILQ_INIT(&gdt->sc_ccb_queue);
202 TAILQ_INIT(&gdt->sc_ucmd_queue);
203 TAILQ_INSERT_TAIL(&gdt_softcs, gdt, links);
204
205 /* DMA tag for mapping buffers into device visible space. */
206 if (bus_dma_tag_create(gdt->sc_parent_dmat, /*alignment*/1, /*boundary*/0,
207 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
208 /*highaddr*/BUS_SPACE_MAXADDR,
209 /*filter*/NULL, /*filterarg*/NULL,
210 /*maxsize*/MAXBSIZE, /*nsegments*/GDT_MAXSG,
211 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
212 /*flags*/BUS_DMA_ALLOCNOW,
213 &gdt->sc_buffer_dmat) != 0) {
214 kprintf("iir%d: bus_dma_tag_create(...,gdt->sc_buffer_dmat) failed\n",
215 gdt->sc_hanum);
216 return (1);
217 }
218 gdt->sc_init_level++;
219
220 /* DMA tag for our ccb structures */
221 if (bus_dma_tag_create(gdt->sc_parent_dmat,
222 /*alignment*/1,
223 /*boundary*/0,
224 /*lowaddr*/BUS_SPACE_MAXADDR_32BIT,
225 /*highaddr*/BUS_SPACE_MAXADDR,
226 /*filter*/NULL,
227 /*filterarg*/NULL,
228 GDT_MAXCMDS * GDT_SCRATCH_SZ, /* maxsize */
229 /*nsegments*/1,
230 /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
231 /*flags*/0, &gdt->sc_gcscratch_dmat) != 0) {
232 kprintf("iir%d: bus_dma_tag_create(...,gdt->sc_gcscratch_dmat) failed\n",
233 gdt->sc_hanum);
234 return (1);
235 }
236 gdt->sc_init_level++;
237
238 /* Allocation for our ccb scratch area */
239 if (bus_dmamem_alloc(gdt->sc_gcscratch_dmat, (void **)&gdt->sc_gcscratch,
240 BUS_DMA_NOWAIT, &gdt->sc_gcscratch_dmamap) != 0) {
241 kprintf("iir%d: bus_dmamem_alloc(...,&gdt->sc_gcscratch,...) failed\n",
242 gdt->sc_hanum);
243 return (1);
244 }
245 gdt->sc_init_level++;
246
247 /* And permanently map them */
248 bus_dmamap_load(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap,
249 gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ,
250 gdtmapmem, &gdt->sc_gcscratch_busbase, /*flags*/0);
251 gdt->sc_init_level++;
252
253 /* Clear them out. */
254 bzero(gdt->sc_gcscratch, GDT_MAXCMDS * GDT_SCRATCH_SZ);
255
256 /* Initialize the ccbs */
257 gdt->sc_gccbs = kmalloc(sizeof(struct gdt_ccb) * GDT_MAXCMDS, M_GDTBUF,
258 M_INTWAIT | M_ZERO);
259 if (gdt->sc_gccbs == NULL) {
260 kprintf("iir%d: no memory for gccbs.\n", gdt->sc_hanum);
261 return (1);
262 }
263 for (i = GDT_MAXCMDS-1; i >= 0; i--) {
264 gccb = &gdt->sc_gccbs[i];
265 gccb->gc_cmd_index = i + 2;
266 gccb->gc_flags = GDT_GCF_UNUSED;
267 gccb->gc_map_flag = FALSE;
268 if (bus_dmamap_create(gdt->sc_buffer_dmat, /*flags*/0,
269 &gccb->gc_dmamap) != 0)
270 return(1);
271 gccb->gc_map_flag = TRUE;
272 gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i];
273 gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i;
274 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
275 }
276 gdt->sc_init_level++;
277
278 /* create the control device */
279 gdt->sc_dev = gdt_make_dev(gdt->sc_hanum);
280
281 /* allocate ccb for gdt_internal_cmd() */
282 gccb = gdt_get_ccb(gdt);
283 if (gccb == NULL) {
284 kprintf("iir%d: No free command index found\n",
285 gdt->sc_hanum);
286 return (1);
287 }
288 bzero(gccb->gc_cmd, GDT_CMD_SZ);
289
290 if (!gdt_internal_cmd(gdt, gccb, GDT_SCREENSERVICE, GDT_INIT,
291 0, 0, 0)) {
292 kprintf("iir%d: Screen service initialization error %d\n",
293 gdt->sc_hanum, gdt->sc_status);
294 gdt_free_ccb(gdt, gccb);
295 return (1);
296 }
297
298 gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_UNFREEZE_IO,
299 0, 0, 0);
300
301 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INIT,
302 GDT_LINUX_OS, 0, 0)) {
303 kprintf("iir%d: Cache service initialization error %d\n",
304 gdt->sc_hanum, gdt->sc_status);
305 gdt_free_ccb(gdt, gccb);
306 return (1);
307 }
308 cdev_cnt = (u_int16_t)gdt->sc_info;
309 gdt->sc_fw_vers = gdt->sc_service;
310
311 /* Detect number of buses */
312 gdt_enc32(gccb->gc_scratch + GDT_IOC_VERSION, GDT_IOC_NEWEST);
313 gccb->gc_scratch[GDT_IOC_LIST_ENTRIES] = GDT_MAXBUS;
314 gccb->gc_scratch[GDT_IOC_FIRST_CHAN] = 0;
315 gccb->gc_scratch[GDT_IOC_LAST_CHAN] = GDT_MAXBUS - 1;
316 gdt_enc32(gccb->gc_scratch + GDT_IOC_LIST_OFFSET, GDT_IOC_HDR_SZ);
317 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
318 GDT_IOCHAN_RAW_DESC, GDT_INVALID_CHANNEL,
319 GDT_IOC_HDR_SZ + GDT_MAXBUS * GDT_RAWIOC_SZ)) {
320 gdt->sc_bus_cnt = gccb->gc_scratch[GDT_IOC_CHAN_COUNT];
321 for (i = 0; i < gdt->sc_bus_cnt; i++) {
322 id = gccb->gc_scratch[GDT_IOC_HDR_SZ +
323 i * GDT_RAWIOC_SZ + GDT_RAWIOC_PROC_ID];
324 gdt->sc_bus_id[i] = id < GDT_MAXID_FC ? id : 0xff;
325 }
326 } else {
327 /* New method failed, use fallback. */
328 for (i = 0; i < GDT_MAXBUS; i++) {
329 gdt_enc32(gccb->gc_scratch + GDT_GETCH_CHANNEL_NO, i);
330 if (!gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
331 GDT_SCSI_CHAN_CNT | GDT_L_CTRL_PATTERN,
332 GDT_IO_CHANNEL | GDT_INVALID_CHANNEL,
333 GDT_GETCH_SZ)) {
334 if (i == 0) {
335 kprintf("iir%d: Cannot get channel count, "
336 "error %d\n", gdt->sc_hanum, gdt->sc_status);
337 gdt_free_ccb(gdt, gccb);
338 return (1);
339 }
340 break;
341 }
342 gdt->sc_bus_id[i] =
343 (gccb->gc_scratch[GDT_GETCH_SIOP_ID] < GDT_MAXID_FC) ?
344 gccb->gc_scratch[GDT_GETCH_SIOP_ID] : 0xff;
345 }
346 gdt->sc_bus_cnt = i;
347 }
348 /* add one "virtual" channel for the host drives */
349 gdt->sc_virt_bus = gdt->sc_bus_cnt;
350 gdt->sc_bus_cnt++;
351
352 if (!gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_INIT,
353 0, 0, 0)) {
354 kprintf("iir%d: Raw service initialization error %d\n",
355 gdt->sc_hanum, gdt->sc_status);
356 gdt_free_ccb(gdt, gccb);
357 return (1);
358 }
359
360 /* Set/get features raw service (scatter/gather) */
361 gdt->sc_raw_feat = 0;
362 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_SET_FEAT,
363 GDT_SCATTER_GATHER, 0, 0)) {
364 if (gdt_internal_cmd(gdt, gccb, GDT_SCSIRAWSERVICE, GDT_GET_FEAT,
365 0, 0, 0)) {
366 gdt->sc_raw_feat = gdt->sc_info;
367 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) {
368 panic("iir%d: Scatter/Gather Raw Service "
369 "required but not supported!\n", gdt->sc_hanum);
370 gdt_free_ccb(gdt, gccb);
371 return (1);
372 }
373 }
374 }
375
376 /* Set/get features cache service (scatter/gather) */
377 gdt->sc_cache_feat = 0;
378 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_SET_FEAT,
379 0, GDT_SCATTER_GATHER, 0)) {
380 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_GET_FEAT,
381 0, 0, 0)) {
382 gdt->sc_cache_feat = gdt->sc_info;
383 if (!(gdt->sc_info & GDT_SCATTER_GATHER)) {
384 panic("iir%d: Scatter/Gather Cache Service "
385 "required but not supported!\n", gdt->sc_hanum);
386 gdt_free_ccb(gdt, gccb);
387 return (1);
388 }
389 }
390 }
391
392 /* OEM */
393 gdt_enc32(gccb->gc_scratch + GDT_OEM_VERSION, 0x01);
394 gdt_enc32(gccb->gc_scratch + GDT_OEM_BUFSIZE, sizeof(gdt_oem_record_t));
395 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_IOCTL,
396 GDT_OEM_STR_RECORD, GDT_INVALID_CHANNEL,
397 sizeof(gdt_oem_str_record_t))) {
398 strncpy(gdt->oem_name, ((gdt_oem_str_record_t *)
399 gccb->gc_scratch)->text.scsi_host_drive_inquiry_vendor_id, 7);
400 gdt->oem_name[7]='\0';
401 } else {
402 /* Old method, based on PCI ID */
403 if (gdt->sc_vendor == INTEL_VENDOR_ID)
404 strcpy(gdt->oem_name,"Intel ");
405 else
406 strcpy(gdt->oem_name,"ICP ");
407 }
408
409 /* Scan for cache devices */
410 for (i = 0; i < cdev_cnt && i < GDT_MAX_HDRIVES; i++) {
411 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE, GDT_INFO,
412 i, 0, 0)) {
413 gdt->sc_hdr[i].hd_present = 1;
414 gdt->sc_hdr[i].hd_size = gdt->sc_info;
415
416 /*
417 * Evaluate mapping (sectors per head, heads per cyl)
418 */
419 gdt->sc_hdr[i].hd_size &= ~GDT_SECS32;
420 if (gdt->sc_info2 == 0)
421 gdt_eval_mapping(gdt->sc_hdr[i].hd_size,
422 &drv_cyls, &drv_hds, &drv_secs);
423 else {
424 drv_hds = gdt->sc_info2 & 0xff;
425 drv_secs = (gdt->sc_info2 >> 8) & 0xff;
426 drv_cyls = gdt->sc_hdr[i].hd_size / drv_hds /
427 drv_secs;
428 }
429 gdt->sc_hdr[i].hd_heads = drv_hds;
430 gdt->sc_hdr[i].hd_secs = drv_secs;
431 /* Round the size */
432 gdt->sc_hdr[i].hd_size = drv_cyls * drv_hds * drv_secs;
433
434 if (gdt_internal_cmd(gdt, gccb, GDT_CACHESERVICE,
435 GDT_DEVTYPE, i, 0, 0))
436 gdt->sc_hdr[i].hd_devtype = gdt->sc_info;
437 }
438 }
439
440 GDT_DPRINTF(GDT_D_INIT, ("dpmem %x %d-bus %d cache device%s\n",
441 gdt->sc_dpmembase,
442 gdt->sc_bus_cnt, cdev_cnt,
443 cdev_cnt == 1 ? "" : "s"));
444 gdt_free_ccb(gdt, gccb);
445
446 gdt_cnt++;
447 return (0);
448 }
449
450 void
451 iir_free(struct gdt_softc *gdt)
452 {
453 int i;
454
455 GDT_DPRINTF(GDT_D_INIT, ("iir_free()\n"));
456
457 switch (gdt->sc_init_level) {
458 default:
459 gdt_destroy_dev(gdt->sc_dev);
460 case 5:
461 for (i = GDT_MAXCMDS-1; i >= 0; i--)
462 if (gdt->sc_gccbs[i].gc_map_flag)
463 bus_dmamap_destroy(gdt->sc_buffer_dmat,
464 gdt->sc_gccbs[i].gc_dmamap);
465 bus_dmamap_unload(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch_dmamap);
466 kfree(gdt->sc_gccbs, M_GDTBUF);
467 case 4:
468 bus_dmamem_free(gdt->sc_gcscratch_dmat, gdt->sc_gcscratch, gdt->sc_gcscratch_dmamap);
469 case 3:
470 bus_dma_tag_destroy(gdt->sc_gcscratch_dmat);
471 case 2:
472 bus_dma_tag_destroy(gdt->sc_buffer_dmat);
473 case 1:
474 bus_dma_tag_destroy(gdt->sc_parent_dmat);
475 case 0:
476 break;
477 }
478 TAILQ_REMOVE(&gdt_softcs, gdt, links);
479 }
480
481 void
482 iir_attach(struct gdt_softc *gdt)
483 {
484 struct cam_devq *devq;
485 int i;
486
487 GDT_DPRINTF(GDT_D_INIT, ("iir_attach()\n"));
488
489 callout_init(&gdt->watchdog_timer);
490 /*
491 * Create the device queue for our SIM.
492 * XXX Throttle this down since the card has problems under load.
493 */
494 devq = cam_simq_alloc(32);
495 if (devq == NULL)
496 return;
497
498 for (i = 0; i < gdt->sc_bus_cnt; i++) {
499 /*
500 * Construct our SIM entry
501 */
502 gdt->sims[i] = cam_sim_alloc(iir_action, iir_poll, "iir",
503 gdt, gdt->sc_hanum, &sim_mplock,
504 /*untagged*/1,
505 /*tagged*/GDT_MAXCMDS, devq);
506 if (xpt_bus_register(gdt->sims[i], i) != CAM_SUCCESS) {
507 cam_sim_free(gdt->sims[i]);
508 break;
509 }
510
511 if (xpt_create_path(&gdt->paths[i], /*periph*/NULL,
512 cam_sim_path(gdt->sims[i]),
513 CAM_TARGET_WILDCARD,
514 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
515 xpt_bus_deregister(cam_sim_path(gdt->sims[i]));
516 cam_sim_free(gdt->sims[i]);
517 break;
518 }
519 }
520 cam_simq_release(devq);
521 if (i > 0)
522 EVENTHANDLER_REGISTER(shutdown_post_sync, iir_shutdown,
523 gdt, SHUTDOWN_PRI_DRIVER);
524 /* iir_watchdog(gdt); */
525 gdt->sc_state = GDT_NORMAL;
526 }
527
528 static void
529 gdt_eval_mapping(u_int32_t size, int *cyls, int *heads, int *secs)
530 {
531 *cyls = size / GDT_HEADS / GDT_SECS;
532 if (*cyls < GDT_MAXCYLS) {
533 *heads = GDT_HEADS;
534 *secs = GDT_SECS;
535 } else {
536 /* Too high for 64 * 32 */
537 *cyls = size / GDT_MEDHEADS / GDT_MEDSECS;
538 if (*cyls < GDT_MAXCYLS) {
539 *heads = GDT_MEDHEADS;
540 *secs = GDT_MEDSECS;
541 } else {
542 /* Too high for 127 * 63 */
543 *cyls = size / GDT_BIGHEADS / GDT_BIGSECS;
544 *heads = GDT_BIGHEADS;
545 *secs = GDT_BIGSECS;
546 }
547 }
548 }
549
550 static int
551 gdt_wait(struct gdt_softc *gdt, struct gdt_ccb *gccb,
552 int timeout)
553 {
554 int rv = 0;
555
556 GDT_DPRINTF(GDT_D_INIT,
557 ("gdt_wait(%p, %p, %d)\n", gdt, gccb, timeout));
558
559 gdt->sc_state |= GDT_POLL_WAIT;
560 do {
561 iir_intr(gdt);
562 if (gdt == gdt_wait_gdt &&
563 gccb->gc_cmd_index == gdt_wait_index) {
564 rv = 1;
565 break;
566 }
567 DELAY(1);
568 } while (--timeout);
569 gdt->sc_state &= ~GDT_POLL_WAIT;
570
571 while (gdt->sc_test_busy(gdt))
572 DELAY(1); /* XXX correct? */
573
574 return (rv);
575 }
576
577 static int
578 gdt_internal_cmd(struct gdt_softc *gdt, struct gdt_ccb *gccb,
579 u_int8_t service, u_int16_t opcode,
580 u_int32_t arg1, u_int32_t arg2, u_int32_t arg3)
581 {
582 int retries;
583
584 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cmd(%p, %d, %d, %d, %d, %d)\n",
585 gdt, service, opcode, arg1, arg2, arg3));
586
587 bzero(gccb->gc_cmd, GDT_CMD_SZ);
588
589 for (retries = GDT_RETRIES; ; ) {
590 gccb->gc_service = service;
591 gccb->gc_flags = GDT_GCF_INTERNAL;
592
593 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
594 gccb->gc_cmd_index);
595 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode);
596
597 switch (service) {
598 case GDT_CACHESERVICE:
599 if (opcode == GDT_IOCTL) {
600 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
601 GDT_IOCTL_SUBFUNC, arg1);
602 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
603 GDT_IOCTL_CHANNEL, arg2);
604 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION +
605 GDT_IOCTL_PARAM_SIZE, (u_int16_t)arg3);
606 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM,
607 gccb->gc_scratch_busbase);
608 } else {
609 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION +
610 GDT_CACHE_DEVICENO, (u_int16_t)arg1);
611 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
612 GDT_CACHE_BLOCKNO, arg2);
613 }
614 break;
615
616 case GDT_SCSIRAWSERVICE:
617 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION +
618 GDT_RAW_DIRECTION, arg1);
619 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
620 (u_int8_t)arg2;
621 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
622 (u_int8_t)arg3;
623 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
624 (u_int8_t)(arg3 >> 8);
625 }
626
627 gdt->sc_set_sema0(gdt);
628 gccb->gc_cmd_len = GDT_CMD_SZ;
629 gdt->sc_cmd_off = 0;
630 gdt->sc_cmd_cnt = 0;
631 gdt->sc_copy_cmd(gdt, gccb);
632 gdt->sc_release_event(gdt);
633 DELAY(20);
634 if (!gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT))
635 return (0);
636 if (gdt->sc_status != GDT_S_BSY || --retries == 0)
637 break;
638 DELAY(1);
639 }
640 return (gdt->sc_status == GDT_S_OK);
641 }
642
643 static struct gdt_ccb *
644 gdt_get_ccb(struct gdt_softc *gdt)
645 {
646 struct gdt_ccb *gccb;
647
648 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_get_ccb(%p)\n", gdt));
649
650 crit_enter();
651 gccb = SLIST_FIRST(&gdt->sc_free_gccb);
652 if (gccb != NULL) {
653 SLIST_REMOVE_HEAD(&gdt->sc_free_gccb, sle);
654 SLIST_INSERT_HEAD(&gdt->sc_pending_gccb, gccb, sle);
655 ++gdt_stat.cmd_index_act;
656 if (gdt_stat.cmd_index_act > gdt_stat.cmd_index_max)
657 gdt_stat.cmd_index_max = gdt_stat.cmd_index_act;
658 }
659 crit_exit();
660 return (gccb);
661 }
662
663 void
664 gdt_free_ccb(struct gdt_softc *gdt, struct gdt_ccb *gccb)
665 {
666 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_free_ccb(%p, %p)\n", gdt, gccb));
667
668 crit_enter();
669 gccb->gc_flags = GDT_GCF_UNUSED;
670 SLIST_REMOVE(&gdt->sc_pending_gccb, gccb, gdt_ccb, sle);
671 SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
672 --gdt_stat.cmd_index_act;
673 crit_exit();
674 if (gdt->sc_state & GDT_SHUTDOWN)
675 wakeup(gccb);
676 }
677
678 void
679 gdt_next(struct gdt_softc *gdt)
680 {
681 union ccb *ccb;
682 gdt_ucmd_t *ucmd;
683 struct cam_sim *sim;
684 int bus, target, lun;
685 int next_cmd;
686
687 struct ccb_scsiio *csio;
688 struct ccb_hdr *ccbh;
689 struct gdt_ccb *gccb = NULL;
690 u_int8_t cmd;
691
692 GDT_DPRINTF(GDT_D_QUEUE, ("gdt_next(%p)\n", gdt));
693
694 crit_enter();
695 if (gdt->sc_test_busy(gdt)) {
696 if (!(gdt->sc_state & GDT_POLLING)) {
697 crit_exit();
698 return;
699 }
700 while (gdt->sc_test_busy(gdt))
701 DELAY(1);
702 }
703
704 gdt->sc_cmd_cnt = gdt->sc_cmd_off = 0;
705 next_cmd = TRUE;
706 for (;;) {
707 /* I/Os in queue? controller ready? */
708 if (!TAILQ_FIRST(&gdt->sc_ucmd_queue) &&
709 !TAILQ_FIRST(&gdt->sc_ccb_queue))
710 break;
711
712 /* 1.: I/Os without ccb (IOCTLs) */
713 ucmd = TAILQ_FIRST(&gdt->sc_ucmd_queue);
714 if (ucmd != NULL) {
715 TAILQ_REMOVE(&gdt->sc_ucmd_queue, ucmd, links);
716 if ((gccb = gdt_ioctl_cmd(gdt, ucmd)) == NULL) {
717 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links);
718 break;
719 }
720 break;
721 /* wenn mehrere Kdos. zulassen: if (!gdt_polling) continue; */
722 }
723
724 /* 2.: I/Os with ccb */
725 ccb = (union ccb *)TAILQ_FIRST(&gdt->sc_ccb_queue);
726 /* ist dann immer != NULL, da oben getestet */
727 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
728 bus = cam_sim_bus(sim);
729 target = ccb->ccb_h.target_id;
730 lun = ccb->ccb_h.target_lun;
731
732 TAILQ_REMOVE(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
733 --gdt_stat.req_queue_act;
734 /* ccb->ccb_h.func_code is XPT_SCSI_IO */
735 GDT_DPRINTF(GDT_D_QUEUE, ("XPT_SCSI_IO flags 0x%x)\n",
736 ccb->ccb_h.flags));
737 csio = &ccb->csio;
738 ccbh = &ccb->ccb_h;
739 cmd = csio->cdb_io.cdb_bytes[0];
740 /* Max CDB length is 12 bytes */
741 if (csio->cdb_len > 12) {
742 ccbh->status = CAM_REQ_INVALID;
743 --gdt_stat.io_count_act;
744 xpt_done(ccb);
745 } else if (bus != gdt->sc_virt_bus) {
746 /* raw service command */
747 if ((gccb = gdt_raw_cmd(gdt, ccb)) == NULL) {
748 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h,
749 sim_links.tqe);
750 ++gdt_stat.req_queue_act;
751 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
752 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
753 next_cmd = FALSE;
754 }
755 } else if (target >= GDT_MAX_HDRIVES ||
756 !gdt->sc_hdr[target].hd_present || lun != 0) {
757 ccbh->status = CAM_DEV_NOT_THERE;
758 --gdt_stat.io_count_act;
759 xpt_done(ccb);
760 } else {
761 /* cache service command */
762 if (cmd == READ_6 || cmd == WRITE_6 ||
763 cmd == READ_10 || cmd == WRITE_10) {
764 if ((gccb = gdt_cache_cmd(gdt, ccb)) == NULL) {
765 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h,
766 sim_links.tqe);
767 ++gdt_stat.req_queue_act;
768 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
769 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
770 next_cmd = FALSE;
771 }
772 } else {
773 crit_exit();
774 gdt_internal_cache_cmd(gdt, ccb);
775 crit_enter();
776 }
777 }
778 if ((gdt->sc_state & GDT_POLLING) || !next_cmd)
779 break;
780 }
781 if (gdt->sc_cmd_cnt > 0)
782 gdt->sc_release_event(gdt);
783
784 crit_exit();
785
786 if ((gdt->sc_state & GDT_POLLING) && gdt->sc_cmd_cnt > 0) {
787 gdt_wait(gdt, gccb, GDT_POLL_TIMEOUT);
788 }
789 }
790
791 static struct gdt_ccb *
792 gdt_raw_cmd(struct gdt_softc *gdt, union ccb *ccb)
793 {
794 struct gdt_ccb *gccb;
795 struct cam_sim *sim;
796
797 GDT_DPRINTF(GDT_D_CMD, ("gdt_raw_cmd(%p, %p)\n", gdt, ccb));
798
799 if (roundup(GDT_CMD_UNION + GDT_RAW_SZ, sizeof(u_int32_t)) +
800 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET >
801 gdt->sc_ic_all_size) {
802 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_raw_cmd(): DPMEM overflow\n",
803 gdt->sc_hanum));
804 return (NULL);
805 }
806
807 gccb = gdt_get_ccb(gdt);
808 if (gccb == NULL) {
809 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: No free command index found\n",
810 gdt->sc_hanum));
811 return (gccb);
812 }
813 bzero(gccb->gc_cmd, GDT_CMD_SZ);
814 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
815 gccb->gc_ccb = ccb;
816 gccb->gc_service = GDT_SCSIRAWSERVICE;
817 gccb->gc_flags = GDT_GCF_SCSI;
818
819 if (gdt->sc_cmd_cnt == 0)
820 gdt->sc_set_sema0(gdt);
821 crit_exit();
822 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
823 gccb->gc_cmd_index);
824 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE);
825
826 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION,
827 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
828 GDT_DATA_IN : GDT_DATA_OUT);
829 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN,
830 ccb->csio.dxfer_len);
831 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN,
832 ccb->csio.cdb_len);
833 bcopy(ccb->csio.cdb_io.cdb_bytes, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD,
834 ccb->csio.cdb_len);
835 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
836 ccb->ccb_h.target_id;
837 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
838 ccb->ccb_h.target_lun;
839 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
840 cam_sim_bus(sim);
841 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN,
842 sizeof(struct scsi_sense_data));
843 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA,
844 gccb->gc_scratch_busbase);
845
846 /*
847 * If we have any data to send with this command,
848 * map it into bus space.
849 */
850 /* Only use S/G if there is a transfer */
851 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
852 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
853 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) {
854 int error;
855
856 /* vorher unlock von splcam() ??? */
857 crit_enter();
858 error =
859 bus_dmamap_load(gdt->sc_buffer_dmat,
860 gccb->gc_dmamap,
861 ccb->csio.data_ptr,
862 ccb->csio.dxfer_len,
863 gdtexecuteccb,
864 gccb, /*flags*/0);
865 if (error == EINPROGRESS) {
866 xpt_freeze_simq(sim, 1);
867 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
868 }
869 crit_exit();
870 } else {
871 panic("iir: CAM_DATA_PHYS not supported");
872 }
873 } else {
874 struct bus_dma_segment *segs;
875
876 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0)
877 panic("iir%d: iir_action - Physical "
878 "segment pointers unsupported", gdt->sc_hanum);
879
880 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0)
881 panic("iir%d: iir_action - Virtual "
882 "segment addresses unsupported", gdt->sc_hanum);
883
884 /* Just use the segments provided */
885 segs = (struct bus_dma_segment *)ccb->csio.data_ptr;
886 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0);
887 }
888 } else {
889 gdtexecuteccb(gccb, NULL, 0, 0);
890 }
891
892 crit_enter();
893 return (gccb);
894 }
895
896 static struct gdt_ccb *
897 gdt_cache_cmd(struct gdt_softc *gdt, union ccb *ccb)
898 {
899 struct gdt_ccb *gccb;
900 struct cam_sim *sim;
901 u_int8_t *cmdp;
902 u_int16_t opcode;
903 u_int32_t blockno, blockcnt;
904
905 GDT_DPRINTF(GDT_D_CMD, ("gdt_cache_cmd(%p, %p)\n", gdt, ccb));
906
907 if (roundup(GDT_CMD_UNION + GDT_CACHE_SZ, sizeof(u_int32_t)) +
908 gdt->sc_cmd_off + GDT_DPMEM_COMMAND_OFFSET >
909 gdt->sc_ic_all_size) {
910 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_cache_cmd(): DPMEM overflow\n",
911 gdt->sc_hanum));
912 return (NULL);
913 }
914
915 gccb = gdt_get_ccb(gdt);
916 if (gccb == NULL) {
917 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n",
918 gdt->sc_hanum));
919 return (gccb);
920 }
921 bzero(gccb->gc_cmd, GDT_CMD_SZ);
922 sim = (struct cam_sim *)ccb->ccb_h.ccb_sim_ptr;
923 gccb->gc_ccb = ccb;
924 gccb->gc_service = GDT_CACHESERVICE;
925 gccb->gc_flags = GDT_GCF_SCSI;
926
927 if (gdt->sc_cmd_cnt == 0)
928 gdt->sc_set_sema0(gdt);
929 crit_exit();
930 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
931 gccb->gc_cmd_index);
932 cmdp = ccb->csio.cdb_io.cdb_bytes;
933 opcode = (*cmdp == WRITE_6 || *cmdp == WRITE_10) ? GDT_WRITE : GDT_READ;
934 if ((gdt->sc_state & GDT_SHUTDOWN) && opcode == GDT_WRITE)
935 opcode = GDT_WRITE_THR;
936 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, opcode);
937
938 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO,
939 ccb->ccb_h.target_id);
940 if (ccb->csio.cdb_len == 6) {
941 struct scsi_rw_6 *rw = (struct scsi_rw_6 *)cmdp;
942 blockno = scsi_3btoul(rw->addr) & ((SRW_TOPADDR<<16) | 0xffff);
943 blockcnt = rw->length ? rw->length : 0x100;
944 } else {
945 struct scsi_rw_10 *rw = (struct scsi_rw_10 *)cmdp;
946 blockno = scsi_4btoul(rw->addr);
947 blockcnt = scsi_2btoul(rw->length);
948 }
949 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO,
950 blockno);
951 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT,
952 blockcnt);
953
954 /*
955 * If we have any data to send with this command,
956 * map it into bus space.
957 */
958 /* Only use S/G if there is a transfer */
959 if ((ccb->ccb_h.flags & CAM_SCATTER_VALID) == 0) {
960 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) == 0) {
961 int error;
962
963 /* vorher unlock von splcam() ??? */
964 crit_enter();
965 error =
966 bus_dmamap_load(gdt->sc_buffer_dmat,
967 gccb->gc_dmamap,
968 ccb->csio.data_ptr,
969 ccb->csio.dxfer_len,
970 gdtexecuteccb,
971 gccb, /*flags*/0);
972 if (error == EINPROGRESS) {
973 xpt_freeze_simq(sim, 1);
974 gccb->gc_ccb->ccb_h.status |= CAM_RELEASE_SIMQ;
975 }
976 crit_exit();
977 } else {
978 panic("iir: CAM_DATA_PHYS not supported");
979 }
980 } else {
981 struct bus_dma_segment *segs;
982
983 if ((ccb->ccb_h.flags & CAM_DATA_PHYS) != 0)
984 panic("iir%d: iir_action - Physical "
985 "segment pointers unsupported", gdt->sc_hanum);
986
987 if ((ccb->ccb_h.flags & CAM_SG_LIST_PHYS)==0)
988 panic("iir%d: iir_action - Virtual "
989 "segment addresses unsupported", gdt->sc_hanum);
990
991 /* Just use the segments provided */
992 segs = (struct bus_dma_segment *)ccb->csio.data_ptr;
993 gdtexecuteccb(gccb, segs, ccb->csio.sglist_cnt, 0);
994 }
995
996 crit_enter();
997 return (gccb);
998 }
999
1000 static struct gdt_ccb *
1001 gdt_ioctl_cmd(struct gdt_softc *gdt, gdt_ucmd_t *ucmd)
1002 {
1003 struct gdt_ccb *gccb;
1004 u_int32_t cnt;
1005
1006 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_ioctl_cmd(%p, %p)\n", gdt, ucmd));
1007
1008 gccb = gdt_get_ccb(gdt);
1009 if (gccb == NULL) {
1010 GDT_DPRINTF(GDT_D_DEBUG, ("iir%d: No free command index found\n",
1011 gdt->sc_hanum));
1012 return (gccb);
1013 }
1014 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1015 gccb->gc_ucmd = ucmd;
1016 gccb->gc_service = ucmd->service;
1017 gccb->gc_flags = GDT_GCF_IOCTL;
1018
1019 /* check DPMEM space, copy data buffer from user space */
1020 if (ucmd->service == GDT_CACHESERVICE) {
1021 if (ucmd->OpCode == GDT_IOCTL) {
1022 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_IOCTL_SZ,
1023 sizeof(u_int32_t));
1024 cnt = ucmd->u.ioctl.param_size;
1025 if (cnt > GDT_SCRATCH_SZ) {
1026 kprintf("iir%d: Scratch buffer too small (%d/%d)\n",
1027 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt);
1028 gdt_free_ccb(gdt, gccb);
1029 return (NULL);
1030 }
1031 } else {
1032 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST +
1033 GDT_SG_SZ, sizeof(u_int32_t));
1034 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE;
1035 if (cnt > GDT_SCRATCH_SZ) {
1036 kprintf("iir%d: Scratch buffer too small (%d/%d)\n",
1037 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt);
1038 gdt_free_ccb(gdt, gccb);
1039 return (NULL);
1040 }
1041 }
1042 } else {
1043 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST +
1044 GDT_SG_SZ, sizeof(u_int32_t));
1045 cnt = ucmd->u.raw.sdlen;
1046 if (cnt + ucmd->u.raw.sense_len > GDT_SCRATCH_SZ) {
1047 kprintf("iir%d: Scratch buffer too small (%d/%d)\n",
1048 gdt->sc_hanum, GDT_SCRATCH_SZ, cnt + ucmd->u.raw.sense_len);
1049 gdt_free_ccb(gdt, gccb);
1050 return (NULL);
1051 }
1052 }
1053 if (cnt != 0)
1054 bcopy(ucmd->data, gccb->gc_scratch, cnt);
1055
1056 if (gdt->sc_cmd_off + gccb->gc_cmd_len + GDT_DPMEM_COMMAND_OFFSET >
1057 gdt->sc_ic_all_size) {
1058 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: gdt_ioctl_cmd(): DPMEM overflow\n",
1059 gdt->sc_hanum));
1060 gdt_free_ccb(gdt, gccb);
1061 return (NULL);
1062 }
1063
1064 if (gdt->sc_cmd_cnt == 0)
1065 gdt->sc_set_sema0(gdt);
1066 crit_exit();
1067
1068 /* fill cmd structure */
1069 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1070 gccb->gc_cmd_index);
1071 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE,
1072 ucmd->OpCode);
1073
1074 if (ucmd->service == GDT_CACHESERVICE) {
1075 if (ucmd->OpCode == GDT_IOCTL) {
1076 /* IOCTL */
1077 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_PARAM_SIZE,
1078 ucmd->u.ioctl.param_size);
1079 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_SUBFUNC,
1080 ucmd->u.ioctl.subfunc);
1081 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_CHANNEL,
1082 ucmd->u.ioctl.channel);
1083 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_IOCTL_P_PARAM,
1084 gccb->gc_scratch_busbase);
1085 } else {
1086 /* cache service command */
1087 gdt_enc16(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DEVICENO,
1088 ucmd->u.cache.DeviceNo);
1089 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKNO,
1090 ucmd->u.cache.BlockNo);
1091 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_BLOCKCNT,
1092 ucmd->u.cache.BlockCnt);
1093 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR,
1094 0xffffffffUL);
1095 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ,
1096 1);
1097 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1098 GDT_SG_PTR, gccb->gc_scratch_busbase);
1099 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1100 GDT_SG_LEN, ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE);
1101 }
1102 } else {
1103 /* raw service command */
1104 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_DIRECTION,
1105 ucmd->u.raw.direction);
1106 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA,
1107 0xffffffffUL);
1108 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDLEN,
1109 ucmd->u.raw.sdlen);
1110 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CLEN,
1111 ucmd->u.raw.clen);
1112 bcopy(ucmd->u.raw.cmd, gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_CMD,
1113 12);
1114 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_TARGET] =
1115 ucmd->u.raw.target;
1116 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_LUN] =
1117 ucmd->u.raw.lun;
1118 gccb->gc_cmd[GDT_CMD_UNION + GDT_RAW_BUS] =
1119 ucmd->u.raw.bus;
1120 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_LEN,
1121 ucmd->u.raw.sense_len);
1122 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SENSE_DATA,
1123 gccb->gc_scratch_busbase + ucmd->u.raw.sdlen);
1124 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ,
1125 1);
1126 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1127 GDT_SG_PTR, gccb->gc_scratch_busbase);
1128 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1129 GDT_SG_LEN, ucmd->u.raw.sdlen);
1130 }
1131
1132 crit_enter();
1133 gdt_stat.sg_count_act = 1;
1134 gdt->sc_copy_cmd(gdt, gccb);
1135 return (gccb);
1136 }
1137
1138 static void
1139 gdt_internal_cache_cmd(struct gdt_softc *gdt,union ccb *ccb)
1140 {
1141 int t;
1142
1143 t = ccb->ccb_h.target_id;
1144 GDT_DPRINTF(GDT_D_CMD, ("gdt_internal_cache_cmd(%p, %p, 0x%x, %d)\n",
1145 gdt, ccb, ccb->csio.cdb_io.cdb_bytes[0], t));
1146
1147 switch (ccb->csio.cdb_io.cdb_bytes[0]) {
1148 case TEST_UNIT_READY:
1149 case START_STOP:
1150 break;
1151 case REQUEST_SENSE:
1152 GDT_DPRINTF(GDT_D_MISC, ("REQUEST_SENSE\n"));
1153 break;
1154 case INQUIRY:
1155 {
1156 struct scsi_inquiry_data inq;
1157 size_t copylen = MIN(sizeof(inq), ccb->csio.dxfer_len);
1158
1159 bzero(&inq, sizeof(inq));
1160 inq.device = (gdt->sc_hdr[t].hd_devtype & 4) ?
1161 T_CDROM : T_DIRECT;
1162 inq.dev_qual2 = (gdt->sc_hdr[t].hd_devtype & 1) ? 0x80 : 0;
1163 inq.version = SCSI_REV_2;
1164 inq.response_format = 2;
1165 inq.additional_length = 32;
1166 inq.flags = SID_CmdQue | SID_Sync;
1167 strncpy(inq.vendor, gdt->oem_name, sizeof(inq.vendor));
1168 ksnprintf(inq.product, sizeof(inq.product),
1169 "Host Drive #%02d", t);
1170 strncpy(inq.revision, " ", sizeof(inq.revision));
1171 bcopy(&inq, ccb->csio.data_ptr, copylen );
1172 if( ccb->csio.dxfer_len > copylen )
1173 bzero( ccb->csio.data_ptr+copylen,
1174 ccb->csio.dxfer_len - copylen );
1175 break;
1176 }
1177 case MODE_SENSE_6:
1178 {
1179 struct mpd_data {
1180 struct scsi_mode_hdr_6 hd;
1181 struct scsi_mode_block_descr bd;
1182 struct scsi_control_page cp;
1183 } mpd;
1184 size_t copylen = MIN(sizeof(mpd), ccb->csio.dxfer_len);
1185 u_int8_t page;
1186
1187 /*mpd = (struct mpd_data *)ccb->csio.data_ptr;*/
1188 bzero(&mpd, sizeof(mpd));
1189 mpd.hd.datalen = sizeof(struct scsi_mode_hdr_6) +
1190 sizeof(struct scsi_mode_block_descr);
1191 mpd.hd.dev_specific = (gdt->sc_hdr[t].hd_devtype & 2) ? 0x80 : 0;
1192 mpd.hd.block_descr_len = sizeof(struct scsi_mode_block_descr);
1193 mpd.bd.block_len[0] = (GDT_SECTOR_SIZE & 0x00ff0000) >> 16;
1194 mpd.bd.block_len[1] = (GDT_SECTOR_SIZE & 0x0000ff00) >> 8;
1195 mpd.bd.block_len[2] = (GDT_SECTOR_SIZE & 0x000000ff);
1196
1197 bcopy(&mpd, ccb->csio.data_ptr, copylen );
1198 if( ccb->csio.dxfer_len > copylen )
1199 bzero( ccb->csio.data_ptr+copylen,
1200 ccb->csio.dxfer_len - copylen );
1201 page=((struct scsi_mode_sense_6 *)ccb->csio.cdb_io.cdb_bytes)->page;
1202 switch (page) {
1203 default:
1204 GDT_DPRINTF(GDT_D_MISC, ("MODE_SENSE_6: page 0x%x\n", page));
1205 break;
1206 }
1207 break;
1208 }
1209 case READ_CAPACITY:
1210 {
1211 struct scsi_read_capacity_data rcd;
1212 size_t copylen = MIN(sizeof(rcd), ccb->csio.dxfer_len);
1213
1214 /*rcd = (struct scsi_read_capacity_data *)ccb->csio.data_ptr;*/
1215 bzero(&rcd, sizeof(rcd));
1216 scsi_ulto4b(gdt->sc_hdr[t].hd_size - 1, rcd.addr);
1217 scsi_ulto4b(GDT_SECTOR_SIZE, rcd.length);
1218 bcopy(&rcd, ccb->csio.data_ptr, copylen );
1219 if( ccb->csio.dxfer_len > copylen )
1220 bzero( ccb->csio.data_ptr+copylen,
1221 ccb->csio.dxfer_len - copylen );
1222 break;
1223 }
1224 default:
1225 GDT_DPRINTF(GDT_D_MISC, ("gdt_internal_cache_cmd(%d) unknown\n",
1226 ccb->csio.cdb_io.cdb_bytes[0]));
1227 break;
1228 }
1229 ccb->ccb_h.status |= CAM_REQ_CMP;
1230 --gdt_stat.io_count_act;
1231 xpt_done(ccb);
1232 }
1233
1234 static void
1235 gdtmapmem(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1236 {
1237 bus_addr_t *busaddrp;
1238
1239 busaddrp = (bus_addr_t *)arg;
1240 *busaddrp = dm_segs->ds_addr;
1241 }
1242
1243 static void
1244 gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
1245 {
1246 struct gdt_ccb *gccb;
1247 union ccb *ccb;
1248 struct gdt_softc *gdt;
1249 int i;
1250
1251 crit_enter();
1252
1253 gccb = (struct gdt_ccb *)arg;
1254 ccb = gccb->gc_ccb;
1255 gdt = cam_sim_softc((struct cam_sim *)ccb->ccb_h.ccb_sim_ptr);
1256
1257 GDT_DPRINTF(GDT_D_CMD, ("gdtexecuteccb(%p, %p, %p, %d, %d)\n",
1258 gdt, gccb, dm_segs, nseg, error));
1259 gdt_stat.sg_count_act = nseg;
1260 if (nseg > gdt_stat.sg_count_max)
1261 gdt_stat.sg_count_max = nseg;
1262
1263 /* Copy the segments into our SG list */
1264 if (gccb->gc_service == GDT_CACHESERVICE) {
1265 for (i = 0; i < nseg; ++i) {
1266 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1267 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr);
1268 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_LST +
1269 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len);
1270 dm_segs++;
1271 }
1272 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_SG_CANZ,
1273 nseg);
1274 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_CACHE_DESTADDR,
1275 0xffffffffUL);
1276
1277 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_CACHE_SG_LST +
1278 nseg * GDT_SG_SZ, sizeof(u_int32_t));
1279 } else {
1280 for (i = 0; i < nseg; ++i) {
1281 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1282 i * GDT_SG_SZ + GDT_SG_PTR, dm_segs->ds_addr);
1283 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_LST +
1284 i * GDT_SG_SZ + GDT_SG_LEN, dm_segs->ds_len);
1285 dm_segs++;
1286 }
1287 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SG_RANZ,
1288 nseg);
1289 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_RAW_SDATA,
1290 0xffffffffUL);
1291
1292 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_RAW_SG_LST +
1293 nseg * GDT_SG_SZ, sizeof(u_int32_t));
1294 }
1295
1296 if (nseg != 0) {
1297 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
1298 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
1299 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1300 }
1301
1302 /* We must NOT abort the command here if CAM_REQ_INPROG is not set,
1303 * because command semaphore is already set!
1304 */
1305
1306 ccb->ccb_h.status |= CAM_SIM_QUEUED;
1307 /* timeout handling */
1308 callout_reset(&ccb->ccb_h.timeout_ch, (ccb->ccb_h.timeout * hz) / 1000,
1309 iir_timeout, gccb);
1310
1311 gdt->sc_copy_cmd(gdt, gccb);
1312 crit_exit();
1313 }
1314
1315
1316 static void
1317 iir_action( struct cam_sim *sim, union ccb *ccb )
1318 {
1319 struct gdt_softc *gdt;
1320 int bus, target, lun;
1321
1322 gdt = (struct gdt_softc *)cam_sim_softc( sim );
1323 ccb->ccb_h.ccb_sim_ptr = sim;
1324 bus = cam_sim_bus(sim);
1325 target = ccb->ccb_h.target_id;
1326 lun = ccb->ccb_h.target_lun;
1327 GDT_DPRINTF(GDT_D_CMD,
1328 ("iir_action(%p) func 0x%x cmd 0x%x bus %d target %d lun %d\n",
1329 gdt, ccb->ccb_h.func_code, ccb->csio.cdb_io.cdb_bytes[0],
1330 bus, target, lun));
1331 ++gdt_stat.io_count_act;
1332 if (gdt_stat.io_count_act > gdt_stat.io_count_max)
1333 gdt_stat.io_count_max = gdt_stat.io_count_act;
1334
1335 switch (ccb->ccb_h.func_code) {
1336 case XPT_SCSI_IO:
1337 crit_enter();
1338 TAILQ_INSERT_TAIL(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
1339 ++gdt_stat.req_queue_act;
1340 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
1341 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
1342 crit_exit();
1343 gdt_next(gdt);
1344 break;
1345 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
1346 case XPT_ABORT: /* Abort the specified CCB */
1347 /* XXX Implement */
1348 ccb->ccb_h.status = CAM_REQ_INVALID;
1349 --gdt_stat.io_count_act;
1350 xpt_done(ccb);
1351 break;
1352 case XPT_SET_TRAN_SETTINGS:
1353 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1354 --gdt_stat.io_count_act;
1355 xpt_done(ccb);
1356 break;
1357 case XPT_GET_TRAN_SETTINGS:
1358 /* Get default/user set transfer settings for the target */
1359 {
1360 struct ccb_trans_settings *cts = &ccb->cts;
1361 struct ccb_trans_settings_scsi *scsi = &cts->proto_specific.scsi;
1362 struct ccb_trans_settings_spi *spi = &cts->xport_specific.spi;
1363
1364 cts->protocol = PROTO_SCSI;
1365 cts->protocol_version = SCSI_REV_2;
1366 cts->transport = XPORT_SPI;
1367 cts->transport_version = 2;
1368
1369 if (cts->type == CTS_TYPE_USER_SETTINGS) {
1370 spi->flags = CTS_SPI_FLAGS_DISC_ENB;
1371 scsi->flags = CTS_SCSI_FLAGS_TAG_ENB;
1372 spi->bus_width = MSG_EXT_WDTR_BUS_16_BIT;
1373 spi->sync_period = 25; /* 10MHz */
1374 if (spi->sync_period != 0)
1375 spi->sync_offset = 15;
1376
1377 spi->valid = CTS_SPI_VALID_SYNC_RATE
1378 | CTS_SPI_VALID_SYNC_OFFSET
1379 | CTS_SPI_VALID_BUS_WIDTH
1380 | CTS_SPI_VALID_DISC;
1381 scsi->valid = CTS_SCSI_VALID_TQ;
1382 ccb->ccb_h.status = CAM_REQ_CMP;
1383 } else {
1384 ccb->ccb_h.status = CAM_FUNC_NOTAVAIL;
1385 }
1386 --gdt_stat.io_count_act;
1387 xpt_done(ccb);
1388 break;
1389 }
1390 case XPT_CALC_GEOMETRY:
1391 {
1392 struct ccb_calc_geometry *ccg;
1393 u_int32_t secs_per_cylinder;
1394
1395 ccg = &ccb->ccg;
1396 ccg->heads = gdt->sc_hdr[target].hd_heads;
1397 ccg->secs_per_track = gdt->sc_hdr[target].hd_secs;
1398 secs_per_cylinder = ccg->heads * ccg->secs_per_track;
1399 ccg->cylinders = ccg->volume_size / secs_per_cylinder;
1400 ccb->ccb_h.status = CAM_REQ_CMP;
1401 --gdt_stat.io_count_act;
1402 xpt_done(ccb);
1403 break;
1404 }
1405 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
1406 {
1407 /* XXX Implement */
1408 ccb->ccb_h.status = CAM_REQ_CMP;
1409 --gdt_stat.io_count_act;
1410 xpt_done(ccb);
1411 break;
1412 }
1413 case XPT_TERM_IO: /* Terminate the I/O process */
1414 /* XXX Implement */
1415 ccb->ccb_h.status = CAM_REQ_INVALID;
1416 --gdt_stat.io_count_act;
1417 xpt_done(ccb);
1418 break;
1419 case XPT_PATH_INQ: /* Path routing inquiry */
1420 {
1421 struct ccb_pathinq *cpi = &ccb->cpi;
1422
1423 cpi->version_num = 1;
1424 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
1425 cpi->hba_inquiry |= PI_WIDE_16;
1426 cpi->target_sprt = 1;
1427 cpi->hba_misc = 0;
1428 cpi->hba_eng_cnt = 0;
1429 if (bus == gdt->sc_virt_bus)
1430 cpi->max_target = GDT_MAX_HDRIVES - 1;
1431 else if (gdt->sc_class & GDT_FC)
1432 cpi->max_target = GDT_MAXID_FC - 1;
1433 else
1434 cpi->max_target = GDT_MAXID - 1;
1435 cpi->max_lun = 7;
1436 cpi->unit_number = cam_sim_unit(sim);
1437 cpi->bus_id = bus;
1438 cpi->initiator_id =
1439 (bus == gdt->sc_virt_bus ? 127 : gdt->sc_bus_id[bus]);
1440 cpi->base_transfer_speed = 3300;
1441 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1442 if (gdt->sc_vendor == INTEL_VENDOR_ID)
1443 strncpy(cpi->hba_vid, "Intel Corp.", HBA_IDLEN);
1444 else
1445 strncpy(cpi->hba_vid, "ICP vortex ", HBA_IDLEN);
1446 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1447 cpi->transport = XPORT_SPI;
1448 cpi->transport_version = 2;
1449 cpi->protocol = PROTO_SCSI;
1450 cpi->protocol_version = SCSI_REV_2;
1451 cpi->ccb_h.status = CAM_REQ_CMP;
1452 --gdt_stat.io_count_act;
1453 xpt_done(ccb);
1454 break;
1455 }
1456 default:
1457 GDT_DPRINTF(GDT_D_INVALID, ("gdt_next(%p) cmd 0x%x invalid\n",
1458 gdt, ccb->ccb_h.func_code));
1459 ccb->ccb_h.status = CAM_REQ_INVALID;
1460 --gdt_stat.io_count_act;
1461 xpt_done(ccb);
1462 break;
1463 }
1464 }
1465
1466 static void
1467 iir_poll( struct cam_sim *sim )
1468 {
1469 struct gdt_softc *gdt;
1470
1471 gdt = (struct gdt_softc *)cam_sim_softc( sim );
1472 GDT_DPRINTF(GDT_D_CMD, ("iir_poll sim %p gdt %p\n", sim, gdt));
1473 iir_intr(gdt);
1474 }
1475
1476 static void
1477 iir_timeout(void *arg)
1478 {
1479 GDT_DPRINTF(GDT_D_TIMEOUT, ("iir_timeout(%p)\n", gccb));
1480 }
1481
1482 static void
1483 iir_watchdog(void *arg)
1484 {
1485 struct gdt_softc *gdt;
1486
1487 gdt = (struct gdt_softc *)arg;
1488 GDT_DPRINTF(GDT_D_DEBUG, ("iir_watchdog(%p)\n", gdt));
1489
1490 {
1491 int ccbs = 0, ucmds = 0, frees = 0, pends = 0;
1492 struct gdt_ccb *p;
1493 struct ccb_hdr *h;
1494 struct gdt_ucmd *u;
1495
1496 for (h = TAILQ_FIRST(&gdt->sc_ccb_queue); h != NULL;
1497 h = TAILQ_NEXT(h, sim_links.tqe))
1498 ccbs++;
1499 for (u = TAILQ_FIRST(&gdt->sc_ucmd_queue); u != NULL;
1500 u = TAILQ_NEXT(u, links))
1501 ucmds++;
1502 for (p = SLIST_FIRST(&gdt->sc_free_gccb); p != NULL;
1503 p = SLIST_NEXT(p, sle))
1504 frees++;
1505 for (p = SLIST_FIRST(&gdt->sc_pending_gccb); p != NULL;
1506 p = SLIST_NEXT(p, sle))
1507 pends++;
1508
1509 GDT_DPRINTF(GDT_D_TIMEOUT, ("ccbs %d ucmds %d frees %d pends %d\n",
1510 ccbs, ucmds, frees, pends));
1511 }
1512
1513 callout_reset(&gdt->watchdog_timer, hz * 15, iir_watchdog, gdt);
1514 }
1515
1516 static void
1517 iir_shutdown( void *arg, int howto )
1518 {
1519 struct gdt_softc *gdt;
1520 struct gdt_ccb *gccb;
1521 gdt_ucmd_t *ucmd;
1522 int i;
1523
1524 gdt = (struct gdt_softc *)arg;
1525 GDT_DPRINTF(GDT_D_CMD, ("iir_shutdown(%p, %d)\n", gdt, howto));
1526
1527 kprintf("iir%d: Flushing all Host Drives. Please wait ... ",
1528 gdt->sc_hanum);
1529
1530 /* allocate ucmd buffer */
1531 ucmd = kmalloc(sizeof(gdt_ucmd_t), M_GDTBUF, M_INTWAIT | M_ZERO);
1532
1533 /* wait for pending IOs */
1534 crit_enter();
1535 gdt->sc_state = GDT_SHUTDOWN;
1536 crit_exit();
1537 if ((gccb = SLIST_FIRST(&gdt->sc_pending_gccb)) != NULL)
1538 (void) tsleep((void *)gccb, PCATCH, "iirshw", 100 * hz);
1539
1540 /* flush */
1541 for (i = 0; i < GDT_MAX_HDRIVES; ++i) {
1542 if (gdt->sc_hdr[i].hd_present) {
1543 ucmd->service = GDT_CACHESERVICE;
1544 ucmd->OpCode = GDT_FLUSH;
1545 ucmd->u.cache.DeviceNo = i;
1546 crit_enter();
1547 TAILQ_INSERT_TAIL(&gdt->sc_ucmd_queue, ucmd, links);
1548 ucmd->complete_flag = FALSE;
1549 crit_exit();
1550 gdt_next(gdt);
1551 if (!ucmd->complete_flag)
1552 (void) tsleep((void *)ucmd, PCATCH, "iirshw", 10*hz);
1553 }
1554 }
1555
1556 kfree(ucmd, M_DEVBUF);
1557 kprintf("Done.\n");
1558 }
1559
1560 void
1561 iir_intr(void *arg)
1562 {
1563 struct gdt_softc *gdt = arg;
1564 struct gdt_intr_ctx ctx;
1565 struct gdt_ccb *gccb;
1566 gdt_ucmd_t *ucmd;
1567 u_int32_t cnt;
1568
1569 GDT_DPRINTF(GDT_D_INTR, ("gdt_intr(%p)\n", gdt));
1570
1571 /* If polling and we were not called from gdt_wait, just return */
1572 if ((gdt->sc_state & GDT_POLLING) &&
1573 !(gdt->sc_state & GDT_POLL_WAIT))
1574 return;
1575
1576 if (!(gdt->sc_state & GDT_POLLING))
1577 crit_enter();
1578 gdt_wait_index = 0;
1579
1580 ctx.istatus = gdt->sc_get_status(gdt);
1581 if (ctx.istatus == 0x00) {
1582 if (!(gdt->sc_state & GDT_POLLING))
1583 crit_exit();
1584 gdt->sc_status = GDT_S_NO_STATUS;
1585 return;
1586 }
1587
1588 gdt->sc_intr(gdt, &ctx);
1589
1590 gdt->sc_status = ctx.cmd_status;
1591 gdt->sc_service = ctx.service;
1592 gdt->sc_info = ctx.info;
1593 gdt->sc_info2 = ctx.info2;
1594
1595 if (gdt->sc_state & GDT_POLL_WAIT) {
1596 gdt_wait_gdt = gdt;
1597 gdt_wait_index = ctx.istatus;
1598 }
1599
1600 if (ctx.istatus == GDT_ASYNCINDEX) {
1601 gdt_async_event(gdt, ctx.service);
1602 if (!(gdt->sc_state & GDT_POLLING))
1603 crit_exit();
1604 return;
1605 }
1606 if (ctx.istatus == GDT_SPEZINDEX) {
1607 GDT_DPRINTF(GDT_D_INVALID,
1608 ("iir%d: Service unknown or not initialized!\n",
1609 gdt->sc_hanum));
1610 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver);
1611 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum;
1612 gdt_store_event(GDT_ES_DRIVER, 4, &gdt->sc_dvr);
1613 if (!(gdt->sc_state & GDT_POLLING))
1614 crit_exit();
1615 return;
1616 }
1617
1618 gccb = &gdt->sc_gccbs[ctx.istatus - 2];
1619 ctx.service = gccb->gc_service;
1620
1621 switch (gccb->gc_flags) {
1622 case GDT_GCF_UNUSED:
1623 GDT_DPRINTF(GDT_D_INVALID, ("iir%d: Index (%d) to unused command!\n",
1624 gdt->sc_hanum, ctx.istatus));
1625 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.driver);
1626 gdt->sc_dvr.eu.driver.ionode = gdt->sc_hanum;
1627 gdt->sc_dvr.eu.driver.index = ctx.istatus;
1628 gdt_store_event(GDT_ES_DRIVER, 1, &gdt->sc_dvr);
1629 gdt_free_ccb(gdt, gccb);
1630 /* fallthrough */
1631
1632 case GDT_GCF_INTERNAL:
1633 if (!(gdt->sc_state & GDT_POLLING))
1634 crit_exit();
1635 break;
1636
1637 case GDT_GCF_IOCTL:
1638 ucmd = gccb->gc_ucmd;
1639 if (gdt->sc_status == GDT_S_BSY) {
1640 GDT_DPRINTF(GDT_D_DEBUG, ("iir_intr(%p) ioctl: gccb %p busy\n",
1641 gdt, gccb));
1642 TAILQ_INSERT_HEAD(&gdt->sc_ucmd_queue, ucmd, links);
1643 if (!(gdt->sc_state & GDT_POLLING))
1644 crit_exit();
1645 } else {
1646 ucmd->status = gdt->sc_status;
1647 ucmd->info = gdt->sc_info;
1648 ucmd->complete_flag = TRUE;
1649 if (ucmd->service == GDT_CACHESERVICE) {
1650 if (ucmd->OpCode == GDT_IOCTL) {
1651 cnt = ucmd->u.ioctl.param_size;
1652 if (cnt != 0)
1653 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1654 } else {
1655 cnt = ucmd->u.cache.BlockCnt * GDT_SECTOR_SIZE;
1656 if (cnt != 0)
1657 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1658 }
1659 } else {
1660 cnt = ucmd->u.raw.sdlen;
1661 if (cnt != 0)
1662 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1663 if (ucmd->u.raw.sense_len != 0)
1664 bcopy(gccb->gc_scratch, ucmd->data, cnt);
1665 }
1666 gdt_free_ccb(gdt, gccb);
1667 if (!(gdt->sc_state & GDT_POLLING))
1668 crit_exit();
1669 /* wakeup */
1670 wakeup(ucmd);
1671 }
1672 gdt_next(gdt);
1673 break;
1674
1675 default:
1676 gdt_free_ccb(gdt, gccb);
1677 gdt_sync_event(gdt, ctx.service, ctx.istatus, gccb);
1678 if (!(gdt->sc_state & GDT_POLLING))
1679 crit_exit();
1680 gdt_next(gdt);
1681 break;
1682 }
1683 }
1684
1685 int
1686 gdt_async_event(struct gdt_softc *gdt, int service)
1687 {
1688 struct gdt_ccb *gccb;
1689
1690 GDT_DPRINTF(GDT_D_INTR, ("gdt_async_event(%p, %d)\n", gdt, service));
1691
1692 if (service == GDT_SCREENSERVICE) {
1693 if (gdt->sc_status == GDT_MSG_REQUEST) {
1694 while (gdt->sc_test_busy(gdt))
1695 DELAY(1);
1696 gccb = gdt_get_ccb(gdt);
1697 if (gccb == NULL) {
1698 kprintf("iir%d: No free command index found\n",
1699 gdt->sc_hanum);
1700 return (1);
1701 }
1702 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1703 gccb->gc_service = service;
1704 gccb->gc_flags = GDT_GCF_SCREEN;
1705 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1706 gccb->gc_cmd_index);
1707 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ);
1708 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1709 GDT_MSG_INV_HANDLE);
1710 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1711 gccb->gc_scratch_busbase);
1712 gdt->sc_set_sema0(gdt);
1713 gdt->sc_cmd_off = 0;
1714 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1715 sizeof(u_int32_t));
1716 gdt->sc_cmd_cnt = 0;
1717 gdt->sc_copy_cmd(gdt, gccb);
1718 kprintf("iir%d: [PCI %d/%d] ",
1719 gdt->sc_hanum,gdt->sc_bus,gdt->sc_slot);
1720 gdt->sc_release_event(gdt);
1721 }
1722
1723 } else {
1724 if ((gdt->sc_fw_vers & 0xff) >= 0x1a) {
1725 gdt->sc_dvr.size = 0;
1726 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum;
1727 gdt->sc_dvr.eu.async.status = gdt->sc_status;
1728 /* severity and event_string already set! */
1729 } else {
1730 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.async);
1731 gdt->sc_dvr.eu.async.ionode = gdt->sc_hanum;
1732 gdt->sc_dvr.eu.async.service = service;
1733 gdt->sc_dvr.eu.async.status = gdt->sc_status;
1734 gdt->sc_dvr.eu.async.info = gdt->sc_info;
1735 *(u_int32_t *)gdt->sc_dvr.eu.async.scsi_coord = gdt->sc_info2;
1736 }
1737 gdt_store_event(GDT_ES_ASYNC, service, &gdt->sc_dvr);
1738 kprintf("iir%d: %s\n", gdt->sc_hanum, gdt->sc_dvr.event_string);
1739 }
1740
1741 return (0);
1742 }
1743
1744 int
1745 gdt_sync_event(struct gdt_softc *gdt, int service,
1746 u_int8_t index, struct gdt_ccb *gccb)
1747 {
1748 union ccb *ccb;
1749
1750 GDT_DPRINTF(GDT_D_INTR,
1751 ("gdt_sync_event(%p, %d, %d, %p)\n", gdt,service,index,gccb));
1752
1753 ccb = gccb->gc_ccb;
1754
1755 if (service == GDT_SCREENSERVICE) {
1756 u_int32_t msg_len;
1757
1758 msg_len = gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_LEN);
1759 if (msg_len)
1760 if (!(gccb->gc_scratch[GDT_SCR_MSG_ANSWER] &&
1761 gccb->gc_scratch[GDT_SCR_MSG_EXT])) {
1762 gccb->gc_scratch[GDT_SCR_MSG_TEXT + msg_len] = '\0';
1763 kprintf("%s",&gccb->gc_scratch[GDT_SCR_MSG_TEXT]);
1764 }
1765
1766 if (gccb->gc_scratch[GDT_SCR_MSG_EXT] &&
1767 !gccb->gc_scratch[GDT_SCR_MSG_ANSWER]) {
1768 while (gdt->sc_test_busy(gdt))
1769 DELAY(1);
1770 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1771 gccb = gdt_get_ccb(gdt);
1772 if (gccb == NULL) {
1773 kprintf("iir%d: No free command index found\n",
1774 gdt->sc_hanum);
1775 return (1);
1776 }
1777 gccb->gc_service = service;
1778 gccb->gc_flags = GDT_GCF_SCREEN;
1779 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1780 gccb->gc_cmd_index);
1781 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_READ);
1782 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1783 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]);
1784 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1785 gccb->gc_scratch_busbase);
1786 gdt->sc_set_sema0(gdt);
1787 gdt->sc_cmd_off = 0;
1788 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1789 sizeof(u_int32_t));
1790 gdt->sc_cmd_cnt = 0;
1791 gdt->sc_copy_cmd(gdt, gccb);
1792 gdt->sc_release_event(gdt);
1793 return (0);
1794 }
1795
1796 if (gccb->gc_scratch[GDT_SCR_MSG_ANSWER] &&
1797 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN)) {
1798 /* default answers (getchar() not possible) */
1799 if (gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) == 1) {
1800 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN, 0);
1801 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 1);
1802 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 0;
1803 } else {
1804 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_ALEN,
1805 gdt_dec32(gccb->gc_scratch + GDT_SCR_MSG_ALEN) - 2);
1806 gdt_enc32(gccb->gc_scratch + GDT_SCR_MSG_LEN, 2);
1807 gccb->gc_scratch[GDT_SCR_MSG_TEXT] = 1;
1808 gccb->gc_scratch[GDT_SCR_MSG_TEXT + 1] = 0;
1809 }
1810 gccb->gc_scratch[GDT_SCR_MSG_EXT] = 0;
1811 gccb->gc_scratch[GDT_SCR_MSG_ANSWER] = 0;
1812 while (gdt->sc_test_busy(gdt))
1813 DELAY(1);
1814 bzero(gccb->gc_cmd, GDT_CMD_SZ);
1815 gccb = gdt_get_ccb(gdt);
1816 if (gccb == NULL) {
1817 kprintf("iir%d: No free command index found\n",
1818 gdt->sc_hanum);
1819 return (1);
1820 }
1821 gccb->gc_service = service;
1822 gccb->gc_flags = GDT_GCF_SCREEN;
1823 gdt_enc32(gccb->gc_cmd + GDT_CMD_COMMANDINDEX,
1824 gccb->gc_cmd_index);
1825 gdt_enc16(gccb->gc_cmd + GDT_CMD_OPCODE, GDT_WRITE);
1826 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_HANDLE,
1827 gccb->gc_scratch[GDT_SCR_MSG_HANDLE]);
1828 gdt_enc32(gccb->gc_cmd + GDT_CMD_UNION + GDT_SCREEN_MSG_ADDR,
1829 gccb->gc_scratch_busbase);
1830 gdt->sc_set_sema0(gdt);
1831 gdt->sc_cmd_off = 0;
1832 gccb->gc_cmd_len = roundup(GDT_CMD_UNION + GDT_SCREEN_SZ,
1833 sizeof(u_int32_t));
1834 gdt->sc_cmd_cnt = 0;
1835 gdt->sc_copy_cmd(gdt, gccb);
1836 gdt->sc_release_event(gdt);
1837 return (0);
1838 }
1839 kprintf("\n");
1840 return (0);
1841 } else {
1842 callout_stop(&ccb->ccb_h.timeout_ch);
1843 if (gdt->sc_status == GDT_S_BSY) {
1844 GDT_DPRINTF(GDT_D_DEBUG, ("gdt_sync_event(%p) gccb %p busy\n",
1845 gdt, gccb));
1846 TAILQ_INSERT_HEAD(&gdt->sc_ccb_queue, &ccb->ccb_h, sim_links.tqe);
1847 ++gdt_stat.req_queue_act;
1848 if (gdt_stat.req_queue_act > gdt_stat.req_queue_max)
1849 gdt_stat.req_queue_max = gdt_stat.req_queue_act;
1850 return (2);
1851 }
1852
1853 bus_dmamap_sync(gdt->sc_buffer_dmat, gccb->gc_dmamap,
1854 (ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN ?
1855 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1856 bus_dmamap_unload(gdt->sc_buffer_dmat, gccb->gc_dmamap);
1857
1858 ccb->csio.resid = 0;
1859 if (gdt->sc_status == GDT_S_OK) {
1860 ccb->ccb_h.status |= CAM_REQ_CMP;
1861 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1862 } else {
1863 /* error */
1864 if (gccb->gc_service == GDT_CACHESERVICE) {
1865 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR | CAM_AUTOSNS_VALID;
1866 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1867 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
1868 bzero(&ccb->csio.sense_data, ccb->csio.sense_len);
1869 ccb->csio.sense_data.error_code =
1870 SSD_CURRENT_ERROR | SSD_ERRCODE_VALID;
1871 ccb->csio.sense_data.flags = SSD_KEY_NOT_READY;
1872
1873 gdt->sc_dvr.size = sizeof(gdt->sc_dvr.eu.sync);
1874 gdt->sc_dvr.eu.sync.ionode = gdt->sc_hanum;
1875 gdt->sc_dvr.eu.sync.service = service;
1876 gdt->sc_dvr.eu.sync.status = gdt->sc_status;
1877 gdt->sc_dvr.eu.sync.info = gdt->sc_info;
1878 gdt->sc_dvr.eu.sync.hostdrive = ccb->ccb_h.target_id;
1879 if (gdt->sc_status >= 0x8000)
1880 gdt_store_event(GDT_ES_SYNC, 0, &gdt->sc_dvr);
1881 else
1882 gdt_store_event(GDT_ES_SYNC, service, &gdt->sc_dvr);
1883 } else {
1884 /* raw service */
1885 if (gdt->sc_status != GDT_S_RAW_SCSI || gdt->sc_info >= 0x100) {
1886 ccb->ccb_h.status = CAM_DEV_NOT_THERE;
1887 } else {
1888 ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR|CAM_AUTOSNS_VALID;
1889 ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
1890 ccb->csio.scsi_status = gdt->sc_info;
1891 bcopy(gccb->gc_scratch, &ccb->csio.sense_data,
1892 ccb->csio.sense_len);
1893 }
1894 }
1895 }
1896 --gdt_stat.io_count_act;
1897 xpt_done(ccb);
1898 }
1899 return (0);
1900 }
1901
1902 /* Controller event handling functions */
1903 gdt_evt_str *
1904 gdt_store_event(u_int16_t source, u_int16_t idx, gdt_evt_data *evt)
1905 {
1906 gdt_evt_str *e;
1907 struct timeval tv;
1908
1909 GDT_DPRINTF(GDT_D_MISC, ("gdt_store_event(%d, %d)\n", source, idx));
1910 if (source == 0) /* no source -> no event */
1911 return 0;
1912
1913 if (ebuffer[elastidx].event_source == source &&
1914 ebuffer[elastidx].event_idx == idx &&
1915 ((evt->size != 0 && ebuffer[elastidx].event_data.size != 0 &&
1916 !memcmp((char *)&ebuffer[elastidx].event_data.eu,
1917 (char *)&evt->eu, evt->size)) ||
1918 (evt->size == 0 && ebuffer[elastidx].event_data.size == 0 &&
1919 !strcmp((char *)&ebuffer[elastidx].event_data.event_string,
1920 (char *)&evt->event_string)))) {
1921 e = &ebuffer[elastidx];
1922 getmicrotime(&tv);
1923 e->last_stamp = tv.tv_sec;
1924 ++e->same_count;
1925 } else {
1926 if (ebuffer[elastidx].event_source != 0) { /* entry not free ? */
1927 ++elastidx;
1928 if (elastidx == GDT_MAX_EVENTS)
1929 elastidx = 0;
1930 if (elastidx == eoldidx) { /* reached mark ? */
1931 ++eoldidx;
1932 if (eoldidx == GDT_MAX_EVENTS)
1933 eoldidx = 0;
1934 }
1935 }
1936 e = &ebuffer[elastidx];
1937 e->event_source = source;
1938 e->event_idx = idx;
1939 getmicrotime(&tv);
1940 e->first_stamp = e->last_stamp = tv.tv_sec;
1941 e->same_count = 1;
1942 e->event_data = *evt;
1943 e->application = 0;
1944 }
1945 return e;
1946 }
1947
1948 int
1949 gdt_read_event(int handle, gdt_evt_str *estr)
1950 {
1951 gdt_evt_str *e;
1952 int eindex;
1953
1954 GDT_DPRINTF(GDT_D_MISC, ("gdt_read_event(%d)\n", handle));
1955 crit_enter();
1956 if (handle == -1)
1957 eindex = eoldidx;
1958 else
1959 eindex = handle;
1960 estr->event_source = 0;
1961
1962 if (eindex >= GDT_MAX_EVENTS) {
1963 crit_exit();
1964 return eindex;
1965 }
1966 e = &ebuffer[eindex];
1967 if (e->event_source != 0) {
1968 if (eindex != elastidx) {
1969 if (++eindex == GDT_MAX_EVENTS)
1970 eindex = 0;
1971 } else {
1972 eindex = -1;
1973 }
1974 memcpy(estr, e, sizeof(gdt_evt_str));
1975 }
1976 crit_exit();
1977 return eindex;
1978 }
1979
1980 void
1981 gdt_readapp_event(u_int8_t application, gdt_evt_str *estr)
1982 {
1983 gdt_evt_str *e;
1984 int found = FALSE;
1985 int eindex;
1986
1987 GDT_DPRINTF(GDT_D_MISC, ("gdt_readapp_event(%d)\n", application));
1988 crit_enter();
1989 eindex = eoldidx;
1990 for (;;) {
1991 e = &ebuffer[eindex];
1992 if (e->event_source == 0)
1993 break;
1994 if ((e->application & application) == 0) {
1995 e->application |= application;
1996 found = TRUE;
1997 break;
1998 }
1999 if (eindex == elastidx)
2000 break;
2001 if (++eindex == GDT_MAX_EVENTS)
2002 eindex = 0;
2003 }
2004 if (found)
2005 memcpy(estr, e, sizeof(gdt_evt_str));
2006 else
2007 estr->event_source = 0;
2008 crit_exit();
2009 }
2010
2011 void
2012 gdt_clear_events(void)
2013 {
2014 GDT_DPRINTF(GDT_D_MISC, ("gdt_clear_events\n"));
2015
2016 eoldidx = elastidx = 0;
2017 ebuffer[0].event_source = 0;
2018 }
DragonFly BSD