kernel - AHCI - enable AHCI device initiated power management
[dragonfly.git] / sys / dev / drm / mga_irq.c
blob3014d864689e3a7ea257901ed686efa6e68dccbd
1 /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
2 */
3 /*-
4 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
6 * The Weather Channel (TM) funded Tungsten Graphics to develop the
7 * initial release of the Radeon 8500 driver under the XFree86 license.
8 * This notice must be preserved.
10 * Permission is hereby granted, free of charge, to any person obtaining a
11 * copy of this software and associated documentation files (the "Software"),
12 * to deal in the Software without restriction, including without limitation
13 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
14 * and/or sell copies of the Software, and to permit persons to whom the
15 * Software is furnished to do so, subject to the following conditions:
17 * The above copyright notice and this permission notice (including the next
18 * paragraph) shall be included in all copies or substantial portions of the
19 * Software.
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
24 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
27 * DEALINGS IN THE SOFTWARE.
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Eric Anholt <anholt@FreeBSD.org>
34 #include "dev/drm/drmP.h"
35 #include "dev/drm/drm.h"
36 #include "dev/drm/mga_drm.h"
37 #include "dev/drm/mga_drv.h"
39 u32 mga_get_vblank_counter(struct drm_device *dev, int crtc)
41 const drm_mga_private_t *const dev_priv =
42 (drm_mga_private_t *) dev->dev_private;
44 if (crtc != 0) {
45 return 0;
49 return atomic_read(&dev_priv->vbl_received);
53 irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
55 struct drm_device *dev = (struct drm_device *) arg;
56 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
57 int status;
58 int handled = 0;
60 status = MGA_READ(MGA_STATUS);
62 /* VBLANK interrupt */
63 if (status & MGA_VLINEPEN) {
64 MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
65 atomic_inc(&dev_priv->vbl_received);
66 drm_handle_vblank(dev, 0);
67 handled = 1;
70 /* SOFTRAP interrupt */
71 if (status & MGA_SOFTRAPEN) {
72 const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
73 const u32 prim_end = MGA_READ(MGA_PRIMEND);
76 MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
78 /* In addition to clearing the interrupt-pending bit, we
79 * have to write to MGA_PRIMEND to re-start the DMA operation.
81 if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
82 MGA_WRITE(MGA_PRIMEND, prim_end);
85 atomic_inc(&dev_priv->last_fence_retired);
86 DRM_WAKEUP(&dev_priv->fence_queue);
87 handled = 1;
90 if (handled)
91 return IRQ_HANDLED;
92 return IRQ_NONE;
95 int mga_enable_vblank(struct drm_device *dev, int crtc)
97 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
99 if (crtc != 0) {
100 DRM_ERROR("tried to enable vblank on non-existent crtc %d\n",
101 crtc);
102 return 0;
105 MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
106 return 0;
110 void mga_disable_vblank(struct drm_device *dev, int crtc)
112 if (crtc != 0) {
113 DRM_ERROR("tried to disable vblank on non-existent crtc %d\n",
114 crtc);
117 /* Do *NOT* disable the vertical refresh interrupt. MGA doesn't have
118 * a nice hardware counter that tracks the number of refreshes when
119 * the interrupt is disabled, and the kernel doesn't know the refresh
120 * rate to calculate an estimate.
122 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
125 int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
127 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
128 unsigned int cur_fence;
129 int ret = 0;
131 /* Assume that the user has missed the current sequence number
132 * by about a day rather than she wants to wait for years
133 * using fences.
135 DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
136 (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
137 - *sequence) <= (1 << 23)));
139 if (ret == -ERESTART)
140 DRM_DEBUG("restarting syscall\n");
142 *sequence = cur_fence;
144 return ret;
147 void mga_driver_irq_preinstall(struct drm_device * dev)
149 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
151 /* Disable *all* interrupts */
152 MGA_WRITE(MGA_IEN, 0);
153 /* Clear bits if they're already high */
154 MGA_WRITE(MGA_ICLEAR, ~0);
157 int mga_driver_irq_postinstall(struct drm_device * dev)
159 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
161 DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
163 /* Turn on soft trap interrupt. Vertical blank interrupts are enabled
164 * in mga_enable_vblank.
166 MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
167 return 0;
170 void mga_driver_irq_uninstall(struct drm_device * dev)
172 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
173 if (!dev_priv)
174 return;
176 /* Disable *all* interrupts */
177 MGA_WRITE(MGA_IEN, 0);
179 dev->irq_enabled = 0;