2 * Copyright (c) 2009, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/alc/if_alcvar.h,v 1.1 2009/06/10 02:07:58 yongari Exp $
33 #define ALC_TX_RING_CNT 256
34 #define ALC_TX_RING_ALIGN sizeof(struct tx_desc)
35 #define ALC_RX_RING_CNT 256
36 #define ALC_RX_RING_ALIGN sizeof(struct rx_desc)
37 #define ALC_RX_BUF_ALIGN 4
38 #define ALC_RR_RING_CNT ALC_RX_RING_CNT
39 #define ALC_RR_RING_ALIGN sizeof(struct rx_rdesc)
40 #define ALC_CMB_ALIGN 8
41 #define ALC_SMB_ALIGN 8
43 #define ALC_TSO_MAXSEGSIZE 4096
44 #define ALC_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header))
45 #define ALC_MAXTXSEGS 32
47 #define ALC_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
48 #define ALC_ADDR_HI(x) ((uint64_t) (x) >> 32)
50 #define ALC_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
52 /* Water mark to kick reclaiming Tx buffers. */
53 #define ALC_TX_DESC_HIWAT ((ALC_TX_RING_CNT * 6) / 10)
56 * AR816x controllers support up to 16 messages but this driver
57 * uses single message.
59 #define ALC_MSI_MESSAGES 1
60 #define ALC_MSIX_MESSAGES 1
62 #define ALC_TX_RING_SZ \
63 (sizeof(struct tx_desc) * ALC_TX_RING_CNT)
64 #define ALC_RX_RING_SZ \
65 (sizeof(struct rx_desc) * ALC_RX_RING_CNT)
66 #define ALC_RR_RING_SZ \
67 (sizeof(struct rx_rdesc) * ALC_RR_RING_CNT)
68 #define ALC_CMB_SZ (sizeof(struct cmb))
69 #define ALC_SMB_SZ (sizeof(struct smb))
71 #define ALC_PROC_MIN 16
72 #define ALC_PROC_MAX (ALC_RX_RING_CNT - 1)
73 #define ALC_PROC_DEFAULT (ALC_RX_RING_CNT / 4)
76 * The number of bits reserved for MSS in AR813x/AR815x controllers
77 * are 13 bits. This limits the maximum interface MTU size in TSO
78 * case(8191 + sizeof(struct ip) + sizeof(struct tcphdr)) as upper
79 * stack should not generate TCP segments with MSS greater than the
80 * limit. Also Atheros says that maximum MTU for TSO is 6KB.
82 #define ALC_TSO_MTU (6 * 1024)
87 bus_dmamap_t rx_dmamap
;
88 struct rx_desc
*rx_desc
;
93 bus_dmamap_t tx_dmamap
;
96 struct alc_ring_data
{
97 struct tx_desc
*alc_tx_ring
;
98 bus_addr_t alc_tx_ring_paddr
;
99 struct rx_desc
*alc_rx_ring
;
100 bus_addr_t alc_rx_ring_paddr
;
101 struct rx_rdesc
*alc_rr_ring
;
102 bus_addr_t alc_rr_ring_paddr
;
104 bus_addr_t alc_cmb_paddr
;
106 bus_addr_t alc_smb_paddr
;
109 struct alc_chain_data
{
110 bus_dma_tag_t alc_parent_tag
;
111 bus_dma_tag_t alc_buffer_tag
;
112 bus_dma_tag_t alc_tx_tag
;
113 struct alc_txdesc alc_txdesc
[ALC_TX_RING_CNT
];
114 bus_dma_tag_t alc_rx_tag
;
115 struct alc_rxdesc alc_rxdesc
[ALC_RX_RING_CNT
];
116 bus_dma_tag_t alc_tx_ring_tag
;
117 bus_dmamap_t alc_tx_ring_map
;
118 bus_dma_tag_t alc_rx_ring_tag
;
119 bus_dmamap_t alc_rx_ring_map
;
120 bus_dma_tag_t alc_rr_ring_tag
;
121 bus_dmamap_t alc_rr_ring_map
;
122 bus_dmamap_t alc_rx_sparemap
;
123 bus_dma_tag_t alc_cmb_tag
;
124 bus_dmamap_t alc_cmb_map
;
125 bus_dma_tag_t alc_smb_tag
;
126 bus_dmamap_t alc_smb_map
;
135 struct mbuf
*alc_rxhead
;
136 struct mbuf
*alc_rxtail
;
137 struct mbuf
*alc_rxprev_tail
;
140 struct alc_hw_stats
{
143 uint32_t rx_bcast_frames
;
144 uint32_t rx_mcast_frames
;
145 uint32_t rx_pause_frames
;
146 uint32_t rx_control_frames
;
151 uint32_t rx_fragments
;
153 uint32_t rx_pkts_65_127
;
154 uint32_t rx_pkts_128_255
;
155 uint32_t rx_pkts_256_511
;
156 uint32_t rx_pkts_512_1023
;
157 uint32_t rx_pkts_1024_1518
;
158 uint32_t rx_pkts_1519_max
;
159 uint32_t rx_pkts_truncated
;
160 uint32_t rx_fifo_oflows
;
161 uint32_t rx_rrs_errs
;
162 uint32_t rx_alignerrs
;
163 uint64_t rx_bcast_bytes
;
164 uint64_t rx_mcast_bytes
;
165 uint32_t rx_pkts_filtered
;
168 uint32_t tx_bcast_frames
;
169 uint32_t tx_mcast_frames
;
170 uint32_t tx_pause_frames
;
171 uint32_t tx_excess_defer
;
172 uint32_t tx_control_frames
;
173 uint32_t tx_deferred
;
176 uint32_t tx_pkts_65_127
;
177 uint32_t tx_pkts_128_255
;
178 uint32_t tx_pkts_256_511
;
179 uint32_t tx_pkts_512_1023
;
180 uint32_t tx_pkts_1024_1518
;
181 uint32_t tx_pkts_1519_max
;
182 uint32_t tx_single_colls
;
183 uint32_t tx_multi_colls
;
184 uint32_t tx_late_colls
;
185 uint32_t tx_excess_colls
;
187 uint32_t tx_underrun
;
188 uint32_t tx_desc_underrun
;
190 uint32_t tx_pkts_truncated
;
191 uint64_t tx_bcast_bytes
;
192 uint64_t tx_mcast_bytes
;
198 uint32_t max_framelen
;
203 * Software state per device.
206 struct arpcom arpcom
;
207 struct ifnet
*alc_ifp
; /* points to arpcom.ac_if */
211 struct resource
*alc_res
;
212 bus_space_handle_t alc_res_bhand
;
213 bus_space_tag_t alc_res_btag
;
216 struct resource
*alc_irq
;
218 struct alc_ident
*alc_ident
;
222 uint8_t alc_eaddr
[ETHER_ADDR_LEN
];
223 uint32_t alc_dma_rd_burst
;
224 uint32_t alc_dma_wr_burst
;
229 #define ALC_FLAG_PCIE 0x0001
230 #define ALC_FLAG_PCIX 0x0002
231 #define ALC_FLAG_PM 0x0010
232 #define ALC_FLAG_FASTETHER 0x0020
233 #define ALC_FLAG_JUMBO 0x0040
234 #define ALC_FLAG_CMB_BUG 0x0100
235 #define ALC_FLAG_SMB_BUG 0x0200
236 #define ALC_FLAG_L0S 0x0400
237 #define ALC_FLAG_L1S 0x0800
238 #define ALC_FLAG_APS 0x1000
239 #define ALC_FLAG_AR816X_FAMILY 0x2000
240 #define ALC_FLAG_LINK_WAR 0x4000
241 #define ALC_FLAG_LINK 0x8000
242 #define ALC_FLAG_DETACH 0x10000
243 #define ALC_FLAG_E2X00 0x20000
245 struct callout alc_tick_ch
;
246 struct alc_hw_stats alc_stats
;
247 struct alc_chain_data alc_cdata
;
248 struct alc_ring_data alc_rdata
;
250 int alc_watchdog_timer
;
251 int alc_process_limit
;
257 /* Register access macros. */
258 #define CSR_WRITE_4(sc, reg, val) \
259 bus_space_write_4(sc->alc_res_btag, sc->alc_res_bhand, (reg), (val))
260 #define CSR_READ_4(sc, reg) \
261 bus_space_read_4(sc->alc_res_btag, sc->alc_res_bhand, (reg))
262 #define CSR_WRITE_2(sc, reg, val) \
263 bus_space_write_2(sc->alc_res_btag, sc->alc_res_bhand, (reg), (val))
264 #define CSR_READ_2(sc, reg) \
265 bus_space_read_2(sc->alc_res_btag, sc->alc_res_bhand, (reg))
267 #define ALC_RXCHAIN_RESET(_sc) \
269 (_sc)->alc_cdata.alc_rxhead = NULL; \
270 (_sc)->alc_cdata.alc_rxtail = NULL; \
271 (_sc)->alc_cdata.alc_rxprev_tail = NULL; \
272 (_sc)->alc_cdata.alc_rxlen = 0; \
275 #define ALC_TX_TIMEOUT 5
276 #define ALC_RESET_TIMEOUT 100
277 #define ALC_TIMEOUT 1000
278 #define ALC_PHY_TIMEOUT 1000
280 #endif /* _IF_ALCVAR_H */