1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.154.2.4 2006/06/26 00:31:25 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/ohci.c,v 1.26 2008/05/21 19:56:46 mneumann Exp $ */
5 /* Also, already ported:
6 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
7 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
8 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
9 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
10 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $
11 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $
12 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $
13 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $
14 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $
18 * Copyright (c) 1998 The NetBSD Foundation, Inc.
19 * All rights reserved.
21 * This code is derived from software contributed to The NetBSD Foundation
22 * by Lennart Augustsson (lennart@augustsson.net) at
23 * Carlstedt Research & Technology.
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in the
32 * documentation and/or other materials provided with the distribution.
33 * 3. All advertising materials mentioning features or use of this software
34 * must display the following acknowledgement:
35 * This product includes software developed by the NetBSD
36 * Foundation, Inc. and its contributors.
37 * 4. Neither the name of The NetBSD Foundation nor the names of its
38 * contributors may be used to endorse or promote products derived
39 * from this software without specific prior written permission.
41 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
42 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
43 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
44 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
45 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
46 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
47 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
48 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
49 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
50 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
51 * POSSIBILITY OF SUCH DAMAGE.
55 * USB Open Host Controller driver.
57 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
58 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/malloc.h>
64 #include <sys/kernel.h>
65 #include <sys/endian.h>
66 #include <sys/module.h>
68 #if defined(DIAGNOSTIC) && defined(__i386__)
69 #include <machine/cpu.h>
72 #include <sys/queue.h>
73 #include <sys/sysctl.h>
74 #include <sys/thread2.h>
76 #include <machine/endian.h>
78 #include <bus/usb/usb.h>
79 #include <bus/usb/usbdi.h>
80 #include <bus/usb/usbdivar.h>
81 #include <bus/usb/usb_mem.h>
82 #include <bus/usb/usb_quirks.h>
84 #include <bus/usb/ohcireg.h>
85 #include <bus/usb/ohcivar.h>
87 #define delay(d) DELAY(d)
90 #define DPRINTF(x) if (ohcidebug) kprintf x
91 #define DPRINTFN(n,x) if (ohcidebug>(n)) kprintf x
93 SYSCTL_NODE(_hw_usb
, OID_AUTO
, ohci
, CTLFLAG_RW
, 0, "USB ohci");
94 SYSCTL_INT(_hw_usb_ohci
, OID_AUTO
, debug
, CTLFLAG_RW
,
95 &ohcidebug
, 0, "ohci debug level");
96 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
104 static ohci_soft_ed_t
*ohci_alloc_sed(ohci_softc_t
*);
105 static void ohci_free_sed(ohci_softc_t
*, ohci_soft_ed_t
*);
107 static ohci_soft_td_t
*ohci_alloc_std(ohci_softc_t
*);
108 static void ohci_free_std(ohci_softc_t
*, ohci_soft_td_t
*);
110 static ohci_soft_itd_t
*ohci_alloc_sitd(ohci_softc_t
*);
111 static void ohci_free_sitd(ohci_softc_t
*,ohci_soft_itd_t
*);
114 static void ohci_free_std_chain(ohci_softc_t
*, ohci_soft_td_t
*,
117 static usbd_status
ohci_alloc_std_chain(struct ohci_pipe
*,
118 ohci_softc_t
*, int, int, usbd_xfer_handle
,
119 ohci_soft_td_t
*, ohci_soft_td_t
**);
121 static usbd_status
ohci_open(usbd_pipe_handle
);
122 static void ohci_poll(struct usbd_bus
*);
123 static void ohci_softintr(void *);
124 static void ohci_waitintr(ohci_softc_t
*, usbd_xfer_handle
);
125 static void ohci_add_done(ohci_softc_t
*, ohci_physaddr_t
);
126 static void ohci_rhsc(ohci_softc_t
*, usbd_xfer_handle
);
128 static usbd_status
ohci_device_request(usbd_xfer_handle xfer
);
129 static void ohci_add_ed(ohci_soft_ed_t
*, ohci_soft_ed_t
*);
130 static void ohci_rem_ed(ohci_soft_ed_t
*, ohci_soft_ed_t
*);
131 static void ohci_hash_add_td(ohci_softc_t
*, ohci_soft_td_t
*);
132 static void ohci_hash_rem_td(ohci_softc_t
*, ohci_soft_td_t
*);
133 static ohci_soft_td_t
*ohci_hash_find_td(ohci_softc_t
*, ohci_physaddr_t
);
134 static void ohci_hash_add_itd(ohci_softc_t
*, ohci_soft_itd_t
*);
135 static void ohci_hash_rem_itd(ohci_softc_t
*, ohci_soft_itd_t
*);
136 static ohci_soft_itd_t
*ohci_hash_find_itd(ohci_softc_t
*, ohci_physaddr_t
);
138 static usbd_status
ohci_setup_isoc(usbd_pipe_handle pipe
);
139 static void ohci_device_isoc_enter(usbd_xfer_handle
);
141 static usbd_status
ohci_allocm(struct usbd_bus
*, usb_dma_t
*, u_int32_t
);
142 static void ohci_freem(struct usbd_bus
*, usb_dma_t
*);
144 static usbd_xfer_handle
ohci_allocx(struct usbd_bus
*);
145 static void ohci_freex(struct usbd_bus
*, usbd_xfer_handle
);
147 static usbd_status
ohci_root_ctrl_transfer(usbd_xfer_handle
);
148 static usbd_status
ohci_root_ctrl_start(usbd_xfer_handle
);
149 static void ohci_root_ctrl_abort(usbd_xfer_handle
);
150 static void ohci_root_ctrl_close(usbd_pipe_handle
);
151 static void ohci_root_ctrl_done(usbd_xfer_handle
);
153 static usbd_status
ohci_root_intr_transfer(usbd_xfer_handle
);
154 static usbd_status
ohci_root_intr_start(usbd_xfer_handle
);
155 static void ohci_root_intr_abort(usbd_xfer_handle
);
156 static void ohci_root_intr_close(usbd_pipe_handle
);
157 static void ohci_root_intr_done(usbd_xfer_handle
);
159 static usbd_status
ohci_device_ctrl_transfer(usbd_xfer_handle
);
160 static usbd_status
ohci_device_ctrl_start(usbd_xfer_handle
);
161 static void ohci_device_ctrl_abort(usbd_xfer_handle
);
162 static void ohci_device_ctrl_close(usbd_pipe_handle
);
163 static void ohci_device_ctrl_done(usbd_xfer_handle
);
165 static usbd_status
ohci_device_bulk_transfer(usbd_xfer_handle
);
166 static usbd_status
ohci_device_bulk_start(usbd_xfer_handle
);
167 static void ohci_device_bulk_abort(usbd_xfer_handle
);
168 static void ohci_device_bulk_close(usbd_pipe_handle
);
169 static void ohci_device_bulk_done(usbd_xfer_handle
);
171 static usbd_status
ohci_device_intr_transfer(usbd_xfer_handle
);
172 static usbd_status
ohci_device_intr_start(usbd_xfer_handle
);
173 static void ohci_device_intr_abort(usbd_xfer_handle
);
174 static void ohci_device_intr_close(usbd_pipe_handle
);
175 static void ohci_device_intr_done(usbd_xfer_handle
);
177 static usbd_status
ohci_device_isoc_transfer(usbd_xfer_handle
);
178 static usbd_status
ohci_device_isoc_start(usbd_xfer_handle
);
179 static void ohci_device_isoc_abort(usbd_xfer_handle
);
180 static void ohci_device_isoc_close(usbd_pipe_handle
);
181 static void ohci_device_isoc_done(usbd_xfer_handle
);
183 static usbd_status
ohci_device_setintr(ohci_softc_t
*sc
,
184 struct ohci_pipe
*pipe
, int ival
);
186 static int ohci_str(usb_string_descriptor_t
*, int, const char *);
188 static void ohci_timeout(void *);
189 static void ohci_timeout_task(void *);
190 static void ohci_rhsc_able(ohci_softc_t
*, int);
191 static void ohci_rhsc_enable(void *);
193 static void ohci_close_pipe(usbd_pipe_handle
, ohci_soft_ed_t
*);
194 static void ohci_abort_xfer(usbd_xfer_handle
, usbd_status
);
196 static void ohci_device_clear_toggle(usbd_pipe_handle pipe
);
197 static void ohci_noop(usbd_pipe_handle pipe
);
199 static usbd_status
ohci_controller_init(ohci_softc_t
*sc
);
202 static void ohci_dumpregs(ohci_softc_t
*);
203 static void ohci_dump_tds(ohci_soft_td_t
*);
204 static void ohci_dump_td(ohci_soft_td_t
*);
205 static void ohci_dump_ed(ohci_soft_ed_t
*);
206 static void ohci_dump_itd(ohci_soft_itd_t
*);
207 static void ohci_dump_itds(ohci_soft_itd_t
*);
210 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
211 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
212 #define OWRITE1(sc, r, x) \
213 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
214 #define OWRITE2(sc, r, x) \
215 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
216 #define OWRITE4(sc, r, x) \
217 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
218 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
219 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
220 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
222 /* Reverse the bits in a value 0 .. 31 */
223 static u_int8_t revbits
[OHCI_NO_INTRS
] =
224 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
225 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
226 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
227 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
230 struct usbd_pipe pipe
;
235 ohci_soft_itd_t
*itd
;
237 /* Info needed for different pipe kinds. */
243 ohci_soft_td_t
*setup
, *data
, *stat
;
262 #define OHCI_INTR_ENDPT 1
264 static struct usbd_bus_methods ohci_bus_methods
= {
274 static struct usbd_pipe_methods ohci_root_ctrl_methods
= {
275 ohci_root_ctrl_transfer
,
276 ohci_root_ctrl_start
,
277 ohci_root_ctrl_abort
,
278 ohci_root_ctrl_close
,
283 static struct usbd_pipe_methods ohci_root_intr_methods
= {
284 ohci_root_intr_transfer
,
285 ohci_root_intr_start
,
286 ohci_root_intr_abort
,
287 ohci_root_intr_close
,
292 static struct usbd_pipe_methods ohci_device_ctrl_methods
= {
293 ohci_device_ctrl_transfer
,
294 ohci_device_ctrl_start
,
295 ohci_device_ctrl_abort
,
296 ohci_device_ctrl_close
,
298 ohci_device_ctrl_done
,
301 static struct usbd_pipe_methods ohci_device_intr_methods
= {
302 ohci_device_intr_transfer
,
303 ohci_device_intr_start
,
304 ohci_device_intr_abort
,
305 ohci_device_intr_close
,
306 ohci_device_clear_toggle
,
307 ohci_device_intr_done
,
310 static struct usbd_pipe_methods ohci_device_bulk_methods
= {
311 ohci_device_bulk_transfer
,
312 ohci_device_bulk_start
,
313 ohci_device_bulk_abort
,
314 ohci_device_bulk_close
,
315 ohci_device_clear_toggle
,
316 ohci_device_bulk_done
,
319 static struct usbd_pipe_methods ohci_device_isoc_methods
= {
320 ohci_device_isoc_transfer
,
321 ohci_device_isoc_start
,
322 ohci_device_isoc_abort
,
323 ohci_device_isoc_close
,
325 ohci_device_isoc_done
,
329 ohci_detach(struct ohci_softc
*sc
, int flags
)
335 callout_stop(&sc
->sc_tmo_rhsc
);
337 OWRITE4(sc
, OHCI_INTERRUPT_DISABLE
, OHCI_ALL_INTRS
);
338 OWRITE4(sc
, OHCI_CONTROL
, OHCI_HCFS_RESET
);
340 usb_delay_ms(&sc
->sc_bus
, 300); /* XXX let stray task complete */
342 for (i
= 0; i
< OHCI_NO_EDS
; i
++)
343 ohci_free_sed(sc
, sc
->sc_eds
[i
]);
344 ohci_free_sed(sc
, sc
->sc_isoc_head
);
345 ohci_free_sed(sc
, sc
->sc_bulk_head
);
346 ohci_free_sed(sc
, sc
->sc_ctrl_head
);
347 usb_freemem(&sc
->sc_bus
, &sc
->sc_hccadma
);
353 ohci_alloc_sed(ohci_softc_t
*sc
)
360 if (sc
->sc_freeeds
== NULL
) {
361 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
362 err
= usb_allocmem(&sc
->sc_bus
, OHCI_SED_SIZE
* OHCI_SED_CHUNK
,
363 OHCI_ED_ALIGN
, &dma
);
366 for(i
= 0; i
< OHCI_SED_CHUNK
; i
++) {
367 offs
= i
* OHCI_SED_SIZE
;
368 sed
= KERNADDR(&dma
, offs
);
369 sed
->physaddr
= DMAADDR(&dma
, offs
);
370 sed
->next
= sc
->sc_freeeds
;
371 sc
->sc_freeeds
= sed
;
374 sed
= sc
->sc_freeeds
;
375 sc
->sc_freeeds
= sed
->next
;
376 memset(&sed
->ed
, 0, sizeof(ohci_ed_t
));
382 ohci_free_sed(ohci_softc_t
*sc
, ohci_soft_ed_t
*sed
)
384 sed
->next
= sc
->sc_freeeds
;
385 sc
->sc_freeeds
= sed
;
389 ohci_alloc_std(ohci_softc_t
*sc
)
396 if (sc
->sc_freetds
== NULL
) {
397 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
398 err
= usb_allocmem(&sc
->sc_bus
, OHCI_STD_SIZE
* OHCI_STD_CHUNK
,
399 OHCI_TD_ALIGN
, &dma
);
403 for(i
= 0; i
< OHCI_STD_CHUNK
; i
++) {
404 offs
= i
* OHCI_STD_SIZE
;
405 std
= KERNADDR(&dma
, offs
);
406 std
->physaddr
= DMAADDR(&dma
, offs
);
407 std
->nexttd
= sc
->sc_freetds
;
408 sc
->sc_freetds
= std
;
414 std
= sc
->sc_freetds
;
415 sc
->sc_freetds
= std
->nexttd
;
416 memset(&std
->td
, 0, sizeof(ohci_td_t
));
419 ohci_hash_add_td(sc
, std
);
426 ohci_free_std(ohci_softc_t
*sc
, ohci_soft_td_t
*std
)
429 ohci_hash_rem_td(sc
, std
);
430 std
->nexttd
= sc
->sc_freetds
;
431 sc
->sc_freetds
= std
;
436 ohci_alloc_std_chain(struct ohci_pipe
*opipe
, ohci_softc_t
*sc
,
437 int alen
, int rd
, usbd_xfer_handle xfer
,
438 ohci_soft_td_t
*sp
, ohci_soft_td_t
**ep
)
440 ohci_soft_td_t
*next
, *cur
;
441 ohci_physaddr_t dataphys
;
445 usb_dma_t
*dma
= &xfer
->dmabuf
;
446 u_int16_t flags
= xfer
->flags
;
448 DPRINTFN(alen
< 4096,("ohci_alloc_std_chain: start len=%d\n", alen
));
454 (rd
? OHCI_TD_IN
: OHCI_TD_OUT
) |
455 (flags
& USBD_SHORT_XFER_OK
? OHCI_TD_R
: 0) |
456 OHCI_TD_NOCC
| OHCI_TD_TOGGLE_CARRY
| OHCI_TD_SET_DI(6));
459 next
= ohci_alloc_std(sc
);
463 dataphys
= DMAADDR(dma
, offset
);
466 * The OHCI hardware can handle at most one 4k crossing.
467 * XXX - currently we only allocate contigous buffers, but
468 * the OHCI spec says: If during the data transfer the buffer
469 * address contained in the HC's working copy of
470 * CurrentBufferPointer crosses a 4K boundary, the upper 20
471 * bits of Buffer End are copied to the working value of
472 * CurrentBufferPointer causing the next buffer address to
473 * be the 0th byte in the same 4K page that contains the
474 * last byte of the buffer (the 4K boundary crossing may
475 * occur within a data packet transfer.)
477 * If/when dma has multiple segments, this will need to
478 * properly handle fragmenting TD's.
480 * Note that if we are gathering data from multiple SMALL
481 * segments, e.g. mbufs, we need to do special gymnastics,
482 * e.g. bounce buffering or data aggregation,
483 * BEFORE WE GET HERE because a bulk USB transfer must
484 * consist of maximally sized packets right up to the end.
485 * A shorter than maximal packet means that it is the end
486 * of the transfer. If the data transfer length is a
487 * multiple of the packet size, then a 0 byte
488 * packet will be the signal of the end of transfer.
489 * Since packets can't cross TDs this means that
490 * each TD except the last one must cover an exact multiple
491 * of the maximal packet length.
493 if (OHCI_PAGE_OFFSET(dataphys
) + len
<= (2 * OHCI_PAGE_SIZE
)) {
494 /* We can handle all that remains in this TD */
497 /* must use multiple TDs, fill as much as possible. */
498 curlen
= 2 * OHCI_PAGE_SIZE
-
499 OHCI_PAGE_OFFSET(dataphys
);
500 /* the length must be a multiple of the max size */
502 UGETW(opipe
->pipe
.endpoint
->edesc
->wMaxPacketSize
);
503 KASSERT((curlen
!= 0), ("ohci_alloc_std: curlen == 0"));
505 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
506 "len=%d curlen=%d\n",
507 dataphys
, len
, curlen
));
510 cur
->td
.td_flags
= tdflags
;
511 cur
->td
.td_cbp
= htole32(dataphys
);
513 cur
->td
.td_nexttd
= htole32(next
->physaddr
);
514 cur
->td
.td_be
= htole32(DMAADDR(dma
, offset
+ curlen
- 1));
516 cur
->flags
= OHCI_ADD_LEN
;
518 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
519 dataphys
, dataphys
+ curlen
- 1));
523 panic("Length went negative: %d curlen %d dma %p offset %08x", len
, curlen
, dma
, (int)0);
525 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
529 if ((flags
& USBD_FORCE_SHORT_XFER
) &&
530 alen
% UGETW(opipe
->pipe
.endpoint
->edesc
->wMaxPacketSize
) == 0) {
531 /* Force a 0 length transfer at the end. */
535 next
= ohci_alloc_std(sc
);
539 cur
->td
.td_flags
= tdflags
;
540 cur
->td
.td_cbp
= 0; /* indicate 0 length packet */
542 cur
->td
.td_nexttd
= htole32(next
->physaddr
);
547 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
551 return (USBD_NORMAL_COMPLETION
);
560 ohci_free_std_chain(ohci_softc_t
*sc
, ohci_soft_td_t
*std
,
561 ohci_soft_td_t
*stdend
)
565 for (; std
!= stdend
; std
= p
) {
567 ohci_free_std(sc
, std
);
573 ohci_alloc_sitd(ohci_softc_t
*sc
)
575 ohci_soft_itd_t
*sitd
;
581 if (sc
->sc_freeitds
== NULL
) {
582 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
584 err
= usb_allocmem(&sc
->sc_bus
,
585 OHCI_SITD_SIZE
* OHCI_SITD_CHUNK
,
586 OHCI_ITD_ALIGN
, &dma
);
590 for (i
= 0; i
< OHCI_SITD_CHUNK
; i
++) {
591 offs
= i
* OHCI_SITD_SIZE
;
592 sitd
= KERNADDR(&dma
, offs
);
593 sitd
->physaddr
= DMAADDR(&dma
, offs
);
594 sitd
->nextitd
= sc
->sc_freeitds
;
595 sc
->sc_freeitds
= sitd
;
598 sitd
= sc
->sc_freeitds
;
599 sc
->sc_freeitds
= sitd
->nextitd
;
600 memset(&sitd
->itd
, 0, sizeof(ohci_itd_t
));
601 sitd
->nextitd
= NULL
;
603 ohci_hash_add_itd(sc
, sitd
);
614 ohci_free_sitd(ohci_softc_t
*sc
, ohci_soft_itd_t
*sitd
)
616 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd
));
620 panic("ohci_free_sitd: sitd=%p not done", sitd
);
623 /* Warn double free */
628 ohci_hash_rem_itd(sc
, sitd
);
629 sitd
->nextitd
= sc
->sc_freeitds
;
630 sc
->sc_freeitds
= sitd
;
635 ohci_init(ohci_softc_t
*sc
)
637 ohci_soft_ed_t
*sed
, *psed
;
642 DPRINTF(("ohci_init: start\n"));
643 device_printf(sc
->sc_bus
.bdev
, "");
644 rev
= OREAD4(sc
, OHCI_REVISION
);
645 kprintf("OHCI version %d.%d%s\n", OHCI_REV_HI(rev
), OHCI_REV_LO(rev
),
646 OHCI_REV_LEGACY(rev
) ? ", legacy support" : "");
648 if (OHCI_REV_HI(rev
) != 1 || OHCI_REV_LO(rev
) != 0) {
649 device_printf(sc
->sc_bus
.bdev
, "unsupported OHCI revision\n");
650 sc
->sc_bus
.usbrev
= USBREV_UNKNOWN
;
653 sc
->sc_bus
.usbrev
= USBREV_1_0
;
655 for (i
= 0; i
< OHCI_HASH_SIZE
; i
++)
656 LIST_INIT(&sc
->sc_hash_tds
[i
]);
657 for (i
= 0; i
< OHCI_HASH_SIZE
; i
++)
658 LIST_INIT(&sc
->sc_hash_itds
[i
]);
660 STAILQ_INIT(&sc
->sc_free_xfers
);
662 /* XXX determine alignment by R/W */
663 /* Allocate the HCCA area. */
664 err
= usb_allocmem(&sc
->sc_bus
, OHCI_HCCA_SIZE
,
665 OHCI_HCCA_ALIGN
, &sc
->sc_hccadma
);
668 sc
->sc_hcca
= KERNADDR(&sc
->sc_hccadma
, 0);
669 memset(sc
->sc_hcca
, 0, OHCI_HCCA_SIZE
);
671 sc
->sc_eintrs
= OHCI_NORMAL_INTRS
;
673 /* Allocate dummy ED that starts the control list. */
674 sc
->sc_ctrl_head
= ohci_alloc_sed(sc
);
675 if (sc
->sc_ctrl_head
== NULL
) {
679 sc
->sc_ctrl_head
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
);
681 /* Allocate dummy ED that starts the bulk list. */
682 sc
->sc_bulk_head
= ohci_alloc_sed(sc
);
683 if (sc
->sc_bulk_head
== NULL
) {
687 sc
->sc_bulk_head
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
);
689 /* Allocate dummy ED that starts the isochronous list. */
690 sc
->sc_isoc_head
= ohci_alloc_sed(sc
);
691 if (sc
->sc_isoc_head
== NULL
) {
695 sc
->sc_isoc_head
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
);
697 /* Allocate all the dummy EDs that make up the interrupt tree. */
698 for (i
= 0; i
< OHCI_NO_EDS
; i
++) {
699 sed
= ohci_alloc_sed(sc
);
702 ohci_free_sed(sc
, sc
->sc_eds
[i
]);
706 /* All ED fields are set to 0. */
708 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
);
710 psed
= sc
->sc_eds
[(i
-1) / 2];
712 psed
= sc
->sc_isoc_head
;
714 sed
->ed
.ed_nexted
= htole32(psed
->physaddr
);
717 * Fill HCCA interrupt table. The bit reversal is to get
718 * the tree set up properly to spread the interrupts.
720 for (i
= 0; i
< OHCI_NO_INTRS
; i
++)
721 sc
->sc_hcca
->hcca_interrupt_table
[revbits
[i
]] =
722 htole32(sc
->sc_eds
[OHCI_NO_EDS
-OHCI_NO_INTRS
+i
]->physaddr
);
725 if (ohcidebug
> 15) {
726 for (i
= 0; i
< OHCI_NO_EDS
; i
++) {
727 kprintf("ed#%d ", i
);
728 ohci_dump_ed(sc
->sc_eds
[i
]);
731 ohci_dump_ed(sc
->sc_isoc_head
);
735 err
= ohci_controller_init(sc
);
736 if (err
!= USBD_NORMAL_COMPLETION
)
739 /* Set up the bus struct. */
740 sc
->sc_bus
.methods
= &ohci_bus_methods
;
741 sc
->sc_bus
.pipe_size
= sizeof(struct ohci_pipe
);
743 callout_init(&sc
->sc_tmo_rhsc
);
745 return (USBD_NORMAL_COMPLETION
);
748 for (i
= 0; i
< OHCI_NO_EDS
; i
++)
749 ohci_free_sed(sc
, sc
->sc_eds
[i
]);
751 ohci_free_sed(sc
, sc
->sc_isoc_head
);
753 ohci_free_sed(sc
, sc
->sc_bulk_head
);
755 ohci_free_sed(sc
, sc
->sc_ctrl_head
);
757 usb_freemem(&sc
->sc_bus
, &sc
->sc_hccadma
);
762 ohci_controller_init(ohci_softc_t
*sc
)
765 u_int32_t s
, ctl
, ival
, hcr
, fm
, per
, desca
;
767 /* Determine in what context we are running. */
768 ctl
= OREAD4(sc
, OHCI_CONTROL
);
770 /* SMM active, request change */
771 DPRINTF(("ohci_init: SMM active, request owner change\n"));
772 s
= OREAD4(sc
, OHCI_COMMAND_STATUS
);
773 OWRITE4(sc
, OHCI_COMMAND_STATUS
, s
| OHCI_OCR
);
774 for (i
= 0; i
< 100 && (ctl
& OHCI_IR
); i
++) {
775 usb_delay_ms(&sc
->sc_bus
, 1);
776 ctl
= OREAD4(sc
, OHCI_CONTROL
);
778 if ((ctl
& OHCI_IR
) == 0) {
779 device_printf(sc
->sc_bus
.bdev
,
780 "SMM does not respond, resetting\n");
781 OWRITE4(sc
, OHCI_CONTROL
, OHCI_HCFS_RESET
);
785 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
786 } else if ((ctl
& OHCI_HCFS_MASK
) != OHCI_HCFS_RESET
) {
787 /* BIOS started controller. */
788 DPRINTF(("ohci_init: BIOS active\n"));
789 if ((ctl
& OHCI_HCFS_MASK
) != OHCI_HCFS_OPERATIONAL
) {
790 OWRITE4(sc
, OHCI_CONTROL
, OHCI_HCFS_OPERATIONAL
);
791 usb_delay_ms(&sc
->sc_bus
, USB_RESUME_DELAY
);
795 DPRINTF(("ohci_init: cold started\n"));
797 /* Controller was cold started. */
798 usb_delay_ms(&sc
->sc_bus
, USB_BUS_RESET_DELAY
);
802 * This reset should not be necessary according to the OHCI spec, but
803 * without it some controllers do not start.
805 DPRINTF(("%s: resetting\n", device_get_nameunit(sc
->sc_bus
.bdev
)));
806 OWRITE4(sc
, OHCI_CONTROL
, OHCI_HCFS_RESET
);
807 usb_delay_ms(&sc
->sc_bus
, USB_BUS_RESET_DELAY
);
809 /* We now own the host controller and the bus has been reset. */
810 ival
= OHCI_GET_IVAL(OREAD4(sc
, OHCI_FM_INTERVAL
));
812 OWRITE4(sc
, OHCI_COMMAND_STATUS
, OHCI_HCR
); /* Reset HC */
813 /* Nominal time for a reset is 10 us. */
814 for (i
= 0; i
< 10; i
++) {
816 hcr
= OREAD4(sc
, OHCI_COMMAND_STATUS
) & OHCI_HCR
;
821 device_printf(sc
->sc_bus
.bdev
, "reset timeout\n");
822 return (USBD_IOERROR
);
829 /* The controller is now in SUSPEND state, we have 2ms to finish. */
831 /* Set up HC registers. */
832 OWRITE4(sc
, OHCI_HCCA
, DMAADDR(&sc
->sc_hccadma
, 0));
833 OWRITE4(sc
, OHCI_CONTROL_HEAD_ED
, sc
->sc_ctrl_head
->physaddr
);
834 OWRITE4(sc
, OHCI_BULK_HEAD_ED
, sc
->sc_bulk_head
->physaddr
);
835 /* disable all interrupts and then switch on all desired interrupts */
836 OWRITE4(sc
, OHCI_INTERRUPT_DISABLE
, OHCI_ALL_INTRS
);
837 OWRITE4(sc
, OHCI_INTERRUPT_ENABLE
, sc
->sc_eintrs
| OHCI_MIE
);
838 /* switch on desired functional features */
839 ctl
= OREAD4(sc
, OHCI_CONTROL
);
840 ctl
&= ~(OHCI_CBSR_MASK
| OHCI_LES
| OHCI_HCFS_MASK
| OHCI_IR
);
841 ctl
|= OHCI_PLE
| OHCI_IE
| OHCI_CLE
| OHCI_BLE
|
842 OHCI_RATIO_1_4
| OHCI_HCFS_OPERATIONAL
;
843 /* And finally start it! */
844 OWRITE4(sc
, OHCI_CONTROL
, ctl
);
847 * The controller is now OPERATIONAL. Set a some final
848 * registers that should be set earlier, but that the
849 * controller ignores when in the SUSPEND state.
851 fm
= (OREAD4(sc
, OHCI_FM_INTERVAL
) & OHCI_FIT
) ^ OHCI_FIT
;
852 fm
|= OHCI_FSMPS(ival
) | ival
;
853 OWRITE4(sc
, OHCI_FM_INTERVAL
, fm
);
854 per
= OHCI_PERIODIC(ival
); /* 90% periodic */
855 OWRITE4(sc
, OHCI_PERIODIC_START
, per
);
857 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
858 desca
= OREAD4(sc
, OHCI_RH_DESCRIPTOR_A
);
859 OWRITE4(sc
, OHCI_RH_DESCRIPTOR_A
, desca
| OHCI_NOCP
);
860 OWRITE4(sc
, OHCI_RH_STATUS
, OHCI_LPSC
); /* Enable port power */
861 usb_delay_ms(&sc
->sc_bus
, OHCI_ENABLE_POWER_DELAY
);
862 OWRITE4(sc
, OHCI_RH_DESCRIPTOR_A
, desca
);
865 * The AMD756 requires a delay before re-reading the register,
866 * otherwise it will occasionally report 0 ports.
869 for (i
= 0; i
< 10 && sc
->sc_noport
== 0; i
++) {
870 usb_delay_ms(&sc
->sc_bus
, OHCI_READ_DESC_DELAY
);
871 sc
->sc_noport
= OHCI_GET_NDP(OREAD4(sc
, OHCI_RH_DESCRIPTOR_A
));
878 return (USBD_NORMAL_COMPLETION
);
882 ohci_allocm(struct usbd_bus
*bus
, usb_dma_t
*dma
, u_int32_t size
)
884 return (usb_allocmem(bus
, size
, 0, dma
));
888 ohci_freem(struct usbd_bus
*bus
, usb_dma_t
*dma
)
890 usb_freemem(bus
, dma
);
894 ohci_allocx(struct usbd_bus
*bus
)
896 struct ohci_softc
*sc
= (struct ohci_softc
*)bus
;
897 usbd_xfer_handle xfer
;
899 xfer
= STAILQ_FIRST(&sc
->sc_free_xfers
);
901 STAILQ_REMOVE_HEAD(&sc
->sc_free_xfers
, next
);
903 if (xfer
->busy_free
!= XFER_FREE
) {
904 kprintf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer
,
909 xfer
= kmalloc(sizeof(struct ohci_xfer
), M_USB
, M_INTWAIT
);
912 memset(xfer
, 0, sizeof (struct ohci_xfer
));
913 usb_init_task(&OXFER(xfer
)->abort_task
, ohci_timeout_task
,
915 OXFER(xfer
)->ohci_xfer_flags
= 0;
917 xfer
->busy_free
= XFER_BUSY
;
924 ohci_freex(struct usbd_bus
*bus
, usbd_xfer_handle xfer
)
926 struct ohci_softc
*sc
= (struct ohci_softc
*)bus
;
927 struct ohci_xfer
*oxfer
= (struct ohci_xfer
*)xfer
;
928 ohci_soft_itd_t
*sitd
;
930 if (oxfer
->ohci_xfer_flags
& OHCI_ISOC_DIRTY
) {
932 for (sitd
= xfer
->hcpriv
; sitd
!= NULL
&& sitd
->xfer
== xfer
;
933 sitd
= sitd
->nextitd
)
934 ohci_free_sitd(sc
, sitd
);
939 if (xfer
->busy_free
!= XFER_BUSY
) {
940 kprintf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer
,
944 xfer
->busy_free
= XFER_FREE
;
946 STAILQ_INSERT_HEAD(&sc
->sc_free_xfers
, xfer
, next
);
950 * Shut down the controller when the system is going down.
953 ohci_shutdown(void *v
)
955 ohci_softc_t
*sc
= v
;
957 DPRINTF(("ohci_shutdown: stopping the HC\n"));
958 OWRITE4(sc
, OHCI_CONTROL
, OHCI_HCFS_RESET
);
962 * Handle suspend/resume.
964 * We need to switch to polling mode here, because this routine is
965 * called from an intterupt context. This is all right since we
966 * are almost suspended anyway.
969 ohci_power(int why
, void *v
)
971 ohci_softc_t
*sc
= v
;
975 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc
, why
));
980 if (why
!= PWR_RESUME
) {
981 sc
->sc_bus
.use_polling
++;
982 ctl
= OREAD4(sc
, OHCI_CONTROL
) & ~OHCI_HCFS_MASK
;
983 if (sc
->sc_control
== 0) {
985 * Preserve register values, in case that APM BIOS
986 * does not recover them.
988 sc
->sc_control
= ctl
;
989 sc
->sc_intre
= OREAD4(sc
, OHCI_INTERRUPT_ENABLE
);
991 ctl
|= OHCI_HCFS_SUSPEND
;
992 OWRITE4(sc
, OHCI_CONTROL
, ctl
);
993 usb_delay_ms(&sc
->sc_bus
, USB_RESUME_WAIT
);
994 sc
->sc_bus
.use_polling
--;
996 sc
->sc_bus
.use_polling
++;
998 /* Some broken BIOSes never initialize Controller chip */
999 ohci_controller_init(sc
);
1002 OWRITE4(sc
, OHCI_INTERRUPT_ENABLE
,
1003 sc
->sc_intre
& (OHCI_ALL_INTRS
| OHCI_MIE
));
1005 ctl
= sc
->sc_control
;
1007 ctl
= OREAD4(sc
, OHCI_CONTROL
);
1008 ctl
|= OHCI_HCFS_RESUME
;
1009 OWRITE4(sc
, OHCI_CONTROL
, ctl
);
1010 usb_delay_ms(&sc
->sc_bus
, USB_RESUME_DELAY
);
1011 ctl
= (ctl
& ~OHCI_HCFS_MASK
) | OHCI_HCFS_OPERATIONAL
;
1012 OWRITE4(sc
, OHCI_CONTROL
, ctl
);
1013 usb_delay_ms(&sc
->sc_bus
, USB_RESUME_RECOVERY
);
1014 sc
->sc_control
= sc
->sc_intre
= 0;
1015 sc
->sc_bus
.use_polling
--;
1022 ohci_dumpregs(ohci_softc_t
*sc
)
1024 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1025 OREAD4(sc
, OHCI_REVISION
),
1026 OREAD4(sc
, OHCI_CONTROL
),
1027 OREAD4(sc
, OHCI_COMMAND_STATUS
)));
1028 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1029 OREAD4(sc
, OHCI_INTERRUPT_STATUS
),
1030 OREAD4(sc
, OHCI_INTERRUPT_ENABLE
),
1031 OREAD4(sc
, OHCI_INTERRUPT_DISABLE
)));
1032 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1033 OREAD4(sc
, OHCI_HCCA
),
1034 OREAD4(sc
, OHCI_PERIOD_CURRENT_ED
),
1035 OREAD4(sc
, OHCI_CONTROL_HEAD_ED
)));
1036 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1037 OREAD4(sc
, OHCI_CONTROL_CURRENT_ED
),
1038 OREAD4(sc
, OHCI_BULK_HEAD_ED
),
1039 OREAD4(sc
, OHCI_BULK_CURRENT_ED
)));
1040 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1041 OREAD4(sc
, OHCI_DONE_HEAD
),
1042 OREAD4(sc
, OHCI_FM_INTERVAL
),
1043 OREAD4(sc
, OHCI_FM_REMAINING
)));
1044 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1045 OREAD4(sc
, OHCI_FM_NUMBER
),
1046 OREAD4(sc
, OHCI_PERIODIC_START
),
1047 OREAD4(sc
, OHCI_LS_THRESHOLD
)));
1048 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1049 OREAD4(sc
, OHCI_RH_DESCRIPTOR_A
),
1050 OREAD4(sc
, OHCI_RH_DESCRIPTOR_B
),
1051 OREAD4(sc
, OHCI_RH_STATUS
)));
1052 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1053 OREAD4(sc
, OHCI_RH_PORT_STATUS(1)),
1054 OREAD4(sc
, OHCI_RH_PORT_STATUS(2))));
1055 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1056 le32toh(sc
->sc_hcca
->hcca_frame_number
),
1057 le32toh(sc
->sc_hcca
->hcca_done_head
)));
1061 static int ohci_intr1(ohci_softc_t
*);
1066 ohci_softc_t
*sc
= p
;
1068 if (sc
->sc_dying
|| (sc
->sc_flags
& OHCI_SCFLG_DONEINIT
) == 0)
1071 /* If we get an interrupt while polling, then just ignore it. */
1072 if (sc
->sc_bus
.use_polling
) {
1074 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1079 return (ohci_intr1(sc
));
1083 ohci_intr1(ohci_softc_t
*sc
)
1085 u_int32_t intrs
, eintrs
;
1086 ohci_physaddr_t done
;
1088 DPRINTFN(14,("ohci_intr1: enter\n"));
1090 /* In case the interrupt occurs before initialization has completed. */
1091 if (sc
->sc_hcca
== NULL
) {
1093 kprintf("ohci_intr: sc->sc_hcca == NULL\n");
1099 done
= le32toh(sc
->sc_hcca
->hcca_done_head
);
1101 /* The LSb of done is used to inform the HC Driver that an interrupt
1102 * condition exists for both the Done list and for another event
1103 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1104 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1105 * interrupt was caused by other than the HccaDoneHead update and the
1106 * HcInterruptStatus register needs to be accessed to determine that
1107 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1108 * update interrupt is indicated and if the LSb of done is nonzero,
1109 * then an additional interrupt event is indicated and
1110 * HcInterruptStatus should be checked to determine its cause.
1113 if (done
& ~OHCI_DONE_INTRS
)
1115 if (done
& OHCI_DONE_INTRS
) {
1116 intrs
|= OREAD4(sc
, OHCI_INTERRUPT_STATUS
);
1117 done
&= ~OHCI_DONE_INTRS
;
1119 sc
->sc_hcca
->hcca_done_head
= 0;
1121 intrs
= OREAD4(sc
, OHCI_INTERRUPT_STATUS
) & ~OHCI_WDH
;
1123 if (intrs
== 0) /* nothing to be done (PCI shared interrupt) */
1127 OWRITE4(sc
, OHCI_INTERRUPT_STATUS
, intrs
); /* Acknowledge */
1128 eintrs
= intrs
& sc
->sc_eintrs
;
1132 sc
->sc_bus
.intr_context
++;
1133 sc
->sc_bus
.no_intrs
++;
1134 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1135 sc
, (u_int
)intrs
, OREAD4(sc
, OHCI_INTERRUPT_STATUS
),
1138 if (eintrs
& OHCI_SO
) {
1139 sc
->sc_overrun_cnt
++;
1140 if (usbd_ratecheck(&sc
->sc_overrun_ntc
)) {
1141 device_printf(sc
->sc_bus
.bdev
,
1142 "%u scheduling overruns\n", sc
->sc_overrun_cnt
);
1143 sc
->sc_overrun_cnt
= 0;
1148 if (eintrs
& OHCI_WDH
) {
1149 ohci_add_done(sc
, done
&~ OHCI_DONE_INTRS
);
1150 usb_schedsoftintr(&sc
->sc_bus
);
1151 eintrs
&= ~OHCI_WDH
;
1153 if (eintrs
& OHCI_RD
) {
1154 device_printf(sc
->sc_bus
.bdev
, "resume detect\n");
1155 /* XXX process resume detect */
1157 if (eintrs
& OHCI_UE
) {
1158 device_printf(sc
->sc_bus
.bdev
,
1159 "unrecoverable error, controller halted\n");
1160 OWRITE4(sc
, OHCI_CONTROL
, OHCI_HCFS_RESET
);
1163 if (eintrs
& OHCI_RHSC
) {
1164 ohci_rhsc(sc
, sc
->sc_intrxfer
);
1166 * Disable RHSC interrupt for now, because it will be
1167 * on until the port has been reset.
1169 ohci_rhsc_able(sc
, 0);
1170 /* Do not allow RHSC interrupts > 1 per second */
1171 callout_reset(&sc
->sc_tmo_rhsc
, hz
, ohci_rhsc_enable
, sc
);
1172 eintrs
&= ~OHCI_RHSC
;
1175 sc
->sc_bus
.intr_context
--;
1178 /* Block unprocessed interrupts. XXX */
1179 OWRITE4(sc
, OHCI_INTERRUPT_DISABLE
, eintrs
);
1180 sc
->sc_eintrs
&= ~eintrs
;
1181 device_printf(sc
->sc_bus
.bdev
,
1182 "blocking intrs 0x%x\n", eintrs
);
1189 ohci_rhsc_able(ohci_softc_t
*sc
, int on
)
1191 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on
));
1193 sc
->sc_eintrs
|= OHCI_RHSC
;
1194 OWRITE4(sc
, OHCI_INTERRUPT_ENABLE
, OHCI_RHSC
);
1196 sc
->sc_eintrs
&= ~OHCI_RHSC
;
1197 OWRITE4(sc
, OHCI_INTERRUPT_DISABLE
, OHCI_RHSC
);
1202 ohci_rhsc_enable(void *v_sc
)
1204 ohci_softc_t
*sc
= v_sc
;
1207 ohci_rhsc_able(sc
, 1);
1212 char *ohci_cc_strs
[] = {
1216 "DATA_TOGGLE_MISMATCH",
1218 "DEVICE_NOT_RESPONDING",
1219 "PID_CHECK_FAILURE",
1233 ohci_add_done(ohci_softc_t
*sc
, ohci_physaddr_t done
)
1235 ohci_soft_itd_t
*sitd
, *sidone
, **ip
;
1236 ohci_soft_td_t
*std
, *sdone
, **p
;
1238 /* Reverse the done list. */
1239 for (sdone
= NULL
, sidone
= NULL
; done
!= 0; ) {
1240 std
= ohci_hash_find_td(sc
, done
);
1243 done
= le32toh(std
->td
.td_nexttd
);
1245 DPRINTFN(10,("add TD %p\n", std
));
1248 sitd
= ohci_hash_find_itd(sc
, done
);
1250 sitd
->dnext
= sidone
;
1251 done
= le32toh(sitd
->itd
.itd_nextitd
);
1253 DPRINTFN(5,("add ITD %p\n", sitd
));
1256 panic("ohci_add_done: addr 0x%08lx not found", (u_long
)done
);
1259 /* sdone & sidone now hold the done lists. */
1260 /* Put them on the already processed lists. */
1261 for (p
= &sc
->sc_sdone
; *p
!= NULL
; p
= &(*p
)->dnext
)
1264 for (ip
= &sc
->sc_sidone
; *ip
!= NULL
; ip
= &(*ip
)->dnext
)
1270 ohci_softintr(void *v
)
1272 ohci_softc_t
*sc
= v
;
1273 ohci_soft_itd_t
*sitd
, *sidone
, *sitdnext
;
1274 ohci_soft_td_t
*std
, *sdone
, *stdnext
, *p
, *n
;
1275 usbd_xfer_handle xfer
;
1276 struct ohci_pipe
*opipe
;
1280 DPRINTFN(10,("ohci_softintr: enter\n"));
1282 sc
->sc_bus
.intr_context
++;
1285 sdone
= sc
->sc_sdone
;
1286 sc
->sc_sdone
= NULL
;
1287 sidone
= sc
->sc_sidone
;
1288 sc
->sc_sidone
= NULL
;
1291 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone
, sidone
));
1294 if (ohcidebug
> 10) {
1295 DPRINTF(("ohci_process_done: TD done:\n"));
1296 ohci_dump_tds(sdone
);
1300 for (std
= sdone
; std
; std
= stdnext
) {
1302 stdnext
= std
->dnext
;
1303 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1304 std
, xfer
, (xfer
? xfer
->hcpriv
: NULL
)));
1307 * xfer == NULL: There seems to be no xfer associated
1308 * with this TD. It is tailp that happened to end up on
1313 if (xfer
->status
== USBD_CANCELLED
||
1314 xfer
->status
== USBD_TIMEOUT
) {
1315 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1317 /* Handled by abort routine. */
1322 if (std
->td
.td_cbp
!= 0)
1323 len
-= le32toh(std
->td
.td_be
) -
1324 le32toh(std
->td
.td_cbp
) + 1;
1325 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len
,
1327 if (std
->flags
& OHCI_ADD_LEN
)
1328 xfer
->actlen
+= len
;
1330 cc
= OHCI_TD_GET_CC(le32toh(std
->td
.td_flags
));
1331 if (cc
!= OHCI_CC_NO_ERROR
) {
1333 * Endpoint is halted. First unlink all the TDs
1334 * belonging to the failed transfer, and then restart
1337 opipe
= (struct ohci_pipe
*)xfer
->pipe
;
1339 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1340 OHCI_TD_GET_CC(le32toh(std
->td
.td_flags
)),
1341 ohci_cc_strs
[OHCI_TD_GET_CC(le32toh(std
->td
.td_flags
))]));
1342 callout_stop(&xfer
->timeout_handle
);
1343 usb_rem_task(OXFER(xfer
)->xfer
.pipe
->device
,
1344 &OXFER(xfer
)->abort_task
);
1346 /* Remove all this xfer's TDs from the done queue. */
1347 for (p
= std
; p
->dnext
!= NULL
; p
= p
->dnext
) {
1348 if (p
->dnext
->xfer
!= xfer
)
1350 p
->dnext
= p
->dnext
->dnext
;
1352 /* The next TD may have been removed. */
1353 stdnext
= std
->dnext
;
1355 /* Remove all TDs belonging to this xfer. */
1356 for (p
= xfer
->hcpriv
; p
->xfer
== xfer
; p
= n
) {
1358 ohci_free_std(sc
, p
);
1362 opipe
->sed
->ed
.ed_headp
= htole32(p
->physaddr
);
1363 OWRITE4(sc
, OHCI_COMMAND_STATUS
, OHCI_CLF
);
1365 if (cc
== OHCI_CC_STALL
)
1366 xfer
->status
= USBD_STALLED
;
1368 xfer
->status
= USBD_IOERROR
;
1370 usb_transfer_complete(xfer
);
1375 * Skip intermediate TDs. They remain linked from
1376 * xfer->hcpriv and we free them when the transfer completes.
1378 if ((std
->flags
& OHCI_CALL_DONE
) == 0)
1381 /* Normal transfer completion */
1382 callout_stop(&xfer
->timeout_handle
);
1383 usb_rem_task(OXFER(xfer
)->xfer
.pipe
->device
,
1384 &OXFER(xfer
)->abort_task
);
1385 for (p
= xfer
->hcpriv
; p
->xfer
== xfer
; p
= n
) {
1387 ohci_free_std(sc
, p
);
1389 xfer
->status
= USBD_NORMAL_COMPLETION
;
1391 usb_transfer_complete(xfer
);
1396 if (ohcidebug
> 10) {
1397 DPRINTF(("ohci_softintr: ITD done:\n"));
1398 ohci_dump_itds(sidone
);
1402 for (sitd
= sidone
; sitd
!= NULL
; sitd
= sitdnext
) {
1404 sitdnext
= sitd
->dnext
;
1405 sitd
->flags
|= OHCI_ITD_INTFIN
;
1406 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1407 sitd
, xfer
, xfer
? xfer
->hcpriv
: 0));
1410 if (xfer
->status
== USBD_CANCELLED
||
1411 xfer
->status
== USBD_TIMEOUT
) {
1412 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1414 /* Handled by abort routine. */
1418 if (xfer
->pipe
->aborting
)
1419 continue; /*Ignore.*/
1422 kprintf("ohci_softintr: sitd=%p is done\n", sitd
);
1425 opipe
= (struct ohci_pipe
*)xfer
->pipe
;
1426 if (opipe
->aborting
)
1429 if (sitd
->flags
& OHCI_CALL_DONE
) {
1430 ohci_soft_itd_t
*next
;
1432 opipe
->u
.iso
.inuse
-= xfer
->nframes
;
1433 xfer
->status
= USBD_NORMAL_COMPLETION
;
1434 for (i
= 0, sitd
= xfer
->hcpriv
;;sitd
= next
) {
1435 next
= sitd
->nextitd
;
1436 if (OHCI_ITD_GET_CC(sitd
->itd
.itd_flags
) != OHCI_CC_NO_ERROR
)
1437 xfer
->status
= USBD_IOERROR
;
1439 if (xfer
->status
== USBD_NORMAL_COMPLETION
) {
1440 iframes
= OHCI_ITD_GET_FC(sitd
->itd
.itd_flags
);
1441 for (j
= 0; j
< iframes
; i
++, j
++) {
1442 len
= le16toh(sitd
->itd
.itd_offset
[j
]);
1444 (OHCI_ITD_PSW_GET_CC(len
) ==
1445 OHCI_CC_NOT_ACCESSED
) ? 0 :
1446 OHCI_ITD_PSW_LENGTH(len
);
1447 xfer
->frlengths
[i
] = len
;
1450 if (sitd
->flags
& OHCI_CALL_DONE
)
1455 usb_transfer_complete(xfer
);
1460 #ifdef USB_USE_SOFTINTR
1461 if (sc
->sc_softwake
) {
1462 sc
->sc_softwake
= 0;
1463 wakeup(&sc
->sc_softwake
);
1465 #endif /* USB_USE_SOFTINTR */
1467 sc
->sc_bus
.intr_context
--;
1468 DPRINTFN(10,("ohci_softintr: done:\n"));
1472 ohci_device_ctrl_done(usbd_xfer_handle xfer
)
1474 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer
));
1477 if (!(xfer
->rqflags
& URQ_REQUEST
)) {
1478 panic("ohci_device_ctrl_done: not a request");
1481 xfer
->hcpriv
= NULL
;
1485 ohci_device_intr_done(usbd_xfer_handle xfer
)
1487 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
1488 ohci_softc_t
*sc
= (ohci_softc_t
*)opipe
->pipe
.device
->bus
;
1489 ohci_soft_ed_t
*sed
= opipe
->sed
;
1490 ohci_soft_td_t
*data
, *tail
;
1493 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1494 xfer
, xfer
->actlen
));
1496 xfer
->hcpriv
= NULL
;
1498 if (xfer
->pipe
->repeat
) {
1499 data
= opipe
->tail
.td
;
1500 tail
= ohci_alloc_std(sc
); /* XXX should reuse TD */
1502 xfer
->status
= USBD_NOMEM
;
1507 data
->td
.td_flags
= htole32(
1508 OHCI_TD_IN
| OHCI_TD_NOCC
|
1509 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY
);
1510 if (xfer
->flags
& USBD_SHORT_XFER_OK
)
1511 data
->td
.td_flags
|= htole32(OHCI_TD_R
);
1512 data
->td
.td_cbp
= htole32(DMAADDR(&xfer
->dmabuf
, 0));
1513 data
->nexttd
= tail
;
1514 data
->td
.td_nexttd
= htole32(tail
->physaddr
);
1515 data
->td
.td_be
= htole32(le32toh(data
->td
.td_cbp
) +
1517 data
->len
= xfer
->length
;
1519 data
->flags
= OHCI_CALL_DONE
| OHCI_ADD_LEN
;
1520 xfer
->hcpriv
= data
;
1523 sed
->ed
.ed_tailp
= htole32(tail
->physaddr
);
1524 opipe
->tail
.td
= tail
;
1529 ohci_device_bulk_done(usbd_xfer_handle xfer
)
1531 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1532 xfer
, xfer
->actlen
));
1534 xfer
->hcpriv
= NULL
;
1538 ohci_rhsc(ohci_softc_t
*sc
, usbd_xfer_handle xfer
)
1540 usbd_pipe_handle pipe
;
1545 hstatus
= OREAD4(sc
, OHCI_RH_STATUS
);
1546 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1547 sc
, xfer
, hstatus
));
1550 /* Just ignore the change. */
1556 p
= KERNADDR(&xfer
->dmabuf
, 0);
1557 m
= min(sc
->sc_noport
, xfer
->length
* 8 - 1);
1558 memset(p
, 0, xfer
->length
);
1559 for (i
= 1; i
<= m
; i
++) {
1560 /* Pick out CHANGE bits from the status reg. */
1561 if (OREAD4(sc
, OHCI_RH_PORT_STATUS(i
)) >> 16)
1562 p
[i
/8] |= 1 << (i
%8);
1564 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p
));
1565 xfer
->actlen
= xfer
->length
;
1566 xfer
->status
= USBD_NORMAL_COMPLETION
;
1568 usb_transfer_complete(xfer
);
1572 ohci_root_intr_done(usbd_xfer_handle xfer
)
1574 xfer
->hcpriv
= NULL
;
1578 ohci_root_ctrl_done(usbd_xfer_handle xfer
)
1580 xfer
->hcpriv
= NULL
;
1584 * Wait here until controller claims to have an interrupt.
1585 * Then call ohci_intr and return. Use timeout to avoid waiting
1589 ohci_waitintr(ohci_softc_t
*sc
, usbd_xfer_handle xfer
)
1591 int timo
= xfer
->timeout
;
1595 xfer
->status
= USBD_IN_PROGRESS
;
1596 for (usecs
= timo
* 1000000 / hz
; usecs
> 0; usecs
-= 1000) {
1597 usb_delay_ms(&sc
->sc_bus
, 1);
1600 intrs
= OREAD4(sc
, OHCI_INTERRUPT_STATUS
) & sc
->sc_eintrs
;
1601 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs
));
1608 if (xfer
->status
!= USBD_IN_PROGRESS
)
1614 DPRINTF(("ohci_waitintr: timeout\n"));
1615 xfer
->status
= USBD_TIMEOUT
;
1616 usb_transfer_complete(xfer
);
1617 /* XXX should free TD */
1621 ohci_poll(struct usbd_bus
*bus
)
1623 ohci_softc_t
*sc
= (ohci_softc_t
*)bus
;
1627 new = OREAD4(sc
, OHCI_INTERRUPT_STATUS
);
1629 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1634 if (OREAD4(sc
, OHCI_INTERRUPT_STATUS
) & sc
->sc_eintrs
)
1639 ohci_device_request(usbd_xfer_handle xfer
)
1641 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
1642 usb_device_request_t
*req
= &xfer
->request
;
1643 usbd_device_handle dev
= opipe
->pipe
.device
;
1644 ohci_softc_t
*sc
= (ohci_softc_t
*)dev
->bus
;
1645 int addr
= dev
->address
;
1646 ohci_soft_td_t
*setup
, *stat
, *next
, *tail
;
1647 ohci_soft_ed_t
*sed
;
1652 isread
= req
->bmRequestType
& UT_READ
;
1653 len
= UGETW(req
->wLength
);
1655 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1656 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1657 req
->bmRequestType
, req
->bRequest
, UGETW(req
->wValue
),
1658 UGETW(req
->wIndex
), len
, addr
,
1659 opipe
->pipe
.endpoint
->edesc
->bEndpointAddress
));
1661 setup
= opipe
->tail
.td
;
1662 stat
= ohci_alloc_std(sc
);
1667 tail
= ohci_alloc_std(sc
);
1675 opipe
->u
.ctl
.length
= len
;
1677 /* Update device address and length since they may have changed
1678 during the setup of the control pipe in usbd_new_device(). */
1679 /* XXX This only needs to be done once, but it's too early in open. */
1680 /* XXXX Should not touch ED here! */
1681 sed
->ed
.ed_flags
= htole32(
1682 (le32toh(sed
->ed
.ed_flags
) & ~(OHCI_ED_ADDRMASK
| OHCI_ED_MAXPMASK
)) |
1683 OHCI_ED_SET_FA(addr
) |
1684 OHCI_ED_SET_MAXP(UGETW(opipe
->pipe
.endpoint
->edesc
->wMaxPacketSize
)));
1688 /* Set up data transaction */
1690 ohci_soft_td_t
*std
= stat
;
1692 err
= ohci_alloc_std_chain(opipe
, sc
, len
, isread
, xfer
,
1694 stat
= stat
->nexttd
; /* point at free TD */
1697 /* Start toggle at 1 and then use the carried toggle. */
1698 std
->td
.td_flags
&= htole32(~OHCI_TD_TOGGLE_MASK
);
1699 std
->td
.td_flags
|= htole32(OHCI_TD_TOGGLE_1
);
1702 memcpy(KERNADDR(&opipe
->u
.ctl
.reqdma
, 0), req
, sizeof *req
);
1704 setup
->td
.td_flags
= htole32(OHCI_TD_SETUP
| OHCI_TD_NOCC
|
1705 OHCI_TD_TOGGLE_0
| OHCI_TD_SET_DI(6));
1706 setup
->td
.td_cbp
= htole32(DMAADDR(&opipe
->u
.ctl
.reqdma
, 0));
1707 setup
->nexttd
= next
;
1708 setup
->td
.td_nexttd
= htole32(next
->physaddr
);
1709 setup
->td
.td_be
= htole32(le32toh(setup
->td
.td_cbp
) + sizeof *req
- 1);
1713 xfer
->hcpriv
= setup
;
1715 stat
->td
.td_flags
= htole32(
1716 (isread
? OHCI_TD_OUT
: OHCI_TD_IN
) |
1717 OHCI_TD_NOCC
| OHCI_TD_TOGGLE_1
| OHCI_TD_SET_DI(1));
1718 stat
->td
.td_cbp
= 0;
1719 stat
->nexttd
= tail
;
1720 stat
->td
.td_nexttd
= htole32(tail
->physaddr
);
1722 stat
->flags
= OHCI_CALL_DONE
;
1727 if (ohcidebug
> 5) {
1728 DPRINTF(("ohci_device_request:\n"));
1730 ohci_dump_tds(setup
);
1734 /* Insert ED in schedule */
1736 sed
->ed
.ed_tailp
= htole32(tail
->physaddr
);
1737 opipe
->tail
.td
= tail
;
1738 OWRITE4(sc
, OHCI_COMMAND_STATUS
, OHCI_CLF
);
1739 if (xfer
->timeout
&& !sc
->sc_bus
.use_polling
) {
1740 callout_reset(&xfer
->timeout_handle
, MS_TO_TICKS(xfer
->timeout
),
1741 ohci_timeout
, xfer
);
1746 if (ohcidebug
> 20) {
1748 DPRINTF(("ohci_device_request: status=%x\n",
1749 OREAD4(sc
, OHCI_COMMAND_STATUS
)));
1751 kprintf("ctrl head:\n");
1752 ohci_dump_ed(sc
->sc_ctrl_head
);
1755 ohci_dump_tds(setup
);
1759 return (USBD_NORMAL_COMPLETION
);
1762 ohci_free_std(sc
, tail
);
1764 ohci_free_std(sc
, stat
);
1770 * Add an ED to the schedule. Called from a critical section.
1773 ohci_add_ed(ohci_soft_ed_t
*sed
, ohci_soft_ed_t
*head
)
1775 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed
, head
));
1777 sed
->next
= head
->next
;
1778 sed
->ed
.ed_nexted
= head
->ed
.ed_nexted
;
1780 head
->ed
.ed_nexted
= htole32(sed
->physaddr
);
1784 * Remove an ED from the schedule. Called from a critical section.
1787 ohci_rem_ed(ohci_soft_ed_t
*sed
, ohci_soft_ed_t
*head
)
1793 for (p
= head
; p
!= NULL
&& p
->next
!= sed
; p
= p
->next
)
1797 panic("ohci_rem_ed: ED not found");
1801 * p == NULL if ohci is detaching and there are still devices
1802 * using ohci (e.g. usb sticks are still plugged in). But
1803 * the real solution should be correcting ohci_free_sed() or
1807 p
->next
= sed
->next
;
1808 p
->ed
.ed_nexted
= sed
->ed
.ed_nexted
;
1814 * When a transfer is completed the TD is added to the done queue by
1815 * the host controller. This queue is the processed by software.
1816 * Unfortunately the queue contains the physical address of the TD
1817 * and we have no simple way to translate this back to a kernel address.
1818 * To make the translation possible (and fast) we use a hash table of
1819 * TDs currently in the schedule. The physical address is used as the
1823 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1825 * Called from a critical section
1828 ohci_hash_add_td(ohci_softc_t
*sc
, ohci_soft_td_t
*std
)
1830 int h
= HASH(std
->physaddr
);
1832 LIST_INSERT_HEAD(&sc
->sc_hash_tds
[h
], std
, hnext
);
1836 * Called from a critical section
1839 ohci_hash_rem_td(ohci_softc_t
*sc
, ohci_soft_td_t
*std
)
1841 LIST_REMOVE(std
, hnext
);
1845 ohci_hash_find_td(ohci_softc_t
*sc
, ohci_physaddr_t a
)
1848 ohci_soft_td_t
*std
;
1850 /* if these are present they should be masked out at an earlier
1853 KASSERT((a
&~OHCI_HEADMASK
) == 0, ("%s: 0x%b has lower bits set\n",
1854 device_get_nameunit(sc
->sc_bus
.bdev
),
1855 (int) a
, "\20\1HALT\2TOGGLE"));
1857 for (std
= LIST_FIRST(&sc
->sc_hash_tds
[h
]);
1859 std
= LIST_NEXT(std
, hnext
))
1860 if (std
->physaddr
== a
)
1863 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1864 device_get_nameunit(sc
->sc_bus
.bdev
), (u_long
) a
));
1869 * Called from a critical section
1872 ohci_hash_add_itd(ohci_softc_t
*sc
, ohci_soft_itd_t
*sitd
)
1874 int h
= HASH(sitd
->physaddr
);
1876 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1877 sitd
, (u_long
)sitd
->physaddr
));
1879 LIST_INSERT_HEAD(&sc
->sc_hash_itds
[h
], sitd
, hnext
);
1883 * Called from a critical section
1886 ohci_hash_rem_itd(ohci_softc_t
*sc
, ohci_soft_itd_t
*sitd
)
1888 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1889 sitd
, (u_long
)sitd
->physaddr
));
1891 LIST_REMOVE(sitd
, hnext
);
1895 ohci_hash_find_itd(ohci_softc_t
*sc
, ohci_physaddr_t a
)
1898 ohci_soft_itd_t
*sitd
;
1900 for (sitd
= LIST_FIRST(&sc
->sc_hash_itds
[h
]);
1902 sitd
= LIST_NEXT(sitd
, hnext
))
1903 if (sitd
->physaddr
== a
)
1909 ohci_timeout(void *addr
)
1911 struct ohci_xfer
*oxfer
= addr
;
1912 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)oxfer
->xfer
.pipe
;
1913 ohci_softc_t
*sc
= (ohci_softc_t
*)opipe
->pipe
.device
->bus
;
1915 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer
));
1918 ohci_abort_xfer(&oxfer
->xfer
, USBD_TIMEOUT
);
1922 /* Execute the abort in a process context. */
1923 usb_add_task(oxfer
->xfer
.pipe
->device
, &oxfer
->abort_task
,
1928 ohci_timeout_task(void *addr
)
1930 usbd_xfer_handle xfer
= addr
;
1932 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer
));
1935 ohci_abort_xfer(xfer
, USBD_TIMEOUT
);
1941 ohci_dump_tds(ohci_soft_td_t
*std
)
1943 for (; std
; std
= std
->nexttd
)
1948 ohci_dump_td(ohci_soft_td_t
*std
)
1952 bitmask_snprintf((u_int32_t
)le32toh(std
->td
.td_flags
),
1953 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1954 sbuf
, sizeof(sbuf
));
1956 kprintf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1957 "nexttd=0x%08lx be=0x%08lx\n",
1958 std
, (u_long
)std
->physaddr
, sbuf
,
1959 OHCI_TD_GET_DI(le32toh(std
->td
.td_flags
)),
1960 OHCI_TD_GET_EC(le32toh(std
->td
.td_flags
)),
1961 OHCI_TD_GET_CC(le32toh(std
->td
.td_flags
)),
1962 (u_long
)le32toh(std
->td
.td_cbp
),
1963 (u_long
)le32toh(std
->td
.td_nexttd
),
1964 (u_long
)le32toh(std
->td
.td_be
));
1968 ohci_dump_itd(ohci_soft_itd_t
*sitd
)
1972 kprintf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1973 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1974 sitd
, (u_long
)sitd
->physaddr
,
1975 OHCI_ITD_GET_SF(le32toh(sitd
->itd
.itd_flags
)),
1976 OHCI_ITD_GET_DI(le32toh(sitd
->itd
.itd_flags
)),
1977 OHCI_ITD_GET_FC(le32toh(sitd
->itd
.itd_flags
)),
1978 OHCI_ITD_GET_CC(le32toh(sitd
->itd
.itd_flags
)),
1979 (u_long
)le32toh(sitd
->itd
.itd_bp0
),
1980 (u_long
)le32toh(sitd
->itd
.itd_nextitd
),
1981 (u_long
)le32toh(sitd
->itd
.itd_be
));
1982 for (i
= 0; i
< OHCI_ITD_NOFFSET
; i
++)
1983 kprintf("offs[%d]=0x%04x ", i
,
1984 (u_int
)le16toh(sitd
->itd
.itd_offset
[i
]));
1989 ohci_dump_itds(ohci_soft_itd_t
*sitd
)
1991 for (; sitd
; sitd
= sitd
->nextitd
)
1992 ohci_dump_itd(sitd
);
1996 ohci_dump_ed(ohci_soft_ed_t
*sed
)
1998 char sbuf
[128], sbuf2
[128];
2000 bitmask_snprintf((u_int32_t
)le32toh(sed
->ed
.ed_flags
),
2001 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2002 sbuf
, sizeof(sbuf
));
2003 bitmask_snprintf((u_int32_t
)le32toh(sed
->ed
.ed_headp
),
2004 "\20\1HALT\2CARRY", sbuf2
, sizeof(sbuf2
));
2006 kprintf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2007 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2008 sed
, (u_long
)sed
->physaddr
,
2009 OHCI_ED_GET_FA(le32toh(sed
->ed
.ed_flags
)),
2010 OHCI_ED_GET_EN(le32toh(sed
->ed
.ed_flags
)),
2011 OHCI_ED_GET_MAXP(le32toh(sed
->ed
.ed_flags
)), sbuf
,
2012 (u_long
)le32toh(sed
->ed
.ed_tailp
), sbuf2
,
2013 (u_long
)le32toh(sed
->ed
.ed_headp
),
2014 (u_long
)le32toh(sed
->ed
.ed_nexted
));
2019 ohci_open(usbd_pipe_handle pipe
)
2021 usbd_device_handle dev
= pipe
->device
;
2022 ohci_softc_t
*sc
= (ohci_softc_t
*)dev
->bus
;
2023 usb_endpoint_descriptor_t
*ed
= pipe
->endpoint
->edesc
;
2024 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
2025 u_int8_t addr
= dev
->address
;
2026 u_int8_t xfertype
= ed
->bmAttributes
& UE_XFERTYPE
;
2027 ohci_soft_ed_t
*sed
;
2028 ohci_soft_td_t
*std
;
2029 ohci_soft_itd_t
*sitd
;
2030 ohci_physaddr_t tdphys
;
2035 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2036 pipe
, addr
, ed
->bEndpointAddress
, sc
->sc_addr
));
2039 return (USBD_IOERROR
);
2044 if (addr
== sc
->sc_addr
) {
2045 switch (ed
->bEndpointAddress
) {
2046 case USB_CONTROL_ENDPOINT
:
2047 pipe
->methods
= &ohci_root_ctrl_methods
;
2049 case UE_DIR_IN
| OHCI_INTR_ENDPT
:
2050 pipe
->methods
= &ohci_root_intr_methods
;
2053 return (USBD_INVAL
);
2056 sed
= ohci_alloc_sed(sc
);
2060 if (xfertype
== UE_ISOCHRONOUS
) {
2061 sitd
= ohci_alloc_sitd(sc
);
2064 opipe
->tail
.itd
= sitd
;
2065 opipe
->aborting
= 0;
2066 tdphys
= sitd
->physaddr
;
2067 fmt
= OHCI_ED_FORMAT_ISO
;
2068 if (UE_GET_DIR(ed
->bEndpointAddress
) == UE_DIR_IN
)
2069 fmt
|= OHCI_ED_DIR_IN
;
2071 fmt
|= OHCI_ED_DIR_OUT
;
2073 std
= ohci_alloc_std(sc
);
2076 opipe
->tail
.td
= std
;
2077 tdphys
= std
->physaddr
;
2078 fmt
= OHCI_ED_FORMAT_GEN
| OHCI_ED_DIR_TD
;
2080 sed
->ed
.ed_flags
= htole32(
2081 OHCI_ED_SET_FA(addr
) |
2082 OHCI_ED_SET_EN(UE_GET_ADDR(ed
->bEndpointAddress
)) |
2083 (dev
->speed
== USB_SPEED_LOW
? OHCI_ED_SPEED
: 0) |
2085 OHCI_ED_SET_MAXP(UGETW(ed
->wMaxPacketSize
)));
2086 sed
->ed
.ed_headp
= htole32(tdphys
|
2087 (pipe
->endpoint
->savedtoggle
? OHCI_TOGGLECARRY
: 0));
2088 sed
->ed
.ed_tailp
= htole32(tdphys
);
2092 pipe
->methods
= &ohci_device_ctrl_methods
;
2093 err
= usb_allocmem(&sc
->sc_bus
,
2094 sizeof(usb_device_request_t
),
2095 0, &opipe
->u
.ctl
.reqdma
);
2099 ohci_add_ed(sed
, sc
->sc_ctrl_head
);
2103 pipe
->methods
= &ohci_device_intr_methods
;
2104 ival
= pipe
->interval
;
2105 if (ival
== USBD_DEFAULT_INTERVAL
)
2106 ival
= ed
->bInterval
;
2107 return (ohci_device_setintr(sc
, opipe
, ival
));
2108 case UE_ISOCHRONOUS
:
2109 pipe
->methods
= &ohci_device_isoc_methods
;
2110 return (ohci_setup_isoc(pipe
));
2112 pipe
->methods
= &ohci_device_bulk_methods
;
2114 ohci_add_ed(sed
, sc
->sc_bulk_head
);
2119 return (USBD_NORMAL_COMPLETION
);
2123 ohci_free_std(sc
, std
);
2126 ohci_free_sed(sc
, sed
);
2128 return (USBD_NOMEM
);
2133 * Close a reqular pipe.
2134 * Assumes that there are no pending transactions.
2137 ohci_close_pipe(usbd_pipe_handle pipe
, ohci_soft_ed_t
*head
)
2139 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
2140 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
2141 ohci_soft_ed_t
*sed
= opipe
->sed
;
2145 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
);
2146 if ((le32toh(sed
->ed
.ed_tailp
) & OHCI_HEADMASK
) !=
2147 (le32toh(sed
->ed
.ed_headp
) & OHCI_HEADMASK
)) {
2148 ohci_soft_td_t
*std
;
2149 std
= ohci_hash_find_td(sc
, le32toh(sed
->ed
.ed_headp
));
2150 kprintf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2151 "tl=0x%x pipe=%p, std=%p\n", sed
,
2152 (int)le32toh(sed
->ed
.ed_headp
),
2153 (int)le32toh(sed
->ed
.ed_tailp
),
2156 usbd_dump_pipe(&opipe
->pipe
);
2163 usb_delay_ms(&sc
->sc_bus
, 2);
2164 if ((le32toh(sed
->ed
.ed_tailp
) & OHCI_HEADMASK
) !=
2165 (le32toh(sed
->ed
.ed_headp
) & OHCI_HEADMASK
))
2166 kprintf("ohci_close_pipe: pipe still not empty\n");
2169 ohci_rem_ed(sed
, head
);
2170 /* Make sure the host controller is not touching this ED */
2171 usb_delay_ms(&sc
->sc_bus
, 1);
2173 pipe
->endpoint
->savedtoggle
=
2174 (le32toh(sed
->ed
.ed_headp
) & OHCI_TOGGLECARRY
) ? 1 : 0;
2175 ohci_free_sed(sc
, opipe
->sed
);
2179 * Abort a device request.
2180 * If this routine is called from a critical section it guarantees that
2181 * the request will be removed from the hardware scheduling and that
2182 * the callback for it will be called with USBD_CANCELLED status.
2183 * It's impossible to guarantee that the requested transfer will not
2184 * have happened since the hardware runs concurrently.
2185 * If the transaction has already happened we rely on the ordinary
2186 * interrupt processing to process it.
2189 ohci_abort_xfer(usbd_xfer_handle xfer
, usbd_status status
)
2191 struct ohci_xfer
*oxfer
= OXFER(xfer
);
2192 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
2193 ohci_softc_t
*sc
= (ohci_softc_t
*)opipe
->pipe
.device
->bus
;
2194 ohci_soft_ed_t
*sed
= opipe
->sed
;
2195 ohci_soft_td_t
*p
, *n
;
2196 ohci_physaddr_t headp
;
2199 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer
, opipe
,sed
));
2202 /* If we're dying, just do the software part. */
2204 xfer
->status
= status
; /* make software ignore it */
2205 callout_stop(&xfer
->timeout_handle
);
2206 usb_rem_task(xfer
->pipe
->device
, &OXFER(xfer
)->abort_task
);
2207 usb_transfer_complete(xfer
);
2212 if (xfer
->device
->bus
->intr_context
/* || !curproc REMOVED DFly */)
2213 panic("ohci_abort_xfer: not in process context");
2216 * If an abort is already in progress then just wait for it to
2217 * complete and return.
2219 if (oxfer
->ohci_xfer_flags
& OHCI_XFER_ABORTING
) {
2220 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2221 /* No need to wait if we're aborting from a timeout. */
2222 if (status
== USBD_TIMEOUT
)
2224 /* Override the status which might be USBD_TIMEOUT. */
2225 xfer
->status
= status
;
2226 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2227 oxfer
->ohci_xfer_flags
|= OHCI_XFER_ABORTWAIT
;
2228 while (oxfer
->ohci_xfer_flags
& OHCI_XFER_ABORTING
)
2229 tsleep(&oxfer
->ohci_xfer_flags
, 0, "ohciaw", 0);
2234 * Step 1: Make interrupt routine and hardware ignore xfer.
2237 oxfer
->ohci_xfer_flags
|= OHCI_XFER_ABORTING
;
2238 xfer
->status
= status
; /* make software ignore it */
2239 callout_stop(&xfer
->timeout_handle
);
2240 usb_rem_task(xfer
->pipe
->device
, &OXFER(xfer
)->abort_task
);
2242 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed
));
2243 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
); /* force hardware skip */
2246 * Step 2: Wait until we know hardware has finished any possible
2247 * use of the xfer. Also make sure the soft interrupt routine
2250 usb_delay_ms(opipe
->pipe
.device
->bus
, 20); /* Hardware finishes in 1ms */
2252 #ifdef USB_USE_SOFTINTR
2253 sc
->sc_softwake
= 1;
2254 #endif /* USB_USE_SOFTINTR */
2255 usb_schedsoftintr(&sc
->sc_bus
);
2256 #ifdef USB_USE_SOFTINTR
2257 tsleep(&sc
->sc_softwake
, 0, "ohciab", 0);
2258 #endif /* USB_USE_SOFTINTR */
2261 * Step 3: Remove any vestiges of the xfer from the hardware.
2262 * The complication here is that the hardware may have executed
2263 * beyond the xfer we're trying to abort. So as we're scanning
2264 * the TDs of this xfer we check if the hardware points to
2270 oxfer
->ohci_xfer_flags
&= ~OHCI_XFER_ABORTING
; /* XXX */
2272 kprintf("ohci_abort_xfer: hcpriv is NULL\n");
2277 if (ohcidebug
> 1) {
2278 DPRINTF(("ohci_abort_xfer: sed=\n"));
2283 headp
= le32toh(sed
->ed
.ed_headp
) & OHCI_HEADMASK
;
2285 for (; p
->xfer
== xfer
; p
= n
) {
2286 hit
|= headp
== p
->physaddr
;
2288 ohci_free_std(sc
, p
);
2290 /* Zap headp register if hardware pointed inside the xfer. */
2292 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2293 (int)p
->physaddr
, (int)le32toh(sed
->ed
.ed_tailp
)));
2294 sed
->ed
.ed_headp
= htole32(p
->physaddr
); /* unlink TDs */
2296 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2300 * Step 4: Turn on hardware again.
2302 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
); /* remove hardware skip */
2305 * Step 5: Execute callback.
2307 /* Do the wakeup first to avoid touching the xfer after the callback. */
2308 oxfer
->ohci_xfer_flags
&= ~OHCI_XFER_ABORTING
;
2309 if (oxfer
->ohci_xfer_flags
& OHCI_XFER_ABORTWAIT
) {
2310 oxfer
->ohci_xfer_flags
&= ~OHCI_XFER_ABORTWAIT
;
2311 wakeup(&oxfer
->ohci_xfer_flags
);
2313 usb_transfer_complete(xfer
);
2319 * Data structures and routines to emulate the root hub.
2321 static usb_device_descriptor_t ohci_devd
= {
2322 USB_DEVICE_DESCRIPTOR_SIZE
,
2323 UDESC_DEVICE
, /* type */
2324 {0x00, 0x01}, /* USB version */
2325 UDCLASS_HUB
, /* class */
2326 UDSUBCLASS_HUB
, /* subclass */
2327 UDPROTO_FSHUB
, /* protocol */
2328 64, /* max packet */
2329 {0},{0},{0x00,0x01}, /* device id */
2330 1,2,0, /* string indicies */
2331 1 /* # of configurations */
2334 static usb_config_descriptor_t ohci_confd
= {
2335 USB_CONFIG_DESCRIPTOR_SIZE
,
2337 {USB_CONFIG_DESCRIPTOR_SIZE
+
2338 USB_INTERFACE_DESCRIPTOR_SIZE
+
2339 USB_ENDPOINT_DESCRIPTOR_SIZE
},
2347 static usb_interface_descriptor_t ohci_ifcd
= {
2348 USB_INTERFACE_DESCRIPTOR_SIZE
,
2359 static usb_endpoint_descriptor_t ohci_endpd
= {
2360 USB_ENDPOINT_DESCRIPTOR_SIZE
,
2362 UE_DIR_IN
| OHCI_INTR_ENDPT
,
2364 {8, 0}, /* max packet */
2368 static usb_hub_descriptor_t ohci_hubd
= {
2369 USB_HUB_DESCRIPTOR_SIZE
,
2379 ohci_str(usb_string_descriptor_t
*p
, int l
, const char *s
)
2385 p
->bLength
= 2 * strlen(s
) + 2;
2388 p
->bDescriptorType
= UDESC_STRING
;
2390 for (i
= 0; s
[i
] && l
> 1; i
++, l
-= 2)
2391 USETW2(p
->bString
[i
], 0, s
[i
]);
2396 * Simulate a hardware hub by handling all the necessary requests.
2399 ohci_root_ctrl_transfer(usbd_xfer_handle xfer
)
2403 /* Insert last in queue. */
2404 err
= usb_insert_transfer(xfer
);
2408 /* Pipe isn't running, start first */
2409 return (ohci_root_ctrl_start(STAILQ_FIRST(&xfer
->pipe
->queue
)));
2413 ohci_root_ctrl_start(usbd_xfer_handle xfer
)
2415 ohci_softc_t
*sc
= (ohci_softc_t
*)xfer
->pipe
->device
->bus
;
2416 usb_device_request_t
*req
;
2419 int len
, value
, index
, l
, totlen
= 0;
2420 usb_port_status_t ps
;
2421 usb_hub_descriptor_t hubd
;
2426 return (USBD_IOERROR
);
2429 if (!(xfer
->rqflags
& URQ_REQUEST
))
2431 return (USBD_INVAL
);
2433 req
= &xfer
->request
;
2435 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2436 req
->bmRequestType
, req
->bRequest
));
2438 len
= UGETW(req
->wLength
);
2439 value
= UGETW(req
->wValue
);
2440 index
= UGETW(req
->wIndex
);
2443 buf
= KERNADDR(&xfer
->dmabuf
, 0);
2445 #define C(x,y) ((x) | ((y) << 8))
2446 switch(C(req
->bRequest
, req
->bmRequestType
)) {
2447 case C(UR_CLEAR_FEATURE
, UT_WRITE_DEVICE
):
2448 case C(UR_CLEAR_FEATURE
, UT_WRITE_INTERFACE
):
2449 case C(UR_CLEAR_FEATURE
, UT_WRITE_ENDPOINT
):
2451 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2452 * for the integrated root hub.
2455 case C(UR_GET_CONFIG
, UT_READ_DEVICE
):
2457 *(u_int8_t
*)buf
= sc
->sc_conf
;
2461 case C(UR_GET_DESCRIPTOR
, UT_READ_DEVICE
):
2462 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value
));
2463 switch(value
>> 8) {
2465 if ((value
& 0xff) != 0) {
2469 totlen
= l
= min(len
, USB_DEVICE_DESCRIPTOR_SIZE
);
2470 USETW(ohci_devd
.idVendor
, sc
->sc_id_vendor
);
2471 memcpy(buf
, &ohci_devd
, l
);
2474 if ((value
& 0xff) != 0) {
2478 totlen
= l
= min(len
, USB_CONFIG_DESCRIPTOR_SIZE
);
2479 memcpy(buf
, &ohci_confd
, l
);
2480 buf
= (char *)buf
+ l
;
2482 l
= min(len
, USB_INTERFACE_DESCRIPTOR_SIZE
);
2484 memcpy(buf
, &ohci_ifcd
, l
);
2485 buf
= (char *)buf
+ l
;
2487 l
= min(len
, USB_ENDPOINT_DESCRIPTOR_SIZE
);
2489 memcpy(buf
, &ohci_endpd
, l
);
2494 *(u_int8_t
*)buf
= 0;
2496 switch (value
& 0xff) {
2497 case 1: /* Vendor */
2498 totlen
= ohci_str(buf
, len
, sc
->sc_vendor
);
2500 case 2: /* Product */
2501 totlen
= ohci_str(buf
, len
, "OHCI root hub");
2510 case C(UR_GET_INTERFACE
, UT_READ_INTERFACE
):
2512 *(u_int8_t
*)buf
= 0;
2516 case C(UR_GET_STATUS
, UT_READ_DEVICE
):
2518 USETW(((usb_status_t
*)buf
)->wStatus
,UDS_SELF_POWERED
);
2522 case C(UR_GET_STATUS
, UT_READ_INTERFACE
):
2523 case C(UR_GET_STATUS
, UT_READ_ENDPOINT
):
2525 USETW(((usb_status_t
*)buf
)->wStatus
, 0);
2529 case C(UR_SET_ADDRESS
, UT_WRITE_DEVICE
):
2530 if (value
>= USB_MAX_DEVICES
) {
2534 sc
->sc_addr
= value
;
2536 case C(UR_SET_CONFIG
, UT_WRITE_DEVICE
):
2537 if (value
!= 0 && value
!= 1) {
2541 sc
->sc_conf
= value
;
2543 case C(UR_SET_DESCRIPTOR
, UT_WRITE_DEVICE
):
2545 case C(UR_SET_FEATURE
, UT_WRITE_DEVICE
):
2546 case C(UR_SET_FEATURE
, UT_WRITE_INTERFACE
):
2547 case C(UR_SET_FEATURE
, UT_WRITE_ENDPOINT
):
2550 case C(UR_SET_INTERFACE
, UT_WRITE_INTERFACE
):
2552 case C(UR_SYNCH_FRAME
, UT_WRITE_ENDPOINT
):
2555 case C(UR_CLEAR_FEATURE
, UT_WRITE_CLASS_DEVICE
):
2557 case C(UR_CLEAR_FEATURE
, UT_WRITE_CLASS_OTHER
):
2558 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2559 "port=%d feature=%d\n",
2561 if (index
< 1 || index
> sc
->sc_noport
) {
2565 port
= OHCI_RH_PORT_STATUS(index
);
2567 case UHF_PORT_ENABLE
:
2568 OWRITE4(sc
, port
, UPS_CURRENT_CONNECT_STATUS
);
2570 case UHF_PORT_SUSPEND
:
2571 OWRITE4(sc
, port
, UPS_OVERCURRENT_INDICATOR
);
2573 case UHF_PORT_POWER
:
2574 /* Yes, writing to the LOW_SPEED bit clears power. */
2575 OWRITE4(sc
, port
, UPS_LOW_SPEED
);
2577 case UHF_C_PORT_CONNECTION
:
2578 OWRITE4(sc
, port
, UPS_C_CONNECT_STATUS
<< 16);
2580 case UHF_C_PORT_ENABLE
:
2581 OWRITE4(sc
, port
, UPS_C_PORT_ENABLED
<< 16);
2583 case UHF_C_PORT_SUSPEND
:
2584 OWRITE4(sc
, port
, UPS_C_SUSPEND
<< 16);
2586 case UHF_C_PORT_OVER_CURRENT
:
2587 OWRITE4(sc
, port
, UPS_C_OVERCURRENT_INDICATOR
<< 16);
2589 case UHF_C_PORT_RESET
:
2590 OWRITE4(sc
, port
, UPS_C_PORT_RESET
<< 16);
2597 case UHF_C_PORT_CONNECTION
:
2598 case UHF_C_PORT_ENABLE
:
2599 case UHF_C_PORT_SUSPEND
:
2600 case UHF_C_PORT_OVER_CURRENT
:
2601 case UHF_C_PORT_RESET
:
2602 /* Enable RHSC interrupt if condition is cleared. */
2603 if ((OREAD4(sc
, port
) >> 16) == 0)
2604 ohci_rhsc_able(sc
, 1);
2610 case C(UR_GET_DESCRIPTOR
, UT_READ_CLASS_DEVICE
):
2611 if ((value
& 0xff) != 0) {
2615 v
= OREAD4(sc
, OHCI_RH_DESCRIPTOR_A
);
2617 hubd
.bNbrPorts
= sc
->sc_noport
;
2618 USETW(hubd
.wHubCharacteristics
,
2619 (v
& OHCI_NPS
? UHD_PWR_NO_SWITCH
:
2620 v
& OHCI_PSM
? UHD_PWR_GANGED
: UHD_PWR_INDIVIDUAL
)
2621 /* XXX overcurrent */
2623 hubd
.bPwrOn2PwrGood
= OHCI_GET_POTPGT(v
);
2624 v
= OREAD4(sc
, OHCI_RH_DESCRIPTOR_B
);
2625 for (i
= 0, l
= sc
->sc_noport
; l
> 0; i
++, l
-= 8, v
>>= 8)
2626 hubd
.DeviceRemovable
[i
++] = (u_int8_t
)v
;
2627 hubd
.bDescLength
= USB_HUB_DESCRIPTOR_SIZE
+ i
;
2628 l
= min(len
, hubd
.bDescLength
);
2630 memcpy(buf
, &hubd
, l
);
2632 case C(UR_GET_STATUS
, UT_READ_CLASS_DEVICE
):
2637 memset(buf
, 0, len
); /* ? XXX */
2640 case C(UR_GET_STATUS
, UT_READ_CLASS_OTHER
):
2641 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2643 if (index
< 1 || index
> sc
->sc_noport
) {
2651 v
= OREAD4(sc
, OHCI_RH_PORT_STATUS(index
));
2652 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2654 USETW(ps
.wPortStatus
, v
);
2655 USETW(ps
.wPortChange
, v
>> 16);
2656 l
= min(len
, sizeof ps
);
2657 memcpy(buf
, &ps
, l
);
2660 case C(UR_SET_DESCRIPTOR
, UT_WRITE_CLASS_DEVICE
):
2663 case C(UR_SET_FEATURE
, UT_WRITE_CLASS_DEVICE
):
2665 case C(UR_SET_FEATURE
, UT_WRITE_CLASS_OTHER
):
2666 if (index
< 1 || index
> sc
->sc_noport
) {
2670 port
= OHCI_RH_PORT_STATUS(index
);
2672 case UHF_PORT_ENABLE
:
2673 OWRITE4(sc
, port
, UPS_PORT_ENABLED
);
2675 case UHF_PORT_SUSPEND
:
2676 OWRITE4(sc
, port
, UPS_SUSPEND
);
2678 case UHF_PORT_RESET
:
2679 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2681 OWRITE4(sc
, port
, UPS_RESET
);
2682 for (i
= 0; i
< 5; i
++) {
2683 usb_delay_ms(&sc
->sc_bus
,
2684 USB_PORT_ROOT_RESET_DELAY
);
2689 if ((OREAD4(sc
, port
) & UPS_RESET
) == 0)
2692 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2693 index
, OREAD4(sc
, port
)));
2695 case UHF_PORT_POWER
:
2696 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2698 OWRITE4(sc
, port
, UPS_PORT_POWER
);
2709 xfer
->actlen
= totlen
;
2710 err
= USBD_NORMAL_COMPLETION
;
2714 usb_transfer_complete(xfer
);
2716 return (USBD_IN_PROGRESS
);
2719 /* Abort a root control request. */
2721 ohci_root_ctrl_abort(usbd_xfer_handle xfer
)
2723 /* Nothing to do, all transfers are synchronous. */
2726 /* Close the root pipe. */
2728 ohci_root_ctrl_close(usbd_pipe_handle pipe
)
2730 DPRINTF(("ohci_root_ctrl_close\n"));
2731 /* Nothing to do. */
2735 ohci_root_intr_transfer(usbd_xfer_handle xfer
)
2739 /* Insert last in queue. */
2740 err
= usb_insert_transfer(xfer
);
2744 /* Pipe isn't running, start first */
2745 return (ohci_root_intr_start(STAILQ_FIRST(&xfer
->pipe
->queue
)));
2749 ohci_root_intr_start(usbd_xfer_handle xfer
)
2751 usbd_pipe_handle pipe
= xfer
->pipe
;
2752 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
2755 return (USBD_IOERROR
);
2757 sc
->sc_intrxfer
= xfer
;
2759 return (USBD_IN_PROGRESS
);
2762 /* Abort a root interrupt request. */
2764 ohci_root_intr_abort(usbd_xfer_handle xfer
)
2766 if (xfer
->pipe
->intrxfer
== xfer
) {
2767 DPRINTF(("ohci_root_intr_abort: remove\n"));
2768 xfer
->pipe
->intrxfer
= NULL
;
2770 xfer
->status
= USBD_CANCELLED
;
2772 usb_transfer_complete(xfer
);
2776 /* Close the root pipe. */
2778 ohci_root_intr_close(usbd_pipe_handle pipe
)
2780 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
2782 DPRINTF(("ohci_root_intr_close\n"));
2784 sc
->sc_intrxfer
= NULL
;
2787 /************************/
2790 ohci_device_ctrl_transfer(usbd_xfer_handle xfer
)
2794 /* Insert last in queue. */
2795 err
= usb_insert_transfer(xfer
);
2799 /* Pipe isn't running, start first */
2800 return (ohci_device_ctrl_start(STAILQ_FIRST(&xfer
->pipe
->queue
)));
2804 ohci_device_ctrl_start(usbd_xfer_handle xfer
)
2806 ohci_softc_t
*sc
= (ohci_softc_t
*)xfer
->pipe
->device
->bus
;
2810 return (USBD_IOERROR
);
2813 if (!(xfer
->rqflags
& URQ_REQUEST
)) {
2815 kprintf("ohci_device_ctrl_transfer: not a request\n");
2816 return (USBD_INVAL
);
2820 err
= ohci_device_request(xfer
);
2824 if (sc
->sc_bus
.use_polling
)
2825 ohci_waitintr(sc
, xfer
);
2826 return (USBD_IN_PROGRESS
);
2829 /* Abort a device control request. */
2831 ohci_device_ctrl_abort(usbd_xfer_handle xfer
)
2833 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer
));
2834 ohci_abort_xfer(xfer
, USBD_CANCELLED
);
2837 /* Close a device control pipe. */
2839 ohci_device_ctrl_close(usbd_pipe_handle pipe
)
2841 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
2842 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
2844 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe
));
2845 ohci_close_pipe(pipe
, sc
->sc_ctrl_head
);
2846 ohci_free_std(sc
, opipe
->tail
.td
);
2849 /************************/
2852 ohci_device_clear_toggle(usbd_pipe_handle pipe
)
2854 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
2856 opipe
->sed
->ed
.ed_headp
&= htole32(~OHCI_TOGGLECARRY
);
2860 ohci_noop(usbd_pipe_handle pipe
)
2865 ohci_device_bulk_transfer(usbd_xfer_handle xfer
)
2869 /* Insert last in queue. */
2870 err
= usb_insert_transfer(xfer
);
2874 /* Pipe isn't running, start first */
2875 return (ohci_device_bulk_start(STAILQ_FIRST(&xfer
->pipe
->queue
)));
2879 ohci_device_bulk_start(usbd_xfer_handle xfer
)
2881 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
2882 usbd_device_handle dev
= opipe
->pipe
.device
;
2883 ohci_softc_t
*sc
= (ohci_softc_t
*)dev
->bus
;
2884 int addr
= dev
->address
;
2885 ohci_soft_td_t
*data
, *tail
, *tdp
;
2886 ohci_soft_ed_t
*sed
;
2887 int len
, isread
, endpt
;
2891 return (USBD_IOERROR
);
2894 if (xfer
->rqflags
& URQ_REQUEST
) {
2896 kprintf("ohci_device_bulk_start: a request\n");
2897 return (USBD_INVAL
);
2902 endpt
= xfer
->pipe
->endpoint
->edesc
->bEndpointAddress
;
2903 isread
= UE_GET_DIR(endpt
) == UE_DIR_IN
;
2906 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2907 "flags=%d endpt=%d\n", xfer
, len
, isread
, xfer
->flags
,
2910 opipe
->u
.bulk
.isread
= isread
;
2911 opipe
->u
.bulk
.length
= len
;
2913 /* Update device address */
2914 sed
->ed
.ed_flags
= htole32(
2915 (le32toh(sed
->ed
.ed_flags
) & ~OHCI_ED_ADDRMASK
) |
2916 OHCI_ED_SET_FA(addr
));
2918 /* Allocate a chain of new TDs (including a new tail). */
2919 data
= opipe
->tail
.td
;
2920 err
= ohci_alloc_std_chain(opipe
, sc
, len
, isread
, xfer
,
2922 /* We want interrupt at the end of the transfer. */
2923 tail
->td
.td_flags
&= htole32(~OHCI_TD_INTR_MASK
);
2924 tail
->td
.td_flags
|= htole32(OHCI_TD_SET_DI(1));
2925 tail
->flags
|= OHCI_CALL_DONE
;
2926 tail
= tail
->nexttd
; /* point at sentinel */
2931 xfer
->hcpriv
= data
;
2933 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2934 "td_cbp=0x%08x td_be=0x%08x\n",
2935 (int)le32toh(sed
->ed
.ed_flags
),
2936 (int)le32toh(data
->td
.td_flags
),
2937 (int)le32toh(data
->td
.td_cbp
),
2938 (int)le32toh(data
->td
.td_be
)));
2941 if (ohcidebug
> 5) {
2943 ohci_dump_tds(data
);
2947 /* Insert ED in schedule */
2949 for (tdp
= data
; tdp
!= tail
; tdp
= tdp
->nexttd
) {
2952 sed
->ed
.ed_tailp
= htole32(tail
->physaddr
);
2953 opipe
->tail
.td
= tail
;
2954 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
);
2955 OWRITE4(sc
, OHCI_COMMAND_STATUS
, OHCI_BLF
);
2956 if (xfer
->timeout
&& !sc
->sc_bus
.use_polling
) {
2957 callout_reset(&xfer
->timeout_handle
, MS_TO_TICKS(xfer
->timeout
),
2958 ohci_timeout
, xfer
);
2962 /* This goes wrong if we are too slow. */
2963 if (ohcidebug
> 10) {
2965 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2966 OREAD4(sc
, OHCI_COMMAND_STATUS
)));
2968 ohci_dump_tds(data
);
2974 if (sc
->sc_bus
.use_polling
)
2975 ohci_waitintr(sc
, xfer
);
2977 return (USBD_IN_PROGRESS
);
2981 ohci_device_bulk_abort(usbd_xfer_handle xfer
)
2983 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer
));
2984 ohci_abort_xfer(xfer
, USBD_CANCELLED
);
2988 * Close a device bulk pipe.
2991 ohci_device_bulk_close(usbd_pipe_handle pipe
)
2993 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
2994 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
2996 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe
));
2997 ohci_close_pipe(pipe
, sc
->sc_bulk_head
);
2998 ohci_free_std(sc
, opipe
->tail
.td
);
3001 /************************/
3004 ohci_device_intr_transfer(usbd_xfer_handle xfer
)
3008 /* Insert last in queue. */
3009 err
= usb_insert_transfer(xfer
);
3013 /* Pipe isn't running, start first */
3014 return (ohci_device_intr_start(STAILQ_FIRST(&xfer
->pipe
->queue
)));
3018 ohci_device_intr_start(usbd_xfer_handle xfer
)
3020 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
3021 usbd_device_handle dev
= opipe
->pipe
.device
;
3022 ohci_softc_t
*sc
= (ohci_softc_t
*)dev
->bus
;
3023 ohci_soft_ed_t
*sed
= opipe
->sed
;
3024 ohci_soft_td_t
*data
, *tail
;
3028 return (USBD_IOERROR
);
3030 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3031 "flags=%d priv=%p\n",
3032 xfer
, xfer
->length
, xfer
->flags
, xfer
->priv
));
3035 if (xfer
->rqflags
& URQ_REQUEST
)
3036 panic("ohci_device_intr_transfer: a request");
3041 data
= opipe
->tail
.td
;
3042 tail
= ohci_alloc_std(sc
);
3044 return (USBD_NOMEM
);
3047 data
->td
.td_flags
= htole32(
3048 OHCI_TD_IN
| OHCI_TD_NOCC
|
3049 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY
);
3050 if (xfer
->flags
& USBD_SHORT_XFER_OK
)
3051 data
->td
.td_flags
|= htole32(OHCI_TD_R
);
3052 data
->td
.td_cbp
= htole32(DMAADDR(&xfer
->dmabuf
, 0));
3053 data
->nexttd
= tail
;
3054 data
->td
.td_nexttd
= htole32(tail
->physaddr
);
3055 data
->td
.td_be
= htole32(le32toh(data
->td
.td_cbp
) + len
- 1);
3058 data
->flags
= OHCI_CALL_DONE
| OHCI_ADD_LEN
;
3059 xfer
->hcpriv
= data
;
3062 if (ohcidebug
> 5) {
3063 DPRINTF(("ohci_device_intr_transfer:\n"));
3065 ohci_dump_tds(data
);
3069 /* Insert ED in schedule */
3071 sed
->ed
.ed_tailp
= htole32(tail
->physaddr
);
3072 opipe
->tail
.td
= tail
;
3073 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
);
3077 * This goes horribly wrong, printing thousands of descriptors,
3078 * because false references are followed due to the fact that the
3081 if (ohcidebug
> 5) {
3082 usb_delay_ms(&sc
->sc_bus
, 5);
3083 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3084 OREAD4(sc
, OHCI_COMMAND_STATUS
)));
3086 ohci_dump_tds(data
);
3091 return (USBD_IN_PROGRESS
);
3094 /* Abort a device control request. */
3096 ohci_device_intr_abort(usbd_xfer_handle xfer
)
3098 if (xfer
->pipe
->intrxfer
== xfer
) {
3099 DPRINTF(("ohci_device_intr_abort: remove\n"));
3100 xfer
->pipe
->intrxfer
= NULL
;
3102 ohci_abort_xfer(xfer
, USBD_CANCELLED
);
3105 /* Close a device interrupt pipe. */
3107 ohci_device_intr_close(usbd_pipe_handle pipe
)
3109 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
3110 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
3111 int nslots
= opipe
->u
.intr
.nslots
;
3112 int pos
= opipe
->u
.intr
.pos
;
3114 ohci_soft_ed_t
*p
, *sed
= opipe
->sed
;
3116 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3117 pipe
, nslots
, pos
));
3119 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
);
3120 if ((le32toh(sed
->ed
.ed_tailp
) & OHCI_HEADMASK
) !=
3121 (le32toh(sed
->ed
.ed_headp
) & OHCI_HEADMASK
))
3122 usb_delay_ms(&sc
->sc_bus
, 2);
3124 if ((le32toh(sed
->ed
.ed_tailp
) & OHCI_HEADMASK
) !=
3125 (le32toh(sed
->ed
.ed_headp
) & OHCI_HEADMASK
))
3126 panic("%s: Intr pipe %p still has TDs queued",
3127 device_get_nameunit(sc
->sc_bus
.bdev
), pipe
);
3130 for (p
= sc
->sc_eds
[pos
]; p
&& p
->next
!= sed
; p
= p
->next
)
3134 panic("ohci_device_intr_close: ED not found");
3136 p
->next
= sed
->next
;
3137 p
->ed
.ed_nexted
= sed
->ed
.ed_nexted
;
3140 for (j
= 0; j
< nslots
; j
++)
3141 --sc
->sc_bws
[(pos
* nslots
+ j
) % OHCI_NO_INTRS
];
3143 ohci_free_std(sc
, opipe
->tail
.td
);
3144 ohci_free_sed(sc
, opipe
->sed
);
3148 ohci_device_setintr(ohci_softc_t
*sc
, struct ohci_pipe
*opipe
, int ival
)
3151 u_int npoll
, slow
, shigh
, nslots
;
3153 ohci_soft_ed_t
*hsed
, *sed
= opipe
->sed
;
3155 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe
));
3157 kprintf("ohci_setintr: 0 interval\n");
3158 return (USBD_INVAL
);
3161 npoll
= OHCI_NO_INTRS
;
3162 while (npoll
> ival
)
3164 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival
, npoll
));
3167 * We now know which level in the tree the ED must go into.
3168 * Figure out which slot has most bandwidth left over.
3174 * 8 7 8 9 10 11 12 13 14
3175 * N (N-1) .. (N-1+N-1)
3178 shigh
= slow
+ npoll
;
3179 nslots
= OHCI_NO_INTRS
/ npoll
;
3180 for (best
= i
= slow
, bestbw
= ~0; i
< shigh
; i
++) {
3182 for (j
= 0; j
< nslots
; j
++)
3183 bw
+= sc
->sc_bws
[(i
* nslots
+ j
) % OHCI_NO_INTRS
];
3189 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3190 best
, slow
, shigh
, bestbw
));
3193 hsed
= sc
->sc_eds
[best
];
3194 sed
->next
= hsed
->next
;
3195 sed
->ed
.ed_nexted
= hsed
->ed
.ed_nexted
;
3197 hsed
->ed
.ed_nexted
= htole32(sed
->physaddr
);
3200 for (j
= 0; j
< nslots
; j
++)
3201 ++sc
->sc_bws
[(best
* nslots
+ j
) % OHCI_NO_INTRS
];
3202 opipe
->u
.intr
.nslots
= nslots
;
3203 opipe
->u
.intr
.pos
= best
;
3205 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe
));
3206 return (USBD_NORMAL_COMPLETION
);
3209 /***********************/
3212 ohci_device_isoc_transfer(usbd_xfer_handle xfer
)
3216 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer
));
3218 /* Put it on our queue, */
3219 err
= usb_insert_transfer(xfer
);
3221 /* bail out on error, */
3222 if (err
&& err
!= USBD_IN_PROGRESS
)
3225 /* XXX should check inuse here */
3227 /* insert into schedule, */
3228 ohci_device_isoc_enter(xfer
);
3230 /* and start if the pipe wasn't running */
3232 ohci_device_isoc_start(STAILQ_FIRST(&xfer
->pipe
->queue
));
3238 ohci_device_isoc_enter(usbd_xfer_handle xfer
)
3240 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
3241 usbd_device_handle dev
= opipe
->pipe
.device
;
3242 ohci_softc_t
*sc
= (ohci_softc_t
*)dev
->bus
;
3243 ohci_soft_ed_t
*sed
= opipe
->sed
;
3244 struct iso
*iso
= &opipe
->u
.iso
;
3245 struct ohci_xfer
*oxfer
= (struct ohci_xfer
*)xfer
;
3246 ohci_soft_itd_t
*sitd
, *nsitd
;
3247 ohci_physaddr_t buf
, offs
, noffs
, bp0
, tdphys
;
3248 int i
, ncur
, nframes
;
3250 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3252 iso
->inuse
, iso
->next
, xfer
, xfer
->nframes
));
3257 if (iso
->next
== -1) {
3258 /* Not in use yet, schedule it a few frames ahead. */
3259 iso
->next
= le32toh(sc
->sc_hcca
->hcca_frame_number
) + 5;
3260 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3266 for (sitd
= xfer
->hcpriv
; sitd
!= NULL
&& sitd
->xfer
== xfer
;
3267 sitd
= sitd
->nextitd
)
3268 ohci_free_sitd(sc
, sitd
); /* Free ITDs in prev xfer*/
3272 sitd
= ohci_alloc_sitd(sc
);
3274 panic("can't alloc isoc");
3275 opipe
->tail
.itd
= sitd
;
3276 tdphys
= sitd
->physaddr
;
3277 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
); /* Stop*/
3279 sed
->ed
.ed_tailp
= htole32(tdphys
);
3280 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
); /* Start.*/
3284 sitd
= opipe
->tail
.itd
;
3285 buf
= DMAADDR(&xfer
->dmabuf
, 0);
3286 bp0
= OHCI_PAGE(buf
);
3287 offs
= OHCI_PAGE_OFFSET(buf
);
3288 nframes
= xfer
->nframes
;
3289 xfer
->hcpriv
= sitd
;
3290 for (i
= ncur
= 0; i
< nframes
; i
++, ncur
++) {
3291 noffs
= offs
+ xfer
->frlengths
[i
];
3292 if (ncur
== OHCI_ITD_NOFFSET
|| /* all offsets used */
3293 OHCI_PAGE(buf
+ noffs
) > bp0
+ OHCI_PAGE_SIZE
) { /* too many page crossings */
3295 /* Allocate next ITD */
3296 nsitd
= ohci_alloc_sitd(sc
);
3297 if (nsitd
== NULL
) {
3299 device_printf(sc
->sc_bus
.bdev
,
3300 "isoc TD alloc failed\n");
3304 /* Fill current ITD */
3305 sitd
->itd
.itd_flags
= htole32(
3307 OHCI_ITD_SET_SF(iso
->next
) |
3308 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3309 OHCI_ITD_SET_FC(ncur
));
3310 sitd
->itd
.itd_bp0
= htole32(bp0
);
3311 sitd
->nextitd
= nsitd
;
3312 sitd
->itd
.itd_nextitd
= htole32(nsitd
->physaddr
);
3313 sitd
->itd
.itd_be
= htole32(bp0
+ offs
- 1);
3315 sitd
->flags
= OHCI_ITD_ACTIVE
;
3318 iso
->next
= iso
->next
+ ncur
;
3319 bp0
= OHCI_PAGE(buf
+ offs
);
3322 sitd
->itd
.itd_offset
[ncur
] = htole16(OHCI_ITD_MK_OFFS(offs
));
3325 nsitd
= ohci_alloc_sitd(sc
);
3326 if (nsitd
== NULL
) {
3328 device_printf(sc
->sc_bus
.bdev
, "isoc TD alloc failed\n");
3331 /* Fixup last used ITD */
3332 sitd
->itd
.itd_flags
= htole32(
3334 OHCI_ITD_SET_SF(iso
->next
) |
3335 OHCI_ITD_SET_DI(0) |
3336 OHCI_ITD_SET_FC(ncur
));
3337 sitd
->itd
.itd_bp0
= htole32(bp0
);
3338 sitd
->nextitd
= nsitd
;
3339 sitd
->itd
.itd_nextitd
= htole32(nsitd
->physaddr
);
3340 sitd
->itd
.itd_be
= htole32(bp0
+ offs
- 1);
3342 sitd
->flags
= OHCI_CALL_DONE
| OHCI_ITD_ACTIVE
;
3344 iso
->next
= iso
->next
+ ncur
;
3345 iso
->inuse
+= nframes
;
3347 xfer
->actlen
= offs
; /* XXX pretend we did it all */
3349 xfer
->status
= USBD_IN_PROGRESS
;
3351 oxfer
->ohci_xfer_flags
|= OHCI_ISOC_DIRTY
;
3354 if (ohcidebug
> 5) {
3355 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3356 le32toh(sc
->sc_hcca
->hcca_frame_number
)));
3357 ohci_dump_itds(xfer
->hcpriv
);
3363 sed
->ed
.ed_tailp
= htole32(nsitd
->physaddr
);
3364 opipe
->tail
.itd
= nsitd
;
3365 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
);
3369 if (ohcidebug
> 5) {
3371 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3372 le32toh(sc
->sc_hcca
->hcca_frame_number
)));
3373 ohci_dump_itds(xfer
->hcpriv
);
3380 ohci_device_isoc_start(usbd_xfer_handle xfer
)
3382 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
3383 ohci_softc_t
*sc
= (ohci_softc_t
*)opipe
->pipe
.device
->bus
;
3384 ohci_soft_ed_t
*sed
;
3386 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer
));
3389 return (USBD_IOERROR
);
3392 if (xfer
->status
!= USBD_IN_PROGRESS
)
3393 kprintf("ohci_device_isoc_start: not in progress %p\n", xfer
);
3396 /* XXX anything to do? */
3399 sed
= opipe
->sed
; /* Turn off ED skip-bit to start processing */
3400 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
); /* ED's ITD list.*/
3403 return (USBD_IN_PROGRESS
);
3407 ohci_device_isoc_abort(usbd_xfer_handle xfer
)
3409 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)xfer
->pipe
;
3410 ohci_softc_t
*sc
= (ohci_softc_t
*)opipe
->pipe
.device
->bus
;
3411 ohci_soft_ed_t
*sed
;
3412 ohci_soft_itd_t
*sitd
, *tmp_sitd
;
3413 int undone
, num_sitds
;
3416 opipe
->aborting
= 1;
3418 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer
));
3420 /* Transfer is already done. */
3421 if (xfer
->status
!= USBD_NOT_STARTED
&&
3422 xfer
->status
!= USBD_IN_PROGRESS
) {
3424 kprintf("ohci_device_isoc_abort: early return\n");
3428 /* Give xfer the requested abort code. */
3429 xfer
->status
= USBD_CANCELLED
;
3432 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
); /* force hardware skip */
3435 sitd
= xfer
->hcpriv
;
3439 kprintf("ohci_device_isoc_abort: hcpriv==0\n");
3443 for (; sitd
!= NULL
&& sitd
->xfer
== xfer
; sitd
= sitd
->nextitd
) {
3446 DPRINTFN(1,("abort sets done sitd=%p\n", sitd
));
3454 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3455 * take a usb 1ms cycle. Conservatively wait for it to drain.
3456 * Even with DMA done, it can take awhile for the "batch"
3457 * delivery of completion interrupts to occur thru the controller.
3461 usb_delay_ms(&sc
->sc_bus
, 2*(num_sitds
*OHCI_ITD_NOFFSET
));
3464 tmp_sitd
= xfer
->hcpriv
;
3465 for (; tmp_sitd
!= NULL
&& tmp_sitd
->xfer
== xfer
;
3466 tmp_sitd
= tmp_sitd
->nextitd
) {
3467 if (OHCI_CC_NO_ERROR
==
3468 OHCI_ITD_GET_CC(le32toh(tmp_sitd
->itd
.itd_flags
)) &&
3469 tmp_sitd
->flags
& OHCI_ITD_ACTIVE
&&
3470 (tmp_sitd
->flags
& OHCI_ITD_INTFIN
) == 0)
3473 } while( undone
!= 0 );
3478 usb_transfer_complete(xfer
);
3482 * Only if there is a `next' sitd in next xfer...
3483 * unlink this xfer's sitds.
3485 sed
->ed
.ed_headp
= htole32(sitd
->physaddr
);
3487 sed
->ed
.ed_headp
= 0;
3489 sed
->ed
.ed_flags
&= htole32(~OHCI_ED_SKIP
); /* remove hardware skip */
3495 ohci_device_isoc_done(usbd_xfer_handle xfer
)
3497 /* This null routine corresponds to non-isoc "done()" routines
3498 * that free the stds associated with an xfer after a completed
3499 * xfer interrupt. However, in the case of isoc transfers, the
3500 * sitds associated with the transfer have already been processed
3501 * and reallocated for the next iteration by
3502 * "ohci_device_isoc_transfer()".
3504 * Routine "usb_transfer_complete()" is called at the end of every
3505 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3506 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3507 * pipeline by setting up the next transfer iteration) and 2) then
3508 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3509 * working for the ohci usb because this routine was trashing the
3510 * xfer set up for the next iteration (thus, only the first
3511 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3512 * this could all be re-factored, but that's another pass...
3517 ohci_setup_isoc(usbd_pipe_handle pipe
)
3519 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
3520 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
3521 struct iso
*iso
= &opipe
->u
.iso
;
3527 ohci_add_ed(opipe
->sed
, sc
->sc_isoc_head
);
3530 return (USBD_NORMAL_COMPLETION
);
3534 ohci_device_isoc_close(usbd_pipe_handle pipe
)
3536 struct ohci_pipe
*opipe
= (struct ohci_pipe
*)pipe
;
3537 ohci_softc_t
*sc
= (ohci_softc_t
*)pipe
->device
->bus
;
3538 ohci_soft_ed_t
*sed
;
3540 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe
));
3543 sed
->ed
.ed_flags
|= htole32(OHCI_ED_SKIP
); /* Stop device. */
3545 ohci_close_pipe(pipe
, sc
->sc_isoc_head
); /* Stop isoc list, free ED.*/
3547 /* up to NISOREQs xfers still outstanding. */
3550 opipe
->tail
.itd
->isdone
= 1;
3552 ohci_free_sitd(sc
, opipe
->tail
.itd
); /* Next `avail free' sitd.*/