?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Nuke device_ptr_t, USBBASEDEVICE, USBDEVNAME(), USBDEVUNIT(), USBGETSOFTC(),
[dragonfly.git] / sys / bus / usb / ohci.c
blobe19418fbc82ec82262a722ad97cdb1e135152dda
1 /* $NetBSD: ohci.c,v 1.138 2003/02/08 03:32:50 ichiro Exp $ */
2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.154.2.4 2006/06/26 00:31:25 iedowse Exp $ */
3 /* $DragonFly: src/sys/bus/usb/ohci.c,v 1.21 2007/06/28 06:32:31 hasso Exp $ */
4
5 /* Also, already ported:
6 * $NetBSD: ohci.c,v 1.140 2003/05/13 04:42:00 gson Exp $
7 * $NetBSD: ohci.c,v 1.141 2003/09/10 20:08:29 mycroft Exp $
8 * $NetBSD: ohci.c,v 1.142 2003/10/11 03:04:26 toshii Exp $
9 * $NetBSD: ohci.c,v 1.143 2003/10/18 04:50:35 simonb Exp $
10 * $NetBSD: ohci.c,v 1.144 2003/11/23 19:18:06 augustss Exp $
11 * $NetBSD: ohci.c,v 1.145 2003/11/23 19:20:25 augustss Exp $
12 * $NetBSD: ohci.c,v 1.146 2003/12/29 08:17:10 toshii Exp $
13 * $NetBSD: ohci.c,v 1.147 2004/06/22 07:20:35 mycroft Exp $
14 * $NetBSD: ohci.c,v 1.148 2004/06/22 18:27:46 mycroft Exp $
15 */
16
17 /*
18 * Copyright (c) 1998 The NetBSD Foundation, Inc.
19 * All rights reserved.
20 *
21 * This code is derived from software contributed to The NetBSD Foundation
22 * by Lennart Augustsson (lennart@augustsson.net) at
23 * Carlstedt Research & Technology.
24 *
25 * Redistribution and use in source and binary forms, with or without
26 * modification, are permitted provided that the following conditions
27 * are met:
28 * 1. Redistributions of source code must retain the above copyright
29 * notice, this list of conditions and the following disclaimer.
30 * 2. Redistributions in binary form must reproduce the above copyright
31 * notice, this list of conditions and the following disclaimer in the
32 * documentation and/or other materials provided with the distribution.
33 * 3. All advertising materials mentioning features or use of this software
34 * must display the following acknowledgement:
35 * This product includes software developed by the NetBSD
36 * Foundation, Inc. and its contributors.
37 * 4. Neither the name of The NetBSD Foundation nor the names of its
38 * contributors may be used to endorse or promote products derived
39 * from this software without specific prior written permission.
40 *
41 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
42 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
43 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
44 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
45 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
46 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
47 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
48 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
49 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
50 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
51 * POSSIBILITY OF SUCH DAMAGE.
52 */
53
54 /*
55 * USB Open Host Controller driver.
56 *
57 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
58 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
59 */
60
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/malloc.h>
64 #include <sys/kernel.h>
65 #include <sys/endian.h>
66 #include <sys/module.h>
67 #include <sys/bus.h>
68 #if defined(DIAGNOSTIC) && defined(__i386__)
69 #include <machine/cpu.h>
70 #endif
71 #include <sys/proc.h>
72 #include <sys/queue.h>
73 #include <sys/sysctl.h>
74 #include <sys/thread2.h>
75
76 #include <machine/endian.h>
77
78 #include <bus/usb/usb.h>
79 #include <bus/usb/usbdi.h>
80 #include <bus/usb/usbdivar.h>
81 #include <bus/usb/usb_mem.h>
82 #include <bus/usb/usb_quirks.h>
83
84 #include <bus/usb/ohcireg.h>
85 #include <bus/usb/ohcivar.h>
86
87 #define delay(d) DELAY(d)
88
89 #ifdef USB_DEBUG
90 #define DPRINTF(x) if (ohcidebug) logprintf x
91 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
92 int ohcidebug = 0;
93 SYSCTL_NODE(_hw_usb, OID_AUTO, ohci, CTLFLAG_RW, 0, "USB ohci");
94 SYSCTL_INT(_hw_usb_ohci, OID_AUTO, debug, CTLFLAG_RW,
95 &ohcidebug, 0, "ohci debug level");
96 #define bitmask_snprintf(q,f,b,l) ksnprintf((b), (l), "%b", (q), (f))
97 #else
98 #define DPRINTF(x)
99 #define DPRINTFN(n,x)
100 #endif
101
102 struct ohci_pipe;
103
104 static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
105 static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
106
107 static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
108 static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
109
110 static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
111 static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
112
113 #if 0
114 static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
115 ohci_soft_td_t *);
116 #endif
117 static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
118 ohci_softc_t *, int, int, usbd_xfer_handle,
119 ohci_soft_td_t *, ohci_soft_td_t **);
120
121 static usbd_status ohci_open(usbd_pipe_handle);
122 static void ohci_poll(struct usbd_bus *);
123 static void ohci_softintr(void *);
124 static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
125 static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
126 static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
127
128 static usbd_status ohci_device_request(usbd_xfer_handle xfer);
129 static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
130 static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
131 static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
132 static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
133 static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
134 static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
135 static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
136 static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
137
138 static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
139 static void ohci_device_isoc_enter(usbd_xfer_handle);
140
141 static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
142 static void ohci_freem(struct usbd_bus *, usb_dma_t *);
143
144 static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
145 static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
146
147 static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
148 static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
149 static void ohci_root_ctrl_abort(usbd_xfer_handle);
150 static void ohci_root_ctrl_close(usbd_pipe_handle);
151 static void ohci_root_ctrl_done(usbd_xfer_handle);
152
153 static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
154 static usbd_status ohci_root_intr_start(usbd_xfer_handle);
155 static void ohci_root_intr_abort(usbd_xfer_handle);
156 static void ohci_root_intr_close(usbd_pipe_handle);
157 static void ohci_root_intr_done(usbd_xfer_handle);
158
159 static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
160 static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
161 static void ohci_device_ctrl_abort(usbd_xfer_handle);
162 static void ohci_device_ctrl_close(usbd_pipe_handle);
163 static void ohci_device_ctrl_done(usbd_xfer_handle);
164
165 static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
166 static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
167 static void ohci_device_bulk_abort(usbd_xfer_handle);
168 static void ohci_device_bulk_close(usbd_pipe_handle);
169 static void ohci_device_bulk_done(usbd_xfer_handle);
170
171 static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
172 static usbd_status ohci_device_intr_start(usbd_xfer_handle);
173 static void ohci_device_intr_abort(usbd_xfer_handle);
174 static void ohci_device_intr_close(usbd_pipe_handle);
175 static void ohci_device_intr_done(usbd_xfer_handle);
176
177 static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
178 static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
179 static void ohci_device_isoc_abort(usbd_xfer_handle);
180 static void ohci_device_isoc_close(usbd_pipe_handle);
181 static void ohci_device_isoc_done(usbd_xfer_handle);
182
183 static usbd_status ohci_device_setintr(ohci_softc_t *sc,
184 struct ohci_pipe *pipe, int ival);
185
186 static int ohci_str(usb_string_descriptor_t *, int, const char *);
187
188 static void ohci_timeout(void *);
189 static void ohci_timeout_task(void *);
190 static void ohci_rhsc_able(ohci_softc_t *, int);
191 static void ohci_rhsc_enable(void *);
192
193 static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
194 static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
195
196 static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
197 static void ohci_noop(usbd_pipe_handle pipe);
198
199 static usbd_status ohci_controller_init(ohci_softc_t *sc);
200
201 #ifdef USB_DEBUG
202 static void ohci_dumpregs(ohci_softc_t *);
203 static void ohci_dump_tds(ohci_soft_td_t *);
204 static void ohci_dump_td(ohci_soft_td_t *);
205 static void ohci_dump_ed(ohci_soft_ed_t *);
206 static void ohci_dump_itd(ohci_soft_itd_t *);
207 static void ohci_dump_itds(ohci_soft_itd_t *);
208 #endif
209
210 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
211 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
212 #define OWRITE1(sc, r, x) \
213 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
214 #define OWRITE2(sc, r, x) \
215 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
216 #define OWRITE4(sc, r, x) \
217 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
218 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
219 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
220 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
221
222 /* Reverse the bits in a value 0 .. 31 */
223 static u_int8_t revbits[OHCI_NO_INTRS] =
224 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
225 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
226 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
227 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
228
229 struct ohci_pipe {
230 struct usbd_pipe pipe;
231 ohci_soft_ed_t *sed;
232 u_int32_t aborting;
233 union {
234 ohci_soft_td_t *td;
235 ohci_soft_itd_t *itd;
236 } tail;
237 /* Info needed for different pipe kinds. */
238 union {
239 /* Control pipe */
240 struct {
241 usb_dma_t reqdma;
242 u_int length;
243 ohci_soft_td_t *setup, *data, *stat;
244 } ctl;
245 /* Interrupt pipe */
246 struct {
247 int nslots;
248 int pos;
249 } intr;
250 /* Bulk pipe */
251 struct {
252 u_int length;
253 int isread;
254 } bulk;
255 /* Iso pipe */
256 struct iso {
257 int next, inuse;
258 } iso;
259 } u;
260 };
261
262 #define OHCI_INTR_ENDPT 1
263
264 static struct usbd_bus_methods ohci_bus_methods = {
265 ohci_open,
266 ohci_softintr,
267 ohci_poll,
268 ohci_allocm,
269 ohci_freem,
270 ohci_allocx,
271 ohci_freex,
272 };
273
274 static struct usbd_pipe_methods ohci_root_ctrl_methods = {
275 ohci_root_ctrl_transfer,
276 ohci_root_ctrl_start,
277 ohci_root_ctrl_abort,
278 ohci_root_ctrl_close,
279 ohci_noop,
280 ohci_root_ctrl_done,
281 };
282
283 static struct usbd_pipe_methods ohci_root_intr_methods = {
284 ohci_root_intr_transfer,
285 ohci_root_intr_start,
286 ohci_root_intr_abort,
287 ohci_root_intr_close,
288 ohci_noop,
289 ohci_root_intr_done,
290 };
291
292 static struct usbd_pipe_methods ohci_device_ctrl_methods = {
293 ohci_device_ctrl_transfer,
294 ohci_device_ctrl_start,
295 ohci_device_ctrl_abort,
296 ohci_device_ctrl_close,
297 ohci_noop,
298 ohci_device_ctrl_done,
299 };
300
301 static struct usbd_pipe_methods ohci_device_intr_methods = {
302 ohci_device_intr_transfer,
303 ohci_device_intr_start,
304 ohci_device_intr_abort,
305 ohci_device_intr_close,
306 ohci_device_clear_toggle,
307 ohci_device_intr_done,
308 };
309
310 static struct usbd_pipe_methods ohci_device_bulk_methods = {
311 ohci_device_bulk_transfer,
312 ohci_device_bulk_start,
313 ohci_device_bulk_abort,
314 ohci_device_bulk_close,
315 ohci_device_clear_toggle,
316 ohci_device_bulk_done,
317 };
318
319 static struct usbd_pipe_methods ohci_device_isoc_methods = {
320 ohci_device_isoc_transfer,
321 ohci_device_isoc_start,
322 ohci_device_isoc_abort,
323 ohci_device_isoc_close,
324 ohci_noop,
325 ohci_device_isoc_done,
326 };
327
328 int
329 ohci_detach(struct ohci_softc *sc, int flags)
330 {
331 int i, rv = 0;
332
333 sc->sc_dying = 1;
334
335 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
336
337 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
338 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
339
340 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
341
342 for (i = 0; i < OHCI_NO_EDS; i++)
343 ohci_free_sed(sc, sc->sc_eds[i]);
344 ohci_free_sed(sc, sc->sc_isoc_head);
345 ohci_free_sed(sc, sc->sc_bulk_head);
346 ohci_free_sed(sc, sc->sc_ctrl_head);
347 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
348
349 return (rv);
350 }
351
352 ohci_soft_ed_t *
353 ohci_alloc_sed(ohci_softc_t *sc)
354 {
355 ohci_soft_ed_t *sed;
356 usbd_status err;
357 int i, offs;
358 usb_dma_t dma;
359
360 if (sc->sc_freeeds == NULL) {
361 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
362 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
363 OHCI_ED_ALIGN, &dma);
364 if (err)
365 return (NULL);
366 for(i = 0; i < OHCI_SED_CHUNK; i++) {
367 offs = i * OHCI_SED_SIZE;
368 sed = KERNADDR(&dma, offs);
369 sed->physaddr = DMAADDR(&dma, offs);
370 sed->next = sc->sc_freeeds;
371 sc->sc_freeeds = sed;
372 }
373 }
374 sed = sc->sc_freeeds;
375 sc->sc_freeeds = sed->next;
376 memset(&sed->ed, 0, sizeof(ohci_ed_t));
377 sed->next = 0;
378 return (sed);
379 }
380
381 void
382 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
383 {
384 sed->next = sc->sc_freeeds;
385 sc->sc_freeeds = sed;
386 }
387
388 ohci_soft_td_t *
389 ohci_alloc_std(ohci_softc_t *sc)
390 {
391 ohci_soft_td_t *std;
392 usbd_status err;
393 int i, offs;
394 usb_dma_t dma;
395
396 if (sc->sc_freetds == NULL) {
397 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
398 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
399 OHCI_TD_ALIGN, &dma);
400 if (err)
401 return (NULL);
402 crit_enter();
403 for(i = 0; i < OHCI_STD_CHUNK; i++) {
404 offs = i * OHCI_STD_SIZE;
405 std = KERNADDR(&dma, offs);
406 std->physaddr = DMAADDR(&dma, offs);
407 std->nexttd = sc->sc_freetds;
408 sc->sc_freetds = std;
409 }
410 crit_exit();
411 }
412
413 crit_enter();
414 std = sc->sc_freetds;
415 sc->sc_freetds = std->nexttd;
416 memset(&std->td, 0, sizeof(ohci_td_t));
417 std->nexttd = NULL;
418 std->xfer = NULL;
419 ohci_hash_add_td(sc, std);
420 crit_exit();
421
422 return (std);
423 }
424
425 void
426 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
427 {
428 crit_enter();
429 ohci_hash_rem_td(sc, std);
430 std->nexttd = sc->sc_freetds;
431 sc->sc_freetds = std;
432 crit_exit();
433 }
434
435 usbd_status
436 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
437 int alen, int rd, usbd_xfer_handle xfer,
438 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
439 {
440 ohci_soft_td_t *next, *cur;
441 ohci_physaddr_t dataphys;
442 u_int32_t tdflags;
443 int offset = 0;
444 int len, curlen;
445 usb_dma_t *dma = &xfer->dmabuf;
446 u_int16_t flags = xfer->flags;
447
448 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
449
450 len = alen;
451 cur = sp;
452
453 tdflags = htole32(
454 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
455 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
456 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_SET_DI(6));
457
458 for (;;) {
459 next = ohci_alloc_std(sc);
460 if (next == NULL)
461 goto nomem;
462
463 dataphys = DMAADDR(dma, offset);
464
465 /*
466 * The OHCI hardware can handle at most one 4k crossing.
467 * XXX - currently we only allocate contigous buffers, but
468 * the OHCI spec says: If during the data transfer the buffer
469 * address contained in the HC's working copy of
470 * CurrentBufferPointer crosses a 4K boundary, the upper 20
471 * bits of Buffer End are copied to the working value of
472 * CurrentBufferPointer causing the next buffer address to
473 * be the 0th byte in the same 4K page that contains the
474 * last byte of the buffer (the 4K boundary crossing may
475 * occur within a data packet transfer.)
476 *
477 * If/when dma has multiple segments, this will need to
478 * properly handle fragmenting TD's.
479 *
480 * Note that if we are gathering data from multiple SMALL
481 * segments, e.g. mbufs, we need to do special gymnastics,
482 * e.g. bounce buffering or data aggregation,
483 * BEFORE WE GET HERE because a bulk USB transfer must
484 * consist of maximally sized packets right up to the end.
485 * A shorter than maximal packet means that it is the end
486 * of the transfer. If the data transfer length is a
487 * multiple of the packet size, then a 0 byte
488 * packet will be the signal of the end of transfer.
489 * Since packets can't cross TDs this means that
490 * each TD except the last one must cover an exact multiple
491 * of the maximal packet length.
492 */
493 if (OHCI_PAGE_OFFSET(dataphys) + len <= (2 * OHCI_PAGE_SIZE)) {
494 /* We can handle all that remains in this TD */
495 curlen = len;
496 } else {
497 /* must use multiple TDs, fill as much as possible. */
498 curlen = 2 * OHCI_PAGE_SIZE -
499 OHCI_PAGE_OFFSET(dataphys);
500 /* the length must be a multiple of the max size */
501 curlen -= curlen %
502 UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
503 KASSERT((curlen != 0), ("ohci_alloc_std: curlen == 0"));
504 }
505 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
506 "len=%d curlen=%d\n",
507 dataphys, len, curlen));
508 len -= curlen;
509
510 cur->td.td_flags = tdflags;
511 cur->td.td_cbp = htole32(dataphys);
512 cur->nexttd = next;
513 cur->td.td_nexttd = htole32(next->physaddr);
514 cur->td.td_be = htole32(DMAADDR(dma, offset + curlen - 1));
515 cur->len = curlen;
516 cur->flags = OHCI_ADD_LEN;
517 cur->xfer = xfer;
518 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
519 dataphys, dataphys + curlen - 1));
520 if (len == 0)
521 break;
522 if (len < 0)
523 panic("Length went negative: %d curlen %d dma %p offset %08x", len, curlen, dma, (int)0);
524
525 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
526 offset += curlen;
527 cur = next;
528 }
529 if ((flags & USBD_FORCE_SHORT_XFER) &&
530 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
531 /* Force a 0 length transfer at the end. */
532
533 cur = next;
534
535 next = ohci_alloc_std(sc);
536 if (next == NULL)
537 goto nomem;
538
539 cur->td.td_flags = tdflags;
540 cur->td.td_cbp = 0; /* indicate 0 length packet */
541 cur->nexttd = next;
542 cur->td.td_nexttd = htole32(next->physaddr);
543 cur->td.td_be = ~0;
544 cur->len = 0;
545 cur->flags = 0;
546 cur->xfer = xfer;
547 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
548 }
549 *ep = cur;
550
551 return (USBD_NORMAL_COMPLETION);
552
553 nomem:
554 /* XXX free chain */
555 return (USBD_NOMEM);
556 }
557
558 #if 0
559 static void
560 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
561 ohci_soft_td_t *stdend)
562 {
563 ohci_soft_td_t *p;
564
565 for (; std != stdend; std = p) {
566 p = std->nexttd;
567 ohci_free_std(sc, std);
568 }
569 }
570 #endif
571
572 ohci_soft_itd_t *
573 ohci_alloc_sitd(ohci_softc_t *sc)
574 {
575 ohci_soft_itd_t *sitd;
576 usbd_status err;
577 int i, offs;
578 usb_dma_t dma;
579
580 crit_enter();
581 if (sc->sc_freeitds == NULL) {
582 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
583 crit_exit();
584 err = usb_allocmem(&sc->sc_bus,
585 OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
586 OHCI_ITD_ALIGN, &dma);
587 if (err)
588 return (NULL);
589 crit_enter();
590 for (i = 0; i < OHCI_SITD_CHUNK; i++) {
591 offs = i * OHCI_SITD_SIZE;
592 sitd = KERNADDR(&dma, offs);
593 sitd->physaddr = DMAADDR(&dma, offs);
594 sitd->nextitd = sc->sc_freeitds;
595 sc->sc_freeitds = sitd;
596 }
597 }
598 sitd = sc->sc_freeitds;
599 sc->sc_freeitds = sitd->nextitd;
600 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
601 sitd->nextitd = NULL;
602 sitd->xfer = NULL;
603 ohci_hash_add_itd(sc, sitd);
604 crit_exit();
605
606 #ifdef DIAGNOSTIC
607 sitd->isdone = 0;
608 #endif
609
610 return (sitd);
611 }
612
613 void
614 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
615 {
616 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
617
618 #ifdef DIAGNOSTIC
619 if (!sitd->isdone) {
620 panic("ohci_free_sitd: sitd=%p not done", sitd);
621 return;
622 }
623 /* Warn double free */
624 sitd->isdone = 0;
625 #endif
626
627 crit_enter();
628 ohci_hash_rem_itd(sc, sitd);
629 sitd->nextitd = sc->sc_freeitds;
630 sc->sc_freeitds = sitd;
631 crit_exit();
632 }
633
634 usbd_status
635 ohci_init(ohci_softc_t *sc)
636 {
637 ohci_soft_ed_t *sed, *psed;
638 usbd_status err;
639 int i;
640 u_int32_t rev;
641
642 DPRINTF(("ohci_init: start\n"));
643 kprintf("%s:", device_get_nameunit(sc->sc_bus.bdev));
644 rev = OREAD4(sc, OHCI_REVISION);
645 kprintf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
646 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
647
648 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
649 kprintf("%s: unsupported OHCI revision\n",
650 device_get_nameunit(sc->sc_bus.bdev));
651 sc->sc_bus.usbrev = USBREV_UNKNOWN;
652 return (USBD_INVAL);
653 }
654 sc->sc_bus.usbrev = USBREV_1_0;
655
656 for (i = 0; i < OHCI_HASH_SIZE; i++)
657 LIST_INIT(&sc->sc_hash_tds[i]);
658 for (i = 0; i < OHCI_HASH_SIZE; i++)
659 LIST_INIT(&sc->sc_hash_itds[i]);
660
661 SIMPLEQ_INIT(&sc->sc_free_xfers);
662
663 /* XXX determine alignment by R/W */
664 /* Allocate the HCCA area. */
665 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
666 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
667 if (err)
668 return (err);
669 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
670 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
671
672 sc->sc_eintrs = OHCI_NORMAL_INTRS;
673
674 /* Allocate dummy ED that starts the control list. */
675 sc->sc_ctrl_head = ohci_alloc_sed(sc);
676 if (sc->sc_ctrl_head == NULL) {
677 err = USBD_NOMEM;
678 goto bad1;
679 }
680 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
681
682 /* Allocate dummy ED that starts the bulk list. */
683 sc->sc_bulk_head = ohci_alloc_sed(sc);
684 if (sc->sc_bulk_head == NULL) {
685 err = USBD_NOMEM;
686 goto bad2;
687 }
688 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
689
690 /* Allocate dummy ED that starts the isochronous list. */
691 sc->sc_isoc_head = ohci_alloc_sed(sc);
692 if (sc->sc_isoc_head == NULL) {
693 err = USBD_NOMEM;
694 goto bad3;
695 }
696 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
697
698 /* Allocate all the dummy EDs that make up the interrupt tree. */
699 for (i = 0; i < OHCI_NO_EDS; i++) {
700 sed = ohci_alloc_sed(sc);
701 if (sed == NULL) {
702 while (--i >= 0)
703 ohci_free_sed(sc, sc->sc_eds[i]);
704 err = USBD_NOMEM;
705 goto bad4;
706 }
707 /* All ED fields are set to 0. */
708 sc->sc_eds[i] = sed;
709 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
710 if (i != 0)
711 psed = sc->sc_eds[(i-1) / 2];
712 else
713 psed= sc->sc_isoc_head;
714 sed->next = psed;
715 sed->ed.ed_nexted = htole32(psed->physaddr);
716 }
717 /*
718 * Fill HCCA interrupt table. The bit reversal is to get
719 * the tree set up properly to spread the interrupts.
720 */
721 for (i = 0; i < OHCI_NO_INTRS; i++)
722 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
723 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
724
725 #ifdef USB_DEBUG
726 if (ohcidebug > 15) {
727 for (i = 0; i < OHCI_NO_EDS; i++) {
728 kprintf("ed#%d ", i);
729 ohci_dump_ed(sc->sc_eds[i]);
730 }
731 kprintf("iso ");
732 ohci_dump_ed(sc->sc_isoc_head);
733 }
734 #endif
735
736 err = ohci_controller_init(sc);
737 if (err != USBD_NORMAL_COMPLETION)
738 goto bad5;
739
740 /* Set up the bus struct. */
741 sc->sc_bus.methods = &ohci_bus_methods;
742 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
743
744 usb_callout_init(sc->sc_tmo_rhsc);
745
746 return (USBD_NORMAL_COMPLETION);
747
748 bad5:
749 for (i = 0; i < OHCI_NO_EDS; i++)
750 ohci_free_sed(sc, sc->sc_eds[i]);
751 bad4:
752 ohci_free_sed(sc, sc->sc_isoc_head);
753 bad3:
754 ohci_free_sed(sc, sc->sc_bulk_head);
755 bad2:
756 ohci_free_sed(sc, sc->sc_ctrl_head);
757 bad1:
758 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
759 return (err);
760 }
761
762 static usbd_status
763 ohci_controller_init(ohci_softc_t *sc)
764 {
765 int i;
766 u_int32_t s, ctl, ival, hcr, fm, per, desca;
767
768 /* Determine in what context we are running. */
769 ctl = OREAD4(sc, OHCI_CONTROL);
770 if (ctl & OHCI_IR) {
771 /* SMM active, request change */
772 DPRINTF(("ohci_init: SMM active, request owner change\n"));
773 s = OREAD4(sc, OHCI_COMMAND_STATUS);
774 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
775 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
776 usb_delay_ms(&sc->sc_bus, 1);
777 ctl = OREAD4(sc, OHCI_CONTROL);
778 }
779 if ((ctl & OHCI_IR) == 0) {
780 kprintf("%s: SMM does not respond, resetting\n",
781 device_get_nameunit(sc->sc_bus.bdev));
782 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
783 goto reset;
784 }
785 #if 0
786 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
787 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
788 /* BIOS started controller. */
789 DPRINTF(("ohci_init: BIOS active\n"));
790 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
791 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
792 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
793 }
794 #endif
795 } else {
796 DPRINTF(("ohci_init: cold started\n"));
797 reset:
798 /* Controller was cold started. */
799 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
800 }
801
802 /*
803 * This reset should not be necessary according to the OHCI spec, but
804 * without it some controllers do not start.
805 */
806 DPRINTF(("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev)));
807 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
808 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
809
810 /* We now own the host controller and the bus has been reset. */
811 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
812
813 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
814 /* Nominal time for a reset is 10 us. */
815 for (i = 0; i < 10; i++) {
816 delay(10);
817 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
818 if (!hcr)
819 break;
820 }
821 if (hcr) {
822 kprintf("%s: reset timeout\n", device_get_nameunit(sc->sc_bus.bdev));
823 return (USBD_IOERROR);
824 }
825 #ifdef USB_DEBUG
826 if (ohcidebug > 15)
827 ohci_dumpregs(sc);
828 #endif
829
830 /* The controller is now in SUSPEND state, we have 2ms to finish. */
831
832 /* Set up HC registers. */
833 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
834 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
835 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
836 /* disable all interrupts and then switch on all desired interrupts */
837 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
838 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
839 /* switch on desired functional features */
840 ctl = OREAD4(sc, OHCI_CONTROL);
841 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
842 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
843 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
844 /* And finally start it! */
845 OWRITE4(sc, OHCI_CONTROL, ctl);
846
847 /*
848 * The controller is now OPERATIONAL. Set a some final
849 * registers that should be set earlier, but that the
850 * controller ignores when in the SUSPEND state.
851 */
852 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
853 fm |= OHCI_FSMPS(ival) | ival;
854 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
855 per = OHCI_PERIODIC(ival); /* 90% periodic */
856 OWRITE4(sc, OHCI_PERIODIC_START, per);
857
858 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
859 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
860 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
861 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
862 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
863 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
864
865 /*
866 * The AMD756 requires a delay before re-reading the register,
867 * otherwise it will occasionally report 0 ports.
868 */
869 sc->sc_noport = 0;
870 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
871 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
872 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
873 }
874
875 #ifdef USB_DEBUG
876 if (ohcidebug > 5)
877 ohci_dumpregs(sc);
878 #endif
879 return (USBD_NORMAL_COMPLETION);
880 }
881
882 usbd_status
883 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
884 {
885 return (usb_allocmem(bus, size, 0, dma));
886 }
887
888 void
889 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
890 {
891 usb_freemem(bus, dma);
892 }
893
894 usbd_xfer_handle
895 ohci_allocx(struct usbd_bus *bus)
896 {
897 struct ohci_softc *sc = (struct ohci_softc *)bus;
898 usbd_xfer_handle xfer;
899
900 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
901 if (xfer != NULL) {
902 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
903 #ifdef DIAGNOSTIC
904 if (xfer->busy_free != XFER_FREE) {
905 kprintf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
906 xfer->busy_free);
907 }
908 #endif
909 } else {
910 xfer = kmalloc(sizeof(struct ohci_xfer), M_USB, M_INTWAIT);
911 }
912 if (xfer != NULL) {
913 memset(xfer, 0, sizeof (struct ohci_xfer));
914 usb_init_task(&OXFER(xfer)->abort_task, ohci_timeout_task,
915 xfer);
916 OXFER(xfer)->ohci_xfer_flags = 0;
917 #ifdef DIAGNOSTIC
918 xfer->busy_free = XFER_BUSY;
919 #endif
920 }
921 return (xfer);
922 }
923
924 void
925 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
926 {
927 struct ohci_softc *sc = (struct ohci_softc *)bus;
928 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
929 ohci_soft_itd_t *sitd;
930
931 if (oxfer->ohci_xfer_flags & OHCI_ISOC_DIRTY) {
932 crit_enter();
933 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
934 sitd = sitd->nextitd)
935 ohci_free_sitd(sc, sitd);
936 crit_exit();
937 }
938
939 #ifdef DIAGNOSTIC
940 if (xfer->busy_free != XFER_BUSY) {
941 kprintf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
942 xfer->busy_free);
943 return;
944 }
945 xfer->busy_free = XFER_FREE;
946 #endif
947 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
948 }
949
950 /*
951 * Shut down the controller when the system is going down.
952 */
953 void
954 ohci_shutdown(void *v)
955 {
956 ohci_softc_t *sc = v;
957
958 DPRINTF(("ohci_shutdown: stopping the HC\n"));
959 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
960 }
961
962 /*
963 * Handle suspend/resume.
964 *
965 * We need to switch to polling mode here, because this routine is
966 * called from an intterupt context. This is all right since we
967 * are almost suspended anyway.
968 */
969 void
970 ohci_power(int why, void *v)
971 {
972 ohci_softc_t *sc = v;
973 u_int32_t ctl;
974
975 #ifdef USB_DEBUG
976 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
977 ohci_dumpregs(sc);
978 #endif
979
980 crit_enter();
981 if (why != PWR_RESUME) {
982 sc->sc_bus.use_polling++;
983 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
984 if (sc->sc_control == 0) {
985 /*
986 * Preserve register values, in case that APM BIOS
987 * does not recover them.
988 */
989 sc->sc_control = ctl;
990 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
991 }
992 ctl |= OHCI_HCFS_SUSPEND;
993 OWRITE4(sc, OHCI_CONTROL, ctl);
994 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
995 sc->sc_bus.use_polling--;
996 } else {
997 sc->sc_bus.use_polling++;
998
999 /* Some broken BIOSes never initialize Controller chip */
1000 ohci_controller_init(sc);
1001
1002 if (sc->sc_intre)
1003 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1004 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1005 if (sc->sc_control)
1006 ctl = sc->sc_control;
1007 else
1008 ctl = OREAD4(sc, OHCI_CONTROL);
1009 ctl |= OHCI_HCFS_RESUME;
1010 OWRITE4(sc, OHCI_CONTROL, ctl);
1011 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1012 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1013 OWRITE4(sc, OHCI_CONTROL, ctl);
1014 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1015 sc->sc_control = sc->sc_intre = 0;
1016 sc->sc_bus.use_polling--;
1017 }
1018 crit_exit();
1019 }
1020
1021 #ifdef USB_DEBUG
1022 void
1023 ohci_dumpregs(ohci_softc_t *sc)
1024 {
1025 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1026 OREAD4(sc, OHCI_REVISION),
1027 OREAD4(sc, OHCI_CONTROL),
1028 OREAD4(sc, OHCI_COMMAND_STATUS)));
1029 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1030 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1031 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1032 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1033 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1034 OREAD4(sc, OHCI_HCCA),
1035 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1036 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1037 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1038 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1039 OREAD4(sc, OHCI_BULK_HEAD_ED),
1040 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1041 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1042 OREAD4(sc, OHCI_DONE_HEAD),
1043 OREAD4(sc, OHCI_FM_INTERVAL),
1044 OREAD4(sc, OHCI_FM_REMAINING)));
1045 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1046 OREAD4(sc, OHCI_FM_NUMBER),
1047 OREAD4(sc, OHCI_PERIODIC_START),
1048 OREAD4(sc, OHCI_LS_THRESHOLD)));
1049 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1050 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1051 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1052 OREAD4(sc, OHCI_RH_STATUS)));
1053 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1054 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1055 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1056 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1057 le32toh(sc->sc_hcca->hcca_frame_number),
1058 le32toh(sc->sc_hcca->hcca_done_head)));
1059 }
1060 #endif
1061
1062 static int ohci_intr1(ohci_softc_t *);
1063
1064 int
1065 ohci_intr(void *p)
1066 {
1067 ohci_softc_t *sc = p;
1068
1069 if (sc->sc_dying || (sc->sc_flags & OHCI_SCFLG_DONEINIT) == 0)
1070 return (0);
1071
1072 /* If we get an interrupt while polling, then just ignore it. */
1073 if (sc->sc_bus.use_polling) {
1074 #ifdef DIAGNOSTIC
1075 DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1076 #endif
1077 return (0);
1078 }
1079
1080 return (ohci_intr1(sc));
1081 }
1082
1083 static int
1084 ohci_intr1(ohci_softc_t *sc)
1085 {
1086 u_int32_t intrs, eintrs;
1087 ohci_physaddr_t done;
1088
1089 DPRINTFN(14,("ohci_intr1: enter\n"));
1090
1091 /* In case the interrupt occurs before initialization has completed. */
1092 if (sc->sc_hcca == NULL) {
1093 #ifdef DIAGNOSTIC
1094 kprintf("ohci_intr: sc->sc_hcca == NULL\n");
1095 #endif
1096 return (0);
1097 }
1098
1099 intrs = 0;
1100 done = le32toh(sc->sc_hcca->hcca_done_head);
1101
1102 /* The LSb of done is used to inform the HC Driver that an interrupt
1103 * condition exists for both the Done list and for another event
1104 * recorded in HcInterruptStatus. On an interrupt from the HC, the HC
1105 * Driver checks the HccaDoneHead Value. If this value is 0, then the
1106 * interrupt was caused by other than the HccaDoneHead update and the
1107 * HcInterruptStatus register needs to be accessed to determine that
1108 * exact interrupt cause. If HccaDoneHead is nonzero, then a Done list
1109 * update interrupt is indicated and if the LSb of done is nonzero,
1110 * then an additional interrupt event is indicated and
1111 * HcInterruptStatus should be checked to determine its cause.
1112 */
1113 if (done != 0) {
1114 if (done & ~OHCI_DONE_INTRS)
1115 intrs = OHCI_WDH;
1116 if (done & OHCI_DONE_INTRS) {
1117 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1118 done &= ~OHCI_DONE_INTRS;
1119 }
1120 sc->sc_hcca->hcca_done_head = 0;
1121 } else
1122 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & ~OHCI_WDH;
1123
1124 if (intrs == 0) /* nothing to be done (PCI shared interrupt) */
1125 return (0);
1126
1127 intrs &= ~OHCI_MIE;
1128 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1129 eintrs = intrs & sc->sc_eintrs;
1130 if (!eintrs)
1131 return (0);
1132
1133 sc->sc_bus.intr_context++;
1134 sc->sc_bus.no_intrs++;
1135 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1136 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1137 (u_int)eintrs));
1138
1139 if (eintrs & OHCI_SO) {
1140 sc->sc_overrun_cnt++;
1141 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1142 kprintf("%s: %u scheduling overruns\n",
1143 device_get_nameunit(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1144 sc->sc_overrun_cnt = 0;
1145 }
1146 /* XXX do what */
1147 eintrs &= ~OHCI_SO;
1148 }
1149 if (eintrs & OHCI_WDH) {
1150 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1151 usb_schedsoftintr(&sc->sc_bus);
1152 eintrs &= ~OHCI_WDH;
1153 }
1154 if (eintrs & OHCI_RD) {
1155 kprintf("%s: resume detect\n", device_get_nameunit(sc->sc_bus.bdev));
1156 /* XXX process resume detect */
1157 }
1158 if (eintrs & OHCI_UE) {
1159 kprintf("%s: unrecoverable error, controller halted\n",
1160 device_get_nameunit(sc->sc_bus.bdev));
1161 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1162 /* XXX what else */
1163 }
1164 if (eintrs & OHCI_RHSC) {
1165 ohci_rhsc(sc, sc->sc_intrxfer);
1166 /*
1167 * Disable RHSC interrupt for now, because it will be
1168 * on until the port has been reset.
1169 */
1170 ohci_rhsc_able(sc, 0);
1171 /* Do not allow RHSC interrupts > 1 per second */
1172 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1173 eintrs &= ~OHCI_RHSC;
1174 }
1175
1176 sc->sc_bus.intr_context--;
1177
1178 if (eintrs != 0) {
1179 /* Block unprocessed interrupts. XXX */
1180 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1181 sc->sc_eintrs &= ~eintrs;
1182 kprintf("%s: blocking intrs 0x%x\n",
1183 device_get_nameunit(sc->sc_bus.bdev), eintrs);
1184 }
1185
1186 return (1);
1187 }
1188
1189 void
1190 ohci_rhsc_able(ohci_softc_t *sc, int on)
1191 {
1192 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1193 if (on) {
1194 sc->sc_eintrs |= OHCI_RHSC;
1195 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1196 } else {
1197 sc->sc_eintrs &= ~OHCI_RHSC;
1198 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1199 }
1200 }
1201
1202 void
1203 ohci_rhsc_enable(void *v_sc)
1204 {
1205 ohci_softc_t *sc = v_sc;
1206
1207 crit_enter();
1208 ohci_rhsc_able(sc, 1);
1209 crit_exit();
1210 }
1211
1212 #ifdef USB_DEBUG
1213 char *ohci_cc_strs[] = {
1214 "NO_ERROR",
1215 "CRC",
1216 "BIT_STUFFING",
1217 "DATA_TOGGLE_MISMATCH",
1218 "STALL",
1219 "DEVICE_NOT_RESPONDING",
1220 "PID_CHECK_FAILURE",
1221 "UNEXPECTED_PID",
1222 "DATA_OVERRUN",
1223 "DATA_UNDERRUN",
1224 "BUFFER_OVERRUN",
1225 "BUFFER_UNDERRUN",
1226 "reserved",
1227 "reserved",
1228 "NOT_ACCESSED",
1229 "NOT_ACCESSED"
1230 };
1231 #endif
1232
1233 void
1234 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1235 {
1236 ohci_soft_itd_t *sitd, *sidone, **ip;
1237 ohci_soft_td_t *std, *sdone, **p;
1238
1239 /* Reverse the done list. */
1240 for (sdone = NULL, sidone = NULL; done != 0; ) {
1241 std = ohci_hash_find_td(sc, done);
1242 if (std != NULL) {
1243 std->dnext = sdone;
1244 done = le32toh(std->td.td_nexttd);
1245 sdone = std;
1246 DPRINTFN(10,("add TD %p\n", std));
1247 continue;
1248 }
1249 sitd = ohci_hash_find_itd(sc, done);
1250 if (sitd != NULL) {
1251 sitd->dnext = sidone;
1252 done = le32toh(sitd->itd.itd_nextitd);
1253 sidone = sitd;
1254 DPRINTFN(5,("add ITD %p\n", sitd));
1255 continue;
1256 }
1257 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1258 }
1259
1260 /* sdone & sidone now hold the done lists. */
1261 /* Put them on the already processed lists. */
1262 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1263 ;
1264 *p = sdone;
1265 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1266 ;
1267 *ip = sidone;
1268 }
1269
1270 void
1271 ohci_softintr(void *v)
1272 {
1273 ohci_softc_t *sc = v;
1274 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1275 ohci_soft_td_t *std, *sdone, *stdnext, *p, *n;
1276 usbd_xfer_handle xfer;
1277 struct ohci_pipe *opipe;
1278 int len, cc;
1279 int i, j, iframes;
1280
1281 DPRINTFN(10,("ohci_softintr: enter\n"));
1282
1283 sc->sc_bus.intr_context++;
1284
1285 crit_enter();
1286 sdone = sc->sc_sdone;
1287 sc->sc_sdone = NULL;
1288 sidone = sc->sc_sidone;
1289 sc->sc_sidone = NULL;
1290 crit_exit();
1291
1292 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1293
1294 #ifdef USB_DEBUG
1295 if (ohcidebug > 10) {
1296 DPRINTF(("ohci_process_done: TD done:\n"));
1297 ohci_dump_tds(sdone);
1298 }
1299 #endif
1300
1301 for (std = sdone; std; std = stdnext) {
1302 xfer = std->xfer;
1303 stdnext = std->dnext;
1304 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1305 std, xfer, (xfer ? xfer->hcpriv : NULL)));
1306 if (xfer == NULL) {
1307 /*
1308 * xfer == NULL: There seems to be no xfer associated
1309 * with this TD. It is tailp that happened to end up on
1310 * the done queue.
1311 */
1312 continue;
1313 }
1314 if (xfer->status == USBD_CANCELLED ||
1315 xfer->status == USBD_TIMEOUT) {
1316 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1317 xfer));
1318 /* Handled by abort routine. */
1319 continue;
1320 }
1321
1322 len = std->len;
1323 if (std->td.td_cbp != 0)
1324 len -= le32toh(std->td.td_be) -
1325 le32toh(std->td.td_cbp) + 1;
1326 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1327 std->flags));
1328 if (std->flags & OHCI_ADD_LEN)
1329 xfer->actlen += len;
1330
1331 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1332 if (cc != OHCI_CC_NO_ERROR) {
1333 /*
1334 * Endpoint is halted. First unlink all the TDs
1335 * belonging to the failed transfer, and then restart
1336 * the endpoint.
1337 */
1338 opipe = (struct ohci_pipe *)xfer->pipe;
1339
1340 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1341 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1342 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1343 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1344 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1345 &OXFER(xfer)->abort_task);
1346
1347 /* Remove all this xfer's TDs from the done queue. */
1348 for (p = std; p->dnext != NULL; p = p->dnext) {
1349 if (p->dnext->xfer != xfer)
1350 continue;
1351 p->dnext = p->dnext->dnext;
1352 }
1353 /* The next TD may have been removed. */
1354 stdnext = std->dnext;
1355
1356 /* Remove all TDs belonging to this xfer. */
1357 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1358 n = p->nexttd;
1359 ohci_free_std(sc, p);
1360 }
1361
1362 /* clear halt */
1363 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1364 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1365
1366 if (cc == OHCI_CC_STALL)
1367 xfer->status = USBD_STALLED;
1368 else
1369 xfer->status = USBD_IOERROR;
1370 crit_enter();
1371 usb_transfer_complete(xfer);
1372 crit_exit();
1373 continue;
1374 }
1375 /*
1376 * Skip intermediate TDs. They remain linked from
1377 * xfer->hcpriv and we free them when the transfer completes.
1378 */
1379 if ((std->flags & OHCI_CALL_DONE) == 0)
1380 continue;
1381
1382 /* Normal transfer completion */
1383 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1384 usb_rem_task(OXFER(xfer)->xfer.pipe->device,
1385 &OXFER(xfer)->abort_task);
1386 for (p = xfer->hcpriv; p->xfer == xfer; p = n) {
1387 n = p->nexttd;
1388 ohci_free_std(sc, p);
1389 }
1390 xfer->status = USBD_NORMAL_COMPLETION;
1391 crit_enter();
1392 usb_transfer_complete(xfer);
1393 crit_exit();
1394 }
1395
1396 #ifdef USB_DEBUG
1397 if (ohcidebug > 10) {
1398 DPRINTF(("ohci_softintr: ITD done:\n"));
1399 ohci_dump_itds(sidone);
1400 }
1401 #endif
1402
1403 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1404 xfer = sitd->xfer;
1405 sitdnext = sitd->dnext;
1406 sitd->flags |= OHCI_ITD_INTFIN;
1407 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1408 sitd, xfer, xfer ? xfer->hcpriv : 0));
1409 if (xfer == NULL)
1410 continue;
1411 if (xfer->status == USBD_CANCELLED ||
1412 xfer->status == USBD_TIMEOUT) {
1413 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1414 xfer));
1415 /* Handled by abort routine. */
1416 continue;
1417 }
1418 if (xfer->pipe)
1419 if (xfer->pipe->aborting)
1420 continue; /*Ignore.*/
1421 #ifdef DIAGNOSTIC
1422 if (sitd->isdone)
1423 kprintf("ohci_softintr: sitd=%p is done\n", sitd);
1424 sitd->isdone = 1;
1425 #endif
1426 opipe = (struct ohci_pipe *)xfer->pipe;
1427 if (opipe->aborting)
1428 continue;
1429
1430 if (sitd->flags & OHCI_CALL_DONE) {
1431 ohci_soft_itd_t *next;
1432
1433 opipe->u.iso.inuse -= xfer->nframes;
1434 xfer->status = USBD_NORMAL_COMPLETION;
1435 for (i = 0, sitd = xfer->hcpriv;;sitd = next) {
1436 next = sitd->nextitd;
1437 if (OHCI_ITD_GET_CC(sitd->itd.itd_flags) != OHCI_CC_NO_ERROR)
1438 xfer->status = USBD_IOERROR;
1439
1440 if (xfer->status == USBD_NORMAL_COMPLETION) {
1441 iframes = OHCI_ITD_GET_FC(sitd->itd.itd_flags);
1442 for (j = 0; j < iframes; i++, j++) {
1443 len = le16toh(sitd->itd.itd_offset[j]);
1444 len =
1445 (OHCI_ITD_PSW_GET_CC(len) ==
1446 OHCI_CC_NOT_ACCESSED) ? 0 :
1447 OHCI_ITD_PSW_LENGTH(len);
1448 xfer->frlengths[i] = len;
1449 }
1450 }
1451 if (sitd->flags & OHCI_CALL_DONE)
1452 break;
1453 }
1454
1455 crit_enter();
1456 usb_transfer_complete(xfer);
1457 crit_exit();
1458 }
1459 }
1460
1461 #ifdef USB_USE_SOFTINTR
1462 if (sc->sc_softwake) {
1463 sc->sc_softwake = 0;
1464 wakeup(&sc->sc_softwake);
1465 }
1466 #endif /* USB_USE_SOFTINTR */
1467
1468 sc->sc_bus.intr_context--;
1469 DPRINTFN(10,("ohci_softintr: done:\n"));
1470 }
1471
1472 void
1473 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1474 {
1475 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1476
1477 #ifdef DIAGNOSTIC
1478 if (!(xfer->rqflags & URQ_REQUEST)) {
1479 panic("ohci_device_ctrl_done: not a request");
1480 }
1481 #endif
1482 xfer->hcpriv = NULL;
1483 }
1484
1485 void
1486 ohci_device_intr_done(usbd_xfer_handle xfer)
1487 {
1488 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1489 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1490 ohci_soft_ed_t *sed = opipe->sed;
1491 ohci_soft_td_t *data, *tail;
1492
1493
1494 DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1495 xfer, xfer->actlen));
1496
1497 xfer->hcpriv = NULL;
1498
1499 if (xfer->pipe->repeat) {
1500 data = opipe->tail.td;
1501 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1502 if (tail == NULL) {
1503 xfer->status = USBD_NOMEM;
1504 return;
1505 }
1506 tail->xfer = NULL;
1507
1508 data->td.td_flags = htole32(
1509 OHCI_TD_IN | OHCI_TD_NOCC |
1510 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1511 if (xfer->flags & USBD_SHORT_XFER_OK)
1512 data->td.td_flags |= htole32(OHCI_TD_R);
1513 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1514 data->nexttd = tail;
1515 data->td.td_nexttd = htole32(tail->physaddr);
1516 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1517 xfer->length - 1);
1518 data->len = xfer->length;
1519 data->xfer = xfer;
1520 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1521 xfer->hcpriv = data;
1522 xfer->actlen = 0;
1523
1524 sed->ed.ed_tailp = htole32(tail->physaddr);
1525 opipe->tail.td = tail;
1526 }
1527 }
1528
1529 void
1530 ohci_device_bulk_done(usbd_xfer_handle xfer)
1531 {
1532 DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1533 xfer, xfer->actlen));
1534
1535 xfer->hcpriv = NULL;
1536 }
1537
1538 void
1539 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1540 {
1541 usbd_pipe_handle pipe;
1542 u_char *p;
1543 int i, m;
1544 int hstatus;
1545
1546 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1547 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1548 sc, xfer, hstatus));
1549
1550 if (xfer == NULL) {
1551 /* Just ignore the change. */
1552 return;
1553 }
1554
1555 pipe = xfer->pipe;
1556
1557 p = KERNADDR(&xfer->dmabuf, 0);
1558 m = min(sc->sc_noport, xfer->length * 8 - 1);
1559 memset(p, 0, xfer->length);
1560 for (i = 1; i <= m; i++) {
1561 /* Pick out CHANGE bits from the status reg. */
1562 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1563 p[i/8] |= 1 << (i%8);
1564 }
1565 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1566 xfer->actlen = xfer->length;
1567 xfer->status = USBD_NORMAL_COMPLETION;
1568
1569 usb_transfer_complete(xfer);
1570 }
1571
1572 void
1573 ohci_root_intr_done(usbd_xfer_handle xfer)
1574 {
1575 xfer->hcpriv = NULL;
1576 }
1577
1578 void
1579 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1580 {
1581 xfer->hcpriv = NULL;
1582 }
1583
1584 /*
1585 * Wait here until controller claims to have an interrupt.
1586 * Then call ohci_intr and return. Use timeout to avoid waiting
1587 * too long.
1588 */
1589 void
1590 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1591 {
1592 int timo = xfer->timeout;
1593 int usecs;
1594 u_int32_t intrs;
1595
1596 xfer->status = USBD_IN_PROGRESS;
1597 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1598 usb_delay_ms(&sc->sc_bus, 1);
1599 if (sc->sc_dying)
1600 break;
1601 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1602 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1603 #ifdef USB_DEBUG
1604 if (ohcidebug > 15)
1605 ohci_dumpregs(sc);
1606 #endif
1607 if (intrs) {
1608 ohci_intr1(sc);
1609 if (xfer->status != USBD_IN_PROGRESS)
1610 return;
1611 }
1612 }
1613
1614 /* Timeout */
1615 DPRINTF(("ohci_waitintr: timeout\n"));
1616 xfer->status = USBD_TIMEOUT;
1617 usb_transfer_complete(xfer);
1618 /* XXX should free TD */
1619 }
1620
1621 void
1622 ohci_poll(struct usbd_bus *bus)
1623 {
1624 ohci_softc_t *sc = (ohci_softc_t *)bus;
1625 #ifdef USB_DEBUG
1626 static int last;
1627 int new;
1628 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1629 if (new != last) {
1630 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1631 last = new;
1632 }
1633 #endif
1634
1635 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1636 ohci_intr1(sc);
1637 }
1638
1639 usbd_status
1640 ohci_device_request(usbd_xfer_handle xfer)
1641 {
1642 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1643 usb_device_request_t *req = &xfer->request;
1644 usbd_device_handle dev = opipe->pipe.device;
1645 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1646 int addr = dev->address;
1647 ohci_soft_td_t *setup, *stat, *next, *tail;
1648 ohci_soft_ed_t *sed;
1649 int isread;
1650 int len;
1651 usbd_status err;
1652
1653 isread = req->bmRequestType & UT_READ;
1654 len = UGETW(req->wLength);
1655
1656 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1657 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1658 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1659 UGETW(req->wIndex), len, addr,
1660 opipe->pipe.endpoint->edesc->bEndpointAddress));
1661
1662 setup = opipe->tail.td;
1663 stat = ohci_alloc_std(sc);
1664 if (stat == NULL) {
1665 err = USBD_NOMEM;
1666 goto bad1;
1667 }
1668 tail = ohci_alloc_std(sc);
1669 if (tail == NULL) {
1670 err = USBD_NOMEM;
1671 goto bad2;
1672 }
1673 tail->xfer = NULL;
1674
1675 sed = opipe->sed;
1676 opipe->u.ctl.length = len;
1677
1678 /* Update device address and length since they may have changed
1679 during the setup of the control pipe in usbd_new_device(). */
1680 /* XXX This only needs to be done once, but it's too early in open. */
1681 /* XXXX Should not touch ED here! */
1682 sed->ed.ed_flags = htole32(
1683 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1684 OHCI_ED_SET_FA(addr) |
1685 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1686
1687 next = stat;
1688
1689 /* Set up data transaction */
1690 if (len != 0) {
1691 ohci_soft_td_t *std = stat;
1692
1693 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1694 std, &stat);
1695 stat = stat->nexttd; /* point at free TD */
1696 if (err)
1697 goto bad3;
1698 /* Start toggle at 1 and then use the carried toggle. */
1699 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1700 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1701 }
1702
1703 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1704
1705 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1706 OHCI_TD_TOGGLE_0 | OHCI_TD_SET_DI(6));
1707 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1708 setup->nexttd = next;
1709 setup->td.td_nexttd = htole32(next->physaddr);
1710 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1711 setup->len = 0;
1712 setup->xfer = xfer;
1713 setup->flags = 0;
1714 xfer->hcpriv = setup;
1715
1716 stat->td.td_flags = htole32(
1717 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1718 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1719 stat->td.td_cbp = 0;
1720 stat->nexttd = tail;
1721 stat->td.td_nexttd = htole32(tail->physaddr);
1722 stat->td.td_be = 0;
1723 stat->flags = OHCI_CALL_DONE;
1724 stat->len = 0;
1725 stat->xfer = xfer;
1726
1727 #ifdef USB_DEBUG
1728 if (ohcidebug > 5) {
1729 DPRINTF(("ohci_device_request:\n"));
1730 ohci_dump_ed(sed);
1731 ohci_dump_tds(setup);
1732 }
1733 #endif
1734
1735 /* Insert ED in schedule */
1736 crit_enter();
1737 sed->ed.ed_tailp = htole32(tail->physaddr);
1738 opipe->tail.td = tail;
1739 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1740 if (xfer->timeout && !sc->sc_bus.use_polling) {
1741 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1742 ohci_timeout, xfer);
1743 }
1744 crit_exit();
1745
1746 #ifdef USB_DEBUG
1747 if (ohcidebug > 20) {
1748 delay(10000);
1749 DPRINTF(("ohci_device_request: status=%x\n",
1750 OREAD4(sc, OHCI_COMMAND_STATUS)));
1751 ohci_dumpregs(sc);
1752 kprintf("ctrl head:\n");
1753 ohci_dump_ed(sc->sc_ctrl_head);
1754 kprintf("sed:\n");
1755 ohci_dump_ed(sed);
1756 ohci_dump_tds(setup);
1757 }
1758 #endif
1759
1760 return (USBD_NORMAL_COMPLETION);
1761
1762 bad3:
1763 ohci_free_std(sc, tail);
1764 bad2:
1765 ohci_free_std(sc, stat);
1766 bad1:
1767 return (err);
1768 }
1769
1770 /*
1771 * Add an ED to the schedule. Called from a critical section.
1772 */
1773 void
1774 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1775 {
1776 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1777
1778 sed->next = head->next;
1779 sed->ed.ed_nexted = head->ed.ed_nexted;
1780 head->next = sed;
1781 head->ed.ed_nexted = htole32(sed->physaddr);
1782 }
1783
1784 /*
1785 * Remove an ED from the schedule. Called from a critical section.
1786 */
1787 void
1788 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1789 {
1790 ohci_soft_ed_t *p;
1791
1792
1793 /* XXX */
1794 for (p = head; p != NULL && p->next != sed; p = p->next)
1795 ;
1796 #if 0
1797 if (p == NULL)
1798 panic("ohci_rem_ed: ED not found");
1799 #else
1800 /*
1801 * XXX
1802 * p == NULL if ohci is detaching and there are still devices
1803 * using ohci (e.g. usb sticks are still plugged in). But
1804 * the real solution should be correcting ohci_free_sed() or
1805 * correctly use it.
1806 */
1807 if (p != NULL) {
1808 p->next = sed->next;
1809 p->ed.ed_nexted = sed->ed.ed_nexted;
1810 }
1811 #endif
1812 }
1813
1814 /*
1815 * When a transfer is completed the TD is added to the done queue by
1816 * the host controller. This queue is the processed by software.
1817 * Unfortunately the queue contains the physical address of the TD
1818 * and we have no simple way to translate this back to a kernel address.
1819 * To make the translation possible (and fast) we use a hash table of
1820 * TDs currently in the schedule. The physical address is used as the
1821 * hash value.
1822 */
1823
1824 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1825 /*
1826 * Called from a critical section
1827 */
1828 void
1829 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1830 {
1831 int h = HASH(std->physaddr);
1832
1833 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1834 }
1835
1836 /*
1837 * Called from a critical section
1838 */
1839 void
1840 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1841 {
1842 LIST_REMOVE(std, hnext);
1843 }
1844
1845 ohci_soft_td_t *
1846 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1847 {
1848 int h = HASH(a);
1849 ohci_soft_td_t *std;
1850
1851 /* if these are present they should be masked out at an earlier
1852 * stage.
1853 */
1854 KASSERT((a&~OHCI_HEADMASK) == 0, ("%s: 0x%b has lower bits set\n",
1855 device_get_nameunit(sc->sc_bus.bdev),
1856 (int) a, "\20\1HALT\2TOGGLE"));
1857
1858 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1859 std != NULL;
1860 std = LIST_NEXT(std, hnext))
1861 if (std->physaddr == a)
1862 return (std);
1863
1864 DPRINTF(("%s: ohci_hash_find_td: addr 0x%08lx not found\n",
1865 device_get_nameunit(sc->sc_bus.bdev), (u_long) a));
1866 return (NULL);
1867 }
1868
1869 /*
1870 * Called from a critical section
1871 */
1872 void
1873 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1874 {
1875 int h = HASH(sitd->physaddr);
1876
1877 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1878 sitd, (u_long)sitd->physaddr));
1879
1880 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1881 }
1882
1883 /*
1884 * Called from a critical section
1885 */
1886 void
1887 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1888 {
1889 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1890 sitd, (u_long)sitd->physaddr));
1891
1892 LIST_REMOVE(sitd, hnext);
1893 }
1894
1895 ohci_soft_itd_t *
1896 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1897 {
1898 int h = HASH(a);
1899 ohci_soft_itd_t *sitd;
1900
1901 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1902 sitd != NULL;
1903 sitd = LIST_NEXT(sitd, hnext))
1904 if (sitd->physaddr == a)
1905 return (sitd);
1906 return (NULL);
1907 }
1908
1909 void
1910 ohci_timeout(void *addr)
1911 {
1912 struct ohci_xfer *oxfer = addr;
1913 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1914 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1915
1916 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1917
1918 if (sc->sc_dying) {
1919 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1920 return;
1921 }
1922
1923 /* Execute the abort in a process context. */
1924 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1925 USB_TASKQ_HC);
1926 }
1927
1928 void
1929 ohci_timeout_task(void *addr)
1930 {
1931 usbd_xfer_handle xfer = addr;
1932
1933 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1934
1935 crit_enter();
1936 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1937 crit_exit();
1938 }
1939
1940 #ifdef USB_DEBUG
1941 void
1942 ohci_dump_tds(ohci_soft_td_t *std)
1943 {
1944 for (; std; std = std->nexttd)
1945 ohci_dump_td(std);
1946 }
1947
1948 void
1949 ohci_dump_td(ohci_soft_td_t *std)
1950 {
1951 char sbuf[128];
1952
1953 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1954 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1955 sbuf, sizeof(sbuf));
1956
1957 kprintf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1958 "nexttd=0x%08lx be=0x%08lx\n",
1959 std, (u_long)std->physaddr, sbuf,
1960 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1961 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1962 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1963 (u_long)le32toh(std->td.td_cbp),
1964 (u_long)le32toh(std->td.td_nexttd),
1965 (u_long)le32toh(std->td.td_be));
1966 }
1967
1968 void
1969 ohci_dump_itd(ohci_soft_itd_t *sitd)
1970 {
1971 int i;
1972
1973 kprintf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1974 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1975 sitd, (u_long)sitd->physaddr,
1976 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
1977 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
1978 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
1979 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
1980 (u_long)le32toh(sitd->itd.itd_bp0),
1981 (u_long)le32toh(sitd->itd.itd_nextitd),
1982 (u_long)le32toh(sitd->itd.itd_be));
1983 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1984 kprintf("offs[%d]=0x%04x ", i,
1985 (u_int)le16toh(sitd->itd.itd_offset[i]));
1986 kprintf("\n");
1987 }
1988
1989 void
1990 ohci_dump_itds(ohci_soft_itd_t *sitd)
1991 {
1992 for (; sitd; sitd = sitd->nextitd)
1993 ohci_dump_itd(sitd);
1994 }
1995
1996 void
1997 ohci_dump_ed(ohci_soft_ed_t *sed)
1998 {
1999 char sbuf[128], sbuf2[128];
2000
2001 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2002 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2003 sbuf, sizeof(sbuf));
2004 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2005 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2006
2007 kprintf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2008 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2009 sed, (u_long)sed->physaddr,
2010 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2011 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2012 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2013 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2014 (u_long)le32toh(sed->ed.ed_headp),
2015 (u_long)le32toh(sed->ed.ed_nexted));
2016 }
2017 #endif
2018
2019 usbd_status
2020 ohci_open(usbd_pipe_handle pipe)
2021 {
2022 usbd_device_handle dev = pipe->device;
2023 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2024 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2025 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2026 u_int8_t addr = dev->address;
2027 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2028 ohci_soft_ed_t *sed;
2029 ohci_soft_td_t *std;
2030 ohci_soft_itd_t *sitd;
2031 ohci_physaddr_t tdphys;
2032 u_int32_t fmt;
2033 usbd_status err;
2034 int ival;
2035
2036 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2037 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2038
2039 if (sc->sc_dying)
2040 return (USBD_IOERROR);
2041
2042 std = NULL;
2043 sed = NULL;
2044
2045 if (addr == sc->sc_addr) {
2046 switch (ed->bEndpointAddress) {
2047 case USB_CONTROL_ENDPOINT:
2048 pipe->methods = &ohci_root_ctrl_methods;
2049 break;
2050 case UE_DIR_IN | OHCI_INTR_ENDPT:
2051 pipe->methods = &ohci_root_intr_methods;
2052 break;
2053 default:
2054 return (USBD_INVAL);
2055 }
2056 } else {
2057 sed = ohci_alloc_sed(sc);
2058 if (sed == NULL)
2059 goto bad0;
2060 opipe->sed = sed;
2061 if (xfertype == UE_ISOCHRONOUS) {
2062 sitd = ohci_alloc_sitd(sc);
2063 if (sitd == NULL)
2064 goto bad1;
2065 opipe->tail.itd = sitd;
2066 opipe->aborting = 0;
2067 tdphys = sitd->physaddr;
2068 fmt = OHCI_ED_FORMAT_ISO;
2069 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2070 fmt |= OHCI_ED_DIR_IN;
2071 else
2072 fmt |= OHCI_ED_DIR_OUT;
2073 } else {
2074 std = ohci_alloc_std(sc);
2075 if (std == NULL)
2076 goto bad1;
2077 opipe->tail.td = std;
2078 tdphys = std->physaddr;
2079 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2080 }
2081 sed->ed.ed_flags = htole32(
2082 OHCI_ED_SET_FA(addr) |
2083 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2084 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2085 fmt |
2086 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2087 sed->ed.ed_headp = htole32(tdphys |
2088 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0));
2089 sed->ed.ed_tailp = htole32(tdphys);
2090
2091 switch (xfertype) {
2092 case UE_CONTROL:
2093 pipe->methods = &ohci_device_ctrl_methods;
2094 err = usb_allocmem(&sc->sc_bus,
2095 sizeof(usb_device_request_t),
2096 0, &opipe->u.ctl.reqdma);
2097 if (err)
2098 goto bad;
2099 crit_enter();
2100 ohci_add_ed(sed, sc->sc_ctrl_head);
2101 crit_exit();
2102 break;
2103 case UE_INTERRUPT:
2104 pipe->methods = &ohci_device_intr_methods;
2105 ival = pipe->interval;
2106 if (ival == USBD_DEFAULT_INTERVAL)
2107 ival = ed->bInterval;
2108 return (ohci_device_setintr(sc, opipe, ival));
2109 case UE_ISOCHRONOUS:
2110 pipe->methods = &ohci_device_isoc_methods;
2111 return (ohci_setup_isoc(pipe));
2112 case UE_BULK:
2113 pipe->methods = &ohci_device_bulk_methods;
2114 crit_enter();
2115 ohci_add_ed(sed, sc->sc_bulk_head);
2116 crit_exit();
2117 break;
2118 }
2119 }
2120 return (USBD_NORMAL_COMPLETION);
2121
2122 bad:
2123 if (std != NULL)
2124 ohci_free_std(sc, std);
2125 bad1:
2126 if (sed != NULL)
2127 ohci_free_sed(sc, sed);
2128 bad0:
2129 return (USBD_NOMEM);
2130
2131 }
2132
2133 /*
2134 * Close a reqular pipe.
2135 * Assumes that there are no pending transactions.
2136 */
2137 void
2138 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2139 {
2140 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2141 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2142 ohci_soft_ed_t *sed = opipe->sed;
2143
2144 crit_enter();
2145 #ifdef DIAGNOSTIC
2146 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2147 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2148 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2149 ohci_soft_td_t *std;
2150 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2151 kprintf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2152 "tl=0x%x pipe=%p, std=%p\n", sed,
2153 (int)le32toh(sed->ed.ed_headp),
2154 (int)le32toh(sed->ed.ed_tailp),
2155 pipe, std);
2156 #ifdef USB_DEBUG
2157 usbd_dump_pipe(&opipe->pipe);
2158 #endif
2159 #ifdef USB_DEBUG
2160 ohci_dump_ed(sed);
2161 if (std)
2162 ohci_dump_td(std);
2163 #endif
2164 usb_delay_ms(&sc->sc_bus, 2);
2165 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2166 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2167 kprintf("ohci_close_pipe: pipe still not empty\n");
2168 }
2169 #endif
2170 ohci_rem_ed(sed, head);
2171 /* Make sure the host controller is not touching this ED */
2172 usb_delay_ms(&sc->sc_bus, 1);
2173 crit_exit();
2174 pipe->endpoint->savedtoggle =
2175 (le32toh(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2176 ohci_free_sed(sc, opipe->sed);
2177 }
2178
2179 /*
2180 * Abort a device request.
2181 * If this routine is called from a critical section it guarantees that
2182 * the request will be removed from the hardware scheduling and that
2183 * the callback for it will be called with USBD_CANCELLED status.
2184 * It's impossible to guarantee that the requested transfer will not
2185 * have happened since the hardware runs concurrently.
2186 * If the transaction has already happened we rely on the ordinary
2187 * interrupt processing to process it.
2188 */
2189 void
2190 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2191 {
2192 struct ohci_xfer *oxfer = OXFER(xfer);
2193 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2194 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2195 ohci_soft_ed_t *sed = opipe->sed;
2196 ohci_soft_td_t *p, *n;
2197 ohci_physaddr_t headp;
2198 int hit;
2199
2200 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2201
2202 if (sc->sc_dying) {
2203 /* If we're dying, just do the software part. */
2204 crit_enter();
2205 xfer->status = status; /* make software ignore it */
2206 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2207 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2208 usb_transfer_complete(xfer);
2209 crit_exit();
2210 }
2211
2212 if (xfer->device->bus->intr_context /* || !curproc REMOVED DFly */)
2213 panic("ohci_abort_xfer: not in process context");
2214
2215 /*
2216 * If an abort is already in progress then just wait for it to
2217 * complete and return.
2218 */
2219 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING) {
2220 DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2221 /* No need to wait if we're aborting from a timeout. */
2222 if (status == USBD_TIMEOUT)
2223 return;
2224 /* Override the status which might be USBD_TIMEOUT. */
2225 xfer->status = status;
2226 DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2227 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTWAIT;
2228 while (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTING)
2229 tsleep(&oxfer->ohci_xfer_flags, 0, "ohciaw", 0);
2230 return;
2231 }
2232
2233 /*
2234 * Step 1: Make interrupt routine and hardware ignore xfer.
2235 */
2236 crit_enter();
2237 oxfer->ohci_xfer_flags |= OHCI_XFER_ABORTING;
2238 xfer->status = status; /* make software ignore it */
2239 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2240 usb_rem_task(xfer->pipe->device, &OXFER(xfer)->abort_task);
2241 crit_exit();
2242 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2243 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2244
2245 /*
2246 * Step 2: Wait until we know hardware has finished any possible
2247 * use of the xfer. Also make sure the soft interrupt routine
2248 * has run.
2249 */
2250 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2251 crit_enter();
2252 #ifdef USB_USE_SOFTINTR
2253 sc->sc_softwake = 1;
2254 #endif /* USB_USE_SOFTINTR */
2255 usb_schedsoftintr(&sc->sc_bus);
2256 #ifdef USB_USE_SOFTINTR
2257 tsleep(&sc->sc_softwake, 0, "ohciab", 0);
2258 #endif /* USB_USE_SOFTINTR */
2259
2260 /*
2261 * Step 3: Remove any vestiges of the xfer from the hardware.
2262 * The complication here is that the hardware may have executed
2263 * beyond the xfer we're trying to abort. So as we're scanning
2264 * the TDs of this xfer we check if the hardware points to
2265 * any of them.
2266 */
2267 p = xfer->hcpriv;
2268 #ifdef DIAGNOSTIC
2269 if (p == NULL) {
2270 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING; /* XXX */
2271 crit_exit();
2272 kprintf("ohci_abort_xfer: hcpriv is NULL\n");
2273 return;
2274 }
2275 #endif
2276 #ifdef USB_DEBUG
2277 if (ohcidebug > 1) {
2278 DPRINTF(("ohci_abort_xfer: sed=\n"));
2279 ohci_dump_ed(sed);
2280 ohci_dump_tds(p);
2281 }
2282 #endif
2283 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2284 hit = 0;
2285 for (; p->xfer == xfer; p = n) {
2286 hit |= headp == p->physaddr;
2287 n = p->nexttd;
2288 ohci_free_std(sc, p);
2289 }
2290 /* Zap headp register if hardware pointed inside the xfer. */
2291 if (hit) {
2292 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2293 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2294 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2295 } else {
2296 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2297 }
2298
2299 /*
2300 * Step 4: Turn on hardware again.
2301 */
2302 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2303
2304 /*
2305 * Step 5: Execute callback.
2306 */
2307 /* Do the wakeup first to avoid touching the xfer after the callback. */
2308 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTING;
2309 if (oxfer->ohci_xfer_flags & OHCI_XFER_ABORTWAIT) {
2310 oxfer->ohci_xfer_flags &= ~OHCI_XFER_ABORTWAIT;
2311 wakeup(&oxfer->ohci_xfer_flags);
2312 }
2313 usb_transfer_complete(xfer);
2314
2315 crit_exit();
2316 }
2317
2318 /*
2319 * Data structures and routines to emulate the root hub.
2320 */
2321 static usb_device_descriptor_t ohci_devd = {
2322 USB_DEVICE_DESCRIPTOR_SIZE,
2323 UDESC_DEVICE, /* type */
2324 {0x00, 0x01}, /* USB version */
2325 UDCLASS_HUB, /* class */
2326 UDSUBCLASS_HUB, /* subclass */
2327 UDPROTO_FSHUB, /* protocol */
2328 64, /* max packet */
2329 {0},{0},{0x00,0x01}, /* device id */
2330 1,2,0, /* string indicies */
2331 1 /* # of configurations */
2332 };
2333
2334 static usb_config_descriptor_t ohci_confd = {
2335 USB_CONFIG_DESCRIPTOR_SIZE,
2336 UDESC_CONFIG,
2337 {USB_CONFIG_DESCRIPTOR_SIZE +
2338 USB_INTERFACE_DESCRIPTOR_SIZE +
2339 USB_ENDPOINT_DESCRIPTOR_SIZE},
2340 1,
2341 1,
2342 0,
2343 UC_SELF_POWERED,
2344 0 /* max power */
2345 };
2346
2347 static usb_interface_descriptor_t ohci_ifcd = {
2348 USB_INTERFACE_DESCRIPTOR_SIZE,
2349 UDESC_INTERFACE,
2350 0,
2351 0,
2352 1,
2353 UICLASS_HUB,
2354 UISUBCLASS_HUB,
2355 UIPROTO_FSHUB,
2356 0
2357 };
2358
2359 static usb_endpoint_descriptor_t ohci_endpd = {
2360 USB_ENDPOINT_DESCRIPTOR_SIZE,
2361 UDESC_ENDPOINT,
2362 UE_DIR_IN | OHCI_INTR_ENDPT,
2363 UE_INTERRUPT,
2364 {8, 0}, /* max packet */
2365 255
2366 };
2367
2368 static usb_hub_descriptor_t ohci_hubd = {
2369 USB_HUB_DESCRIPTOR_SIZE,
2370 UDESC_HUB,
2371 0,
2372 {0,0},
2373 0,
2374 0,
2375 {0},
2376 };
2377
2378 static int
2379 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2380 {
2381 int i;
2382
2383 if (l == 0)
2384 return (0);
2385 p->bLength = 2 * strlen(s) + 2;
2386 if (l == 1)
2387 return (1);
2388 p->bDescriptorType = UDESC_STRING;
2389 l -= 2;
2390 for (i = 0; s[i] && l > 1; i++, l -= 2)
2391 USETW2(p->bString[i], 0, s[i]);
2392 return (2*i+2);
2393 }
2394
2395 /*
2396 * Simulate a hardware hub by handling all the necessary requests.
2397 */
2398 static usbd_status
2399 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2400 {
2401 usbd_status err;
2402
2403 /* Insert last in queue. */
2404 err = usb_insert_transfer(xfer);
2405 if (err)
2406 return (err);
2407
2408 /* Pipe isn't running, start first */
2409 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2410 }
2411
2412 static usbd_status
2413 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2414 {
2415 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2416 usb_device_request_t *req;
2417 void *buf = NULL;
2418 int port, i;
2419 int len, value, index, l, totlen = 0;
2420 usb_port_status_t ps;
2421 usb_hub_descriptor_t hubd;
2422 usbd_status err;
2423 u_int32_t v;
2424
2425 if (sc->sc_dying)
2426 return (USBD_IOERROR);
2427
2428 #ifdef DIAGNOSTIC
2429 if (!(xfer->rqflags & URQ_REQUEST))
2430 /* XXX panic */
2431 return (USBD_INVAL);
2432 #endif
2433 req = &xfer->request;
2434
2435 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2436 req->bmRequestType, req->bRequest));
2437
2438 len = UGETW(req->wLength);
2439 value = UGETW(req->wValue);
2440 index = UGETW(req->wIndex);
2441
2442 if (len != 0)
2443 buf = KERNADDR(&xfer->dmabuf, 0);
2444
2445 #define C(x,y) ((x) | ((y) << 8))
2446 switch(C(req->bRequest, req->bmRequestType)) {
2447 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2448 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2449 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2450 /*
2451 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2452 * for the integrated root hub.
2453 */
2454 break;
2455 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2456 if (len > 0) {
2457 *(u_int8_t *)buf = sc->sc_conf;
2458 totlen = 1;
2459 }
2460 break;
2461 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2462 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2463 switch(value >> 8) {
2464 case UDESC_DEVICE:
2465 if ((value & 0xff) != 0) {
2466 err = USBD_IOERROR;
2467 goto ret;
2468 }
2469 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2470 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2471 memcpy(buf, &ohci_devd, l);
2472 break;
2473 case UDESC_CONFIG:
2474 if ((value & 0xff) != 0) {
2475 err = USBD_IOERROR;
2476 goto ret;
2477 }
2478 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2479 memcpy(buf, &ohci_confd, l);
2480 buf = (char *)buf + l;
2481 len -= l;
2482 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2483 totlen += l;
2484 memcpy(buf, &ohci_ifcd, l);
2485 buf = (char *)buf + l;
2486 len -= l;
2487 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2488 totlen += l;
2489 memcpy(buf, &ohci_endpd, l);
2490 break;
2491 case UDESC_STRING:
2492 if (len == 0)
2493 break;
2494 *(u_int8_t *)buf = 0;
2495 totlen = 1;
2496 switch (value & 0xff) {
2497 case 1: /* Vendor */
2498 totlen = ohci_str(buf, len, sc->sc_vendor);
2499 break;
2500 case 2: /* Product */
2501 totlen = ohci_str(buf, len, "OHCI root hub");
2502 break;
2503 }
2504 break;
2505 default:
2506 err = USBD_IOERROR;
2507 goto ret;
2508 }
2509 break;
2510 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2511 if (len > 0) {
2512 *(u_int8_t *)buf = 0;
2513 totlen = 1;
2514 }
2515 break;
2516 case C(UR_GET_STATUS, UT_READ_DEVICE):
2517 if (len > 1) {
2518 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2519 totlen = 2;
2520 }
2521 break;
2522 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2523 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2524 if (len > 1) {
2525 USETW(((usb_status_t *)buf)->wStatus, 0);
2526 totlen = 2;
2527 }
2528 break;
2529 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2530 if (value >= USB_MAX_DEVICES) {
2531 err = USBD_IOERROR;
2532 goto ret;
2533 }
2534 sc->sc_addr = value;
2535 break;
2536 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2537 if (value != 0 && value != 1) {
2538 err = USBD_IOERROR;
2539 goto ret;
2540 }
2541 sc->sc_conf = value;
2542 break;
2543 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2544 break;
2545 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2546 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2547 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2548 err = USBD_IOERROR;
2549 goto ret;
2550 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2551 break;
2552 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2553 break;
2554 /* Hub requests */
2555 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2556 break;
2557 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2558 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2559 "port=%d feature=%d\n",
2560 index, value));
2561 if (index < 1 || index > sc->sc_noport) {
2562 err = USBD_IOERROR;
2563 goto ret;
2564 }
2565 port = OHCI_RH_PORT_STATUS(index);
2566 switch(value) {
2567 case UHF_PORT_ENABLE:
2568 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2569 break;
2570 case UHF_PORT_SUSPEND:
2571 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2572 break;
2573 case UHF_PORT_POWER:
2574 /* Yes, writing to the LOW_SPEED bit clears power. */
2575 OWRITE4(sc, port, UPS_LOW_SPEED);
2576 break;
2577 case UHF_C_PORT_CONNECTION:
2578 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2579 break;
2580 case UHF_C_PORT_ENABLE:
2581 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2582 break;
2583 case UHF_C_PORT_SUSPEND:
2584 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2585 break;
2586 case UHF_C_PORT_OVER_CURRENT:
2587 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2588 break;
2589 case UHF_C_PORT_RESET:
2590 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2591 break;
2592 default:
2593 err = USBD_IOERROR;
2594 goto ret;
2595 }
2596 switch(value) {
2597 case UHF_C_PORT_CONNECTION:
2598 case UHF_C_PORT_ENABLE:
2599 case UHF_C_PORT_SUSPEND:
2600 case UHF_C_PORT_OVER_CURRENT:
2601 case UHF_C_PORT_RESET:
2602 /* Enable RHSC interrupt if condition is cleared. */
2603 if ((OREAD4(sc, port) >> 16) == 0)
2604 ohci_rhsc_able(sc, 1);
2605 break;
2606 default:
2607 break;
2608 }
2609 break;
2610 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2611 if ((value & 0xff) != 0) {
2612 err = USBD_IOERROR;
2613 goto ret;
2614 }
2615 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2616 hubd = ohci_hubd;
2617 hubd.bNbrPorts = sc->sc_noport;
2618 USETW(hubd.wHubCharacteristics,
2619 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2620 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2621 /* XXX overcurrent */
2622 );
2623 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2624 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2625 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2626 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2627 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2628 l = min(len, hubd.bDescLength);
2629 totlen = l;
2630 memcpy(buf, &hubd, l);
2631 break;
2632 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2633 if (len != 4) {
2634 err = USBD_IOERROR;
2635 goto ret;
2636 }
2637 memset(buf, 0, len); /* ? XXX */
2638 totlen = len;
2639 break;
2640 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2641 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2642 index));
2643 if (index < 1 || index > sc->sc_noport) {
2644 err = USBD_IOERROR;
2645 goto ret;
2646 }
2647 if (len != 4) {
2648 err = USBD_IOERROR;
2649 goto ret;
2650 }
2651 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2652 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2653 v));
2654 USETW(ps.wPortStatus, v);
2655 USETW(ps.wPortChange, v >> 16);
2656 l = min(len, sizeof ps);
2657 memcpy(buf, &ps, l);
2658 totlen = l;
2659 break;
2660 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2661 err = USBD_IOERROR;
2662 goto ret;
2663 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2664 break;
2665 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2666 if (index < 1 || index > sc->sc_noport) {
2667 err = USBD_IOERROR;
2668 goto ret;
2669 }
2670 port = OHCI_RH_PORT_STATUS(index);
2671 switch(value) {
2672 case UHF_PORT_ENABLE:
2673 OWRITE4(sc, port, UPS_PORT_ENABLED);
2674 break;
2675 case UHF_PORT_SUSPEND:
2676 OWRITE4(sc, port, UPS_SUSPEND);
2677 break;
2678 case UHF_PORT_RESET:
2679 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2680 index));
2681 OWRITE4(sc, port, UPS_RESET);
2682 for (i = 0; i < 5; i++) {
2683 usb_delay_ms(&sc->sc_bus,
2684 USB_PORT_ROOT_RESET_DELAY);
2685 if (sc->sc_dying) {
2686 err = USBD_IOERROR;
2687 goto ret;
2688 }
2689 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2690 break;
2691 }
2692 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2693 index, OREAD4(sc, port)));
2694 break;
2695 case UHF_PORT_POWER:
2696 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2697 "%d\n", index));
2698 OWRITE4(sc, port, UPS_PORT_POWER);
2699 break;
2700 default:
2701 err = USBD_IOERROR;
2702 goto ret;
2703 }
2704 break;
2705 default:
2706 err = USBD_IOERROR;
2707 goto ret;
2708 }
2709 xfer->actlen = totlen;
2710 err = USBD_NORMAL_COMPLETION;
2711 ret:
2712 xfer->status = err;
2713 crit_enter();
2714 usb_transfer_complete(xfer);
2715 crit_exit();
2716 return (USBD_IN_PROGRESS);
2717 }
2718
2719 /* Abort a root control request. */
2720 static void
2721 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2722 {
2723 /* Nothing to do, all transfers are synchronous. */
2724 }
2725
2726 /* Close the root pipe. */
2727 static void
2728 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2729 {
2730 DPRINTF(("ohci_root_ctrl_close\n"));
2731 /* Nothing to do. */
2732 }
2733
2734 static usbd_status
2735 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2736 {
2737 usbd_status err;
2738
2739 /* Insert last in queue. */
2740 err = usb_insert_transfer(xfer);
2741 if (err)
2742 return (err);
2743
2744 /* Pipe isn't running, start first */
2745 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2746 }
2747
2748 static usbd_status
2749 ohci_root_intr_start(usbd_xfer_handle xfer)
2750 {
2751 usbd_pipe_handle pipe = xfer->pipe;
2752 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2753
2754 if (sc->sc_dying)
2755 return (USBD_IOERROR);
2756
2757 sc->sc_intrxfer = xfer;
2758
2759 return (USBD_IN_PROGRESS);
2760 }
2761
2762 /* Abort a root interrupt request. */
2763 static void
2764 ohci_root_intr_abort(usbd_xfer_handle xfer)
2765 {
2766 if (xfer->pipe->intrxfer == xfer) {
2767 DPRINTF(("ohci_root_intr_abort: remove\n"));
2768 xfer->pipe->intrxfer = NULL;
2769 }
2770 xfer->status = USBD_CANCELLED;
2771 crit_enter();
2772 usb_transfer_complete(xfer);
2773 crit_exit();
2774 }
2775
2776 /* Close the root pipe. */
2777 static void
2778 ohci_root_intr_close(usbd_pipe_handle pipe)
2779 {
2780 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2781
2782 DPRINTF(("ohci_root_intr_close\n"));
2783
2784 sc->sc_intrxfer = NULL;
2785 }
2786
2787 /************************/
2788
2789 static usbd_status
2790 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2791 {
2792 usbd_status err;
2793
2794 /* Insert last in queue. */
2795 err = usb_insert_transfer(xfer);
2796 if (err)
2797 return (err);
2798
2799 /* Pipe isn't running, start first */
2800 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2801 }
2802
2803 static usbd_status
2804 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2805 {
2806 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2807 usbd_status err;
2808
2809 if (sc->sc_dying)
2810 return (USBD_IOERROR);
2811
2812 #ifdef DIAGNOSTIC
2813 if (!(xfer->rqflags & URQ_REQUEST)) {
2814 /* XXX panic */
2815 kprintf("ohci_device_ctrl_transfer: not a request\n");
2816 return (USBD_INVAL);
2817 }
2818 #endif
2819
2820 err = ohci_device_request(xfer);
2821 if (err)
2822 return (err);
2823
2824 if (sc->sc_bus.use_polling)
2825 ohci_waitintr(sc, xfer);
2826 return (USBD_IN_PROGRESS);
2827 }
2828
2829 /* Abort a device control request. */
2830 static void
2831 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2832 {
2833 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2834 ohci_abort_xfer(xfer, USBD_CANCELLED);
2835 }
2836
2837 /* Close a device control pipe. */
2838 static void
2839 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2840 {
2841 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2842 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2843
2844 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2845 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2846 ohci_free_std(sc, opipe->tail.td);
2847 }
2848
2849 /************************/
2850
2851 static void
2852 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2853 {
2854 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2855
2856 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2857 }
2858
2859 static void
2860 ohci_noop(usbd_pipe_handle pipe)
2861 {
2862 }
2863
2864 static usbd_status
2865 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2866 {
2867 usbd_status err;
2868
2869 /* Insert last in queue. */
2870 err = usb_insert_transfer(xfer);
2871 if (err)
2872 return (err);
2873
2874 /* Pipe isn't running, start first */
2875 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2876 }
2877
2878 static usbd_status
2879 ohci_device_bulk_start(usbd_xfer_handle xfer)
2880 {
2881 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2882 usbd_device_handle dev = opipe->pipe.device;
2883 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2884 int addr = dev->address;
2885 ohci_soft_td_t *data, *tail, *tdp;
2886 ohci_soft_ed_t *sed;
2887 int len, isread, endpt;
2888 usbd_status err;
2889
2890 if (sc->sc_dying)
2891 return (USBD_IOERROR);
2892
2893 #ifdef DIAGNOSTIC
2894 if (xfer->rqflags & URQ_REQUEST) {
2895 /* XXX panic */
2896 kprintf("ohci_device_bulk_start: a request\n");
2897 return (USBD_INVAL);
2898 }
2899 #endif
2900
2901 len = xfer->length;
2902 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2903 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2904 sed = opipe->sed;
2905
2906 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2907 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2908 endpt));
2909
2910 opipe->u.bulk.isread = isread;
2911 opipe->u.bulk.length = len;
2912
2913 /* Update device address */
2914 sed->ed.ed_flags = htole32(
2915 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2916 OHCI_ED_SET_FA(addr));
2917
2918 /* Allocate a chain of new TDs (including a new tail). */
2919 data = opipe->tail.td;
2920 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2921 data, &tail);
2922 /* We want interrupt at the end of the transfer. */
2923 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2924 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2925 tail->flags |= OHCI_CALL_DONE;
2926 tail = tail->nexttd; /* point at sentinel */
2927 if (err)
2928 return (err);
2929
2930 tail->xfer = NULL;
2931 xfer->hcpriv = data;
2932
2933 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2934 "td_cbp=0x%08x td_be=0x%08x\n",
2935 (int)le32toh(sed->ed.ed_flags),
2936 (int)le32toh(data->td.td_flags),
2937 (int)le32toh(data->td.td_cbp),
2938 (int)le32toh(data->td.td_be)));
2939
2940 #ifdef USB_DEBUG
2941 if (ohcidebug > 5) {
2942 ohci_dump_ed(sed);
2943 ohci_dump_tds(data);
2944 }
2945 #endif
2946
2947 /* Insert ED in schedule */
2948 crit_enter();
2949 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2950 tdp->xfer = xfer;
2951 }
2952 sed->ed.ed_tailp = htole32(tail->physaddr);
2953 opipe->tail.td = tail;
2954 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2955 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2956 if (xfer->timeout && !sc->sc_bus.use_polling) {
2957 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2958 ohci_timeout, xfer);
2959 }
2960
2961 #if 0
2962 /* This goes wrong if we are too slow. */
2963 if (ohcidebug > 10) {
2964 delay(10000);
2965 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2966 OREAD4(sc, OHCI_COMMAND_STATUS)));
2967 ohci_dump_ed(sed);
2968 ohci_dump_tds(data);
2969 }
2970 #endif
2971
2972 crit_exit();
2973
2974 if (sc->sc_bus.use_polling)
2975 ohci_waitintr(sc, xfer);
2976
2977 return (USBD_IN_PROGRESS);
2978 }
2979
2980 static void
2981 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2982 {
2983 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2984 ohci_abort_xfer(xfer, USBD_CANCELLED);
2985 }
2986
2987 /*
2988 * Close a device bulk pipe.
2989 */
2990 static void
2991 ohci_device_bulk_close(usbd_pipe_handle pipe)
2992 {
2993 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2994 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2995
2996 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2997 ohci_close_pipe(pipe, sc->sc_bulk_head);
2998 ohci_free_std(sc, opipe->tail.td);
2999 }
3000
3001 /************************/
3002
3003 static usbd_status
3004 ohci_device_intr_transfer(usbd_xfer_handle xfer)
3005 {
3006 usbd_status err;
3007
3008 /* Insert last in queue. */
3009 err = usb_insert_transfer(xfer);
3010 if (err)
3011 return (err);
3012
3013 /* Pipe isn't running, start first */
3014 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3015 }
3016
3017 static usbd_status
3018 ohci_device_intr_start(usbd_xfer_handle xfer)
3019 {
3020 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3021 usbd_device_handle dev = opipe->pipe.device;
3022 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3023 ohci_soft_ed_t *sed = opipe->sed;
3024 ohci_soft_td_t *data, *tail;
3025 int len;
3026
3027 if (sc->sc_dying)
3028 return (USBD_IOERROR);
3029
3030 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3031 "flags=%d priv=%p\n",
3032 xfer, xfer->length, xfer->flags, xfer->priv));
3033
3034 #ifdef DIAGNOSTIC
3035 if (xfer->rqflags & URQ_REQUEST)
3036 panic("ohci_device_intr_transfer: a request");
3037 #endif
3038
3039 len = xfer->length;
3040
3041 data = opipe->tail.td;
3042 tail = ohci_alloc_std(sc);
3043 if (tail == NULL)
3044 return (USBD_NOMEM);
3045 tail->xfer = NULL;
3046
3047 data->td.td_flags = htole32(
3048 OHCI_TD_IN | OHCI_TD_NOCC |
3049 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3050 if (xfer->flags & USBD_SHORT_XFER_OK)
3051 data->td.td_flags |= htole32(OHCI_TD_R);
3052 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3053 data->nexttd = tail;
3054 data->td.td_nexttd = htole32(tail->physaddr);
3055 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3056 data->len = len;
3057 data->xfer = xfer;
3058 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3059 xfer->hcpriv = data;
3060
3061 #ifdef USB_DEBUG
3062 if (ohcidebug > 5) {
3063 DPRINTF(("ohci_device_intr_transfer:\n"));
3064 ohci_dump_ed(sed);
3065 ohci_dump_tds(data);
3066 }
3067 #endif
3068
3069 /* Insert ED in schedule */
3070 crit_enter();
3071 sed->ed.ed_tailp = htole32(tail->physaddr);
3072 opipe->tail.td = tail;
3073 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3074
3075 #if 0
3076 /*
3077 * This goes horribly wrong, printing thousands of descriptors,
3078 * because false references are followed due to the fact that the
3079 * TD is gone.
3080 */
3081 if (ohcidebug > 5) {
3082 usb_delay_ms(&sc->sc_bus, 5);
3083 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3084 OREAD4(sc, OHCI_COMMAND_STATUS)));
3085 ohci_dump_ed(sed);
3086 ohci_dump_tds(data);
3087 }
3088 #endif
3089 crit_exit();
3090
3091 return (USBD_IN_PROGRESS);
3092 }
3093
3094 /* Abort a device control request. */
3095 static void
3096 ohci_device_intr_abort(usbd_xfer_handle xfer)
3097 {
3098 if (xfer->pipe->intrxfer == xfer) {
3099 DPRINTF(("ohci_device_intr_abort: remove\n"));
3100 xfer->pipe->intrxfer = NULL;
3101 }
3102 ohci_abort_xfer(xfer, USBD_CANCELLED);
3103 }
3104
3105 /* Close a device interrupt pipe. */
3106 static void
3107 ohci_device_intr_close(usbd_pipe_handle pipe)
3108 {
3109 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3110 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3111 int nslots = opipe->u.intr.nslots;
3112 int pos = opipe->u.intr.pos;
3113 int j;
3114 ohci_soft_ed_t *p, *sed = opipe->sed;
3115
3116 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3117 pipe, nslots, pos));
3118 crit_enter();
3119 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3120 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3121 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3122 usb_delay_ms(&sc->sc_bus, 2);
3123 #ifdef DIAGNOSTIC
3124 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3125 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3126 panic("%s: Intr pipe %p still has TDs queued",
3127 device_get_nameunit(sc->sc_bus.bdev), pipe);
3128 #endif
3129
3130 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3131 ;
3132 #ifdef DIAGNOSTIC
3133 if (p == NULL)
3134 panic("ohci_device_intr_close: ED not found");
3135 #endif
3136 p->next = sed->next;
3137 p->ed.ed_nexted = sed->ed.ed_nexted;
3138 crit_exit();
3139
3140 for (j = 0; j < nslots; j++)
3141 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3142
3143 ohci_free_std(sc, opipe->tail.td);
3144 ohci_free_sed(sc, opipe->sed);
3145 }
3146
3147 static usbd_status
3148 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3149 {
3150 int i, j, best;
3151 u_int npoll, slow, shigh, nslots;
3152 u_int bestbw, bw;
3153 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3154
3155 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3156 if (ival == 0) {
3157 kprintf("ohci_setintr: 0 interval\n");
3158 return (USBD_INVAL);
3159 }
3160
3161 npoll = OHCI_NO_INTRS;
3162 while (npoll > ival)
3163 npoll /= 2;
3164 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3165
3166 /*
3167 * We now know which level in the tree the ED must go into.
3168 * Figure out which slot has most bandwidth left over.
3169 * Slots to examine:
3170 * npoll
3171 * 1 0
3172 * 2 1 2
3173 * 4 3 4 5 6
3174 * 8 7 8 9 10 11 12 13 14
3175 * N (N-1) .. (N-1+N-1)
3176 */
3177 slow = npoll-1;
3178 shigh = slow + npoll;
3179 nslots = OHCI_NO_INTRS / npoll;
3180 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3181 bw = 0;
3182 for (j = 0; j < nslots; j++)
3183 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3184 if (bw < bestbw) {
3185 best = i;
3186 bestbw = bw;
3187 }
3188 }
3189 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3190 best, slow, shigh, bestbw));
3191
3192 crit_enter();
3193 hsed = sc->sc_eds[best];
3194 sed->next = hsed->next;
3195 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3196 hsed->next = sed;
3197 hsed->ed.ed_nexted = htole32(sed->physaddr);
3198 crit_exit();
3199
3200 for (j = 0; j < nslots; j++)
3201 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3202 opipe->u.intr.nslots = nslots;
3203 opipe->u.intr.pos = best;
3204
3205 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3206 return (USBD_NORMAL_COMPLETION);
3207 }
3208
3209 /***********************/
3210
3211 usbd_status
3212 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3213 {
3214 usbd_status err;
3215
3216 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3217
3218 /* Put it on our queue, */
3219 err = usb_insert_transfer(xfer);
3220
3221 /* bail out on error, */
3222 if (err && err != USBD_IN_PROGRESS)
3223 return (err);
3224
3225 /* XXX should check inuse here */
3226
3227 /* insert into schedule, */
3228 ohci_device_isoc_enter(xfer);
3229
3230 /* and start if the pipe wasn't running */
3231 if (!err)
3232 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3233
3234 return (err);
3235 }
3236
3237 void
3238 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3239 {
3240 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3241 usbd_device_handle dev = opipe->pipe.device;
3242 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3243 ohci_soft_ed_t *sed = opipe->sed;
3244 struct iso *iso = &opipe->u.iso;
3245 struct ohci_xfer *oxfer = (struct ohci_xfer *)xfer;
3246 ohci_soft_itd_t *sitd, *nsitd;
3247 ohci_physaddr_t buf, offs, noffs, bp0, tdphys;
3248 int i, ncur, nframes;
3249
3250 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3251 "nframes=%d\n",
3252 iso->inuse, iso->next, xfer, xfer->nframes));
3253
3254 if (sc->sc_dying)
3255 return;
3256
3257 if (iso->next == -1) {
3258 /* Not in use yet, schedule it a few frames ahead. */
3259 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3260 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3261 iso->next));
3262 }
3263
3264 if (xfer->hcpriv) {
3265 crit_enter();
3266 for (sitd = xfer->hcpriv; sitd != NULL && sitd->xfer == xfer;
3267 sitd = sitd->nextitd)
3268 ohci_free_sitd(sc, sitd); /* Free ITDs in prev xfer*/
3269 crit_exit();
3270
3271 if (sitd == NULL) {
3272 sitd = ohci_alloc_sitd(sc);
3273 if (sitd == NULL)
3274 panic("cant alloc isoc");
3275 opipe->tail.itd = sitd;
3276 tdphys = sitd->physaddr;
3277 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop*/
3278 sed->ed.ed_headp =
3279 sed->ed.ed_tailp = htole32(tdphys);
3280 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* Start.*/
3281 }
3282 }
3283
3284 sitd = opipe->tail.itd;
3285 buf = DMAADDR(&xfer->dmabuf, 0);
3286 bp0 = OHCI_PAGE(buf);
3287 offs = OHCI_PAGE_OFFSET(buf);
3288 nframes = xfer->nframes;
3289 xfer->hcpriv = sitd;
3290 for (i = ncur = 0; i < nframes; i++, ncur++) {
3291 noffs = offs + xfer->frlengths[i];
3292 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3293 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3294
3295 /* Allocate next ITD */
3296 nsitd = ohci_alloc_sitd(sc);
3297 if (nsitd == NULL) {
3298 /* XXX what now? */
3299 kprintf("%s: isoc TD alloc failed\n",
3300 device_get_nameunit(sc->sc_bus.bdev));
3301 return;
3302 }
3303
3304 /* Fill current ITD */
3305 sitd->itd.itd_flags = htole32(
3306 OHCI_ITD_NOCC |
3307 OHCI_ITD_SET_SF(iso->next) |
3308 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3309 OHCI_ITD_SET_FC(ncur));
3310 sitd->itd.itd_bp0 = htole32(bp0);
3311 sitd->nextitd = nsitd;
3312 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3313 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3314 sitd->xfer = xfer;
3315 sitd->flags = OHCI_ITD_ACTIVE;
3316
3317 sitd = nsitd;
3318 iso->next = iso->next + ncur;
3319 bp0 = OHCI_PAGE(buf + offs);
3320 ncur = 0;
3321 }
3322 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3323 offs = noffs;
3324 }
3325 nsitd = ohci_alloc_sitd(sc);
3326 if (nsitd == NULL) {
3327 /* XXX what now? */
3328 kprintf("%s: isoc TD alloc failed\n",
3329 device_get_nameunit(sc->sc_bus.bdev));
3330 return;
3331 }
3332 /* Fixup last used ITD */
3333 sitd->itd.itd_flags = htole32(
3334 OHCI_ITD_NOCC |
3335 OHCI_ITD_SET_SF(iso->next) |
3336 OHCI_ITD_SET_DI(0) |
3337 OHCI_ITD_SET_FC(ncur));
3338 sitd->itd.itd_bp0 = htole32(bp0);
3339 sitd->nextitd = nsitd;
3340 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3341 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3342 sitd->xfer = xfer;
3343 sitd->flags = OHCI_CALL_DONE | OHCI_ITD_ACTIVE;
3344
3345 iso->next = iso->next + ncur;
3346 iso->inuse += nframes;
3347
3348 xfer->actlen = offs; /* XXX pretend we did it all */
3349
3350 xfer->status = USBD_IN_PROGRESS;
3351
3352 oxfer->ohci_xfer_flags |= OHCI_ISOC_DIRTY;
3353
3354 #ifdef USB_DEBUG
3355 if (ohcidebug > 5) {
3356 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3357 le32toh(sc->sc_hcca->hcca_frame_number)));
3358 ohci_dump_itds(xfer->hcpriv);
3359 ohci_dump_ed(sed);
3360 }
3361 #endif
3362
3363 crit_enter();
3364 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3365 opipe->tail.itd = nsitd;
3366 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3367 crit_exit();
3368
3369 #ifdef USB_DEBUG
3370 if (ohcidebug > 5) {
3371 delay(150000);
3372 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3373 le32toh(sc->sc_hcca->hcca_frame_number)));
3374 ohci_dump_itds(xfer->hcpriv);
3375 ohci_dump_ed(sed);
3376 }
3377 #endif
3378 }
3379
3380 usbd_status
3381 ohci_device_isoc_start(usbd_xfer_handle xfer)
3382 {
3383 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3384 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3385 ohci_soft_ed_t *sed;
3386
3387 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3388
3389 if (sc->sc_dying)
3390 return (USBD_IOERROR);
3391
3392 #ifdef DIAGNOSTIC
3393 if (xfer->status != USBD_IN_PROGRESS)
3394 kprintf("ohci_device_isoc_start: not in progress %p\n", xfer);
3395 #endif
3396
3397 /* XXX anything to do? */
3398
3399 crit_enter();
3400 sed = opipe->sed; /* Turn off ED skip-bit to start processing */
3401 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* ED's ITD list.*/
3402 crit_exit();
3403
3404 return (USBD_IN_PROGRESS);
3405 }
3406
3407 void
3408 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3409 {
3410 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3411 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3412 ohci_soft_ed_t *sed;
3413 ohci_soft_itd_t *sitd, *tmp_sitd;
3414 int undone, num_sitds;
3415
3416 crit_enter();
3417 opipe->aborting = 1;
3418
3419 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3420
3421 /* Transfer is already done. */
3422 if (xfer->status != USBD_NOT_STARTED &&
3423 xfer->status != USBD_IN_PROGRESS) {
3424 crit_exit();
3425 kprintf("ohci_device_isoc_abort: early return\n");
3426 return;
3427 }
3428
3429 /* Give xfer the requested abort code. */
3430 xfer->status = USBD_CANCELLED;
3431
3432 sed = opipe->sed;
3433 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3434
3435 num_sitds = 0;
3436 sitd = xfer->hcpriv;
3437 #ifdef DIAGNOSTIC
3438 if (sitd == NULL) {
3439 crit_exit();
3440 kprintf("ohci_device_isoc_abort: hcpriv==0\n");
3441 return;
3442 }
3443 #endif
3444 for (; sitd != NULL && sitd->xfer == xfer; sitd = sitd->nextitd) {
3445 num_sitds++;
3446 #ifdef DIAGNOSTIC
3447 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3448 sitd->isdone = 1;
3449 #endif
3450 }
3451
3452 crit_exit();
3453
3454 /*
3455 * Each sitd has up to OHCI_ITD_NOFFSET transfers, each can
3456 * take a usb 1ms cycle. Conservatively wait for it to drain.
3457 * Even with DMA done, it can take awhile for the "batch"
3458 * delivery of completion interrupts to occur thru the controller.
3459 */
3460
3461 do {
3462 usb_delay_ms(&sc->sc_bus, 2*(num_sitds*OHCI_ITD_NOFFSET));
3463
3464 undone = 0;
3465 tmp_sitd = xfer->hcpriv;
3466 for (; tmp_sitd != NULL && tmp_sitd->xfer == xfer;
3467 tmp_sitd = tmp_sitd->nextitd) {
3468 if (OHCI_CC_NO_ERROR ==
3469 OHCI_ITD_GET_CC(le32toh(tmp_sitd->itd.itd_flags)) &&
3470 tmp_sitd->flags & OHCI_ITD_ACTIVE &&
3471 (tmp_sitd->flags & OHCI_ITD_INTFIN) == 0)
3472 undone++;
3473 }
3474 } while( undone != 0 );
3475
3476 crit_enter();
3477
3478 /* Run callback. */
3479 usb_transfer_complete(xfer);
3480
3481 if (sitd != NULL)
3482 /*
3483 * Only if there is a `next' sitd in next xfer...
3484 * unlink this xfer's sitds.
3485 */
3486 sed->ed.ed_headp = htole32(sitd->physaddr);
3487 else
3488 sed->ed.ed_headp = 0;
3489
3490 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3491
3492 crit_exit();
3493 }
3494
3495 void
3496 ohci_device_isoc_done(usbd_xfer_handle xfer)
3497 {
3498 /* This null routine corresponds to non-isoc "done()" routines
3499 * that free the stds associated with an xfer after a completed
3500 * xfer interrupt. However, in the case of isoc transfers, the
3501 * sitds associated with the transfer have already been processed
3502 * and reallocated for the next iteration by
3503 * "ohci_device_isoc_transfer()".
3504 *
3505 * Routine "usb_transfer_complete()" is called at the end of every
3506 * relevant usb interrupt. "usb_transfer_complete()" indirectly
3507 * calls 1) "ohci_device_isoc_transfer()" (which keeps pumping the
3508 * pipeline by setting up the next transfer iteration) and 2) then
3509 * calls "ohci_device_isoc_done()". Isoc transfers have not been
3510 * working for the ohci usb because this routine was trashing the
3511 * xfer set up for the next iteration (thus, only the first
3512 * UGEN_NISOREQS xfers outstanding on an open would work). Perhaps
3513 * this could all be re-factored, but that's another pass...
3514 */
3515 }
3516
3517 usbd_status
3518 ohci_setup_isoc(usbd_pipe_handle pipe)
3519 {
3520 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3521 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3522 struct iso *iso = &opipe->u.iso;
3523
3524 iso->next = -1;
3525 iso->inuse = 0;
3526
3527 crit_enter();
3528 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3529 crit_exit();
3530
3531 return (USBD_NORMAL_COMPLETION);
3532 }
3533
3534 void
3535 ohci_device_isoc_close(usbd_pipe_handle pipe)
3536 {
3537 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3538 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3539 ohci_soft_ed_t *sed;
3540
3541 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3542
3543 sed = opipe->sed;
3544 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* Stop device. */
3545
3546 ohci_close_pipe(pipe, sc->sc_isoc_head); /* Stop isoc list, free ED.*/
3547
3548 /* up to NISOREQs xfers still outstanding. */
3549
3550 #ifdef DIAGNOSTIC
3551 opipe->tail.itd->isdone = 1;
3552 #endif
3553 ohci_free_sitd(sc, opipe->tail.itd); /* Next `avail free' sitd.*/
3554 }
DragonFly BSD