2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $
31 #include <sys/param.h>
33 #include <sys/bus_resource.h>
34 #include <sys/module.h>
37 #include <sys/systm.h>
38 #include <sys/machintr.h>
40 #include <bus/pci/pcireg.h>
41 #include <bus/pci/pcivar.h>
48 #define IOMASK 0xfffffffc
49 #define ATA_PROBE_OK -10
51 static const struct none_atapci
{
56 } none_atapci_table
[] = {
57 /* Appears on Intel PRO/1000 PM */
58 { ATA_INTEL_ID
, 0x108d, ATA_INTEL_ID
, 0x0000 },
63 ata_legacy(device_t dev
)
65 return (((pci_read_config(dev
, PCIR_PROGIF
, 1)&PCIP_STORAGE_IDE_MASTERDEV
)&&
66 ((pci_read_config(dev
, PCIR_PROGIF
, 1) &
67 (PCIP_STORAGE_IDE_MODEPRIM
| PCIP_STORAGE_IDE_MODESEC
)) !=
68 (PCIP_STORAGE_IDE_MODEPRIM
| PCIP_STORAGE_IDE_MODESEC
))) ||
69 (!pci_read_config(dev
, PCIR_BAR(0), 4) &&
70 !pci_read_config(dev
, PCIR_BAR(1), 4) &&
71 !pci_read_config(dev
, PCIR_BAR(2), 4) &&
72 !pci_read_config(dev
, PCIR_BAR(3), 4) &&
73 !pci_read_config(dev
, PCIR_BAR(5), 4)));
77 ata_pci_probe(device_t dev
)
79 if (pci_get_class(dev
) != PCIC_STORAGE
)
82 /* if this is an AHCI chipset grab it */
83 if (pci_get_subclass(dev
) == PCIS_STORAGE_SATA
) {
84 if (!ata_ahci_ident(dev
))
88 /* run through the vendor specific drivers */
89 switch (pci_get_vendor(dev
)) {
91 if (!ata_acard_ident(dev
))
94 case ATA_ACER_LABS_ID
:
95 if (!ata_ali_ident(dev
))
99 if (!ata_amd_ident(dev
))
103 if (!ata_ati_ident(dev
))
107 if (!ata_cyrix_ident(dev
))
111 if (!ata_cypress_ident(dev
))
114 case ATA_HIGHPOINT_ID
:
115 if (!ata_highpoint_ident(dev
))
119 if (!ata_intel_ident(dev
))
123 if (!ata_ite_ident(dev
))
127 if (!ata_jmicron_ident(dev
))
131 if (!ata_marvell_ident(dev
))
134 case ATA_NATIONAL_ID
:
135 if (!ata_national_ident(dev
))
139 if (!ata_netcell_ident(dev
))
143 if (!ata_nvidia_ident(dev
))
147 if (!ata_promise_ident(dev
))
150 case ATA_SERVERWORKS_ID
:
151 if (!ata_serverworks_ident(dev
))
154 case ATA_SILICON_IMAGE_ID
:
155 if (!ata_sii_ident(dev
))
159 if (!ata_sis_ident(dev
))
163 if (!ata_via_ident(dev
))
167 if (pci_get_devid(dev
) == ATA_CENATEK_ROCKET
) {
168 ata_generic_ident(dev
);
169 device_set_desc(dev
, "Cenatek Rocket Drive controller");
174 if (pci_get_devid(dev
) == ATA_MICRON_RZ1000
||
175 pci_get_devid(dev
) == ATA_MICRON_RZ1001
) {
176 ata_generic_ident(dev
);
178 "RZ 100? ATA controller !WARNING! data loss/corruption risk");
184 /* unknown chipset, try generic AHCI or DMA if it seems possible */
185 if (pci_get_subclass(dev
) == PCIS_STORAGE_IDE
) {
186 uint16_t vendor
, device
, subvendor
, subdevice
;
187 const struct none_atapci
*e
;
189 vendor
= pci_get_vendor(dev
);
190 device
= pci_get_device(dev
);
191 subvendor
= pci_get_subvendor(dev
);
192 subdevice
= pci_get_subdevice(dev
);
193 for (e
= none_atapci_table
; e
->vendor
!= 0xffff; ++e
) {
194 if (e
->vendor
== vendor
&& e
->device
== device
&&
195 e
->subvendor
== subvendor
&& e
->subdevice
== subdevice
)
199 if (!ata_generic_ident(dev
))
206 ata_pci_attach(device_t dev
)
208 struct ata_pci_controller
*ctlr
= device_get_softc(dev
);
212 /* do chipset specific setups only needed once */
213 ctlr
->legacy
= ata_legacy(dev
);
214 if (ctlr
->legacy
|| pci_read_config(dev
, PCIR_BAR(2), 4) & IOMASK
)
218 ctlr
->allocate
= ata_pci_allocate
;
221 /* if needed try to enable busmastering */
222 cmd
= pci_read_config(dev
, PCIR_COMMAND
, 2);
223 if (!(cmd
& PCIM_CMD_BUSMASTEREN
)) {
224 pci_write_config(dev
, PCIR_COMMAND
, cmd
| PCIM_CMD_BUSMASTEREN
, 2);
225 cmd
= pci_read_config(dev
, PCIR_COMMAND
, 2);
228 /* if busmastering mode "stuck" use it */
229 if ((cmd
& PCIM_CMD_BUSMASTEREN
) == PCIM_CMD_BUSMASTEREN
) {
230 ctlr
->r_type1
= SYS_RES_IOPORT
;
231 ctlr
->r_rid1
= ATA_BMADDR_RID
;
232 ctlr
->r_res1
= bus_alloc_resource_any(dev
, ctlr
->r_type1
, &ctlr
->r_rid1
,
234 /* Only set a dma init function if the device actually supports it. */
235 ctlr
->dmainit
= ata_pci_dmainit
;
238 if (ctlr
->chipinit(dev
))
241 /* attach all channels on this controller */
242 for (unit
= 0; unit
< ctlr
->channels
; unit
++) {
244 if ((unit
== 0 || unit
== 1) && ctlr
->legacy
) {
245 device_add_child(dev
, "ata", unit
);
248 /* XXX TGEN devclass_find_free_unit() implementation */
250 while (freeunit
< devclass_get_maxunit(ata_devclass
) &&
251 devclass_get_device(ata_devclass
, freeunit
) != NULL
)
254 device_add_child(dev
, "ata", freeunit
);
256 bus_generic_attach(dev
);
261 ata_pci_detach(device_t dev
)
263 struct ata_pci_controller
*ctlr
= device_get_softc(dev
);
267 /* detach & delete all children */
268 if (!device_get_children(dev
, &children
, &nchildren
)) {
269 for (i
= 0; i
< nchildren
; i
++)
270 device_delete_child(dev
, children
[i
]);
271 kfree(children
, M_TEMP
);
275 bus_teardown_intr(dev
, ctlr
->r_irq
, ctlr
->handle
);
276 bus_release_resource(dev
, SYS_RES_IRQ
, ATA_IRQ_RID
, ctlr
->r_irq
);
280 bus_release_resource(dev
, ctlr
->r_type2
, ctlr
->r_rid2
, ctlr
->r_res2
);
284 bus_release_resource(dev
, ctlr
->r_type1
, ctlr
->r_rid1
, ctlr
->r_res1
);
292 ata_pci_alloc_resource(device_t dev
, device_t child
, int type
, int *rid
,
293 u_long start
, u_long end
, u_long count
, u_int flags
, int cpuid
)
295 struct ata_pci_controller
*controller
= device_get_softc(dev
);
296 int unit
= ((struct ata_channel
*)device_get_softc(child
))->unit
;
297 struct resource
*res
= NULL
;
300 if (type
== SYS_RES_IOPORT
) {
303 if (controller
->legacy
) {
304 start
= (unit
? ATA_SECONDARY
: ATA_PRIMARY
);
306 end
= start
+ count
- 1;
308 myrid
= PCIR_BAR(0) + (unit
<< 3);
309 res
= BUS_ALLOC_RESOURCE(device_get_parent(dev
), dev
,
310 SYS_RES_IOPORT
, &myrid
,
311 start
, end
, count
, flags
, cpuid
);
314 case ATA_CTLADDR_RID
:
315 if (controller
->legacy
) {
316 start
= (unit
? ATA_SECONDARY
: ATA_PRIMARY
) + ATA_CTLOFFSET
;
317 count
= ATA_CTLIOSIZE
;
318 end
= start
+ count
- 1;
320 myrid
= PCIR_BAR(1) + (unit
<< 3);
321 res
= BUS_ALLOC_RESOURCE(device_get_parent(dev
), dev
,
322 SYS_RES_IOPORT
, &myrid
,
323 start
, end
, count
, flags
, cpuid
);
327 if (type
== SYS_RES_IRQ
&& *rid
== ATA_IRQ_RID
) {
328 if (controller
->legacy
) {
329 int irq
= (unit
== 0 ? 14 : 15);
331 cpuid
= machintr_legacy_intr_cpuid(irq
);
332 res
= BUS_ALLOC_RESOURCE(device_get_parent(dev
), child
,
333 SYS_RES_IRQ
, rid
, irq
, irq
, 1, flags
,
337 res
= controller
->r_irq
;
343 ata_pci_release_resource(device_t dev
, device_t child
, int type
, int rid
,
346 struct ata_pci_controller
*controller
= device_get_softc(dev
);
347 int unit
= ((struct ata_channel
*)device_get_softc(child
))->unit
;
349 if (type
== SYS_RES_IOPORT
) {
352 return BUS_RELEASE_RESOURCE(device_get_parent(dev
), dev
,
354 PCIR_BAR(0) + (unit
<< 3), r
);
357 case ATA_CTLADDR_RID
:
358 return BUS_RELEASE_RESOURCE(device_get_parent(dev
), dev
,
360 PCIR_BAR(1) + (unit
<< 3), r
);
366 if (type
== SYS_RES_IRQ
) {
367 if (rid
!= ATA_IRQ_RID
)
370 if (controller
->legacy
) {
371 return BUS_RELEASE_RESOURCE(device_get_parent(dev
), child
,
372 SYS_RES_IRQ
, rid
, r
);
381 ata_pci_setup_intr(device_t dev
, device_t child
, struct resource
*irq
,
382 int flags
, driver_intr_t
*function
, void *argument
,
385 struct ata_pci_controller
*controller
= device_get_softc(dev
);
387 if (controller
->legacy
) {
388 return BUS_SETUP_INTR(device_get_parent(dev
), child
, irq
,
389 flags
, function
, argument
, cookiep
, NULL
, NULL
);
392 struct ata_pci_controller
*controller
= device_get_softc(dev
);
393 int unit
= ((struct ata_channel
*)device_get_softc(child
))->unit
;
395 controller
->interrupt
[unit
].function
= function
;
396 controller
->interrupt
[unit
].argument
= argument
;
397 *cookiep
= controller
;
403 ata_pci_teardown_intr(device_t dev
, device_t child
, struct resource
*irq
,
406 struct ata_pci_controller
*controller
= device_get_softc(dev
);
408 if (controller
->legacy
) {
409 return BUS_TEARDOWN_INTR(device_get_parent(dev
), child
, irq
, cookie
);
412 struct ata_pci_controller
*controller
= device_get_softc(dev
);
413 int unit
= ((struct ata_channel
*)device_get_softc(child
))->unit
;
415 controller
->interrupt
[unit
].function
= NULL
;
416 controller
->interrupt
[unit
].argument
= NULL
;
422 ata_pci_allocate(device_t dev
)
424 struct ata_pci_controller
*ctlr
= device_get_softc(device_get_parent(dev
));
425 struct ata_channel
*ch
= device_get_softc(dev
);
426 struct resource
*io
= NULL
, *ctlio
= NULL
;
429 rid
= ATA_IOADDR_RID
;
430 if (!(io
= bus_alloc_resource_any(dev
, SYS_RES_IOPORT
, &rid
, RF_ACTIVE
)))
433 rid
= ATA_CTLADDR_RID
;
434 if (!(ctlio
= bus_alloc_resource_any(dev
, SYS_RES_IOPORT
, &rid
,RF_ACTIVE
))){
435 bus_release_resource(dev
, SYS_RES_IOPORT
, ATA_IOADDR_RID
, io
);
439 for (i
= ATA_DATA
; i
<= ATA_COMMAND
; i
++) {
440 ch
->r_io
[i
].res
= io
;
441 ch
->r_io
[i
].offset
= i
;
443 ch
->r_io
[ATA_CONTROL
].res
= ctlio
;
444 ch
->r_io
[ATA_CONTROL
].offset
= ctlr
->legacy
? 0 : 2;
445 ch
->r_io
[ATA_IDX_ADDR
].res
= io
;
446 ata_default_registers(dev
);
448 for (i
= ATA_BMCMD_PORT
; i
<= ATA_BMDTP_PORT
; i
++) {
449 ch
->r_io
[i
].res
= ctlr
->r_res1
;
450 ch
->r_io
[i
].offset
= (i
- ATA_BMCMD_PORT
) + (ch
->unit
*ATA_BMIOSIZE
);
459 ata_pci_hw(device_t dev
)
461 struct ata_channel
*ch
= device_get_softc(dev
);
464 ch
->hw
.status
= ata_pci_status
;
468 ata_pci_status(device_t dev
)
470 struct ata_pci_controller
*controller
=
471 device_get_softc(device_get_parent(dev
));
472 struct ata_channel
*ch
= device_get_softc(dev
);
474 if ((dumping
|| !controller
->legacy
) &&
475 ch
->dma
&& ((ch
->flags
& ATA_ALWAYS_DMASTAT
) ||
476 (ch
->dma
->flags
& ATA_DMA_ACTIVE
))) {
477 int bmstat
= ATA_IDX_INB(ch
, ATA_BMSTAT_PORT
) & ATA_BMSTAT_MASK
;
480 * Strictly speaking the DMA engine should already be stopped
481 * once we receive the interrupt.
482 * However at least ICH controllers seem to have the habbit
483 * of not clearing the active bit even though the interrupt
485 * To make sure we wait a little bit (to make sure that other
486 * buggy systems actually have a chance of finishing their
487 * DMA transaction) and then ignore the active bit.
489 if ((bmstat
& (ATA_BMSTAT_ACTIVE
| ATA_BMSTAT_INTERRUPT
)) ==
490 (ATA_BMSTAT_ACTIVE
| ATA_BMSTAT_INTERRUPT
)) {
492 bmstat
= ATA_IDX_INB(ch
, ATA_BMSTAT_PORT
) & ATA_BMSTAT_MASK
;
494 if ((bmstat
& ATA_BMSTAT_INTERRUPT
) == 0)
496 ATA_IDX_OUTB(ch
, ATA_BMSTAT_PORT
, bmstat
& ~ATA_BMSTAT_ERROR
);
499 if (ATA_IDX_INB(ch
, ATA_ALTSTAT
) & ATA_S_BUSY
) {
501 if (ATA_IDX_INB(ch
, ATA_ALTSTAT
) & ATA_S_BUSY
)
508 ata_pci_dmastart(device_t dev
)
510 struct ata_channel
*ch
= device_get_softc(device_get_parent(dev
));
513 ATA_IDX_OUTB(ch
, ATA_BMSTAT_PORT
, (ATA_IDX_INB(ch
, ATA_BMSTAT_PORT
) |
514 (ATA_BMSTAT_INTERRUPT
| ATA_BMSTAT_ERROR
)));
515 ATA_IDX_OUTL(ch
, ATA_BMDTP_PORT
, ch
->dma
->sg_bus
);
516 ch
->dma
->flags
|= ATA_DMA_ACTIVE
;
517 val
= ATA_IDX_INB(ch
, ATA_BMCMD_PORT
);
518 if (ch
->dma
->flags
& ATA_DMA_READ
)
519 val
|= ATA_BMCMD_WRITE_READ
;
521 val
&= ~ATA_BMCMD_WRITE_READ
;
522 ATA_IDX_OUTB(ch
, ATA_BMCMD_PORT
, val
);
525 * Issue the start command separately from configuration setup,
526 * in case the hardware latches portions of the configuration.
528 ATA_IDX_OUTB(ch
, ATA_BMCMD_PORT
, val
| ATA_BMCMD_START_STOP
);
534 ata_pci_dmastop(device_t dev
)
536 struct ata_channel
*ch
= device_get_softc(device_get_parent(dev
));
539 ATA_IDX_OUTB(ch
, ATA_BMCMD_PORT
,
540 ATA_IDX_INB(ch
, ATA_BMCMD_PORT
) & ~ATA_BMCMD_START_STOP
);
541 ch
->dma
->flags
&= ~ATA_DMA_ACTIVE
;
542 error
= ATA_IDX_INB(ch
, ATA_BMSTAT_PORT
) & ATA_BMSTAT_MASK
;
543 ATA_IDX_OUTB(ch
, ATA_BMSTAT_PORT
, ATA_BMSTAT_INTERRUPT
| ATA_BMSTAT_ERROR
);
548 ata_pci_dmareset(device_t dev
)
550 struct ata_channel
*ch
= device_get_softc(dev
);
552 ATA_IDX_OUTB(ch
, ATA_BMCMD_PORT
,
553 ATA_IDX_INB(ch
, ATA_BMCMD_PORT
) & ~ATA_BMCMD_START_STOP
);
554 ch
->dma
->flags
&= ~ATA_DMA_ACTIVE
;
555 ATA_IDX_OUTB(ch
, ATA_BMSTAT_PORT
, ATA_BMSTAT_INTERRUPT
| ATA_BMSTAT_ERROR
);
556 ch
->dma
->unload(dev
);
560 ata_pci_dmainit(device_t dev
)
562 struct ata_channel
*ch
= device_get_softc(dev
);
566 ch
->dma
->start
= ata_pci_dmastart
;
567 ch
->dma
->stop
= ata_pci_dmastop
;
568 ch
->dma
->reset
= ata_pci_dmareset
;
573 ata_pcivendor2str(device_t dev
)
575 switch (pci_get_vendor(dev
)) {
576 case ATA_ACARD_ID
: return "Acard";
577 case ATA_ACER_LABS_ID
: return "AcerLabs";
578 case ATA_AMD_ID
: return "AMD";
579 case ATA_ATI_ID
: return "ATI";
580 case ATA_CYRIX_ID
: return "Cyrix";
581 case ATA_CYPRESS_ID
: return "Cypress";
582 case ATA_HIGHPOINT_ID
: return "HighPoint";
583 case ATA_INTEL_ID
: return "Intel";
584 case ATA_ITE_ID
: return "ITE";
585 case ATA_JMICRON_ID
: return "JMicron";
586 case ATA_MARVELL_ID
: return "Marvell";
587 case ATA_NATIONAL_ID
: return "National";
588 case ATA_NETCELL_ID
: return "Netcell";
589 case ATA_NVIDIA_ID
: return "nVidia";
590 case ATA_PROMISE_ID
: return "Promise";
591 case ATA_SERVERWORKS_ID
: return "ServerWorks";
592 case ATA_SILICON_IMAGE_ID
: return "SiI";
593 case ATA_SIS_ID
: return "SiS";
594 case ATA_VIA_ID
: return "VIA";
595 case ATA_CENATEK_ID
: return "Cenatek";
596 case ATA_MICRON_ID
: return "Micron";
597 default: return "Generic";
601 static device_method_t ata_pci_methods
[] = {
602 /* device interface */
603 DEVMETHOD(device_probe
, ata_pci_probe
),
604 DEVMETHOD(device_attach
, ata_pci_attach
),
605 DEVMETHOD(device_detach
, ata_pci_detach
),
606 DEVMETHOD(device_shutdown
, bus_generic_shutdown
),
607 DEVMETHOD(device_suspend
, bus_generic_suspend
),
608 DEVMETHOD(device_resume
, bus_generic_resume
),
611 DEVMETHOD(bus_alloc_resource
, ata_pci_alloc_resource
),
612 DEVMETHOD(bus_release_resource
, ata_pci_release_resource
),
613 DEVMETHOD(bus_activate_resource
, bus_generic_activate_resource
),
614 DEVMETHOD(bus_deactivate_resource
, bus_generic_deactivate_resource
),
615 DEVMETHOD(bus_setup_intr
, ata_pci_setup_intr
),
616 DEVMETHOD(bus_teardown_intr
, ata_pci_teardown_intr
),
621 devclass_t atapci_devclass
;
623 static driver_t ata_pci_driver
= {
626 sizeof(struct ata_pci_controller
),
629 DRIVER_MODULE(atapci
, pci
, ata_pci_driver
, atapci_devclass
, NULL
, NULL
);
630 MODULE_VERSION(atapci
, 1);
631 MODULE_DEPEND(atapci
, ata
, 1, 1, 1);
634 ata_pcichannel_probe(device_t dev
)
636 struct ata_channel
*ch
= device_get_softc(dev
);
641 /* take care of green memory */
642 bzero(ch
, sizeof(struct ata_channel
));
644 /* find channel number on this controller */
645 device_get_children(device_get_parent(dev
), &children
, &count
);
646 for (i
= 0; i
< count
; i
++) {
647 if (children
[i
] == dev
)
650 kfree(children
, M_TEMP
);
652 ksprintf(buffer
, "ATA channel %d", ch
->unit
);
653 device_set_desc_copy(dev
, buffer
);
655 return ata_probe(dev
);
659 ata_pcichannel_attach(device_t dev
)
661 struct ata_pci_controller
*ctlr
= device_get_softc(device_get_parent(dev
));
662 struct ata_channel
*ch
= device_get_softc(dev
);
670 if ((error
= ctlr
->allocate(dev
))) {
676 return ata_attach(dev
);
680 ata_pcichannel_detach(device_t dev
)
682 struct ata_channel
*ch
= device_get_softc(dev
);
685 if ((error
= ata_detach(dev
)))
691 /* XXX SOS free resources for io and ctlio ?? */
697 ata_pcichannel_locking(device_t dev
, int mode
)
699 struct ata_pci_controller
*ctlr
= device_get_softc(device_get_parent(dev
));
700 struct ata_channel
*ch
= device_get_softc(dev
);
703 return ctlr
->locking(dev
, mode
);
709 ata_pcichannel_reset(device_t dev
)
711 struct ata_pci_controller
*ctlr
= device_get_softc(device_get_parent(dev
));
712 struct ata_channel
*ch
= device_get_softc(dev
);
714 /* if DMA engine present reset it */
718 ch
->dma
->unload(dev
);
721 /* reset the controller HW */
725 ata_generic_reset(dev
);
729 ata_pcichannel_setmode(device_t parent
, device_t dev
)
731 struct ata_pci_controller
*ctlr
= device_get_softc(GRANDPARENT(dev
));
732 struct ata_device
*atadev
= device_get_softc(dev
);
733 int mode
= atadev
->mode
;
735 ctlr
->setmode(dev
, ATA_PIO_MAX
);
737 ctlr
->setmode(dev
, mode
);
740 static device_method_t ata_pcichannel_methods
[] = {
741 /* device interface */
742 DEVMETHOD(device_probe
, ata_pcichannel_probe
),
743 DEVMETHOD(device_attach
, ata_pcichannel_attach
),
744 DEVMETHOD(device_detach
, ata_pcichannel_detach
),
745 DEVMETHOD(device_shutdown
, bus_generic_shutdown
),
746 DEVMETHOD(device_suspend
, ata_suspend
),
747 DEVMETHOD(device_resume
, ata_resume
),
750 DEVMETHOD(ata_setmode
, ata_pcichannel_setmode
),
751 DEVMETHOD(ata_locking
, ata_pcichannel_locking
),
752 DEVMETHOD(ata_reset
, ata_pcichannel_reset
),
757 driver_t ata_pcichannel_driver
= {
759 ata_pcichannel_methods
,
760 sizeof(struct ata_channel
),
763 DRIVER_MODULE(ata
, atapci
, ata_pcichannel_driver
, ata_devclass
, NULL
, NULL
);