sys/dev/raid/hptmv/mvSata.h

   1 /*
   2  * Copyright (c) 2004-2005 MARVELL SEMICONDUCTOR ISRAEL, LTD.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD: src/sys/dev/hptmv/mvSata.h,v 1.4 2009/04/07 16:38:25 delphij Exp $
  27  */
  28 #ifndef __INCmvSatah
  29 #define __INCmvSatah
  30
  31 #ifndef SUPPORT_MV_SATA_GEN_1
  32 #define SUPPORT_MV_SATA_GEN_1 1
  33 #endif
  34
  35 #ifndef SUPPORT_MV_SATA_GEN_2
  36 #define SUPPORT_MV_SATA_GEN_2 0
  37 #endif
  38
  39 #ifndef SUPPORT_MV_SATA_GEN_2E
  40 #define SUPPORT_MV_SATA_GEN_2E 0
  41 #endif
  42
  43 #if (SUPPORT_MV_SATA_GEN_1 + SUPPORT_MV_SATA_GEN_2 + SUPPORT_MV_SATA_GEN_2E) > 1
  44
  45 #define MV_SATA_GEN_1(x) ((x)->sataAdapterGeneration==1)
  46 #define MV_SATA_GEN_2(x) ((x)->sataAdapterGeneration>=2)
  47 #define MV_SATA_GEN_2E(x) ((x)->sataAdapterGeneration==3)
  48
  49 #elif SUPPORT_MV_SATA_GEN_1==1
  50
  51 #define MV_SATA_GEN_1(x) 1
  52 #define MV_SATA_GEN_2(x) 0
  53 #define MV_SATA_GEN_2E(x) 0
  54
  55 #elif SUPPORT_MV_SATA_GEN_2==1
  56
  57 #define MV_SATA_GEN_1(x) 0
  58 #define MV_SATA_GEN_2(x) 1
  59 #define MV_SATA_GEN_2E(x) 0
  60
  61 #elif SUPPORT_MV_SATA_GEN_2E==1
  62
  63 #define MV_SATA_GEN_1(x)  0
  64 #define MV_SATA_GEN_2(x)  1 /* gen2E impiles gen2 */
  65 #define MV_SATA_GEN_2E(x) 1
  66
  67 #else
  68 #error "Which IC do you support?"
  69 #endif
  70
  71 /* Definitions */
  72 /* MV88SX50XX specific defines */
  73 #define MV_SATA_VENDOR_ID                                               0x11AB
  74 #define MV_SATA_DEVICE_ID_5080                                  0x5080
  75 #define MV_SATA_DEVICE_ID_5081                                  0x5081
  76 #define MV_SATA_DEVICE_ID_6080                                  0x6080
  77 #define MV_SATA_DEVICE_ID_6081                                  0x6081
  78
  79 #if defined(RR2310) || defined(RR1740) || defined(RR2210) || defined (RR2522)
  80 #define MV_SATA_CHANNELS_NUM                                    4
  81 #define MV_SATA_UNITS_NUM                                               1
  82 #else
  83 #define MV_SATA_CHANNELS_NUM                                    8
  84 #define MV_SATA_UNITS_NUM                                               2
  85 #endif
  86
  87 #define MV_SATA_PCI_BAR0_SPACE_SIZE                             (1<<18) /* 256 Kb*/
  88
  89 #define CHANNEL_QUEUE_LENGTH                                    32
  90 #define CHANNEL_QUEUE_MASK                                          0x1F
  91
  92 #define MV_EDMA_QUEUE_LENGTH                                    32      /* Up to 32 outstanding  */
  93                                                                         /* commands per SATA channel*/
  94 #define MV_EDMA_QUEUE_MASK                      0x1F
  95 #define MV_EDMA_REQUEST_QUEUE_SIZE                              1024 /* 32*32 = 1KBytes */
  96 #define MV_EDMA_RESPONSE_QUEUE_SIZE                             256  /* 32*8 = 256 Bytes */
  97
  98 #define MV_EDMA_REQUEST_ENTRY_SIZE                              32
  99 #define MV_EDMA_RESPONSE_ENTRY_SIZE                             8
 100
 101 #define MV_EDMA_PRD_ENTRY_SIZE                                  16              /* 16Bytes*/
 102 #define MV_EDMA_PRD_NO_SNOOP_FLAG                               0x00000001 /* MV_BIT0 */
 103 #define MV_EDMA_PRD_EOT_FLAG                                    0x00008000 /* MV_BIT15 */
 104
 105 #define MV_ATA_IDENTIFY_DEV_DATA_LENGTH                 256     /* number of words(2 byte)*/
 106 #define MV_ATA_MODEL_NUMBER_LEN                                 40
 107 #define ATA_SECTOR_SIZE                                                 512
 108 /* Log messages level defines */
 109 #define MV_DEBUG                                                                0x1
 110 #define MV_DEBUG_INIT                                                   0x2
 111 #define MV_DEBUG_INTERRUPTS                                             0x4
 112 #define MV_DEBUG_SATA_LINK                                              0x8
 113 #define MV_DEBUG_UDMA_COMMAND                                   0x10
 114 #define MV_DEBUG_NON_UDMA_COMMAND                               0x20
 115 #define MV_DEBUG_ERROR                                                  0x40
 116
 117
 118 /* Typedefs    */
 119 typedef enum mvUdmaType
 120 {
 121         MV_UDMA_TYPE_READ, MV_UDMA_TYPE_WRITE
 122 } MV_UDMA_TYPE;
 123
 124 typedef enum mvFlushType
 125 {
 126         MV_FLUSH_TYPE_CALLBACK, MV_FLUSH_TYPE_NONE
 127 } MV_FLUSH_TYPE;
 128
 129 typedef enum mvCompletionType
 130 {
 131         MV_COMPLETION_TYPE_NORMAL, MV_COMPLETION_TYPE_ERROR,
 132         MV_COMPLETION_TYPE_ABORT
 133 } MV_COMPLETION_TYPE;
 134
 135 typedef enum mvEventType
 136 {
 137         MV_EVENT_TYPE_ADAPTER_ERROR, MV_EVENT_TYPE_SATA_CABLE
 138 } MV_EVENT_TYPE;
 139
 140 typedef enum mvEdmaMode
 141 {
 142         MV_EDMA_MODE_QUEUED,
 143         MV_EDMA_MODE_NOT_QUEUED,
 144         MV_EDMA_MODE_NATIVE_QUEUING
 145 } MV_EDMA_MODE;
 146
 147 typedef enum mvEdmaQueueResult
 148 {
 149         MV_EDMA_QUEUE_RESULT_OK = 0,
 150         MV_EDMA_QUEUE_RESULT_EDMA_DISABLED,
 151         MV_EDMA_QUEUE_RESULT_FULL,
 152         MV_EDMA_QUEUE_RESULT_BAD_LBA_ADDRESS,
 153         MV_EDMA_QUEUE_RESULT_BAD_PARAMS
 154 } MV_EDMA_QUEUE_RESULT;
 155
 156 typedef enum mvQueueCommandResult
 157 {
 158         MV_QUEUE_COMMAND_RESULT_OK = 0,
 159         MV_QUEUE_COMMAND_RESULT_QUEUED_MODE_DISABLED,
 160         MV_QUEUE_COMMAND_RESULT_FULL,
 161         MV_QUEUE_COMMAND_RESULT_BAD_LBA_ADDRESS,
 162         MV_QUEUE_COMMAND_RESULT_BAD_PARAMS
 163 } MV_QUEUE_COMMAND_RESULT;
 164
 165 typedef enum mvNonUdmaProtocol
 166 {
 167     MV_NON_UDMA_PROTOCOL_NON_DATA,
 168     MV_NON_UDMA_PROTOCOL_PIO_DATA_IN,
 169     MV_NON_UDMA_PROTOCOL_PIO_DATA_OUT
 170 } MV_NON_UDMA_PROTOCOL;
 171
 172
 173 struct mvDmaRequestQueueEntry;
 174 struct mvDmaResponseQueueEntry;
 175 struct mvDmaCommandEntry;
 176
 177 struct mvSataAdapter;
 178 struct mvStorageDevRegisters;
 179
 180 typedef MV_BOOLEAN (* HPTLIBAPI mvSataCommandCompletionCallBack_t)(struct mvSataAdapter *,
 181                                                                                                                  MV_U8,
 182                                                          MV_COMPLETION_TYPE,
 183                                                                                                                  MV_VOID_PTR, MV_U16,
 184                                                                                                                  MV_U32,
 185                                                                                             struct mvStorageDevRegisters SS_SEG*);
 186
 187 typedef enum mvQueuedCommandType
 188 {
 189         MV_QUEUED_COMMAND_TYPE_UDMA,
 190         MV_QUEUED_COMMAND_TYPE_NONE_UDMA
 191 } MV_QUEUED_COMMAND_TYPE;
 192
 193 typedef struct mvUdmaCommandParams
 194 {
 195         MV_UDMA_TYPE readWrite;
 196         MV_BOOLEAN   isEXT;
 197         MV_U32       lowLBAAddress;
 198         MV_U16       highLBAAddress;
 199         MV_U16       numOfSectors;
 200         MV_U32       prdLowAddr;
 201         MV_U32       prdHighAddr;
 202         mvSataCommandCompletionCallBack_t callBack;
 203         MV_VOID_PTR  commandId;
 204 } MV_UDMA_COMMAND_PARAMS;
 205
 206 typedef struct mvNoneUdmaCommandParams
 207 {
 208         MV_NON_UDMA_PROTOCOL protocolType;
 209         MV_BOOLEAN  isEXT;
 210         MV_U16_PTR      bufPtr;
 211         MV_U32          count;
 212         MV_U16          features;
 213         MV_U16          sectorCount;
 214         MV_U16          lbaLow;
 215         MV_U16          lbaMid;
 216         MV_U16          lbaHigh;
 217         MV_U8           device;
 218         MV_U8           command;
 219     mvSataCommandCompletionCallBack_t callBack;
 220         MV_VOID_PTR  commandId;
 221 } MV_NONE_UDMA_COMMAND_PARAMS;
 222
 223 typedef struct mvQueueCommandInfo
 224 {
 225         MV_QUEUED_COMMAND_TYPE  type;
 226         union
 227         {
 228                 MV_UDMA_COMMAND_PARAMS          udmaCommand;
 229                 MV_NONE_UDMA_COMMAND_PARAMS     NoneUdmaCommand;
 230     } commandParams;
 231 } MV_QUEUE_COMMAND_INFO;
 232
 233 /* The following structure is for the Core Driver internal usage */
 234 typedef struct mvQueuedCommandEntry
 235 {
 236     MV_BOOLEAN   isFreeEntry;
 237     MV_U8        commandTag;
 238         struct mvQueuedCommandEntry     *next;
 239         struct mvQueuedCommandEntry     *prev;
 240         MV_QUEUE_COMMAND_INFO   commandInfo;
 241 } MV_QUEUED_COMMAND_ENTRY;
 242
 243 /* The following structures are part of the Core Driver API */
 244 typedef struct mvSataChannel
 245 {
 246         /* Fields set by Intermediate Application Layer */
 247         MV_U8                       channelNumber;
 248         MV_BOOLEAN                  waitingForInterrupt;
 249         MV_BOOLEAN                  lba48Address;
 250         MV_BOOLEAN                  maxReadTransfer;
 251         struct mvDmaRequestQueueEntry SS_SEG *requestQueue;
 252         struct mvDmaResponseQueueEntry SS_SEG *responseQueue;
 253         MV_U32                      requestQueuePciHiAddress;
 254         MV_U32                      requestQueuePciLowAddress;
 255         MV_U32                      responseQueuePciHiAddress;
 256         MV_U32                      responseQueuePciLowAddress;
 257         /* Fields set by CORE driver */
 258         struct mvSataAdapter        *mvSataAdapter;
 259         MV_OS_SEMAPHORE             semaphore;
 260         MV_U32                      eDmaRegsOffset;
 261         MV_U16                      identifyDevice[MV_ATA_IDENTIFY_DEV_DATA_LENGTH];
 262         MV_BOOLEAN                  EdmaActive;
 263         MV_EDMA_MODE                queuedDMA;
 264         MV_U8                       outstandingCommands;
 265         MV_BOOLEAN                                      workAroundDone;
 266         struct mvQueuedCommandEntry     commandsQueue[CHANNEL_QUEUE_LENGTH];
 267         struct mvQueuedCommandEntry     *commandsQueueHead;
 268         struct mvQueuedCommandEntry     *commandsQueueTail;
 269         MV_BOOLEAN                                      queueCommandsEnabled;
 270         MV_U8                       noneUdmaOutstandingCommands;
 271         MV_U8                       EdmaQueuedCommands;
 272     MV_U32                      freeIDsStack[CHANNEL_QUEUE_LENGTH];
 273         MV_U32                      freeIDsNum;
 274         MV_U32                      reqInPtr;
 275         MV_U32                      rspOutPtr;
 276 } MV_SATA_CHANNEL;
 277
 278 typedef struct mvSataAdapter
 279 {
 280         /* Fields set by Intermediate Application Layer */
 281         MV_U32            adapterId;
 282         MV_U8             pcbVersion;
 283     MV_U8             pciConfigRevisionId;
 284     MV_U16            pciConfigDeviceId;
 285         MV_VOID_PTR               IALData;
 286         MV_BUS_ADDR_T     adapterIoBaseAddress;
 287         MV_U32            intCoalThre[MV_SATA_UNITS_NUM];
 288         MV_U32            intTimeThre[MV_SATA_UNITS_NUM];
 289         MV_BOOLEAN        (* HPTLIBAPI mvSataEventNotify)(struct mvSataAdapter *,
 290                                                                                    MV_EVENT_TYPE,
 291                                                                                    MV_U32, MV_U32);
 292         MV_SATA_CHANNEL   *sataChannel[MV_SATA_CHANNELS_NUM];
 293         MV_U32            pciCommand;
 294         MV_U32            pciSerrMask;
 295         MV_U32            pciInterruptMask;
 296
 297         /* Fields set by CORE driver */
 298         MV_OS_SEMAPHORE   semaphore;
 299         MV_U32                    mainMask;
 300         MV_OS_SEMAPHORE   interruptsMaskSem;
 301     MV_BOOLEAN        implementA0Workarounds;
 302     MV_BOOLEAN        implement50XXB0Workarounds;
 303         MV_BOOLEAN        implement50XXB1Workarounds;
 304         MV_BOOLEAN        implement50XXB2Workarounds;
 305         MV_BOOLEAN        implement60X1A0Workarounds;
 306         MV_BOOLEAN        implement60X1A1Workarounds;
 307         MV_BOOLEAN        implement60X1B0Workarounds;
 308         MV_BOOLEAN                implement7042A0Workarounds;
 309         MV_BOOLEAN                implement7042A1Workarounds;
 310         MV_U8                     sataAdapterGeneration;
 311         MV_BOOLEAN              isPEX;
 312         MV_U8             failLEDMask;
 313     MV_U8                         signalAmps[MV_SATA_CHANNELS_NUM];
 314         MV_U8                     pre[MV_SATA_CHANNELS_NUM];
 315     MV_BOOLEAN        staggaredSpinup[MV_SATA_CHANNELS_NUM]; /* For 60x1 only */
 316 } MV_SATA_ADAPTER;
 317
 318 typedef struct mvSataAdapterStatus
 319 {
 320         /* Fields set by CORE driver */
 321         MV_BOOLEAN              channelConnected[MV_SATA_CHANNELS_NUM];
 322         MV_U32                  pciDLLStatusAndControlRegister;
 323         MV_U32                  pciCommandRegister;
 324         MV_U32                  pciModeRegister;
 325         MV_U32                  pciSERRMaskRegister;
 326         MV_U32                  intCoalThre[MV_SATA_UNITS_NUM];
 327         MV_U32                  intTimeThre[MV_SATA_UNITS_NUM];
 328         MV_U32                  R00StatusBridgePortRegister[MV_SATA_CHANNELS_NUM];
 329 }MV_SATA_ADAPTER_STATUS;
 330
 331
 332 typedef struct mvSataChannelStatus
 333 {
 334         /* Fields set by CORE driver */
 335         MV_BOOLEAN              isConnected;
 336         MV_U8                   modelNumber[MV_ATA_MODEL_NUMBER_LEN];
 337         MV_BOOLEAN              DMAEnabled;
 338         MV_EDMA_MODE    queuedDMA;
 339         MV_U8                   outstandingCommands;
 340         MV_U32                  EdmaConfigurationRegister;
 341         MV_U32                  EdmaRequestQueueBaseAddressHighRegister;
 342         MV_U32                  EdmaRequestQueueInPointerRegister;
 343         MV_U32                  EdmaRequestQueueOutPointerRegister;
 344         MV_U32                  EdmaResponseQueueBaseAddressHighRegister;
 345         MV_U32                  EdmaResponseQueueInPointerRegister;
 346         MV_U32                  EdmaResponseQueueOutPointerRegister;
 347         MV_U32                  EdmaCommandRegister;
 348         MV_U32                  PHYModeRegister;
 349 }MV_SATA_CHANNEL_STATUS;
 350
 351 /* this structure used by the IAL defines the PRD entries used by the EDMA HW */
 352 typedef struct mvSataEdmaPRDEntry
 353 {
 354         volatile MV_U32 lowBaseAddr;
 355         volatile MV_U16 byteCount;
 356         volatile MV_U16 flags;
 357         volatile MV_U32 highBaseAddr;
 358         volatile MV_U32 reserved;
 359 }MV_SATA_EDMA_PRD_ENTRY;
 360
 361 /* API Functions */
 362
 363 /* CORE driver Adapter Management */
 364 MV_BOOLEAN HPTLIBAPI mvSataInitAdapter(MV_SATA_ADAPTER *pAdapter);
 365
 366 MV_BOOLEAN HPTLIBAPI mvSataShutdownAdapter(MV_SATA_ADAPTER *pAdapter);
 367
 368 MV_BOOLEAN HPTLIBAPI mvSataGetAdapterStatus(MV_SATA_ADAPTER *pAdapter,
 369                                                                   MV_SATA_ADAPTER_STATUS *pAdapterStatus);
 370
 371 MV_U32  HPTLIBAPI mvSataReadReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset);
 372
 373 MV_VOID HPTLIBAPI mvSataWriteReg(MV_SATA_ADAPTER *pAdapter, MV_U32 regOffset,
 374                                            MV_U32 regValue);
 375
 376 MV_VOID HPTLIBAPI mvEnableAutoFlush(MV_VOID);
 377 MV_VOID HPTLIBAPI mvDisableAutoFlush(MV_VOID);
 378
 379
 380 /* CORE driver SATA Channel Management */
 381 MV_BOOLEAN HPTLIBAPI mvSataConfigureChannel(MV_SATA_ADAPTER *pAdapter,
 382                                                                   MV_U8 channelIndex);
 383
 384 MV_BOOLEAN HPTLIBAPI mvSataRemoveChannel(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
 385
 386 MV_BOOLEAN HPTLIBAPI mvSataIsStorageDeviceConnected(MV_SATA_ADAPTER *pAdapter,
 387                                                                                   MV_U8 channelIndex);
 388
 389 MV_BOOLEAN HPTLIBAPI mvSataChannelHardReset(MV_SATA_ADAPTER *pAdapter,
 390                                                                   MV_U8 channelIndex);
 391
 392 MV_BOOLEAN HPTLIBAPI mvSataConfigEdmaMode(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
 393                                                                 MV_EDMA_MODE eDmaMode, MV_U8 maxQueueDepth);
 394
 395 MV_BOOLEAN HPTLIBAPI mvSataEnableChannelDma(MV_SATA_ADAPTER *pAdapter,
 396                                                                   MV_U8 channelIndex);
 397
 398 MV_BOOLEAN HPTLIBAPI mvSataDisableChannelDma(MV_SATA_ADAPTER *pAdapter,
 399                                                                    MV_U8 channelIndex);
 400
 401 MV_BOOLEAN HPTLIBAPI mvSataFlushDmaQueue(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
 402                                                            MV_FLUSH_TYPE flushType);
 403
 404 MV_U8 HPTLIBAPI mvSataNumOfDmaCommands(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex);
 405
 406 MV_BOOLEAN HPTLIBAPI mvSataSetIntCoalParams (MV_SATA_ADAPTER *pAdapter, MV_U8 sataUnit,
 407                                                                    MV_U32 intCoalThre, MV_U32 intTimeThre);
 408
 409 MV_BOOLEAN HPTLIBAPI mvSataSetChannelPhyParams(MV_SATA_ADAPTER *pAdapter,
 410                                                                          MV_U8 channelIndex,
 411                                                                          MV_U8 signalAmps, MV_U8 pre);
 412
 413 MV_BOOLEAN HPTLIBAPI mvSataChannelPhyShutdown(MV_SATA_ADAPTER *pAdapter,
 414                                                                         MV_U8 channelIndex);
 415
 416 MV_BOOLEAN HPTLIBAPI mvSataChannelPhyPowerOn(MV_SATA_ADAPTER *pAdapter,
 417                                                                         MV_U8 channelIndex);
 418
 419 MV_BOOLEAN HPTLIBAPI mvSataChannelSetEdmaLoopBackMode(MV_SATA_ADAPTER *pAdapter,
 420                                                                                         MV_U8 channelIndex,
 421                                                                                         MV_BOOLEAN loopBackOn);
 422
 423 MV_BOOLEAN HPTLIBAPI mvSataGetChannelStatus(MV_SATA_ADAPTER *pAdapter, MV_U8 channelIndex,
 424                                                                   MV_SATA_CHANNEL_STATUS *pChannelStatus);
 425
 426 MV_QUEUE_COMMAND_RESULT HPTLIBAPI mvSataQueueCommand(MV_SATA_ADAPTER *pAdapter,
 427                                                                                    MV_U8 channelIndex,
 428                                                                                    MV_QUEUE_COMMAND_INFO SS_SEG *pCommandParams);
 429
 430 /* Interrupt Service Routine */
 431 MV_BOOLEAN HPTLIBAPI mvSataInterruptServiceRoutine(MV_SATA_ADAPTER *pAdapter);
 432
 433 MV_BOOLEAN HPTLIBAPI mvSataMaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
 434
 435 MV_BOOLEAN HPTLIBAPI mvSataUnmaskAdapterInterrupt(MV_SATA_ADAPTER *pAdapter);
 436
 437 /* Command Completion and Event Notification (user implemented) */
 438 MV_BOOLEAN HPTLIBAPI mvSataEventNotify(MV_SATA_ADAPTER *, MV_EVENT_TYPE ,
 439                                                          MV_U32, MV_U32);
 440
 441 /*
 442  * Staggered spin-ip support and SATA interface speed control
 443  * (relevant for 60x1 adapters)
 444  */
 445 MV_BOOLEAN HPTLIBAPI mvSataEnableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
 446 MV_BOOLEAN HPTLIBAPI mvSataDisableStaggeredSpinUpAll (MV_SATA_ADAPTER *pAdapter);
 447
 448 #endif