2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
23 * Authors: Dave Airlie
26 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_i2c.c 254885 2013-08-25 19:37:15Z dumbbell $
30 #include <drm/drm_edid.h>
31 #include <uapi_drm/radeon_drm.h>
32 #include <bus/iicbus/iic.h>
33 #include <bus/iicbus/iiconf.h>
34 #include <bus/iicbus/iicbus.h>
35 #include <sys/mplock2.h>
38 #include "iicbus_if.h"
45 bool radeon_ddc_probe(struct radeon_connector
*radeon_connector
, bool use_aux
)
50 struct iic_msg msgs
[] = {
52 .slave
= DDC_ADDR
<< 1,
58 .slave
= DDC_ADDR
<< 1,
65 /* on hw with routers, select right port */
66 if (radeon_connector
->router
.ddc_valid
)
67 radeon_router_select_ddc_port(radeon_connector
);
70 struct radeon_connector_atom_dig
*dig
= radeon_connector
->con_priv
;
71 ret
= iicbus_transfer(dig
->dp_i2c_bus
->adapter
, msgs
, 2);
73 ret
= iicbus_transfer(radeon_connector
->ddc_bus
->adapter
, msgs
, 2);
77 /* Couldn't find an accessible DDC on this connector */
79 /* Probe also for valid EDID header
80 * EDID header starts with:
81 * 0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00.
82 * Only the first 6 bytes must be valid as
83 * drm_edid_block_valid() can fix the last 2 bytes */
84 if (drm_edid_header_is_valid(buf
) < 6) {
85 /* Couldn't find an accessible EDID on this
94 static int radeon_iicbb_pre_xfer(device_t dev
)
96 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
97 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
98 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
101 lockmgr(&i2c
->mutex
, LK_EXCLUSIVE
);
103 /* RV410 appears to have a bug where the hw i2c in reset
104 * holds the i2c port in a bad state - switch hw i2c away before
105 * doing DDC - do this for all r200s/r300s/r400s for safety sake
107 if (rec
->hw_capable
) {
108 if ((rdev
->family
>= CHIP_R200
) && !ASIC_IS_AVIVO(rdev
)) {
111 if (rdev
->family
>= CHIP_RV350
)
112 reg
= RADEON_GPIO_MONID
;
113 else if ((rdev
->family
== CHIP_R300
) ||
114 (rdev
->family
== CHIP_R350
))
115 reg
= RADEON_GPIO_DVI_DDC
;
117 reg
= RADEON_GPIO_CRT2_DDC
;
119 lockmgr(&rdev
->dc_hw_i2c_mutex
, LK_EXCLUSIVE
);
120 if (rec
->a_clk_reg
== reg
) {
121 WREG32(RADEON_DVI_I2C_CNTL_0
, (RADEON_I2C_SOFT_RST
|
122 R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1
)));
124 WREG32(RADEON_DVI_I2C_CNTL_0
, (RADEON_I2C_SOFT_RST
|
125 R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3
)));
127 lockmgr(&rdev
->dc_hw_i2c_mutex
, LK_RELEASE
);
131 /* switch the pads to ddc mode */
132 if (ASIC_IS_DCE3(rdev
) && rec
->hw_capable
) {
133 temp
= RREG32(rec
->mask_clk_reg
);
135 WREG32(rec
->mask_clk_reg
, temp
);
138 /* clear the output pin values */
139 temp
= RREG32(rec
->a_clk_reg
) & ~rec
->a_clk_mask
;
140 WREG32(rec
->a_clk_reg
, temp
);
142 temp
= RREG32(rec
->a_data_reg
) & ~rec
->a_data_mask
;
143 WREG32(rec
->a_data_reg
, temp
);
145 /* set the pins to input */
146 temp
= RREG32(rec
->en_clk_reg
) & ~rec
->en_clk_mask
;
147 WREG32(rec
->en_clk_reg
, temp
);
149 temp
= RREG32(rec
->en_data_reg
) & ~rec
->en_data_mask
;
150 WREG32(rec
->en_data_reg
, temp
);
152 /* mask the gpio pins for software use */
153 temp
= RREG32(rec
->mask_clk_reg
) | rec
->mask_clk_mask
;
154 WREG32(rec
->mask_clk_reg
, temp
);
155 temp
= RREG32(rec
->mask_clk_reg
);
157 temp
= RREG32(rec
->mask_data_reg
) | rec
->mask_data_mask
;
158 WREG32(rec
->mask_data_reg
, temp
);
159 temp
= RREG32(rec
->mask_data_reg
);
164 static void radeon_iicbb_post_xfer(device_t dev
)
166 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
167 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
168 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
171 /* unmask the gpio pins for software use */
172 temp
= RREG32(rec
->mask_clk_reg
) & ~rec
->mask_clk_mask
;
173 WREG32(rec
->mask_clk_reg
, temp
);
174 temp
= RREG32(rec
->mask_clk_reg
);
176 temp
= RREG32(rec
->mask_data_reg
) & ~rec
->mask_data_mask
;
177 WREG32(rec
->mask_data_reg
, temp
);
178 temp
= RREG32(rec
->mask_data_reg
);
180 lockmgr(&i2c
->mutex
, LK_RELEASE
);
183 static int radeon_iicbb_get_clock(device_t dev
)
185 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
186 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
187 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
190 /* read the value off the pin */
191 val
= RREG32(rec
->y_clk_reg
);
192 val
&= rec
->y_clk_mask
;
198 static int radeon_iicbb_get_data(device_t dev
)
200 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
201 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
202 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
205 /* read the value off the pin */
206 val
= RREG32(rec
->y_data_reg
);
207 val
&= rec
->y_data_mask
;
212 static void radeon_iicbb_set_clock(device_t dev
, int clock
)
214 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
215 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
216 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
219 /* set pin direction */
220 val
= RREG32(rec
->en_clk_reg
) & ~rec
->en_clk_mask
;
221 val
|= clock
? 0 : rec
->en_clk_mask
;
222 WREG32(rec
->en_clk_reg
, val
);
225 static void radeon_iicbb_set_data(device_t dev
, int data
)
227 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
228 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
229 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
232 /* set pin direction */
233 val
= RREG32(rec
->en_data_reg
) & ~rec
->en_data_mask
;
234 val
|= data
? 0 : rec
->en_data_mask
;
235 WREG32(rec
->en_data_reg
, val
);
239 radeon_iicbb_probe(device_t dev
)
242 return (BUS_PROBE_DEFAULT
);
246 radeon_iicbb_attach(device_t dev
)
248 struct radeon_i2c_chan
*i2c
;
251 i2c
= device_get_softc(dev
);
252 device_set_desc(dev
, i2c
->name
);
254 /* add generic bit-banging code */
255 iic_dev
= device_add_child(dev
, "iicbb", -1);
258 device_quiet(iic_dev
);
260 /* attach and probe added child */
261 bus_generic_attach(dev
);
267 radeon_iicbb_detach(device_t dev
)
270 /* detach bit-banding code. */
271 bus_generic_detach(dev
);
273 /* delete bit-banding code. */
274 device_delete_children(dev
);
279 radeon_iicbb_reset(device_t dev
, u_char speed
, u_char addr
, u_char
*oldaddr
)
282 /* Not sure what to do here. */
286 static device_method_t radeon_iicbb_methods
[] = {
287 DEVMETHOD(device_probe
, radeon_iicbb_probe
),
288 DEVMETHOD(device_attach
, radeon_iicbb_attach
),
289 DEVMETHOD(device_detach
, radeon_iicbb_detach
),
291 DEVMETHOD(bus_add_child
, bus_generic_add_child
),
292 DEVMETHOD(bus_print_child
, bus_generic_print_child
),
294 DEVMETHOD(iicbb_reset
, radeon_iicbb_reset
),
295 DEVMETHOD(iicbb_pre_xfer
, radeon_iicbb_pre_xfer
),
296 DEVMETHOD(iicbb_post_xfer
, radeon_iicbb_post_xfer
),
297 DEVMETHOD(iicbb_setsda
, radeon_iicbb_set_data
),
298 DEVMETHOD(iicbb_setscl
, radeon_iicbb_set_clock
),
299 DEVMETHOD(iicbb_getsda
, radeon_iicbb_get_data
),
300 DEVMETHOD(iicbb_getscl
, radeon_iicbb_get_clock
),
304 static driver_t radeon_iicbb_driver
= {
306 radeon_iicbb_methods
,
307 0 /* softc will be allocated by parent */
309 static devclass_t radeon_iicbb_devclass
;
310 DRIVER_MODULE_ORDERED(radeon_iicbb
, drm
, radeon_iicbb_driver
,
311 radeon_iicbb_devclass
, NULL
, NULL
, SI_ORDER_FIRST
);
312 DRIVER_MODULE(iicbb
, radeon_iicbb
, iicbb_driver
, iicbb_devclass
, NULL
, NULL
);
316 static u32
radeon_get_i2c_prescale(struct radeon_device
*rdev
)
318 u32 sclk
= rdev
->pm
.current_sclk
;
324 switch (rdev
->family
) {
338 nm
= (sclk
* 10) / (i2c_clock
* 4);
339 for (loop
= 1; loop
< 255; loop
++) {
340 if ((nm
/ loop
) < loop
)
345 prescale
= m
| (n
<< 8);
353 prescale
= (((sclk
* 10)/(4 * 128 * 100) + 1) << 8) + 128;
367 if (rdev
->family
== CHIP_R520
)
368 prescale
= (127 << 8) + ((sclk
* 10) / (4 * 127 * i2c_clock
));
370 prescale
= (((sclk
* 10)/(4 * 128 * 100) + 1) << 8) + 128;
396 DRM_ERROR("i2c: unhandled radeon chip\n");
403 /* hw i2c engine for r1xx-4xx hardware
404 * hw can buffer up to 15 bytes
406 static int r100_hw_i2c_xfer(struct radeon_i2c_chan
*i2c
,
407 struct iic_msg
*msgs
, int num
)
409 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
410 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
412 int i
, j
, k
, ret
= 0;
414 u32 i2c_cntl_0
, i2c_cntl_1
, i2c_data
;
417 lockmgr(&rdev
->dc_hw_i2c_mutex
, LK_EXCLUSIVE
);
418 /* take the pm lock since we need a constant sclk */
419 lockmgr(&rdev
->pm
.mutex
, LK_EXCLUSIVE
);
421 prescale
= radeon_get_i2c_prescale(rdev
);
423 reg
= ((prescale
<< RADEON_I2C_PRESCALE_SHIFT
) |
424 RADEON_I2C_DRIVE_EN
|
429 if (rdev
->is_atom_bios
) {
430 tmp
= RREG32(RADEON_BIOS_6_SCRATCH
);
431 WREG32(RADEON_BIOS_6_SCRATCH
, tmp
| ATOM_S6_HW_I2C_BUSY_STATE
);
435 i2c_cntl_0
= RADEON_I2C_CNTL_0
;
436 i2c_cntl_1
= RADEON_I2C_CNTL_1
;
437 i2c_data
= RADEON_I2C_DATA
;
439 i2c_cntl_0
= RADEON_DVI_I2C_CNTL_0
;
440 i2c_cntl_1
= RADEON_DVI_I2C_CNTL_1
;
441 i2c_data
= RADEON_DVI_I2C_DATA
;
443 switch (rdev
->family
) {
450 switch (rec
->mask_clk_reg
) {
451 case RADEON_GPIO_DVI_DDC
:
452 /* no gpio select bit */
455 DRM_ERROR("gpio not supported with hw i2c\n");
461 /* only bit 4 on r200 */
462 switch (rec
->mask_clk_reg
) {
463 case RADEON_GPIO_DVI_DDC
:
464 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1
);
466 case RADEON_GPIO_MONID
:
467 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3
);
470 DRM_ERROR("gpio not supported with hw i2c\n");
478 switch (rec
->mask_clk_reg
) {
479 case RADEON_GPIO_DVI_DDC
:
480 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1
);
482 case RADEON_GPIO_VGA_DDC
:
483 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC2
);
485 case RADEON_GPIO_CRT2_DDC
:
486 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3
);
489 DRM_ERROR("gpio not supported with hw i2c\n");
496 /* only bit 4 on r300/r350 */
497 switch (rec
->mask_clk_reg
) {
498 case RADEON_GPIO_VGA_DDC
:
499 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1
);
501 case RADEON_GPIO_DVI_DDC
:
502 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3
);
505 DRM_ERROR("gpio not supported with hw i2c\n");
518 switch (rec
->mask_clk_reg
) {
519 case RADEON_GPIO_VGA_DDC
:
520 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1
);
522 case RADEON_GPIO_DVI_DDC
:
523 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC2
);
525 case RADEON_GPIO_MONID
:
526 reg
|= R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3
);
529 DRM_ERROR("gpio not supported with hw i2c\n");
535 DRM_ERROR("unsupported asic\n");
542 /* check for bus probe */
544 if ((num
== 1) && (p
->len
== 0)) {
545 WREG32(i2c_cntl_0
, (RADEON_I2C_DONE
|
548 RADEON_I2C_SOFT_RST
));
549 WREG32(i2c_data
, (p
->slave
<< 1) & 0xff);
551 WREG32(i2c_cntl_1
, ((1 << RADEON_I2C_DATA_COUNT_SHIFT
) |
552 (1 << RADEON_I2C_ADDR_COUNT_SHIFT
) |
554 (48 << RADEON_I2C_TIME_LIMIT_SHIFT
)));
555 WREG32(i2c_cntl_0
, reg
);
556 for (k
= 0; k
< 32; k
++) {
558 tmp
= RREG32(i2c_cntl_0
);
559 if (tmp
& RADEON_I2C_GO
)
561 tmp
= RREG32(i2c_cntl_0
);
562 if (tmp
& RADEON_I2C_DONE
)
565 DRM_DEBUG("i2c write error 0x%08x\n", tmp
);
566 WREG32(i2c_cntl_0
, tmp
| RADEON_I2C_ABORT
);
574 for (i
= 0; i
< num
; i
++) {
576 for (j
= 0; j
< p
->len
; j
++) {
577 if (p
->flags
& IIC_M_RD
) {
578 WREG32(i2c_cntl_0
, (RADEON_I2C_DONE
|
581 RADEON_I2C_SOFT_RST
));
582 WREG32(i2c_data
, ((p
->slave
<< 1) & 0xff) | 0x1);
583 WREG32(i2c_cntl_1
, ((1 << RADEON_I2C_DATA_COUNT_SHIFT
) |
584 (1 << RADEON_I2C_ADDR_COUNT_SHIFT
) |
586 (48 << RADEON_I2C_TIME_LIMIT_SHIFT
)));
587 WREG32(i2c_cntl_0
, reg
| RADEON_I2C_RECEIVE
);
588 for (k
= 0; k
< 32; k
++) {
590 tmp
= RREG32(i2c_cntl_0
);
591 if (tmp
& RADEON_I2C_GO
)
593 tmp
= RREG32(i2c_cntl_0
);
594 if (tmp
& RADEON_I2C_DONE
)
597 DRM_DEBUG("i2c read error 0x%08x\n", tmp
);
598 WREG32(i2c_cntl_0
, tmp
| RADEON_I2C_ABORT
);
603 p
->buf
[j
] = RREG32(i2c_data
) & 0xff;
605 WREG32(i2c_cntl_0
, (RADEON_I2C_DONE
|
608 RADEON_I2C_SOFT_RST
));
609 WREG32(i2c_data
, (p
->slave
<< 1) & 0xff);
610 WREG32(i2c_data
, p
->buf
[j
]);
611 WREG32(i2c_cntl_1
, ((1 << RADEON_I2C_DATA_COUNT_SHIFT
) |
612 (1 << RADEON_I2C_ADDR_COUNT_SHIFT
) |
614 (48 << RADEON_I2C_TIME_LIMIT_SHIFT
)));
615 WREG32(i2c_cntl_0
, reg
);
616 for (k
= 0; k
< 32; k
++) {
618 tmp
= RREG32(i2c_cntl_0
);
619 if (tmp
& RADEON_I2C_GO
)
621 tmp
= RREG32(i2c_cntl_0
);
622 if (tmp
& RADEON_I2C_DONE
)
625 DRM_DEBUG("i2c write error 0x%08x\n", tmp
);
626 WREG32(i2c_cntl_0
, tmp
| RADEON_I2C_ABORT
);
636 WREG32(i2c_cntl_0
, 0);
637 WREG32(i2c_cntl_1
, 0);
638 WREG32(i2c_cntl_0
, (RADEON_I2C_DONE
|
641 RADEON_I2C_SOFT_RST
));
643 if (rdev
->is_atom_bios
) {
644 tmp
= RREG32(RADEON_BIOS_6_SCRATCH
);
645 tmp
&= ~ATOM_S6_HW_I2C_BUSY_STATE
;
646 WREG32(RADEON_BIOS_6_SCRATCH
, tmp
);
649 lockmgr(&rdev
->pm
.mutex
, LK_RELEASE
);
650 lockmgr(&rdev
->dc_hw_i2c_mutex
, LK_RELEASE
);
655 /* hw i2c engine for r5xx hardware
656 * hw can buffer up to 15 bytes
658 static int r500_hw_i2c_xfer(struct radeon_i2c_chan
*i2c
,
659 struct iic_msg
*msgs
, int num
)
661 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
662 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
664 int i
, j
, remaining
, current_count
, buffer_offset
, ret
= 0;
669 lockmgr(&rdev
->dc_hw_i2c_mutex
, LK_EXCLUSIVE
);
670 /* take the pm lock since we need a constant sclk */
671 lockmgr(&rdev
->pm
.mutex
, LK_EXCLUSIVE
);
673 prescale
= radeon_get_i2c_prescale(rdev
);
675 /* clear gpio mask bits */
676 tmp
= RREG32(rec
->mask_clk_reg
);
677 tmp
&= ~rec
->mask_clk_mask
;
678 WREG32(rec
->mask_clk_reg
, tmp
);
679 tmp
= RREG32(rec
->mask_clk_reg
);
681 tmp
= RREG32(rec
->mask_data_reg
);
682 tmp
&= ~rec
->mask_data_mask
;
683 WREG32(rec
->mask_data_reg
, tmp
);
684 tmp
= RREG32(rec
->mask_data_reg
);
686 /* clear pin values */
687 tmp
= RREG32(rec
->a_clk_reg
);
688 tmp
&= ~rec
->a_clk_mask
;
689 WREG32(rec
->a_clk_reg
, tmp
);
690 tmp
= RREG32(rec
->a_clk_reg
);
692 tmp
= RREG32(rec
->a_data_reg
);
693 tmp
&= ~rec
->a_data_mask
;
694 WREG32(rec
->a_data_reg
, tmp
);
695 tmp
= RREG32(rec
->a_data_reg
);
697 /* set the pins to input */
698 tmp
= RREG32(rec
->en_clk_reg
);
699 tmp
&= ~rec
->en_clk_mask
;
700 WREG32(rec
->en_clk_reg
, tmp
);
701 tmp
= RREG32(rec
->en_clk_reg
);
703 tmp
= RREG32(rec
->en_data_reg
);
704 tmp
&= ~rec
->en_data_mask
;
705 WREG32(rec
->en_data_reg
, tmp
);
706 tmp
= RREG32(rec
->en_data_reg
);
709 tmp
= RREG32(RADEON_BIOS_6_SCRATCH
);
710 WREG32(RADEON_BIOS_6_SCRATCH
, tmp
| ATOM_S6_HW_I2C_BUSY_STATE
);
711 saved1
= RREG32(AVIVO_DC_I2C_CONTROL1
);
712 saved2
= RREG32(0x494);
713 WREG32(0x494, saved2
| 0x1);
715 WREG32(AVIVO_DC_I2C_ARBITRATION
, AVIVO_DC_I2C_SW_WANTS_TO_USE_I2C
);
716 for (i
= 0; i
< 50; i
++) {
718 if (RREG32(AVIVO_DC_I2C_ARBITRATION
) & AVIVO_DC_I2C_SW_CAN_USE_I2C
)
722 DRM_ERROR("failed to get i2c bus\n");
727 reg
= AVIVO_DC_I2C_START
| AVIVO_DC_I2C_STOP
| AVIVO_DC_I2C_EN
;
728 switch (rec
->mask_clk_reg
) {
729 case AVIVO_DC_GPIO_DDC1_MASK
:
730 reg
|= AVIVO_DC_I2C_PIN_SELECT(AVIVO_SEL_DDC1
);
732 case AVIVO_DC_GPIO_DDC2_MASK
:
733 reg
|= AVIVO_DC_I2C_PIN_SELECT(AVIVO_SEL_DDC2
);
735 case AVIVO_DC_GPIO_DDC3_MASK
:
736 reg
|= AVIVO_DC_I2C_PIN_SELECT(AVIVO_SEL_DDC3
);
739 DRM_ERROR("gpio not supported with hw i2c\n");
744 /* check for bus probe */
746 if ((num
== 1) && (p
->len
== 0)) {
747 WREG32(AVIVO_DC_I2C_STATUS1
, (AVIVO_DC_I2C_DONE
|
750 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_SOFT_RESET
);
752 WREG32(AVIVO_DC_I2C_RESET
, 0);
754 WREG32(AVIVO_DC_I2C_DATA
, (p
->slave
<< 1) & 0xff);
755 WREG32(AVIVO_DC_I2C_DATA
, 0);
757 WREG32(AVIVO_DC_I2C_CONTROL3
, AVIVO_DC_I2C_TIME_LIMIT(48));
758 WREG32(AVIVO_DC_I2C_CONTROL2
, (AVIVO_DC_I2C_ADDR_COUNT(1) |
759 AVIVO_DC_I2C_DATA_COUNT(1) |
761 WREG32(AVIVO_DC_I2C_CONTROL1
, reg
);
762 WREG32(AVIVO_DC_I2C_STATUS1
, AVIVO_DC_I2C_GO
);
763 for (j
= 0; j
< 200; j
++) {
765 tmp
= RREG32(AVIVO_DC_I2C_STATUS1
);
766 if (tmp
& AVIVO_DC_I2C_GO
)
768 tmp
= RREG32(AVIVO_DC_I2C_STATUS1
);
769 if (tmp
& AVIVO_DC_I2C_DONE
)
772 DRM_DEBUG("i2c write error 0x%08x\n", tmp
);
773 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_ABORT
);
781 for (i
= 0; i
< num
; i
++) {
785 if (p
->flags
& IIC_M_RD
) {
790 current_count
= remaining
;
791 WREG32(AVIVO_DC_I2C_STATUS1
, (AVIVO_DC_I2C_DONE
|
794 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_SOFT_RESET
);
796 WREG32(AVIVO_DC_I2C_RESET
, 0);
798 WREG32(AVIVO_DC_I2C_DATA
, ((p
->slave
<< 1) & 0xff) | 0x1);
799 WREG32(AVIVO_DC_I2C_CONTROL3
, AVIVO_DC_I2C_TIME_LIMIT(48));
800 WREG32(AVIVO_DC_I2C_CONTROL2
, (AVIVO_DC_I2C_ADDR_COUNT(1) |
801 AVIVO_DC_I2C_DATA_COUNT(current_count
) |
803 WREG32(AVIVO_DC_I2C_CONTROL1
, reg
| AVIVO_DC_I2C_RECEIVE
);
804 WREG32(AVIVO_DC_I2C_STATUS1
, AVIVO_DC_I2C_GO
);
805 for (j
= 0; j
< 200; j
++) {
807 tmp
= RREG32(AVIVO_DC_I2C_STATUS1
);
808 if (tmp
& AVIVO_DC_I2C_GO
)
810 tmp
= RREG32(AVIVO_DC_I2C_STATUS1
);
811 if (tmp
& AVIVO_DC_I2C_DONE
)
814 DRM_DEBUG("i2c read error 0x%08x\n", tmp
);
815 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_ABORT
);
820 for (j
= 0; j
< current_count
; j
++)
821 p
->buf
[buffer_offset
+ j
] = RREG32(AVIVO_DC_I2C_DATA
) & 0xff;
822 remaining
-= current_count
;
823 buffer_offset
+= current_count
;
830 current_count
= remaining
;
831 WREG32(AVIVO_DC_I2C_STATUS1
, (AVIVO_DC_I2C_DONE
|
834 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_SOFT_RESET
);
836 WREG32(AVIVO_DC_I2C_RESET
, 0);
838 WREG32(AVIVO_DC_I2C_DATA
, (p
->slave
<< 1) & 0xff);
839 for (j
= 0; j
< current_count
; j
++)
840 WREG32(AVIVO_DC_I2C_DATA
, p
->buf
[buffer_offset
+ j
]);
842 WREG32(AVIVO_DC_I2C_CONTROL3
, AVIVO_DC_I2C_TIME_LIMIT(48));
843 WREG32(AVIVO_DC_I2C_CONTROL2
, (AVIVO_DC_I2C_ADDR_COUNT(1) |
844 AVIVO_DC_I2C_DATA_COUNT(current_count
) |
846 WREG32(AVIVO_DC_I2C_CONTROL1
, reg
);
847 WREG32(AVIVO_DC_I2C_STATUS1
, AVIVO_DC_I2C_GO
);
848 for (j
= 0; j
< 200; j
++) {
850 tmp
= RREG32(AVIVO_DC_I2C_STATUS1
);
851 if (tmp
& AVIVO_DC_I2C_GO
)
853 tmp
= RREG32(AVIVO_DC_I2C_STATUS1
);
854 if (tmp
& AVIVO_DC_I2C_DONE
)
857 DRM_DEBUG("i2c write error 0x%08x\n", tmp
);
858 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_ABORT
);
863 remaining
-= current_count
;
864 buffer_offset
+= current_count
;
870 WREG32(AVIVO_DC_I2C_STATUS1
, (AVIVO_DC_I2C_DONE
|
873 WREG32(AVIVO_DC_I2C_RESET
, AVIVO_DC_I2C_SOFT_RESET
);
875 WREG32(AVIVO_DC_I2C_RESET
, 0);
877 WREG32(AVIVO_DC_I2C_ARBITRATION
, AVIVO_DC_I2C_SW_DONE_USING_I2C
);
878 WREG32(AVIVO_DC_I2C_CONTROL1
, saved1
);
879 WREG32(0x494, saved2
);
880 tmp
= RREG32(RADEON_BIOS_6_SCRATCH
);
881 tmp
&= ~ATOM_S6_HW_I2C_BUSY_STATE
;
882 WREG32(RADEON_BIOS_6_SCRATCH
, tmp
);
884 lockmgr(&rdev
->pm
.mutex
, LK_RELEASE
);
885 lockmgr(&rdev
->dc_hw_i2c_mutex
, LK_RELEASE
);
890 static int radeon_hw_i2c_xfer(device_t dev
,
891 struct iic_msg
*msgs
, uint32_t num
)
893 struct radeon_i2c_chan
*i2c
= device_get_softc(dev
);
894 struct radeon_device
*rdev
= i2c
->dev
->dev_private
;
895 struct radeon_i2c_bus_rec
*rec
= &i2c
->rec
;
898 lockmgr(&i2c
->mutex
, LK_EXCLUSIVE
);
900 switch (rdev
->family
) {
919 ret
= r100_hw_i2c_xfer(i2c
, msgs
, num
);
924 /* XXX fill in hw i2c implementation */
933 ret
= r100_hw_i2c_xfer(i2c
, msgs
, num
);
935 ret
= r500_hw_i2c_xfer(i2c
, msgs
, num
);
941 /* XXX fill in hw i2c implementation */
951 /* XXX fill in hw i2c implementation */
958 /* XXX fill in hw i2c implementation */
961 DRM_ERROR("i2c: unhandled radeon chip\n");
966 lockmgr(&i2c
->mutex
, LK_RELEASE
);
972 radeon_hw_i2c_probe(device_t dev
)
975 return (BUS_PROBE_SPECIFIC
);
979 radeon_hw_i2c_attach(device_t dev
)
981 struct radeon_i2c_chan
*i2c
;
984 i2c
= device_get_softc(dev
);
985 device_set_desc(dev
, i2c
->name
);
987 /* add generic bit-banging code */
988 iic_dev
= device_add_child(dev
, "iicbus", -1);
991 device_quiet(iic_dev
);
993 /* attach and probe added child */
994 bus_generic_attach(dev
);
1000 radeon_hw_i2c_detach(device_t dev
)
1003 /* detach bit-banding code. */
1004 bus_generic_detach(dev
);
1006 /* delete bit-banding code. */
1007 device_delete_children(dev
);
1012 radeon_hw_i2c_reset(device_t dev
, u_char speed
, u_char addr
, u_char
*oldaddr
)
1015 /* Not sure what to do here. */
1020 static device_method_t radeon_hw_i2c_methods
[] = {
1021 DEVMETHOD(device_probe
, radeon_hw_i2c_probe
),
1022 DEVMETHOD(device_attach
, radeon_hw_i2c_attach
),
1023 DEVMETHOD(device_detach
, radeon_hw_i2c_detach
),
1024 DEVMETHOD(iicbus_reset
, radeon_hw_i2c_reset
),
1025 DEVMETHOD(iicbus_transfer
, radeon_hw_i2c_xfer
),
1029 static driver_t radeon_hw_i2c_driver
= {
1031 radeon_hw_i2c_methods
,
1032 0 /* softc will be allocated by parent */
1035 static devclass_t radeon_hw_i2c_devclass
;
1036 DRIVER_MODULE_ORDERED(radeon_hw_i2c
, drm
, radeon_hw_i2c_driver
,
1037 radeon_hw_i2c_devclass
, NULL
, NULL
, SI_ORDER_FIRST
);
1038 DRIVER_MODULE(iicbus
, radeon_hw_i2c
, iicbus_driver
, iicbus_devclass
, NULL
, NULL
);
1040 struct radeon_i2c_chan
*radeon_i2c_create(struct drm_device
*dev
,
1041 struct radeon_i2c_bus_rec
*rec
,
1044 struct radeon_device
*rdev
= dev
->dev_private
;
1045 struct radeon_i2c_chan
*i2c
;
1046 device_t iicbus_dev
;
1049 /* don't add the mm_i2c bus unless hw_i2c is enabled */
1050 if (rec
->mm_i2c
&& (radeon_hw_i2c
== 0))
1053 i2c
= kzalloc(sizeof(struct radeon_i2c_chan
), GFP_KERNEL
);
1058 * Grab Giant before messing with newbus devices, just in case
1059 * we do not hold it already.
1065 lockinit(&i2c
->mutex
, "ri2cmtx", 0, LK_CANRECURSE
);
1069 ((rdev
->family
<= CHIP_RS480
) ||
1070 ((rdev
->family
>= CHIP_RV515
) && (rdev
->family
<= CHIP_R580
))))) {
1071 /* set the radeon hw i2c adapter */
1072 ksnprintf(i2c
->name
, sizeof(i2c
->name
),
1073 "Radeon i2c hw bus %s", name
);
1074 iicbus_dev
= device_add_child(dev
->dev
, "radeon_hw_i2c", -1);
1075 if (iicbus_dev
== NULL
) {
1076 DRM_ERROR("Failed to create bridge for hw i2c %s\n",
1080 device_quiet(iicbus_dev
);
1081 device_set_softc(iicbus_dev
, i2c
);
1083 ret
= device_probe_and_attach(iicbus_dev
);
1085 DRM_ERROR("Attach failed for bridge for hw i2c %s\n",
1087 device_delete_child(dev
->dev
, iicbus_dev
);
1091 i2c
->adapter
= device_find_child(iicbus_dev
, "iicbus", -1);
1092 if (i2c
->adapter
== NULL
) {
1093 DRM_ERROR("hw i2c bridge doesn't have iicbus child\n");
1094 device_delete_child(dev
->dev
, iicbus_dev
);
1097 } else if (rec
->hw_capable
&&
1099 ASIC_IS_DCE3(rdev
)) {
1100 /* hw i2c using atom */
1101 ksnprintf(i2c
->name
, sizeof(i2c
->name
),
1102 "Radeon i2c hw bus %s", name
);
1103 iicbus_dev
= device_add_child(dev
->dev
, "radeon_atom_hw_i2c", -1);
1104 if (iicbus_dev
== NULL
) {
1105 DRM_ERROR("Failed to create bridge for hw i2c %s\n",
1109 device_quiet(iicbus_dev
);
1110 device_set_softc(iicbus_dev
, i2c
);
1112 ret
= device_probe_and_attach(iicbus_dev
);
1114 DRM_ERROR("Attach failed for bridge for hw i2c %s\n",
1116 device_delete_child(dev
->dev
, iicbus_dev
);
1120 i2c
->adapter
= device_find_child(iicbus_dev
, "iicbus", -1);
1121 if (i2c
->adapter
== NULL
) {
1122 DRM_ERROR("hw i2c bridge doesn't have iicbus child\n");
1123 device_delete_child(dev
->dev
, iicbus_dev
);
1129 /* set the radeon bit adapter */
1130 ksnprintf(i2c
->name
, sizeof(i2c
->name
),
1131 "Radeon i2c bit bus %s", name
);
1132 iicbus_dev
= device_add_child(dev
->dev
, "radeon_iicbb", -1);
1133 if (iicbus_dev
== NULL
) {
1134 DRM_ERROR("Failed to create bridge for bb i2c %s\n",
1138 device_quiet(iicbus_dev
);
1139 device_set_softc(iicbus_dev
, i2c
);
1141 ret
= device_probe_and_attach(iicbus_dev
);
1143 DRM_ERROR("Attach failed for bridge for bb i2c %s\n",
1145 device_delete_child(dev
->dev
, iicbus_dev
);
1149 iicbb_dev
= device_find_child(iicbus_dev
, "iicbb", -1);
1150 if (iicbb_dev
== NULL
) {
1151 DRM_ERROR("bb i2c bridge doesn't have iicbb child\n");
1152 device_delete_child(dev
->dev
, iicbus_dev
);
1156 i2c
->adapter
= device_find_child(iicbb_dev
, "iicbus", -1);
1157 if (i2c
->adapter
== NULL
) {
1159 "bbbus bridge doesn't have iicbus grandchild\n");
1160 device_delete_child(dev
->dev
, iicbus_dev
);
1165 i2c
->iic_bus
= iicbus_dev
;
1177 struct radeon_i2c_chan
*radeon_i2c_create_dp(struct drm_device
*dev
,
1178 struct radeon_i2c_bus_rec
*rec
,
1181 struct radeon_i2c_chan
*i2c
;
1184 i2c
= kzalloc(sizeof(struct radeon_i2c_chan
), GFP_KERNEL
);
1190 ksnprintf(i2c
->name
, sizeof(i2c
->name
), "Radeon aux bus %s", name
);
1191 ret
= iic_dp_aux_add_bus(dev
->dev
, i2c
->name
,
1192 radeon_dp_i2c_aux_ch
, i2c
, &i2c
->iic_bus
,
1195 DRM_INFO("Failed to register i2c %s\n", name
);
1206 void radeon_i2c_destroy(struct radeon_i2c_chan
*i2c
)
1210 if (i2c
->iic_bus
!= NULL
) {
1214 ret
= device_delete_child(i2c
->dev
->dev
, i2c
->iic_bus
);
1216 KASSERT(ret
== 0, ("unable to detach iic bus %s: %d",
1222 /* Add the default buses */
1223 void radeon_i2c_init(struct radeon_device
*rdev
)
1226 DRM_INFO("hw_i2c forced on, you may experience display detection problems!\n");
1228 if (rdev
->is_atom_bios
)
1229 radeon_atombios_i2c_init(rdev
);
1231 radeon_combios_i2c_init(rdev
);
1234 /* remove all the buses */
1235 void radeon_i2c_fini(struct radeon_device
*rdev
)
1239 for (i
= 0; i
< RADEON_MAX_I2C_BUS
; i
++) {
1240 if (rdev
->i2c_bus
[i
]) {
1241 radeon_i2c_destroy(rdev
->i2c_bus
[i
]);
1242 rdev
->i2c_bus
[i
] = NULL
;
1247 /* Add additional buses */
1248 void radeon_i2c_add(struct radeon_device
*rdev
,
1249 struct radeon_i2c_bus_rec
*rec
,
1252 struct drm_device
*dev
= rdev
->ddev
;
1255 for (i
= 0; i
< RADEON_MAX_I2C_BUS
; i
++) {
1256 if (!rdev
->i2c_bus
[i
]) {
1257 rdev
->i2c_bus
[i
] = radeon_i2c_create(dev
, rec
, name
);
1263 /* looks up bus based on id */
1264 struct radeon_i2c_chan
*radeon_i2c_lookup(struct radeon_device
*rdev
,
1265 struct radeon_i2c_bus_rec
*i2c_bus
)
1269 for (i
= 0; i
< RADEON_MAX_I2C_BUS
; i
++) {
1270 if (rdev
->i2c_bus
[i
] &&
1271 (rdev
->i2c_bus
[i
]->rec
.i2c_id
== i2c_bus
->i2c_id
)) {
1272 return rdev
->i2c_bus
[i
];
1278 struct drm_encoder
*radeon_best_encoder(struct drm_connector
*connector
)
1283 void radeon_i2c_get_byte(struct radeon_i2c_chan
*i2c_bus
,
1290 struct iic_msg msgs
[] = {
1292 .slave
= slave_addr
<< 1,
1298 .slave
= slave_addr
<< 1,
1308 if (iicbus_transfer(i2c_bus
->adapter
, msgs
, 2) == 0) {
1310 DRM_DEBUG("val = 0x%02x\n", *val
);
1312 DRM_DEBUG("i2c 0x%02x 0x%02x read failed\n",
1317 void radeon_i2c_put_byte(struct radeon_i2c_chan
*i2c_bus
,
1323 struct iic_msg msg
= {
1324 .slave
= slave_addr
<< 1,
1333 if (iicbus_transfer(i2c_bus
->adapter
, &msg
, 1) != 0)
1334 DRM_DEBUG("i2c 0x%02x 0x%02x write failed\n",
1338 /* ddc router switching */
1339 void radeon_router_select_ddc_port(struct radeon_connector
*radeon_connector
)
1343 if (!radeon_connector
->router
.ddc_valid
)
1346 if (!radeon_connector
->router_bus
)
1349 radeon_i2c_get_byte(radeon_connector
->router_bus
,
1350 radeon_connector
->router
.i2c_addr
,
1352 val
&= ~radeon_connector
->router
.ddc_mux_control_pin
;
1353 radeon_i2c_put_byte(radeon_connector
->router_bus
,
1354 radeon_connector
->router
.i2c_addr
,
1356 radeon_i2c_get_byte(radeon_connector
->router_bus
,
1357 radeon_connector
->router
.i2c_addr
,
1359 val
&= ~radeon_connector
->router
.ddc_mux_control_pin
;
1360 val
|= radeon_connector
->router
.ddc_mux_state
;
1361 radeon_i2c_put_byte(radeon_connector
->router_bus
,
1362 radeon_connector
->router
.i2c_addr
,
1366 /* clock/data router switching */
1367 void radeon_router_select_cd_port(struct radeon_connector
*radeon_connector
)
1371 if (!radeon_connector
->router
.cd_valid
)
1374 if (!radeon_connector
->router_bus
)
1377 radeon_i2c_get_byte(radeon_connector
->router_bus
,
1378 radeon_connector
->router
.i2c_addr
,
1380 val
&= ~radeon_connector
->router
.cd_mux_control_pin
;
1381 radeon_i2c_put_byte(radeon_connector
->router_bus
,
1382 radeon_connector
->router
.i2c_addr
,
1384 radeon_i2c_get_byte(radeon_connector
->router_bus
,
1385 radeon_connector
->router
.i2c_addr
,
1387 val
&= ~radeon_connector
->router
.cd_mux_control_pin
;
1388 val
|= radeon_connector
->router
.cd_mux_state
;
1389 radeon_i2c_put_byte(radeon_connector
->router_bus
,
1390 radeon_connector
->router
.i2c_addr
,