sys/dev/drm/drm_dp_helper.c

   1 /*
   2  * Copyright © 2009 Keith Packard
   3  *
   4  * Permission to use, copy, modify, distribute, and sell this software and its
   5  * documentation for any purpose is hereby granted without fee, provided that
   6  * the above copyright notice appear in all copies and that both that copyright
   7  * notice and this permission notice appear in supporting documentation, and
   8  * that the name of the copyright holders not be used in advertising or
   9  * publicity pertaining to distribution of the software without specific,
  10  * written prior permission.  The copyright holders make no representations
  11  * about the suitability of this software for any purpose.  It is provided "as
  12  * is" without express or implied warranty.
  13  *
  14  * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
  15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
  16  * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
  17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
  18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
  20  * OF THIS SOFTWARE.
  21  */
  22
  23 #include <linux/kernel.h>
  24 #include <linux/module.h>
  25 #include <linux/delay.h>
  26 #include <linux/errno.h>
  27 #include <linux/sched.h>
  28 #include <linux/i2c.h>
  29 #include <drm/drm_dp_helper.h>
  30 #include <drm/drmP.h>
  31
  32 /**
  33  * DOC: dp helpers
  34  *
  35  * These functions contain some common logic and helpers at various abstraction
  36  * levels to deal with Display Port sink devices and related things like DP aux
  37  * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
  38  * blocks, ...
  39  */
  40
  41 /* Helpers for DP link training */
  42 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
  43 {
  44         return link_status[r - DP_LANE0_1_STATUS];
  45 }
  46
  47 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
  48                              int lane)
  49 {
  50         int i = DP_LANE0_1_STATUS + (lane >> 1);
  51         int s = (lane & 1) * 4;
  52         u8 l = dp_link_status(link_status, i);
  53         return (l >> s) & 0xf;
  54 }
  55
  56 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  57                           int lane_count)
  58 {
  59         u8 lane_align;
  60         u8 lane_status;
  61         int lane;
  62
  63         lane_align = dp_link_status(link_status,
  64                                     DP_LANE_ALIGN_STATUS_UPDATED);
  65         if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
  66                 return false;
  67         for (lane = 0; lane < lane_count; lane++) {
  68                 lane_status = dp_get_lane_status(link_status, lane);
  69                 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
  70                         return false;
  71         }
  72         return true;
  73 }
  74 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
  75
  76 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
  77                               int lane_count)
  78 {
  79         int lane;
  80         u8 lane_status;
  81
  82         for (lane = 0; lane < lane_count; lane++) {
  83                 lane_status = dp_get_lane_status(link_status, lane);
  84                 if ((lane_status & DP_LANE_CR_DONE) == 0)
  85                         return false;
  86         }
  87         return true;
  88 }
  89 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
  90
  91 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
  92                                      int lane)
  93 {
  94         int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
  95         int s = ((lane & 1) ?
  96                  DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
  97                  DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
  98         u8 l = dp_link_status(link_status, i);
  99
 100         return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
 101 }
 102 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
 103
 104 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
 105                                           int lane)
 106 {
 107         int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
 108         int s = ((lane & 1) ?
 109                  DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
 110                  DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
 111         u8 l = dp_link_status(link_status, i);
 112
 113         return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
 114 }
 115 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
 116
 117 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
 118         if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
 119                 udelay(100);
 120         else
 121                 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
 122 }
 123 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
 124
 125 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
 126         if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
 127                 udelay(400);
 128         else
 129                 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
 130 }
 131 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
 132
 133 u8 drm_dp_link_rate_to_bw_code(int link_rate)
 134 {
 135         switch (link_rate) {
 136         case 162000:
 137         default:
 138                 return DP_LINK_BW_1_62;
 139         case 270000:
 140                 return DP_LINK_BW_2_7;
 141         case 540000:
 142                 return DP_LINK_BW_5_4;
 143         }
 144 }
 145 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
 146
 147 int drm_dp_bw_code_to_link_rate(u8 link_bw)
 148 {
 149         switch (link_bw) {
 150         case DP_LINK_BW_1_62:
 151         default:
 152                 return 162000;
 153         case DP_LINK_BW_2_7:
 154                 return 270000;
 155         case DP_LINK_BW_5_4:
 156                 return 540000;
 157         }
 158 }
 159 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
 160
 161 #define AUX_RETRY_INTERVAL 500 /* us */
 162
 163 /**
 164  * DOC: dp helpers
 165  *
 166  * The DisplayPort AUX channel is an abstraction to allow generic, driver-
 167  * independent access to AUX functionality. Drivers can take advantage of
 168  * this by filling in the fields of the drm_dp_aux structure.
 169  *
 170  * Transactions are described using a hardware-independent drm_dp_aux_msg
 171  * structure, which is passed into a driver's .transfer() implementation.
 172  * Both native and I2C-over-AUX transactions are supported.
 173  */
 174
 175 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
 176                               unsigned int offset, void *buffer, size_t size)
 177 {
 178         struct drm_dp_aux_msg msg;
 179         unsigned int retry;
 180         int err;
 181
 182         memset(&msg, 0, sizeof(msg));
 183         msg.address = offset;
 184         msg.request = request;
 185         msg.buffer = buffer;
 186         msg.size = size;
 187
 188         /*
 189          * The specification doesn't give any recommendation on how often to
 190          * retry native transactions. We used to retry 7 times like for
 191          * aux i2c transactions but real world devices this wasn't
 192          * sufficient, bump to 32 which makes Dell 4k monitors happier.
 193          */
 194         for (retry = 0; retry < 32; retry++) {
 195
 196                 mutex_lock(&aux->hw_mutex);
 197                 err = aux->transfer(aux, &msg);
 198                 mutex_unlock(&aux->hw_mutex);
 199                 if (err < 0) {
 200                         if (err == -EBUSY)
 201                                 continue;
 202
 203                         return err;
 204                 }
 205
 206
 207                 switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
 208                 case DP_AUX_NATIVE_REPLY_ACK:
 209                         if (err < size)
 210                                 return -EPROTO;
 211                         return err;
 212
 213                 case DP_AUX_NATIVE_REPLY_NACK:
 214                         return -EIO;
 215
 216                 case DP_AUX_NATIVE_REPLY_DEFER:
 217                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 218                         break;
 219                 }
 220         }
 221
 222         DRM_DEBUG_KMS("too many retries, giving up\n");
 223         return -EIO;
 224 }
 225
 226 /**
 227  * drm_dp_dpcd_read() - read a series of bytes from the DPCD
 228  * @aux: DisplayPort AUX channel
 229  * @offset: address of the (first) register to read
 230  * @buffer: buffer to store the register values
 231  * @size: number of bytes in @buffer
 232  *
 233  * Returns the number of bytes transferred on success, or a negative error
 234  * code on failure. -EIO is returned if the request was NAKed by the sink or
 235  * if the retry count was exceeded. If not all bytes were transferred, this
 236  * function returns -EPROTO. Errors from the underlying AUX channel transfer
 237  * function, with the exception of -EBUSY (which causes the transaction to
 238  * be retried), are propagated to the caller.
 239  */
 240 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
 241                          void *buffer, size_t size)
 242 {
 243         return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
 244                                   size);
 245 }
 246 EXPORT_SYMBOL(drm_dp_dpcd_read);
 247
 248 /**
 249  * drm_dp_dpcd_write() - write a series of bytes to the DPCD
 250  * @aux: DisplayPort AUX channel
 251  * @offset: address of the (first) register to write
 252  * @buffer: buffer containing the values to write
 253  * @size: number of bytes in @buffer
 254  *
 255  * Returns the number of bytes transferred on success, or a negative error
 256  * code on failure. -EIO is returned if the request was NAKed by the sink or
 257  * if the retry count was exceeded. If not all bytes were transferred, this
 258  * function returns -EPROTO. Errors from the underlying AUX channel transfer
 259  * function, with the exception of -EBUSY (which causes the transaction to
 260  * be retried), are propagated to the caller.
 261  */
 262 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
 263                           void *buffer, size_t size)
 264 {
 265         return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
 266                                   size);
 267 }
 268 EXPORT_SYMBOL(drm_dp_dpcd_write);
 269
 270 /**
 271  * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
 272  * @aux: DisplayPort AUX channel
 273  * @status: buffer to store the link status in (must be at least 6 bytes)
 274  *
 275  * Returns the number of bytes transferred on success or a negative error
 276  * code on failure.
 277  */
 278 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
 279                                  u8 status[DP_LINK_STATUS_SIZE])
 280 {
 281         return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
 282                                 DP_LINK_STATUS_SIZE);
 283 }
 284 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
 285
 286 /**
 287  * drm_dp_link_probe() - probe a DisplayPort link for capabilities
 288  * @aux: DisplayPort AUX channel
 289  * @link: pointer to structure in which to return link capabilities
 290  *
 291  * The structure filled in by this function can usually be passed directly
 292  * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
 293  * configure the link based on the link's capabilities.
 294  *
 295  * Returns 0 on success or a negative error code on failure.
 296  */
 297 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
 298 {
 299         u8 values[3];
 300         int err;
 301
 302         memset(link, 0, sizeof(*link));
 303
 304         err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
 305         if (err < 0)
 306                 return err;
 307
 308         link->revision = values[0];
 309         link->rate = drm_dp_bw_code_to_link_rate(values[1]);
 310         link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
 311
 312         if (values[2] & DP_ENHANCED_FRAME_CAP)
 313                 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
 314
 315         return 0;
 316 }
 317 EXPORT_SYMBOL(drm_dp_link_probe);
 318
 319 /**
 320  * drm_dp_link_power_up() - power up a DisplayPort link
 321  * @aux: DisplayPort AUX channel
 322  * @link: pointer to a structure containing the link configuration
 323  *
 324  * Returns 0 on success or a negative error code on failure.
 325  */
 326 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
 327 {
 328         u8 value;
 329         int err;
 330
 331         /* DP_SET_POWER register is only available on DPCD v1.1 and later */
 332         if (link->revision < 0x11)
 333                 return 0;
 334
 335         err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
 336         if (err < 0)
 337                 return err;
 338
 339         value &= ~DP_SET_POWER_MASK;
 340         value |= DP_SET_POWER_D0;
 341
 342         err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
 343         if (err < 0)
 344                 return err;
 345
 346         /*
 347          * According to the DP 1.1 specification, a "Sink Device must exit the
 348          * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
 349          * Control Field" (register 0x600).
 350          */
 351         usleep_range(1000, 2000);
 352
 353         return 0;
 354 }
 355 EXPORT_SYMBOL(drm_dp_link_power_up);
 356
 357 /**
 358  * drm_dp_link_power_down() - power down a DisplayPort link
 359  * @aux: DisplayPort AUX channel
 360  * @link: pointer to a structure containing the link configuration
 361  *
 362  * Returns 0 on success or a negative error code on failure.
 363  */
 364 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
 365 {
 366         u8 value;
 367         int err;
 368
 369         /* DP_SET_POWER register is only available on DPCD v1.1 and later */
 370         if (link->revision < 0x11)
 371                 return 0;
 372
 373         err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
 374         if (err < 0)
 375                 return err;
 376
 377         value &= ~DP_SET_POWER_MASK;
 378         value |= DP_SET_POWER_D3;
 379
 380         err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
 381         if (err < 0)
 382                 return err;
 383
 384         return 0;
 385 }
 386 EXPORT_SYMBOL(drm_dp_link_power_down);
 387
 388 /**
 389  * drm_dp_link_configure() - configure a DisplayPort link
 390  * @aux: DisplayPort AUX channel
 391  * @link: pointer to a structure containing the link configuration
 392  *
 393  * Returns 0 on success or a negative error code on failure.
 394  */
 395 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
 396 {
 397         u8 values[2];
 398         int err;
 399
 400         values[0] = drm_dp_link_rate_to_bw_code(link->rate);
 401         values[1] = link->num_lanes;
 402
 403         if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
 404                 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
 405
 406         err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
 407         if (err < 0)
 408                 return err;
 409
 410         return 0;
 411 }
 412 EXPORT_SYMBOL(drm_dp_link_configure);
 413
 414 /*
 415  * I2C-over-AUX implementation
 416  */
 417
 418 #if 0
 419 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
 420 {
 421         return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
 422                I2C_FUNC_SMBUS_READ_BLOCK_DATA |
 423                I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
 424                I2C_FUNC_10BIT_ADDR;
 425 }
 426
 427 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */
 428 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */
 429 #define AUX_STOP_LEN 4
 430 #define AUX_CMD_LEN 4
 431 #define AUX_ADDRESS_LEN 20
 432 #define AUX_REPLY_PAD_LEN 4
 433 #define AUX_LENGTH_LEN 8
 434
 435 /*
 436  * Calculate the duration of the AUX request/reply in usec. Gives the
 437  * "best" case estimate, ie. successful while as short as possible.
 438  */
 439 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg)
 440 {
 441         int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
 442                 AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN;
 443
 444         if ((msg->request & DP_AUX_I2C_READ) == 0)
 445                 len += msg->size * 8;
 446
 447         return len;
 448 }
 449
 450 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg)
 451 {
 452         int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN +
 453                 AUX_CMD_LEN + AUX_REPLY_PAD_LEN;
 454
 455         /*
 456          * For read we expect what was asked. For writes there will
 457          * be 0 or 1 data bytes. Assume 0 for the "best" case.
 458          */
 459         if (msg->request & DP_AUX_I2C_READ)
 460                 len += msg->size * 8;
 461
 462         return len;
 463 }
 464
 465 #define I2C_START_LEN 1
 466 #define I2C_STOP_LEN 1
 467 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */
 468 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */
 469
 470 /*
 471  * Calculate the length of the i2c transfer in usec, assuming
 472  * the i2c bus speed is as specified. Gives the the "worst"
 473  * case estimate, ie. successful while as long as possible.
 474  * Doesn't account the the "MOT" bit, and instead assumes each
 475  * message includes a START, ADDRESS and STOP. Neither does it
 476  * account for additional random variables such as clock stretching.
 477  */
 478 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg,
 479                                    int i2c_speed_khz)
 480 {
 481         /* AUX bitrate is 1MHz, i2c bitrate as specified */
 482         return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN +
 483                              msg->size * I2C_DATA_LEN +
 484                              I2C_STOP_LEN) * 1000, i2c_speed_khz);
 485 }
 486
 487 /*
 488  * Deterine how many retries should be attempted to successfully transfer
 489  * the specified message, based on the estimated durations of the
 490  * i2c and AUX transfers.
 491  */
 492 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg,
 493                               int i2c_speed_khz)
 494 {
 495         int aux_time_us = drm_dp_aux_req_duration(msg) +
 496                 drm_dp_aux_reply_duration(msg);
 497         int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz);
 498
 499         return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL);
 500 }
 501
 502 /*
 503  * FIXME currently assumes 10 kHz as some real world devices seem
 504  * to require it. We should query/set the speed via DPCD if supported.
 505  */
 506 static int dp_aux_i2c_speed_khz __read_mostly = 10;
 507 module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644);
 508 MODULE_PARM_DESC(dp_aux_i2c_speed_khz,
 509                  "Assumed speed of the i2c bus in kHz, (1-400, default 10)");
 510
 511 /*
 512  * Transfer a single I2C-over-AUX message and handle various error conditions,
 513  * retrying the transaction as appropriate.  It is assumed that the
 514  * aux->transfer function does not modify anything in the msg other than the
 515  * reply field.
 516  *
 517  * Returns bytes transferred on success, or a negative error code on failure.
 518  */
 519 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 520 {
 521         unsigned int retry, defer_i2c;
 522         int ret;
 523         /*
 524          * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
 525          * is required to retry at least seven times upon receiving AUX_DEFER
 526          * before giving up the AUX transaction.
 527          *
 528          * We also try to account for the i2c bus speed.
 529          */
 530         int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz));
 531
 532         for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) {
 533                 mutex_lock(&aux->hw_mutex);
 534                 ret = aux->transfer(aux, msg);
 535                 mutex_unlock(&aux->hw_mutex);
 536                 if (ret < 0) {
 537                         if (ret == -EBUSY)
 538                                 continue;
 539
 540                         DRM_DEBUG_KMS("transaction failed: %d\n", ret);
 541                         return ret;
 542                 }
 543
 544
 545                 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
 546                 case DP_AUX_NATIVE_REPLY_ACK:
 547                         /*
 548                          * For I2C-over-AUX transactions this isn't enough, we
 549                          * need to check for the I2C ACK reply.
 550                          */
 551                         break;
 552
 553                 case DP_AUX_NATIVE_REPLY_NACK:
 554                         DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
 555                         return -EREMOTEIO;
 556
 557                 case DP_AUX_NATIVE_REPLY_DEFER:
 558                         DRM_DEBUG_KMS("native defer\n");
 559                         /*
 560                          * We could check for I2C bit rate capabilities and if
 561                          * available adjust this interval. We could also be
 562                          * more careful with DP-to-legacy adapters where a
 563                          * long legacy cable may force very low I2C bit rates.
 564                          *
 565                          * For now just defer for long enough to hopefully be
 566                          * safe for all use-cases.
 567                          */
 568                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 569                         continue;
 570
 571                 default:
 572                         DRM_ERROR("invalid native reply %#04x\n", msg->reply);
 573                         return -EREMOTEIO;
 574                 }
 575
 576                 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
 577                 case DP_AUX_I2C_REPLY_ACK:
 578                         /*
 579                          * Both native ACK and I2C ACK replies received. We
 580                          * can assume the transfer was successful.
 581                          */
 582                         return ret;
 583
 584                 case DP_AUX_I2C_REPLY_NACK:
 585                         DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
 586                         aux->i2c_nack_count++;
 587                         return -EREMOTEIO;
 588
 589                 case DP_AUX_I2C_REPLY_DEFER:
 590                         DRM_DEBUG_KMS("I2C defer\n");
 591                         /* DP Compliance Test 4.2.2.5 Requirement:
 592                          * Must have at least 7 retries for I2C defers on the
 593                          * transaction to pass this test
 594                          */
 595                         aux->i2c_defer_count++;
 596                         if (defer_i2c < 7)
 597                                 defer_i2c++;
 598                         usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100);
 599                         continue;
 600
 601                 default:
 602                         DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
 603                         return -EREMOTEIO;
 604                 }
 605         }
 606
 607         DRM_DEBUG_KMS("too many retries, giving up\n");
 608         return -EREMOTEIO;
 609 }
 610
 611 /*
 612  * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
 613  *
 614  * Returns an error code on failure, or a recommended transfer size on success.
 615  */
 616 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
 617 {
 618         int err, ret = orig_msg->size;
 619         struct drm_dp_aux_msg msg = *orig_msg;
 620
 621         while (msg.size > 0) {
 622                 err = drm_dp_i2c_do_msg(aux, &msg);
 623                 if (err <= 0)
 624                         return err == 0 ? -EPROTO : err;
 625
 626                 if (err < msg.size && err < ret) {
 627                         DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
 628                                       msg.size, err);
 629                         ret = err;
 630                 }
 631
 632                 msg.size -= err;
 633                 msg.buffer += err;
 634         }
 635
 636         return ret;
 637 }
 638
 639 /*
 640  * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
 641  * packets to be as large as possible. If not, the I2C transactions never
 642  * succeed. Hence the default is maximum.
 643  */
 644 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
 645 module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644);
 646 MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
 647                  "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
 648
 649 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
 650                            int num)
 651 {
 652         struct drm_dp_aux *aux = adapter->algo_data;
 653         unsigned int i, j;
 654         unsigned transfer_size;
 655         struct drm_dp_aux_msg msg;
 656         int err = 0;
 657
 658         dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
 659
 660         memset(&msg, 0, sizeof(msg));
 661
 662         for (i = 0; i < num; i++) {
 663                 msg.address = msgs[i].addr;
 664                 msg.request = (msgs[i].flags & I2C_M_RD) ?
 665                         DP_AUX_I2C_READ :
 666                         DP_AUX_I2C_WRITE;
 667                 msg.request |= DP_AUX_I2C_MOT;
 668                 /* Send a bare address packet to start the transaction.
 669                  * Zero sized messages specify an address only (bare
 670                  * address) transaction.
 671                  */
 672                 msg.buffer = NULL;
 673                 msg.size = 0;
 674                 err = drm_dp_i2c_do_msg(aux, &msg);
 675                 if (err < 0)
 676                         break;
 677                 /* We want each transaction to be as large as possible, but
 678                  * we'll go to smaller sizes if the hardware gives us a
 679                  * short reply.
 680                  */
 681                 transfer_size = dp_aux_i2c_transfer_size;
 682                 for (j = 0; j < msgs[i].len; j += msg.size) {
 683                         msg.buffer = msgs[i].buf + j;
 684                         msg.size = min(transfer_size, msgs[i].len - j);
 685
 686                         err = drm_dp_i2c_drain_msg(aux, &msg);
 687                         if (err < 0)
 688                                 break;
 689                         transfer_size = err;
 690                 }
 691                 if (err < 0)
 692                         break;
 693         }
 694         if (err >= 0)
 695                 err = num;
 696         /* Send a bare address packet to close out the transaction.
 697          * Zero sized messages specify an address only (bare
 698          * address) transaction.
 699          */
 700         msg.request &= ~DP_AUX_I2C_MOT;
 701         msg.buffer = NULL;
 702         msg.size = 0;
 703         (void)drm_dp_i2c_do_msg(aux, &msg);
 704
 705         return err;
 706 }
 707
 708 static const struct i2c_algorithm drm_dp_i2c_algo = {
 709         .functionality = drm_dp_i2c_functionality,
 710         .master_xfer = drm_dp_i2c_xfer,
 711 };
 712
 713 /**
 714  * drm_dp_aux_register() - initialise and register aux channel
 715  * @aux: DisplayPort AUX channel
 716  *
 717  * Returns 0 on success or a negative error code on failure.
 718  */
 719 int drm_dp_aux_register(struct drm_dp_aux *aux)
 720 {
 721         lockinit(&aux->hw_mutex, "ahm", 0, LK_CANRECURSE);
 722
 723         aux->ddc.algo = &drm_dp_i2c_algo;
 724         aux->ddc.algo_data = aux;
 725         aux->ddc.retries = 3;
 726
 727         aux->ddc.class = I2C_CLASS_DDC;
 728         aux->ddc.owner = THIS_MODULE;
 729         aux->ddc.dev.parent = aux->dev;
 730         aux->ddc.dev.of_node = aux->dev->of_node;
 731
 732         strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
 733                 sizeof(aux->ddc.name));
 734
 735         return i2c_add_adapter(&aux->ddc);
 736 }
 737 EXPORT_SYMBOL(drm_dp_aux_register);
 738 #endif
 739
 740 /**
 741  * drm_dp_aux_unregister() - unregister an AUX adapter
 742  * @aux: DisplayPort AUX channel
 743  */
 744 void drm_dp_aux_unregister(struct drm_dp_aux *aux)
 745 {
 746 #if 0
 747         i2c_del_adapter(&aux->ddc);
 748 #endif
 749 }
 750 EXPORT_SYMBOL(drm_dp_aux_unregister);