sys/dev/netif/re/if_revar.h

   1 /*
   2  * Copyright (c) 2004
   3  *      Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   4  *
   5  * Copyright (c) 1997, 1998-2003
   6  *      Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions
  10  * are met:
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. All advertising materials mentioning features or use of this software
  17  *    must display the following acknowledgement:
  18  *      This product includes software developed by Bill Paul.
  19  * 4. Neither the name of the author nor the names of any co-contributors
  20  *    may be used to endorse or promote products derived from this software
  21  *    without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
  24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  26  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
  27  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  28  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  29  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  30  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  31  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  32  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  33  * THE POSSIBILITY OF SUCH DAMAGE.
  34  *
  35  * $FreeBSD: src/sys/pci/if_rlreg.h,v 1.42 2004/05/24 19:39:23 jhb Exp $
  36  * $DragonFly: src/sys/dev/netif/re/if_revar.h,v 1.9 2008/10/05 01:43:09 sephe Exp $
  37  */
  38
  39 struct re_type {
  40         uint16_t                re_vid;
  41         uint16_t                re_did;
  42         int                     re_basetype;
  43         const char              *re_name;
  44 };
  45
  46 struct re_hwrev {
  47         uint32_t                re_rev;
  48         int                     re_type;        /* RE_{8139CPLUS,8169} */
  49         uint32_t                re_flags;       /* see RE_F_ */
  50         int                     re_swcsum_lim;
  51         int                     re_maxmtu;
  52 };
  53
  54 #define RE_8139CPLUS            3
  55 #define RE_8169                 4
  56
  57 struct re_softc;
  58
  59 #define RE_MAXSEGS              16
  60
  61 struct re_dmaload_arg {
  62         int                     re_nsegs;
  63         bus_dma_segment_t       *re_segs;
  64 };
  65
  66 struct re_list_data {
  67         struct mbuf             *re_tx_mbuf[RE_TX_DESC_CNT];
  68         struct mbuf             *re_rx_mbuf[RE_RX_DESC_CNT];
  69         bus_addr_t              re_rx_paddr[RE_RX_DESC_CNT];
  70         int                     re_tx_prodidx;
  71         int                     re_rx_prodidx;
  72         int                     re_tx_considx;
  73         int                     re_tx_free;
  74         bus_dmamap_t            re_tx_dmamap[RE_TX_DESC_CNT];
  75         bus_dmamap_t            re_rx_dmamap[RE_RX_DESC_CNT];
  76         bus_dmamap_t            re_rx_spare;
  77         bus_dma_tag_t           re_mtag;        /* mbuf mapping tag */
  78         bus_dma_tag_t           re_stag;        /* stats mapping tag */
  79         bus_dmamap_t            re_smap;        /* stats map */
  80         struct re_stats         *re_stats;
  81         bus_addr_t              re_stats_addr;
  82         bus_dma_tag_t           re_rx_list_tag;
  83         bus_dmamap_t            re_rx_list_map;
  84         struct re_desc          *re_rx_list;
  85         bus_addr_t              re_rx_list_addr;
  86         bus_dma_tag_t           re_tx_list_tag;
  87         bus_dmamap_t            re_tx_list_map;
  88         struct re_desc          *re_tx_list;
  89         bus_addr_t              re_tx_list_addr;
  90 };
  91
  92 struct re_softc {
  93         struct arpcom           arpcom;         /* interface info */
  94 #ifdef RE_DIAG
  95         device_t                re_dev;
  96 #endif
  97         bus_space_handle_t      re_bhandle;     /* bus space handle */
  98         bus_space_tag_t         re_btag;        /* bus space tag */
  99         struct resource         *re_res;
 100         struct resource         *re_irq;
 101         void                    *re_intrhand;
 102         device_t                re_miibus;
 103         bus_dma_tag_t           re_parent_tag;
 104         bus_dma_tag_t           re_tag;
 105         uint8_t                 re_type;
 106         int                     re_eecmd_read;
 107         uint8_t                 re_stats_no_timeout;
 108         int                     re_txthresh;
 109         uint32_t                re_hwrev;
 110         struct re_list_data     re_ldata;
 111         struct callout          re_timer;
 112         struct mbuf             *re_head;
 113         struct mbuf             *re_tail;
 114         int                     re_drop_rxfrag;
 115         uint32_t                re_flags;       /* see RE_F_ */
 116         uint32_t                re_rxlenmask;
 117         int                     re_txstart;
 118         int                     re_testmode;
 119         int                     suspended;      /* 0 = normal  1 = suspended */
 120         int                     re_link;
 121         int                     re_eewidth;
 122         int                     re_swcsum_lim;
 123         int                     re_maxmtu;
 124 #ifdef DEVICE_POLLING
 125         int                     rxcycles;
 126 #endif
 127
 128         struct sysctl_ctx_list  re_sysctl_ctx;
 129         struct sysctl_oid       *re_sysctl_tree;
 130         uint16_t                re_intrs;
 131         uint16_t                re_tx_ack;
 132
 133 #ifndef BURN_BRIDGES
 134         uint32_t                saved_maps[5];  /* pci data */
 135         uint32_t                saved_biosaddr;
 136         uint8_t                 saved_intline;
 137         uint8_t                 saved_cachelnsz;
 138         uint8_t                 saved_lattimer;
 139 #endif
 140 };
 141
 142 #define RE_F_HASMPC             0x1
 143 #define RE_F_PCIE               0x2
 144
 145 #define RE_SWCSUM_LIM_8169      2038
 146
 147 #define RE_TX_MODERATION_IS_ENABLED(sc)                 \
 148         ((sc)->re_tx_ack == RE_ISR_TIMEOUT_EXPIRED)
 149
 150 #define RE_DISABLE_TX_MODERATION(sc) do {               \
 151         (sc)->re_tx_ack = RE_ISR_TX_OK;                 \
 152         (sc)->re_intrs = RE_INTRS | RE_ISR_TX_OK;       \
 153 } while (0)
 154
 155 #define RE_ENABLE_TX_MODERATION(sc) do {                \
 156         (sc)->re_tx_ack = RE_ISR_TIMEOUT_EXPIRED;       \
 157         (sc)->re_intrs = RE_INTRS;                      \
 158 } while (0)
 159
 160 /*
 161  * register space access macros
 162  */
 163 #define CSR_WRITE_STREAM_4(sc, reg, val)        \
 164         bus_space_write_stream_4(sc->re_btag, sc->re_bhandle, reg, val)
 165 #define CSR_WRITE_4(sc, reg, val)       \
 166         bus_space_write_4(sc->re_btag, sc->re_bhandle, reg, val)
 167 #define CSR_WRITE_2(sc, reg, val)       \
 168         bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val)
 169 #define CSR_WRITE_1(sc, reg, val)       \
 170         bus_space_write_1(sc->re_btag, sc->re_bhandle, reg, val)
 171
 172 #define CSR_READ_4(sc, reg)             \
 173         bus_space_read_4(sc->re_btag, sc->re_bhandle, reg)
 174 #define CSR_READ_2(sc, reg)             \
 175         bus_space_read_2(sc->re_btag, sc->re_bhandle, reg)
 176 #define CSR_READ_1(sc, reg)             \
 177         bus_space_read_1(sc->re_btag, sc->re_bhandle, reg)
 178
 179 #define CSR_SETBIT_1(sc, reg, val)      \
 180         CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) | (val))
 181 #define CSR_CLRBIT_1(sc, reg, val)      \
 182         CSR_WRITE_1(sc, reg, CSR_READ_1(sc, reg) & ~(val))
 183
 184 #define RE_TXDESC_SPARE         4